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State 16 contains 1 shift/reduce conflict.
Grammar
Number, Line, Rule
1 34 protelfile -> objects
2 37 objects -> objects object
3 38 objects -> object
4 42 object -> component_obj
5 43 object -> net_obj
6 47 component_obj -> LBRK NL comp_ident NL comp_value NL comp_type NL skip_line skip_line skip_line RBRK NL
7 50 comp_ident -> ASTRING
8 52 comp_type -> ASTRING
9 55 comp_value -> ASTRING
10 59 net_obj -> LB2 NL net_ident NL pin_list RB2 NL
11 62 pin_list -> pin_list socket_pin
12 63 pin_list -> socket_pin
13 64 pin_list -> /* empty */
14 67 net_ident -> ASTRING
15 68 net_ident -> ASTRING MINUS ASTRING
16 72 skip_line -> NL
17 73 skip_line -> SPC NL
18 77 socket_pin -> socket_ident MINUS ASTRING NL
19 83 socket_ident -> ASTRING
Terminals, with rules where they appear
$ (-1)
error (256)
SPC (257) 17
NL (258) 6 10 16 17 18
LBRK (259) 6
RBRK (260) 6
LB2 (261) 10
RB2 (262) 10
MINUS (263) 15 18
ASTRING (264) 7 8 9 14 15 18 19
Nonterminals, with rules where they appear
protelfile (11)
on left: 1
objects (12)
on left: 2 3, on right: 1 2
object (13)
on left: 4 5, on right: 2 3
component_obj (14)
on left: 6, on right: 4
comp_ident (15)
on left: 7, on right: 6
comp_type (16)
on left: 8, on right: 6
comp_value (17)
on left: 9, on right: 6
net_obj (18)
on left: 10, on right: 5
pin_list (19)
on left: 11 12 13, on right: 10 11
net_ident (20)
on left: 14 15, on right: 10
skip_line (21)
on left: 16 17, on right: 6
socket_pin (22)
on left: 18, on right: 11 12
socket_ident (23)
on left: 19, on right: 18
state 0
LBRK shift, and go to state 1
LB2 shift, and go to state 2
protelfile go to state 42
objects go to state 3
object go to state 4
component_obj go to state 5
net_obj go to state 6
state 1
component_obj -> LBRK . NL comp_ident NL comp_value NL comp_type NL skip_line skip_line skip_line RBRK NL (rule 6)
NL shift, and go to state 7
state 2
net_obj -> LB2 . NL net_ident NL pin_list RB2 NL (rule 10)
NL shift, and go to state 8
state 3
protelfile -> objects . (rule 1)
objects -> objects . object (rule 2)
LBRK shift, and go to state 1
LB2 shift, and go to state 2
$default reduce using rule 1 (protelfile)
object go to state 9
component_obj go to state 5
net_obj go to state 6
state 4
objects -> object . (rule 3)
$default reduce using rule 3 (objects)
state 5
object -> component_obj . (rule 4)
$default reduce using rule 4 (object)
state 6
object -> net_obj . (rule 5)
$default reduce using rule 5 (object)
state 7
component_obj -> LBRK NL . comp_ident NL comp_value NL comp_type NL skip_line skip_line skip_line RBRK NL (rule 6)
ASTRING shift, and go to state 10
comp_ident go to state 11
state 8
net_obj -> LB2 NL . net_ident NL pin_list RB2 NL (rule 10)
ASTRING shift, and go to state 12
net_ident go to state 13
state 9
objects -> objects object . (rule 2)
$default reduce using rule 2 (objects)
state 10
comp_ident -> ASTRING . (rule 7)
$default reduce using rule 7 (comp_ident)
state 11
component_obj -> LBRK NL comp_ident . NL comp_value NL comp_type NL skip_line skip_line skip_line RBRK NL (rule 6)
NL shift, and go to state 14
state 12
net_ident -> ASTRING . (rule 14)
net_ident -> ASTRING . MINUS ASTRING (rule 15)
MINUS shift, and go to state 15
$default reduce using rule 14 (net_ident)
state 13
net_obj -> LB2 NL net_ident . NL pin_list RB2 NL (rule 10)
NL shift, and go to state 16
state 14
component_obj -> LBRK NL comp_ident NL . comp_value NL comp_type NL skip_line skip_line skip_line RBRK NL (rule 6)
ASTRING shift, and go to state 17
comp_value go to state 18
state 15
net_ident -> ASTRING MINUS . ASTRING (rule 15)
ASTRING shift, and go to state 19
state 16
net_obj -> LB2 NL net_ident NL . pin_list RB2 NL (rule 10)
ASTRING shift, and go to state 20
ASTRING [reduce using rule 13 (pin_list)]
$default reduce using rule 13 (pin_list)
pin_list go to state 21
socket_pin go to state 22
socket_ident go to state 23
state 17
comp_value -> ASTRING . (rule 9)
$default reduce using rule 9 (comp_value)
state 18
component_obj -> LBRK NL comp_ident NL comp_value . NL comp_type NL skip_line skip_line skip_line RBRK NL (rule 6)
NL shift, and go to state 24
state 19
net_ident -> ASTRING MINUS ASTRING . (rule 15)
$default reduce using rule 15 (net_ident)
state 20
socket_ident -> ASTRING . (rule 19)
$default reduce using rule 19 (socket_ident)
state 21
net_obj -> LB2 NL net_ident NL pin_list . RB2 NL (rule 10)
pin_list -> pin_list . socket_pin (rule 11)
RB2 shift, and go to state 25
ASTRING shift, and go to state 20
socket_pin go to state 26
socket_ident go to state 23
state 22
pin_list -> socket_pin . (rule 12)
$default reduce using rule 12 (pin_list)
state 23
socket_pin -> socket_ident . MINUS ASTRING NL (rule 18)
MINUS shift, and go to state 27
state 24
component_obj -> LBRK NL comp_ident NL comp_value NL . comp_type NL skip_line skip_line skip_line RBRK NL (rule 6)
ASTRING shift, and go to state 28
comp_type go to state 29
state 25
net_obj -> LB2 NL net_ident NL pin_list RB2 . NL (rule 10)
NL shift, and go to state 30
state 26
pin_list -> pin_list socket_pin . (rule 11)
$default reduce using rule 11 (pin_list)
state 27
socket_pin -> socket_ident MINUS . ASTRING NL (rule 18)
ASTRING shift, and go to state 31
state 28
comp_type -> ASTRING . (rule 8)
$default reduce using rule 8 (comp_type)
state 29
component_obj -> LBRK NL comp_ident NL comp_value NL comp_type . NL skip_line skip_line skip_line RBRK NL (rule 6)
NL shift, and go to state 32
state 30
net_obj -> LB2 NL net_ident NL pin_list RB2 NL . (rule 10)
$default reduce using rule 10 (net_obj)
state 31
socket_pin -> socket_ident MINUS ASTRING . NL (rule 18)
NL shift, and go to state 33
state 32
component_obj -> LBRK NL comp_ident NL comp_value NL comp_type NL . skip_line skip_line skip_line RBRK NL (rule 6)
SPC shift, and go to state 34
NL shift, and go to state 35
skip_line go to state 36
state 33
socket_pin -> socket_ident MINUS ASTRING NL . (rule 18)
$default reduce using rule 18 (socket_pin)
state 34
skip_line -> SPC . NL (rule 17)
NL shift, and go to state 37
state 35
skip_line -> NL . (rule 16)
$default reduce using rule 16 (skip_line)
state 36
component_obj -> LBRK NL comp_ident NL comp_value NL comp_type NL skip_line . skip_line skip_line RBRK NL (rule 6)
SPC shift, and go to state 34
NL shift, and go to state 35
skip_line go to state 38
state 37
skip_line -> SPC NL . (rule 17)
$default reduce using rule 17 (skip_line)
state 38
component_obj -> LBRK NL comp_ident NL comp_value NL comp_type NL skip_line skip_line . skip_line RBRK NL (rule 6)
SPC shift, and go to state 34
NL shift, and go to state 35
skip_line go to state 39
state 39
component_obj -> LBRK NL comp_ident NL comp_value NL comp_type NL skip_line skip_line skip_line . RBRK NL (rule 6)
RBRK shift, and go to state 40
state 40
component_obj -> LBRK NL comp_ident NL comp_value NL comp_type NL skip_line skip_line skip_line RBRK . NL (rule 6)
NL shift, and go to state 41
state 41
component_obj -> LBRK NL comp_ident NL comp_value NL comp_type NL skip_line skip_line skip_line RBRK NL . (rule 6)
$default reduce using rule 6 (component_obj)
state 42
$ go to state 43
state 43
$ go to state 44
state 44
$default accept