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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32l1xx_hal_spi.c
  4.   * @author  MCD Application Team
  5.   * @brief   SPI HAL module driver.
  6.   *          This file provides firmware functions to manage the following
  7.   *          functionalities of the Serial Peripheral Interface (SPI) peripheral:
  8.   *           + Initialization and de-initialization functions
  9.   *           + IO operation functions
  10.   *           + Peripheral Control functions
  11.   *           + Peripheral State functions
  12.   *
  13.   @verbatim
  14.   ==============================================================================
  15.                         ##### How to use this driver #####
  16.   ==============================================================================
  17.     [..]
  18.       The SPI HAL driver can be used as follows:
  19.  
  20.       (#) Declare a SPI_HandleTypeDef handle structure, for example:
  21.           SPI_HandleTypeDef  hspi;
  22.  
  23.       (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit() API:
  24.           (##) Enable the SPIx interface clock
  25.           (##) SPI pins configuration
  26.               (+++) Enable the clock for the SPI GPIOs
  27.               (+++) Configure these SPI pins as alternate function push-pull
  28.           (##) NVIC configuration if you need to use interrupt process
  29.               (+++) Configure the SPIx interrupt priority
  30.               (+++) Enable the NVIC SPI IRQ handle
  31.           (##) DMA Configuration if you need to use DMA process
  32.               (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive Stream/Channel
  33.               (+++) Enable the DMAx clock
  34.               (+++) Configure the DMA handle parameters
  35.               (+++) Configure the DMA Tx or Rx Stream/Channel
  36.               (+++) Associate the initialized hdma_tx(or _rx)  handle to the hspi DMA Tx or Rx handle
  37.               (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Stream/Channel
  38.  
  39.       (#) Program the Mode, BidirectionalMode , Data size, Baudrate Prescaler, NSS
  40.           management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
  41.  
  42.       (#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
  43.           (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
  44.               by calling the customized HAL_SPI_MspInit() API.
  45.      [..]
  46.        Circular mode restriction:
  47.       (#) The DMA circular mode cannot be used when the SPI is configured in these modes:
  48.           (##) Master 2Lines RxOnly
  49.           (##) Master 1Line Rx
  50.       (#) The CRC feature is not managed when the DMA circular mode is enabled
  51.       (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
  52.           the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
  53.      [..]
  54.        Master Receive mode restriction:
  55.       (#) In Master unidirectional receive-only mode (MSTR =1, BIDIMODE=0, RXONLY=1) or
  56.           bidirectional receive mode (MSTR=1, BIDIMODE=1, BIDIOE=0), to ensure that the SPI
  57.           does not initiate a new transfer the following procedure has to be respected:
  58.           (##) HAL_SPI_DeInit()
  59.           (##) HAL_SPI_Init()
  60.      [..]
  61.        Callback registration:
  62.  
  63.       (#) The compilation flag USE_HAL_SPI_REGISTER_CALLBACKS when set to 1U
  64.           allows the user to configure dynamically the driver callbacks.
  65.           Use Functions HAL_SPI_RegisterCallback() to register an interrupt callback.
  66.  
  67.           Function HAL_SPI_RegisterCallback() allows to register following callbacks:
  68.             (++) TxCpltCallback        : SPI Tx Completed callback
  69.             (++) RxCpltCallback        : SPI Rx Completed callback
  70.             (++) TxRxCpltCallback      : SPI TxRx Completed callback
  71.             (++) TxHalfCpltCallback    : SPI Tx Half Completed callback
  72.             (++) RxHalfCpltCallback    : SPI Rx Half Completed callback
  73.             (++) TxRxHalfCpltCallback  : SPI TxRx Half Completed callback
  74.             (++) ErrorCallback         : SPI Error callback
  75.             (++) AbortCpltCallback     : SPI Abort callback
  76.             (++) MspInitCallback       : SPI Msp Init callback
  77.             (++) MspDeInitCallback     : SPI Msp DeInit callback
  78.           This function takes as parameters the HAL peripheral handle, the Callback ID
  79.           and a pointer to the user callback function.
  80.  
  81.  
  82.       (#) Use function HAL_SPI_UnRegisterCallback to reset a callback to the default
  83.           weak function.
  84.           HAL_SPI_UnRegisterCallback takes as parameters the HAL peripheral handle,
  85.           and the Callback ID.
  86.           This function allows to reset following callbacks:
  87.             (++) TxCpltCallback        : SPI Tx Completed callback
  88.             (++) RxCpltCallback        : SPI Rx Completed callback
  89.             (++) TxRxCpltCallback      : SPI TxRx Completed callback
  90.             (++) TxHalfCpltCallback    : SPI Tx Half Completed callback
  91.             (++) RxHalfCpltCallback    : SPI Rx Half Completed callback
  92.             (++) TxRxHalfCpltCallback  : SPI TxRx Half Completed callback
  93.             (++) ErrorCallback         : SPI Error callback
  94.             (++) AbortCpltCallback     : SPI Abort callback
  95.             (++) MspInitCallback       : SPI Msp Init callback
  96.             (++) MspDeInitCallback     : SPI Msp DeInit callback
  97.  
  98.        [..]
  99.        By default, after the HAL_SPI_Init() and when the state is HAL_SPI_STATE_RESET
  100.        all callbacks are set to the corresponding weak functions:
  101.        examples HAL_SPI_MasterTxCpltCallback(), HAL_SPI_MasterRxCpltCallback().
  102.        Exception done for MspInit and MspDeInit functions that are
  103.        reset to the legacy weak functions in the HAL_SPI_Init()/ HAL_SPI_DeInit() only when
  104.        these callbacks are null (not registered beforehand).
  105.        If MspInit or MspDeInit are not null, the HAL_SPI_Init()/ HAL_SPI_DeInit()
  106.        keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
  107.  
  108.        [..]
  109.        Callbacks can be registered/unregistered in HAL_SPI_STATE_READY state only.
  110.        Exception done MspInit/MspDeInit functions that can be registered/unregistered
  111.        in HAL_SPI_STATE_READY or HAL_SPI_STATE_RESET state,
  112.        thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
  113.        Then, the user first registers the MspInit/MspDeInit user callbacks
  114.        using HAL_SPI_RegisterCallback() before calling HAL_SPI_DeInit()
  115.        or HAL_SPI_Init() function.
  116.  
  117.        [..]
  118.        When the compilation define USE_HAL_PPP_REGISTER_CALLBACKS is set to 0 or
  119.        not defined, the callback registering feature is not available
  120.        and weak (surcharged) callbacks are used.
  121.  
  122.      [..]
  123.        Using the HAL it is not possible to reach all supported SPI frequency with the different SPI Modes,
  124.        the following table resume the max SPI frequency reached with data size 8bits/16bits,
  125.          according to frequency of the APBx Peripheral Clock (fPCLK) used by the SPI instance.
  126.  
  127.   @endverbatim
  128.  
  129.   Additional table :
  130.  
  131.        DataSize = SPI_DATASIZE_8BIT:
  132.        +----------------------------------------------------------------------------------------------+
  133.        |         |                | 2Lines Fullduplex   |     2Lines RxOnly    |         1Line        |
  134.        | Process | Transfer mode  |---------------------|----------------------|----------------------|
  135.        |         |                |  Master  |  Slave   |  Master   |  Slave   |  Master   |  Slave   |
  136.        |==============================================================================================|
  137.        |    T    |     Polling    | Fpclk/2  | Fpclk/2  |    NA     |    NA    |    NA     |   NA     |
  138.        |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
  139.        |    /    |     Interrupt  | Fpclk/4  | Fpclk/8  |    NA     |    NA    |    NA     |   NA     |
  140.        |    R    |----------------|----------|----------|-----------|----------|-----------|----------|
  141.        |    X    |       DMA      | Fpclk/2  | Fpclk/2  |    NA     |    NA    |    NA     |   NA     |
  142.        |=========|================|==========|==========|===========|==========|===========|==========|
  143.        |         |     Polling    | Fpclk/2  | Fpclk/2  | Fpclk/64  | Fpclk/2  | Fpclk/64  | Fpclk/2  |
  144.        |         |----------------|----------|----------|-----------|----------|-----------|----------|
  145.        |    R    |     Interrupt  | Fpclk/8  | Fpclk/8  | Fpclk/64  | Fpclk/2  | Fpclk/64  | Fpclk/2  |
  146.        |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
  147.        |         |       DMA      | Fpclk/2  | Fpclk/2  | Fpclk/64  | Fpclk/2  | Fpclk/128 | Fpclk/2  |
  148.        |=========|================|==========|==========|===========|==========|===========|==========|
  149.        |         |     Polling    | Fpclk/2  | Fpclk/4  |     NA    |    NA    | Fpclk/2   | Fpclk/64 |
  150.        |         |----------------|----------|----------|-----------|----------|-----------|----------|
  151.        |    T    |     Interrupt  | Fpclk/2  | Fpclk/4  |     NA    |    NA    | Fpclk/2   | Fpclk/64 |
  152.        |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
  153.        |         |       DMA      | Fpclk/2  | Fpclk/2  |     NA    |    NA    | Fpclk/2   | Fpclk/128|
  154.        +----------------------------------------------------------------------------------------------+
  155.  
  156.        DataSize = SPI_DATASIZE_16BIT:
  157.        +----------------------------------------------------------------------------------------------+
  158.        |         |                | 2Lines Fullduplex   |     2Lines RxOnly    |         1Line        |
  159.        | Process | Transfer mode  |---------------------|----------------------|----------------------|
  160.        |         |                |  Master  |  Slave   |  Master   |  Slave   |  Master   |  Slave   |
  161.        |==============================================================================================|
  162.        |    T    |     Polling    | Fpclk/2  | Fpclk/2  |    NA     |    NA    |    NA     |   NA     |
  163.        |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
  164.        |    /    |     Interrupt  | Fpclk/4  | Fpclk/4  |    NA     |    NA    |    NA     |   NA     |
  165.        |    R    |----------------|----------|----------|-----------|----------|-----------|----------|
  166.        |    X    |       DMA      | Fpclk/2  | Fpclk/2  |    NA     |    NA    |    NA     |   NA     |
  167.        |=========|================|==========|==========|===========|==========|===========|==========|
  168.        |         |     Polling    | Fpclk/2  | Fpclk/2  | Fpclk/64  | Fpclk/2  | Fpclk/32  | Fpclk/2  |
  169.        |         |----------------|----------|----------|-----------|----------|-----------|----------|
  170.        |    R    |     Interrupt  | Fpclk/4  | Fpclk/4  | Fpclk/64  | Fpclk/2  | Fpclk/64  | Fpclk/2  |
  171.        |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
  172.        |         |       DMA      | Fpclk/2  | Fpclk/2  | Fpclk/64  | Fpclk/2  | Fpclk/128 | Fpclk/2  |
  173.        |=========|================|==========|==========|===========|==========|===========|==========|
  174.        |         |     Polling    | Fpclk/2  | Fpclk/2  |     NA    |    NA    | Fpclk/2   | Fpclk/32 |
  175.        |         |----------------|----------|----------|-----------|----------|-----------|----------|
  176.        |    T    |     Interrupt  | Fpclk/2  | Fpclk/2  |     NA    |    NA    | Fpclk/2   | Fpclk/64 |
  177.        |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
  178.        |         |       DMA      | Fpclk/2  | Fpclk/2  |     NA    |    NA    | Fpclk/2   | Fpclk/128|
  179.        +----------------------------------------------------------------------------------------------+
  180.        @note The max SPI frequency depend on SPI data size (8bits, 16bits),
  181.              SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, IT, DMA).
  182.        @note
  183.             (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and HAL_SPI_TransmitReceive_DMA()
  184.             (#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA()
  185.             (#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA()
  186.  
  187.   ******************************************************************************
  188.   * @attention
  189.   *
  190.   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  191.   * All rights reserved.</center></h2>
  192.   *
  193.   * This software component is licensed by ST under BSD 3-Clause license,
  194.   * the "License"; You may not use this file except in compliance with the
  195.   * License. You may obtain a copy of the License at:
  196.   *                        opensource.org/licenses/BSD-3-Clause
  197.   *
  198.   ******************************************************************************
  199.   */
  200.  
  201. /* Includes ------------------------------------------------------------------*/
  202. #include "stm32l1xx_hal.h"
  203.  
  204. /** @addtogroup STM32L1xx_HAL_Driver
  205.   * @{
  206.   */
  207.  
  208. /** @defgroup SPI SPI
  209.   * @brief SPI HAL module driver
  210.   * @{
  211.   */
  212. #ifdef HAL_SPI_MODULE_ENABLED
  213.  
  214. /* Private typedef -----------------------------------------------------------*/
  215. /* Private defines -----------------------------------------------------------*/
  216. /** @defgroup SPI_Private_Constants SPI Private Constants
  217.   * @{
  218.   */
  219. #define SPI_DEFAULT_TIMEOUT 100U
  220. #define SPI_BSY_FLAG_WORKAROUND_TIMEOUT 1000U /*!< Timeout 1000 µs             */
  221. /**
  222.   * @}
  223.   */
  224.  
  225. /* Private macros ------------------------------------------------------------*/
  226. /* Private variables ---------------------------------------------------------*/
  227. /* Private function prototypes -----------------------------------------------*/
  228. /** @defgroup SPI_Private_Functions SPI Private Functions
  229.   * @{
  230.   */
  231. static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma);
  232. static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
  233. static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma);
  234. static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma);
  235. static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma);
  236. static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma);
  237. static void SPI_DMAError(DMA_HandleTypeDef *hdma);
  238. static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma);
  239. static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
  240. static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
  241. static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State,
  242.                                                        uint32_t Timeout, uint32_t Tickstart);
  243. static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
  244. static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
  245. static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
  246. static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
  247. static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
  248. static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
  249. static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
  250. static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
  251. #if (USE_SPI_CRC != 0U)
  252. static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi);
  253. static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi);
  254. static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi);
  255. static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi);
  256. #endif /* USE_SPI_CRC */
  257. static void SPI_AbortRx_ISR(SPI_HandleTypeDef *hspi);
  258. static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi);
  259. static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi);
  260. static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi);
  261. static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi);
  262. static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart);
  263. static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart);
  264. /**
  265.   * @}
  266.   */
  267.  
  268. /* Exported functions --------------------------------------------------------*/
  269. /** @defgroup SPI_Exported_Functions SPI Exported Functions
  270.   * @{
  271.   */
  272.  
  273. /** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
  274.   *  @brief    Initialization and Configuration functions
  275.   *
  276. @verbatim
  277.  ===============================================================================
  278.               ##### Initialization and de-initialization functions #####
  279.  ===============================================================================
  280.     [..]  This subsection provides a set of functions allowing to initialize and
  281.           de-initialize the SPIx peripheral:
  282.  
  283.       (+) User must implement HAL_SPI_MspInit() function in which he configures
  284.           all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
  285.  
  286.       (+) Call the function HAL_SPI_Init() to configure the selected device with
  287.           the selected configuration:
  288.         (++) Mode
  289.         (++) Direction
  290.         (++) Data Size
  291.         (++) Clock Polarity and Phase
  292.         (++) NSS Management
  293.         (++) BaudRate Prescaler
  294.         (++) FirstBit
  295.         (++) TIMode
  296.         (++) CRC Calculation
  297.         (++) CRC Polynomial if CRC enabled
  298.  
  299.       (+) Call the function HAL_SPI_DeInit() to restore the default configuration
  300.           of the selected SPIx peripheral.
  301.  
  302. @endverbatim
  303.   * @{
  304.   */
  305.  
  306. /**
  307.   * @brief  Initialize the SPI according to the specified parameters
  308.   *         in the SPI_InitTypeDef and initialize the associated handle.
  309.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  310.   *               the configuration information for SPI module.
  311.   * @retval HAL status
  312.   */
  313. HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
  314. {
  315.   /* Check the SPI handle allocation */
  316.   if (hspi == NULL)
  317.   {
  318.     return HAL_ERROR;
  319.   }
  320.  
  321.   /* Check the parameters */
  322.   assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
  323.   assert_param(IS_SPI_MODE(hspi->Init.Mode));
  324.   assert_param(IS_SPI_DIRECTION(hspi->Init.Direction));
  325.   assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
  326.   assert_param(IS_SPI_NSS(hspi->Init.NSS));
  327.   assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
  328.   assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
  329.   /* TI mode is not supported on all devices in stm32l1xx serie.
  330.      TIMode parameter is mandatory equal to SPI_TIMODE_DISABLE if TI mode is not supported */
  331.   assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
  332.   if (hspi->Init.TIMode == SPI_TIMODE_DISABLE)
  333.   {
  334.     assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
  335.     assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
  336.  
  337.     if (hspi->Init.Mode == SPI_MODE_MASTER)
  338.     {
  339.       assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
  340.     }
  341.     else
  342.     {
  343.       /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */
  344.       hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
  345.     }
  346.   }
  347.   else
  348.   {
  349.     assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
  350.  
  351.     /* Force polarity and phase to TI protocaol requirements */
  352.     hspi->Init.CLKPolarity = SPI_POLARITY_LOW;
  353.     hspi->Init.CLKPhase    = SPI_PHASE_1EDGE;
  354.   }
  355. #if (USE_SPI_CRC != 0U)
  356.   assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
  357.   if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  358.   {
  359.     assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
  360.   }
  361. #else
  362.   hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
  363. #endif /* USE_SPI_CRC */
  364.  
  365.   if (hspi->State == HAL_SPI_STATE_RESET)
  366.   {
  367.     /* Allocate lock resource and initialize it */
  368.     hspi->Lock = HAL_UNLOCKED;
  369.  
  370. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  371.     /* Init the SPI Callback settings */
  372.     hspi->TxCpltCallback       = HAL_SPI_TxCpltCallback;       /* Legacy weak TxCpltCallback       */
  373.     hspi->RxCpltCallback       = HAL_SPI_RxCpltCallback;       /* Legacy weak RxCpltCallback       */
  374.     hspi->TxRxCpltCallback     = HAL_SPI_TxRxCpltCallback;     /* Legacy weak TxRxCpltCallback     */
  375.     hspi->TxHalfCpltCallback   = HAL_SPI_TxHalfCpltCallback;   /* Legacy weak TxHalfCpltCallback   */
  376.     hspi->RxHalfCpltCallback   = HAL_SPI_RxHalfCpltCallback;   /* Legacy weak RxHalfCpltCallback   */
  377.     hspi->TxRxHalfCpltCallback = HAL_SPI_TxRxHalfCpltCallback; /* Legacy weak TxRxHalfCpltCallback */
  378.     hspi->ErrorCallback        = HAL_SPI_ErrorCallback;        /* Legacy weak ErrorCallback        */
  379.     hspi->AbortCpltCallback    = HAL_SPI_AbortCpltCallback;    /* Legacy weak AbortCpltCallback    */
  380.  
  381.     if (hspi->MspInitCallback == NULL)
  382.     {
  383.       hspi->MspInitCallback = HAL_SPI_MspInit; /* Legacy weak MspInit  */
  384.     }
  385.  
  386.     /* Init the low level hardware : GPIO, CLOCK, NVIC... */
  387.     hspi->MspInitCallback(hspi);
  388. #else
  389.     /* Init the low level hardware : GPIO, CLOCK, NVIC... */
  390.     HAL_SPI_MspInit(hspi);
  391. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  392.   }
  393.  
  394.   hspi->State = HAL_SPI_STATE_BUSY;
  395.  
  396.   /* Disable the selected SPI peripheral */
  397.   __HAL_SPI_DISABLE(hspi);
  398.  
  399.   /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
  400.   /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
  401.   Communication speed, First bit and CRC calculation state */
  402.   WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) |
  403.                                   (hspi->Init.Direction & (SPI_CR1_RXONLY | SPI_CR1_BIDIMODE)) |
  404.                                   (hspi->Init.DataSize & SPI_CR1_DFF) |
  405.                                   (hspi->Init.CLKPolarity & SPI_CR1_CPOL) |
  406.                                   (hspi->Init.CLKPhase & SPI_CR1_CPHA) |
  407.                                   (hspi->Init.NSS & SPI_CR1_SSM) |
  408.                                   (hspi->Init.BaudRatePrescaler & SPI_CR1_BR_Msk) |
  409.                                   (hspi->Init.FirstBit  & SPI_CR1_LSBFIRST) |
  410.                                   (hspi->Init.CRCCalculation & SPI_CR1_CRCEN)));
  411.  
  412. #if defined(SPI_CR2_FRF)
  413.   /* Configure : NSS management, TI Mode */
  414.   WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | (hspi->Init.TIMode & SPI_CR2_FRF)));
  415. #else
  416.   /* Configure : NSS management */
  417.   WRITE_REG(hspi->Instance->CR2, ((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE));
  418. #endif
  419.  
  420. #if (USE_SPI_CRC != 0U)
  421.   /*---------------------------- SPIx CRCPOLY Configuration ------------------*/
  422.   /* Configure : CRC Polynomial */
  423.   if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  424.   {
  425.     WRITE_REG(hspi->Instance->CRCPR, (hspi->Init.CRCPolynomial & SPI_CRCPR_CRCPOLY_Msk));
  426.   }
  427. #endif /* USE_SPI_CRC */
  428.  
  429. #if defined(SPI_I2SCFGR_I2SMOD)
  430.   /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
  431.   CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
  432. #endif /* SPI_I2SCFGR_I2SMOD */
  433.  
  434.   hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  435.   hspi->State     = HAL_SPI_STATE_READY;
  436.  
  437.   return HAL_OK;
  438. }
  439.  
  440. /**
  441.   * @brief  De-Initialize the SPI peripheral.
  442.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  443.   *               the configuration information for SPI module.
  444.   * @retval HAL status
  445.   */
  446. HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
  447. {
  448.   /* Check the SPI handle allocation */
  449.   if (hspi == NULL)
  450.   {
  451.     return HAL_ERROR;
  452.   }
  453.  
  454.   /* Check SPI Instance parameter */
  455.   assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
  456.  
  457.   hspi->State = HAL_SPI_STATE_BUSY;
  458.  
  459.   /* Disable the SPI Peripheral Clock */
  460.   __HAL_SPI_DISABLE(hspi);
  461.  
  462. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  463.   if (hspi->MspDeInitCallback == NULL)
  464.   {
  465.     hspi->MspDeInitCallback = HAL_SPI_MspDeInit; /* Legacy weak MspDeInit  */
  466.   }
  467.  
  468.   /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
  469.   hspi->MspDeInitCallback(hspi);
  470. #else
  471.   /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
  472.   HAL_SPI_MspDeInit(hspi);
  473. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  474.  
  475.   hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  476.   hspi->State = HAL_SPI_STATE_RESET;
  477.  
  478.   /* Release Lock */
  479.   __HAL_UNLOCK(hspi);
  480.  
  481.   return HAL_OK;
  482. }
  483.  
  484. /**
  485.   * @brief  Initialize the SPI MSP.
  486.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  487.   *               the configuration information for SPI module.
  488.   * @retval None
  489.   */
  490. __weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
  491. {
  492.   /* Prevent unused argument(s) compilation warning */
  493.   UNUSED(hspi);
  494.  
  495.   /* NOTE : This function should not be modified, when the callback is needed,
  496.             the HAL_SPI_MspInit should be implemented in the user file
  497.    */
  498. }
  499.  
  500. /**
  501.   * @brief  De-Initialize the SPI MSP.
  502.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  503.   *               the configuration information for SPI module.
  504.   * @retval None
  505.   */
  506. __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
  507. {
  508.   /* Prevent unused argument(s) compilation warning */
  509.   UNUSED(hspi);
  510.  
  511.   /* NOTE : This function should not be modified, when the callback is needed,
  512.             the HAL_SPI_MspDeInit should be implemented in the user file
  513.    */
  514. }
  515.  
  516. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  517. /**
  518.   * @brief  Register a User SPI Callback
  519.   *         To be used instead of the weak predefined callback
  520.   * @param  hspi Pointer to a SPI_HandleTypeDef structure that contains
  521.   *                the configuration information for the specified SPI.
  522.   * @param  CallbackID ID of the callback to be registered
  523.   * @param  pCallback pointer to the Callback function
  524.   * @retval HAL status
  525.   */
  526. HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID,
  527.                                            pSPI_CallbackTypeDef pCallback)
  528. {
  529.   HAL_StatusTypeDef status = HAL_OK;
  530.  
  531.   if (pCallback == NULL)
  532.   {
  533.     /* Update the error code */
  534.     hspi->ErrorCode |= HAL_SPI_ERROR_INVALID_CALLBACK;
  535.  
  536.     return HAL_ERROR;
  537.   }
  538.   /* Process locked */
  539.   __HAL_LOCK(hspi);
  540.  
  541.   if (HAL_SPI_STATE_READY == hspi->State)
  542.   {
  543.     switch (CallbackID)
  544.     {
  545.       case HAL_SPI_TX_COMPLETE_CB_ID :
  546.         hspi->TxCpltCallback = pCallback;
  547.         break;
  548.  
  549.       case HAL_SPI_RX_COMPLETE_CB_ID :
  550.         hspi->RxCpltCallback = pCallback;
  551.         break;
  552.  
  553.       case HAL_SPI_TX_RX_COMPLETE_CB_ID :
  554.         hspi->TxRxCpltCallback = pCallback;
  555.         break;
  556.  
  557.       case HAL_SPI_TX_HALF_COMPLETE_CB_ID :
  558.         hspi->TxHalfCpltCallback = pCallback;
  559.         break;
  560.  
  561.       case HAL_SPI_RX_HALF_COMPLETE_CB_ID :
  562.         hspi->RxHalfCpltCallback = pCallback;
  563.         break;
  564.  
  565.       case HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID :
  566.         hspi->TxRxHalfCpltCallback = pCallback;
  567.         break;
  568.  
  569.       case HAL_SPI_ERROR_CB_ID :
  570.         hspi->ErrorCallback = pCallback;
  571.         break;
  572.  
  573.       case HAL_SPI_ABORT_CB_ID :
  574.         hspi->AbortCpltCallback = pCallback;
  575.         break;
  576.  
  577.       case HAL_SPI_MSPINIT_CB_ID :
  578.         hspi->MspInitCallback = pCallback;
  579.         break;
  580.  
  581.       case HAL_SPI_MSPDEINIT_CB_ID :
  582.         hspi->MspDeInitCallback = pCallback;
  583.         break;
  584.  
  585.       default :
  586.         /* Update the error code */
  587.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK);
  588.  
  589.         /* Return error status */
  590.         status =  HAL_ERROR;
  591.         break;
  592.     }
  593.   }
  594.   else if (HAL_SPI_STATE_RESET == hspi->State)
  595.   {
  596.     switch (CallbackID)
  597.     {
  598.       case HAL_SPI_MSPINIT_CB_ID :
  599.         hspi->MspInitCallback = pCallback;
  600.         break;
  601.  
  602.       case HAL_SPI_MSPDEINIT_CB_ID :
  603.         hspi->MspDeInitCallback = pCallback;
  604.         break;
  605.  
  606.       default :
  607.         /* Update the error code */
  608.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK);
  609.  
  610.         /* Return error status */
  611.         status =  HAL_ERROR;
  612.         break;
  613.     }
  614.   }
  615.   else
  616.   {
  617.     /* Update the error code */
  618.     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK);
  619.  
  620.     /* Return error status */
  621.     status =  HAL_ERROR;
  622.   }
  623.  
  624.   /* Release Lock */
  625.   __HAL_UNLOCK(hspi);
  626.   return status;
  627. }
  628.  
  629. /**
  630.   * @brief  Unregister an SPI Callback
  631.   *         SPI callback is redirected to the weak predefined callback
  632.   * @param  hspi Pointer to a SPI_HandleTypeDef structure that contains
  633.   *                the configuration information for the specified SPI.
  634.   * @param  CallbackID ID of the callback to be unregistered
  635.   * @retval HAL status
  636.   */
  637. HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID)
  638. {
  639.   HAL_StatusTypeDef status = HAL_OK;
  640.  
  641.   /* Process locked */
  642.   __HAL_LOCK(hspi);
  643.  
  644.   if (HAL_SPI_STATE_READY == hspi->State)
  645.   {
  646.     switch (CallbackID)
  647.     {
  648.       case HAL_SPI_TX_COMPLETE_CB_ID :
  649.         hspi->TxCpltCallback = HAL_SPI_TxCpltCallback;             /* Legacy weak TxCpltCallback       */
  650.         break;
  651.  
  652.       case HAL_SPI_RX_COMPLETE_CB_ID :
  653.         hspi->RxCpltCallback = HAL_SPI_RxCpltCallback;             /* Legacy weak RxCpltCallback       */
  654.         break;
  655.  
  656.       case HAL_SPI_TX_RX_COMPLETE_CB_ID :
  657.         hspi->TxRxCpltCallback = HAL_SPI_TxRxCpltCallback;         /* Legacy weak TxRxCpltCallback     */
  658.         break;
  659.  
  660.       case HAL_SPI_TX_HALF_COMPLETE_CB_ID :
  661.         hspi->TxHalfCpltCallback = HAL_SPI_TxHalfCpltCallback;     /* Legacy weak TxHalfCpltCallback   */
  662.         break;
  663.  
  664.       case HAL_SPI_RX_HALF_COMPLETE_CB_ID :
  665.         hspi->RxHalfCpltCallback = HAL_SPI_RxHalfCpltCallback;     /* Legacy weak RxHalfCpltCallback   */
  666.         break;
  667.  
  668.       case HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID :
  669.         hspi->TxRxHalfCpltCallback = HAL_SPI_TxRxHalfCpltCallback; /* Legacy weak TxRxHalfCpltCallback */
  670.         break;
  671.  
  672.       case HAL_SPI_ERROR_CB_ID :
  673.         hspi->ErrorCallback = HAL_SPI_ErrorCallback;               /* Legacy weak ErrorCallback        */
  674.         break;
  675.  
  676.       case HAL_SPI_ABORT_CB_ID :
  677.         hspi->AbortCpltCallback = HAL_SPI_AbortCpltCallback;       /* Legacy weak AbortCpltCallback    */
  678.         break;
  679.  
  680.       case HAL_SPI_MSPINIT_CB_ID :
  681.         hspi->MspInitCallback = HAL_SPI_MspInit;                   /* Legacy weak MspInit              */
  682.         break;
  683.  
  684.       case HAL_SPI_MSPDEINIT_CB_ID :
  685.         hspi->MspDeInitCallback = HAL_SPI_MspDeInit;               /* Legacy weak MspDeInit            */
  686.         break;
  687.  
  688.       default :
  689.         /* Update the error code */
  690.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK);
  691.  
  692.         /* Return error status */
  693.         status =  HAL_ERROR;
  694.         break;
  695.     }
  696.   }
  697.   else if (HAL_SPI_STATE_RESET == hspi->State)
  698.   {
  699.     switch (CallbackID)
  700.     {
  701.       case HAL_SPI_MSPINIT_CB_ID :
  702.         hspi->MspInitCallback = HAL_SPI_MspInit;                   /* Legacy weak MspInit              */
  703.         break;
  704.  
  705.       case HAL_SPI_MSPDEINIT_CB_ID :
  706.         hspi->MspDeInitCallback = HAL_SPI_MspDeInit;               /* Legacy weak MspDeInit            */
  707.         break;
  708.  
  709.       default :
  710.         /* Update the error code */
  711.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK);
  712.  
  713.         /* Return error status */
  714.         status =  HAL_ERROR;
  715.         break;
  716.     }
  717.   }
  718.   else
  719.   {
  720.     /* Update the error code */
  721.     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK);
  722.  
  723.     /* Return error status */
  724.     status =  HAL_ERROR;
  725.   }
  726.  
  727.   /* Release Lock */
  728.   __HAL_UNLOCK(hspi);
  729.   return status;
  730. }
  731. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  732. /**
  733.   * @}
  734.   */
  735.  
  736. /** @defgroup SPI_Exported_Functions_Group2 IO operation functions
  737.   *  @brief   Data transfers functions
  738.   *
  739. @verbatim
  740.   ==============================================================================
  741.                       ##### IO operation functions #####
  742.  ===============================================================================
  743.  [..]
  744.     This subsection provides a set of functions allowing to manage the SPI
  745.     data transfers.
  746.  
  747.     [..] The SPI supports master and slave mode :
  748.  
  749.     (#) There are two modes of transfer:
  750.        (++) Blocking mode: The communication is performed in polling mode.
  751.             The HAL status of all data processing is returned by the same function
  752.             after finishing transfer.
  753.        (++) No-Blocking mode: The communication is performed using Interrupts
  754.             or DMA, These APIs return the HAL status.
  755.             The end of the data processing will be indicated through the
  756.             dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
  757.             using DMA mode.
  758.             The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
  759.             will be executed respectively at the end of the transmit or Receive process
  760.             The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
  761.  
  762.     (#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either Interrupt or DMA)
  763.         exist for 1Line (simplex) and 2Lines (full duplex) modes.
  764.  
  765. @endverbatim
  766.   * @{
  767.   */
  768.  
  769. /**
  770.   * @brief  Transmit an amount of data in blocking mode.
  771.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  772.   *               the configuration information for SPI module.
  773.   * @param  pData pointer to data buffer
  774.   * @param  Size amount of data to be sent
  775.   * @param  Timeout Timeout duration
  776.   * @retval HAL status
  777.   */
  778. HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  779. {
  780.   uint32_t tickstart;
  781.   HAL_StatusTypeDef errorcode = HAL_OK;
  782.   uint16_t initial_TxXferCount;
  783.  
  784.   /* Check Direction parameter */
  785.   assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  786.  
  787.   /* Process Locked */
  788.   __HAL_LOCK(hspi);
  789.  
  790.   /* Init tickstart for timeout management*/
  791.   tickstart = HAL_GetTick();
  792.   initial_TxXferCount = Size;
  793.  
  794.   if (hspi->State != HAL_SPI_STATE_READY)
  795.   {
  796.     errorcode = HAL_BUSY;
  797.     goto error;
  798.   }
  799.  
  800.   if ((pData == NULL) || (Size == 0U))
  801.   {
  802.     errorcode = HAL_ERROR;
  803.     goto error;
  804.   }
  805.  
  806.   /* Set the transaction information */
  807.   hspi->State       = HAL_SPI_STATE_BUSY_TX;
  808.   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
  809.   hspi->pTxBuffPtr  = (uint8_t *)pData;
  810.   hspi->TxXferSize  = Size;
  811.   hspi->TxXferCount = Size;
  812.  
  813.   /*Init field not used in handle to zero */
  814.   hspi->pRxBuffPtr  = (uint8_t *)NULL;
  815.   hspi->RxXferSize  = 0U;
  816.   hspi->RxXferCount = 0U;
  817.   hspi->TxISR       = NULL;
  818.   hspi->RxISR       = NULL;
  819.  
  820.   /* Configure communication direction : 1Line */
  821.   if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
  822.   {
  823.     /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
  824.     __HAL_SPI_DISABLE(hspi);
  825.     SPI_1LINE_TX(hspi);
  826.   }
  827.  
  828. #if (USE_SPI_CRC != 0U)
  829.   /* Reset CRC Calculation */
  830.   if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  831.   {
  832.     SPI_RESET_CRC(hspi);
  833.   }
  834. #endif /* USE_SPI_CRC */
  835.  
  836.   /* Check if the SPI is already enabled */
  837.   if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  838.   {
  839.     /* Enable SPI peripheral */
  840.     __HAL_SPI_ENABLE(hspi);
  841.   }
  842.  
  843.   /* Transmit data in 16 Bit mode */
  844.   if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
  845.   {
  846.     if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
  847.     {
  848.       hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
  849.       hspi->pTxBuffPtr += sizeof(uint16_t);
  850.       hspi->TxXferCount--;
  851.     }
  852.     /* Transmit data in 16 Bit mode */
  853.     while (hspi->TxXferCount > 0U)
  854.     {
  855.       /* Wait until TXE flag is set to send data */
  856.       if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
  857.       {
  858.         hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
  859.         hspi->pTxBuffPtr += sizeof(uint16_t);
  860.         hspi->TxXferCount--;
  861.       }
  862.       else
  863.       {
  864.         /* Timeout management */
  865.         if ((((HAL_GetTick() - tickstart) >=  Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
  866.         {
  867.           errorcode = HAL_TIMEOUT;
  868.           goto error;
  869.         }
  870.       }
  871.     }
  872.   }
  873.   /* Transmit data in 8 Bit mode */
  874.   else
  875.   {
  876.     if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
  877.     {
  878.       *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
  879.       hspi->pTxBuffPtr += sizeof(uint8_t);
  880.       hspi->TxXferCount--;
  881.     }
  882.     while (hspi->TxXferCount > 0U)
  883.     {
  884.       /* Wait until TXE flag is set to send data */
  885.       if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
  886.       {
  887.         *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
  888.         hspi->pTxBuffPtr += sizeof(uint8_t);
  889.         hspi->TxXferCount--;
  890.       }
  891.       else
  892.       {
  893.         /* Timeout management */
  894.         if ((((HAL_GetTick() - tickstart) >=  Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
  895.         {
  896.           errorcode = HAL_TIMEOUT;
  897.           goto error;
  898.         }
  899.       }
  900.     }
  901.   }
  902. #if (USE_SPI_CRC != 0U)
  903.   /* Enable CRC Transmission */
  904.   if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  905.   {
  906.     SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  907.   }
  908. #endif /* USE_SPI_CRC */
  909.  
  910.   /* Check the end of the transaction */
  911.   if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
  912.   {
  913.     hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
  914.   }
  915.  
  916.   /* Clear overrun flag in 2 Lines communication mode because received is not read */
  917.   if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
  918.   {
  919.     __HAL_SPI_CLEAR_OVRFLAG(hspi);
  920.   }
  921.  
  922.   if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  923.   {
  924.     errorcode = HAL_ERROR;
  925.   }
  926.  
  927. error:
  928.   hspi->State = HAL_SPI_STATE_READY;
  929.   /* Process Unlocked */
  930.   __HAL_UNLOCK(hspi);
  931.   return errorcode;
  932. }
  933.  
  934. /**
  935.   * @brief  Receive an amount of data in blocking mode.
  936.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  937.   *               the configuration information for SPI module.
  938.   * @param  pData pointer to data buffer
  939.   * @param  Size amount of data to be received
  940.   * @param  Timeout Timeout duration
  941.   * @retval HAL status
  942.   */
  943. HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  944. {
  945.   uint32_t tickstart;
  946.   HAL_StatusTypeDef errorcode = HAL_OK;
  947.  
  948.   if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
  949.   {
  950.     hspi->State = HAL_SPI_STATE_BUSY_RX;
  951.     /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  952.     return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
  953.   }
  954.  
  955.   /* Process Locked */
  956.   __HAL_LOCK(hspi);
  957.  
  958.   /* Init tickstart for timeout management*/
  959.   tickstart = HAL_GetTick();
  960.  
  961.   if (hspi->State != HAL_SPI_STATE_READY)
  962.   {
  963.     errorcode = HAL_BUSY;
  964.     goto error;
  965.   }
  966.  
  967.   if ((pData == NULL) || (Size == 0U))
  968.   {
  969.     errorcode = HAL_ERROR;
  970.     goto error;
  971.   }
  972.  
  973.   /* Set the transaction information */
  974.   hspi->State       = HAL_SPI_STATE_BUSY_RX;
  975.   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
  976.   hspi->pRxBuffPtr  = (uint8_t *)pData;
  977.   hspi->RxXferSize  = Size;
  978.   hspi->RxXferCount = Size;
  979.  
  980.   /*Init field not used in handle to zero */
  981.   hspi->pTxBuffPtr  = (uint8_t *)NULL;
  982.   hspi->TxXferSize  = 0U;
  983.   hspi->TxXferCount = 0U;
  984.   hspi->RxISR       = NULL;
  985.   hspi->TxISR       = NULL;
  986.  
  987. #if (USE_SPI_CRC != 0U)
  988.   /* Reset CRC Calculation */
  989.   if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  990.   {
  991.     SPI_RESET_CRC(hspi);
  992.     /* this is done to handle the CRCNEXT before the latest data */
  993.     hspi->RxXferCount--;
  994.   }
  995. #endif /* USE_SPI_CRC */
  996.  
  997.   /* Configure communication direction: 1Line */
  998.   if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
  999.   {
  1000.     /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
  1001.     __HAL_SPI_DISABLE(hspi);
  1002.     SPI_1LINE_RX(hspi);
  1003.   }
  1004.  
  1005.   /* Check if the SPI is already enabled */
  1006.   if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  1007.   {
  1008.     /* Enable SPI peripheral */
  1009.     __HAL_SPI_ENABLE(hspi);
  1010.   }
  1011.  
  1012.   /* Receive data in 8 Bit mode */
  1013.   if (hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  1014.   {
  1015.     /* Transfer loop */
  1016.     while (hspi->RxXferCount > 0U)
  1017.     {
  1018.       /* Check the RXNE flag */
  1019.       if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE))
  1020.       {
  1021.         /* read the received data */
  1022.         (* (uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR;
  1023.         hspi->pRxBuffPtr += sizeof(uint8_t);
  1024.         hspi->RxXferCount--;
  1025.       }
  1026.       else
  1027.       {
  1028.         /* Timeout management */
  1029.         if ((((HAL_GetTick() - tickstart) >=  Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
  1030.         {
  1031.           errorcode = HAL_TIMEOUT;
  1032.           goto error;
  1033.         }
  1034.       }
  1035.     }
  1036.   }
  1037.   else
  1038.   {
  1039.     /* Transfer loop */
  1040.     while (hspi->RxXferCount > 0U)
  1041.     {
  1042.       /* Check the RXNE flag */
  1043.       if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE))
  1044.       {
  1045.         *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR;
  1046.         hspi->pRxBuffPtr += sizeof(uint16_t);
  1047.         hspi->RxXferCount--;
  1048.       }
  1049.       else
  1050.       {
  1051.         /* Timeout management */
  1052.         if ((((HAL_GetTick() - tickstart) >=  Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
  1053.         {
  1054.           errorcode = HAL_TIMEOUT;
  1055.           goto error;
  1056.         }
  1057.       }
  1058.     }
  1059.   }
  1060.  
  1061. #if (USE_SPI_CRC != 0U)
  1062.   /* Handle the CRC Transmission */
  1063.   if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1064.   {
  1065.     /* freeze the CRC before the latest data */
  1066.     SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  1067.  
  1068.     /* Read the latest data */
  1069.     if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
  1070.     {
  1071.       /* the latest data has not been received */
  1072.       errorcode = HAL_TIMEOUT;
  1073.       goto error;
  1074.     }
  1075.  
  1076.     /* Receive last data in 16 Bit mode */
  1077.     if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
  1078.     {
  1079.       *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR;
  1080.     }
  1081.     /* Receive last data in 8 Bit mode */
  1082.     else
  1083.     {
  1084.       (*(uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR;
  1085.     }
  1086.  
  1087.     /* Wait the CRC data */
  1088.     if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
  1089.     {
  1090.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1091.       errorcode = HAL_TIMEOUT;
  1092.       goto error;
  1093.     }
  1094.  
  1095.     /* Read CRC to Flush DR and RXNE flag */
  1096.     READ_REG(hspi->Instance->DR);
  1097.   }
  1098. #endif /* USE_SPI_CRC */
  1099.  
  1100.   /* Check the end of the transaction */
  1101.   if (SPI_EndRxTransaction(hspi, Timeout, tickstart) != HAL_OK)
  1102.   {
  1103.     hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
  1104.   }
  1105.  
  1106. #if (USE_SPI_CRC != 0U)
  1107.   /* Check if CRC error occurred */
  1108.   if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
  1109.   {
  1110.     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1111.     __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1112.   }
  1113. #endif /* USE_SPI_CRC */
  1114.  
  1115.   if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  1116.   {
  1117.     errorcode = HAL_ERROR;
  1118.   }
  1119.  
  1120. error :
  1121.   hspi->State = HAL_SPI_STATE_READY;
  1122.   __HAL_UNLOCK(hspi);
  1123.   return errorcode;
  1124. }
  1125.  
  1126. /**
  1127.   * @brief  Transmit and Receive an amount of data in blocking mode.
  1128.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  1129.   *               the configuration information for SPI module.
  1130.   * @param  pTxData pointer to transmission data buffer
  1131.   * @param  pRxData pointer to reception data buffer
  1132.   * @param  Size amount of data to be sent and received
  1133.   * @param  Timeout Timeout duration
  1134.   * @retval HAL status
  1135.   */
  1136. HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
  1137.                                           uint32_t Timeout)
  1138. {
  1139.   uint16_t             initial_TxXferCount;
  1140.   uint32_t             tmp_mode;
  1141.   HAL_SPI_StateTypeDef tmp_state;
  1142.   uint32_t             tickstart;
  1143.  
  1144.   /* Variable used to alternate Rx and Tx during transfer */
  1145.   uint32_t             txallowed = 1U;
  1146.   HAL_StatusTypeDef    errorcode = HAL_OK;
  1147.  
  1148.   /* Check Direction parameter */
  1149.   assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  1150.  
  1151.   /* Process Locked */
  1152.   __HAL_LOCK(hspi);
  1153.  
  1154.   /* Init tickstart for timeout management*/
  1155.   tickstart = HAL_GetTick();
  1156.  
  1157.   /* Init temporary variables */
  1158.   tmp_state           = hspi->State;
  1159.   tmp_mode            = hspi->Init.Mode;
  1160.   initial_TxXferCount = Size;
  1161.  
  1162.   if (!((tmp_state == HAL_SPI_STATE_READY) || \
  1163.         ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
  1164.   {
  1165.     errorcode = HAL_BUSY;
  1166.     goto error;
  1167.   }
  1168.  
  1169.   if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
  1170.   {
  1171.     errorcode = HAL_ERROR;
  1172.     goto error;
  1173.   }
  1174.  
  1175.   /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  1176.   if (hspi->State != HAL_SPI_STATE_BUSY_RX)
  1177.   {
  1178.     hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  1179.   }
  1180.  
  1181.   /* Set the transaction information */
  1182.   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
  1183.   hspi->pRxBuffPtr  = (uint8_t *)pRxData;
  1184.   hspi->RxXferCount = Size;
  1185.   hspi->RxXferSize  = Size;
  1186.   hspi->pTxBuffPtr  = (uint8_t *)pTxData;
  1187.   hspi->TxXferCount = Size;
  1188.   hspi->TxXferSize  = Size;
  1189.  
  1190.   /*Init field not used in handle to zero */
  1191.   hspi->RxISR       = NULL;
  1192.   hspi->TxISR       = NULL;
  1193.  
  1194. #if (USE_SPI_CRC != 0U)
  1195.   /* Reset CRC Calculation */
  1196.   if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1197.   {
  1198.     SPI_RESET_CRC(hspi);
  1199.   }
  1200. #endif /* USE_SPI_CRC */
  1201.  
  1202.   /* Check if the SPI is already enabled */
  1203.   if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  1204.   {
  1205.     /* Enable SPI peripheral */
  1206.     __HAL_SPI_ENABLE(hspi);
  1207.   }
  1208.  
  1209.   /* Transmit and Receive data in 16 Bit mode */
  1210.   if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
  1211.   {
  1212.     if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
  1213.     {
  1214.       hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
  1215.       hspi->pTxBuffPtr += sizeof(uint16_t);
  1216.       hspi->TxXferCount--;
  1217.     }
  1218.     while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
  1219.     {
  1220.       /* Check TXE flag */
  1221.       if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
  1222.       {
  1223.         hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
  1224.         hspi->pTxBuffPtr += sizeof(uint16_t);
  1225.         hspi->TxXferCount--;
  1226.         /* Next Data is a reception (Rx). Tx not allowed */
  1227.         txallowed = 0U;
  1228.  
  1229. #if (USE_SPI_CRC != 0U)
  1230.         /* Enable CRC Transmission */
  1231.         if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
  1232.         {
  1233.           SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  1234.         }
  1235. #endif /* USE_SPI_CRC */
  1236.       }
  1237.  
  1238.       /* Check RXNE flag */
  1239.       if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U))
  1240.       {
  1241.         *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR;
  1242.         hspi->pRxBuffPtr += sizeof(uint16_t);
  1243.         hspi->RxXferCount--;
  1244.         /* Next Data is a Transmission (Tx). Tx is allowed */
  1245.         txallowed = 1U;
  1246.       }
  1247.       if (((HAL_GetTick() - tickstart) >=  Timeout) && (Timeout != HAL_MAX_DELAY))
  1248.       {
  1249.         errorcode = HAL_TIMEOUT;
  1250.         goto error;
  1251.       }
  1252.     }
  1253.   }
  1254.   /* Transmit and Receive data in 8 Bit mode */
  1255.   else
  1256.   {
  1257.     if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
  1258.     {
  1259.       *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
  1260.       hspi->pTxBuffPtr += sizeof(uint8_t);
  1261.       hspi->TxXferCount--;
  1262.     }
  1263.     while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
  1264.     {
  1265.       /* Check TXE flag */
  1266.       if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
  1267.       {
  1268.         *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
  1269.         hspi->pTxBuffPtr++;
  1270.         hspi->TxXferCount--;
  1271.         /* Next Data is a reception (Rx). Tx not allowed */
  1272.         txallowed = 0U;
  1273.  
  1274. #if (USE_SPI_CRC != 0U)
  1275.         /* Enable CRC Transmission */
  1276.         if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
  1277.         {
  1278.           SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  1279.         }
  1280. #endif /* USE_SPI_CRC */
  1281.       }
  1282.  
  1283.       /* Wait until RXNE flag is reset */
  1284.       if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U))
  1285.       {
  1286.         (*(uint8_t *)hspi->pRxBuffPtr) = hspi->Instance->DR;
  1287.         hspi->pRxBuffPtr++;
  1288.         hspi->RxXferCount--;
  1289.         /* Next Data is a Transmission (Tx). Tx is allowed */
  1290.         txallowed = 1U;
  1291.       }
  1292.       if ((((HAL_GetTick() - tickstart) >=  Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout == 0U))
  1293.       {
  1294.         errorcode = HAL_TIMEOUT;
  1295.         goto error;
  1296.       }
  1297.     }
  1298.   }
  1299.  
  1300. #if (USE_SPI_CRC != 0U)
  1301.   /* Read CRC from DR to close CRC calculation process */
  1302.   if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1303.   {
  1304.     /* Wait until TXE flag */
  1305.     if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
  1306.     {
  1307.       /* Error on the CRC reception */
  1308.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1309.       errorcode = HAL_TIMEOUT;
  1310.       goto error;
  1311.     }
  1312.     /* Read CRC */
  1313.     READ_REG(hspi->Instance->DR);
  1314.   }
  1315.  
  1316.   /* Check if CRC error occurred */
  1317.   if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
  1318.   {
  1319.     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1320.     /* Clear CRC Flag */
  1321.     __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1322.  
  1323.     errorcode = HAL_ERROR;
  1324.   }
  1325. #endif /* USE_SPI_CRC */
  1326.  
  1327.   /* Check the end of the transaction */
  1328.   if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
  1329.   {
  1330.     errorcode = HAL_ERROR;
  1331.     hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
  1332.     goto error;
  1333.   }
  1334.  
  1335.   /* Clear overrun flag in 2 Lines communication mode because received is not read */
  1336.   if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
  1337.   {
  1338.     __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1339.   }
  1340.  
  1341. error :
  1342.   hspi->State = HAL_SPI_STATE_READY;
  1343.   __HAL_UNLOCK(hspi);
  1344.   return errorcode;
  1345. }
  1346.  
  1347. /**
  1348.   * @brief  Transmit an amount of data in non-blocking mode with Interrupt.
  1349.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  1350.   *               the configuration information for SPI module.
  1351.   * @param  pData pointer to data buffer
  1352.   * @param  Size amount of data to be sent
  1353.   * @retval HAL status
  1354.   */
  1355. HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  1356. {
  1357.   HAL_StatusTypeDef errorcode = HAL_OK;
  1358.  
  1359.   /* Check Direction parameter */
  1360.   assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  1361.  
  1362.   /* Process Locked */
  1363.   __HAL_LOCK(hspi);
  1364.  
  1365.   if ((pData == NULL) || (Size == 0U))
  1366.   {
  1367.     errorcode = HAL_ERROR;
  1368.     goto error;
  1369.   }
  1370.  
  1371.   if (hspi->State != HAL_SPI_STATE_READY)
  1372.   {
  1373.     errorcode = HAL_BUSY;
  1374.     goto error;
  1375.   }
  1376.  
  1377.   /* Set the transaction information */
  1378.   hspi->State       = HAL_SPI_STATE_BUSY_TX;
  1379.   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
  1380.   hspi->pTxBuffPtr  = (uint8_t *)pData;
  1381.   hspi->TxXferSize  = Size;
  1382.   hspi->TxXferCount = Size;
  1383.  
  1384.   /* Init field not used in handle to zero */
  1385.   hspi->pRxBuffPtr  = (uint8_t *)NULL;
  1386.   hspi->RxXferSize  = 0U;
  1387.   hspi->RxXferCount = 0U;
  1388.   hspi->RxISR       = NULL;
  1389.  
  1390.   /* Set the function for IT treatment */
  1391.   if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
  1392.   {
  1393.     hspi->TxISR = SPI_TxISR_16BIT;
  1394.   }
  1395.   else
  1396.   {
  1397.     hspi->TxISR = SPI_TxISR_8BIT;
  1398.   }
  1399.  
  1400.   /* Configure communication direction : 1Line */
  1401.   if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1402.   {
  1403.     /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
  1404.     __HAL_SPI_DISABLE(hspi);
  1405.     SPI_1LINE_TX(hspi);
  1406.   }
  1407.  
  1408. #if (USE_SPI_CRC != 0U)
  1409.   /* Reset CRC Calculation */
  1410.   if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1411.   {
  1412.     SPI_RESET_CRC(hspi);
  1413.   }
  1414. #endif /* USE_SPI_CRC */
  1415.  
  1416.   /* Enable TXE and ERR interrupt */
  1417.   __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
  1418.  
  1419.  
  1420.   /* Check if the SPI is already enabled */
  1421.   if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  1422.   {
  1423.     /* Enable SPI peripheral */
  1424.     __HAL_SPI_ENABLE(hspi);
  1425.   }
  1426.  
  1427. error :
  1428.   __HAL_UNLOCK(hspi);
  1429.   return errorcode;
  1430. }
  1431.  
  1432. /**
  1433.   * @brief  Receive an amount of data in non-blocking mode with Interrupt.
  1434.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  1435.   *               the configuration information for SPI module.
  1436.   * @param  pData pointer to data buffer
  1437.   * @param  Size amount of data to be sent
  1438.   * @retval HAL status
  1439.   */
  1440. HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  1441. {
  1442.   HAL_StatusTypeDef errorcode = HAL_OK;
  1443.  
  1444.   if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
  1445.   {
  1446.     hspi->State = HAL_SPI_STATE_BUSY_RX;
  1447.     /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  1448.     return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
  1449.   }
  1450.  
  1451.   /* Process Locked */
  1452.   __HAL_LOCK(hspi);
  1453.  
  1454.   if (hspi->State != HAL_SPI_STATE_READY)
  1455.   {
  1456.     errorcode = HAL_BUSY;
  1457.     goto error;
  1458.   }
  1459.  
  1460.   if ((pData == NULL) || (Size == 0U))
  1461.   {
  1462.     errorcode = HAL_ERROR;
  1463.     goto error;
  1464.   }
  1465.  
  1466.   /* Set the transaction information */
  1467.   hspi->State       = HAL_SPI_STATE_BUSY_RX;
  1468.   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
  1469.   hspi->pRxBuffPtr  = (uint8_t *)pData;
  1470.   hspi->RxXferSize  = Size;
  1471.   hspi->RxXferCount = Size;
  1472.  
  1473.   /* Init field not used in handle to zero */
  1474.   hspi->pTxBuffPtr  = (uint8_t *)NULL;
  1475.   hspi->TxXferSize  = 0U;
  1476.   hspi->TxXferCount = 0U;
  1477.   hspi->TxISR       = NULL;
  1478.  
  1479.   /* Set the function for IT treatment */
  1480.   if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
  1481.   {
  1482.     hspi->RxISR = SPI_RxISR_16BIT;
  1483.   }
  1484.   else
  1485.   {
  1486.     hspi->RxISR = SPI_RxISR_8BIT;
  1487.   }
  1488.  
  1489.   /* Configure communication direction : 1Line */
  1490.   if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1491.   {
  1492.     /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
  1493.     __HAL_SPI_DISABLE(hspi);
  1494.     SPI_1LINE_RX(hspi);
  1495.   }
  1496.  
  1497. #if (USE_SPI_CRC != 0U)
  1498.   /* Reset CRC Calculation */
  1499.   if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1500.   {
  1501.     SPI_RESET_CRC(hspi);
  1502.   }
  1503. #endif /* USE_SPI_CRC */
  1504.  
  1505.   /* Enable TXE and ERR interrupt */
  1506.   __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
  1507.  
  1508.   /* Note : The SPI must be enabled after unlocking current process
  1509.             to avoid the risk of SPI interrupt handle execution before current
  1510.             process unlock */
  1511.  
  1512.   /* Check if the SPI is already enabled */
  1513.   if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  1514.   {
  1515.     /* Enable SPI peripheral */
  1516.     __HAL_SPI_ENABLE(hspi);
  1517.   }
  1518.  
  1519. error :
  1520.   /* Process Unlocked */
  1521.   __HAL_UNLOCK(hspi);
  1522.   return errorcode;
  1523. }
  1524.  
  1525. /**
  1526.   * @brief  Transmit and Receive an amount of data in non-blocking mode with Interrupt.
  1527.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  1528.   *               the configuration information for SPI module.
  1529.   * @param  pTxData pointer to transmission data buffer
  1530.   * @param  pRxData pointer to reception data buffer
  1531.   * @param  Size amount of data to be sent and received
  1532.   * @retval HAL status
  1533.   */
  1534. HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
  1535. {
  1536.   uint32_t             tmp_mode;
  1537.   HAL_SPI_StateTypeDef tmp_state;
  1538.   HAL_StatusTypeDef    errorcode = HAL_OK;
  1539.  
  1540.   /* Check Direction parameter */
  1541.   assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  1542.  
  1543.   /* Process locked */
  1544.   __HAL_LOCK(hspi);
  1545.  
  1546.   /* Init temporary variables */
  1547.   tmp_state           = hspi->State;
  1548.   tmp_mode            = hspi->Init.Mode;
  1549.  
  1550.   if (!((tmp_state == HAL_SPI_STATE_READY) || \
  1551.         ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
  1552.   {
  1553.     errorcode = HAL_BUSY;
  1554.     goto error;
  1555.   }
  1556.  
  1557.   if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
  1558.   {
  1559.     errorcode = HAL_ERROR;
  1560.     goto error;
  1561.   }
  1562.  
  1563.   /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  1564.   if (hspi->State != HAL_SPI_STATE_BUSY_RX)
  1565.   {
  1566.     hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  1567.   }
  1568.  
  1569.   /* Set the transaction information */
  1570.   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
  1571.   hspi->pTxBuffPtr  = (uint8_t *)pTxData;
  1572.   hspi->TxXferSize  = Size;
  1573.   hspi->TxXferCount = Size;
  1574.   hspi->pRxBuffPtr  = (uint8_t *)pRxData;
  1575.   hspi->RxXferSize  = Size;
  1576.   hspi->RxXferCount = Size;
  1577.  
  1578.   /* Set the function for IT treatment */
  1579.   if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
  1580.   {
  1581.     hspi->RxISR     = SPI_2linesRxISR_16BIT;
  1582.     hspi->TxISR     = SPI_2linesTxISR_16BIT;
  1583.   }
  1584.   else
  1585.   {
  1586.     hspi->RxISR     = SPI_2linesRxISR_8BIT;
  1587.     hspi->TxISR     = SPI_2linesTxISR_8BIT;
  1588.   }
  1589.  
  1590. #if (USE_SPI_CRC != 0U)
  1591.   /* Reset CRC Calculation */
  1592.   if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1593.   {
  1594.     SPI_RESET_CRC(hspi);
  1595.   }
  1596. #endif /* USE_SPI_CRC */
  1597.  
  1598.   /* Enable TXE, RXNE and ERR interrupt */
  1599.   __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  1600.  
  1601.   /* Check if the SPI is already enabled */
  1602.   if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  1603.   {
  1604.     /* Enable SPI peripheral */
  1605.     __HAL_SPI_ENABLE(hspi);
  1606.   }
  1607.  
  1608. error :
  1609.   /* Process Unlocked */
  1610.   __HAL_UNLOCK(hspi);
  1611.   return errorcode;
  1612. }
  1613.  
  1614. /**
  1615.   * @brief  Transmit an amount of data in non-blocking mode with DMA.
  1616.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  1617.   *               the configuration information for SPI module.
  1618.   * @param  pData pointer to data buffer
  1619.   * @param  Size amount of data to be sent
  1620.   * @retval HAL status
  1621.   */
  1622. HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  1623. {
  1624.   HAL_StatusTypeDef errorcode = HAL_OK;
  1625.  
  1626.   /* Check tx dma handle */
  1627.   assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx));
  1628.  
  1629.   /* Check Direction parameter */
  1630.   assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  1631.  
  1632.   /* Process Locked */
  1633.   __HAL_LOCK(hspi);
  1634.  
  1635.   if (hspi->State != HAL_SPI_STATE_READY)
  1636.   {
  1637.     errorcode = HAL_BUSY;
  1638.     goto error;
  1639.   }
  1640.  
  1641.   if ((pData == NULL) || (Size == 0U))
  1642.   {
  1643.     errorcode = HAL_ERROR;
  1644.     goto error;
  1645.   }
  1646.  
  1647.   /* Set the transaction information */
  1648.   hspi->State       = HAL_SPI_STATE_BUSY_TX;
  1649.   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
  1650.   hspi->pTxBuffPtr  = (uint8_t *)pData;
  1651.   hspi->TxXferSize  = Size;
  1652.   hspi->TxXferCount = Size;
  1653.  
  1654.   /* Init field not used in handle to zero */
  1655.   hspi->pRxBuffPtr  = (uint8_t *)NULL;
  1656.   hspi->TxISR       = NULL;
  1657.   hspi->RxISR       = NULL;
  1658.   hspi->RxXferSize  = 0U;
  1659.   hspi->RxXferCount = 0U;
  1660.  
  1661.   /* Configure communication direction : 1Line */
  1662.   if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1663.   {
  1664.     /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
  1665.     __HAL_SPI_DISABLE(hspi);
  1666.     SPI_1LINE_TX(hspi);
  1667.   }
  1668.  
  1669. #if (USE_SPI_CRC != 0U)
  1670.   /* Reset CRC Calculation */
  1671.   if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1672.   {
  1673.     SPI_RESET_CRC(hspi);
  1674.   }
  1675. #endif /* USE_SPI_CRC */
  1676.  
  1677.   /* Set the SPI TxDMA Half transfer complete callback */
  1678.   hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
  1679.  
  1680.   /* Set the SPI TxDMA transfer complete callback */
  1681.   hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
  1682.  
  1683.   /* Set the DMA error callback */
  1684.   hspi->hdmatx->XferErrorCallback = SPI_DMAError;
  1685.  
  1686.   /* Set the DMA AbortCpltCallback */
  1687.   hspi->hdmatx->XferAbortCallback = NULL;
  1688.  
  1689.   /* Enable the Tx DMA Stream/Channel */
  1690.   if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR,
  1691.                                  hspi->TxXferCount))
  1692.   {
  1693.     /* Update SPI error code */
  1694.     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
  1695.     errorcode = HAL_ERROR;
  1696.  
  1697.     hspi->State = HAL_SPI_STATE_READY;
  1698.     goto error;
  1699.   }
  1700.  
  1701.   /* Check if the SPI is already enabled */
  1702.   if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  1703.   {
  1704.     /* Enable SPI peripheral */
  1705.     __HAL_SPI_ENABLE(hspi);
  1706.   }
  1707.  
  1708.   /* Enable the SPI Error Interrupt Bit */
  1709.   __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));
  1710.  
  1711.   /* Enable Tx DMA Request */
  1712.   SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1713.  
  1714. error :
  1715.   /* Process Unlocked */
  1716.   __HAL_UNLOCK(hspi);
  1717.   return errorcode;
  1718. }
  1719.  
  1720. /**
  1721.   * @brief  Receive an amount of data in non-blocking mode with DMA.
  1722.   * @note   In case of MASTER mode and SPI_DIRECTION_2LINES direction, hdmatx shall be defined.
  1723.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  1724.   *               the configuration information for SPI module.
  1725.   * @param  pData pointer to data buffer
  1726.   * @note   When the CRC feature is enabled the pData Length must be Size + 1.
  1727.   * @param  Size amount of data to be sent
  1728.   * @retval HAL status
  1729.   */
  1730. HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  1731. {
  1732.   HAL_StatusTypeDef errorcode = HAL_OK;
  1733.  
  1734.   /* Check rx dma handle */
  1735.   assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx));
  1736.  
  1737.   if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
  1738.   {
  1739.     hspi->State = HAL_SPI_STATE_BUSY_RX;
  1740.  
  1741.     /* Check tx dma handle */
  1742.     assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx));
  1743.  
  1744.     /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  1745.     return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
  1746.   }
  1747.  
  1748.   /* Process Locked */
  1749.   __HAL_LOCK(hspi);
  1750.  
  1751.   if (hspi->State != HAL_SPI_STATE_READY)
  1752.   {
  1753.     errorcode = HAL_BUSY;
  1754.     goto error;
  1755.   }
  1756.  
  1757.   if ((pData == NULL) || (Size == 0U))
  1758.   {
  1759.     errorcode = HAL_ERROR;
  1760.     goto error;
  1761.   }
  1762.  
  1763.   /* Set the transaction information */
  1764.   hspi->State       = HAL_SPI_STATE_BUSY_RX;
  1765.   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
  1766.   hspi->pRxBuffPtr  = (uint8_t *)pData;
  1767.   hspi->RxXferSize  = Size;
  1768.   hspi->RxXferCount = Size;
  1769.  
  1770.   /*Init field not used in handle to zero */
  1771.   hspi->RxISR       = NULL;
  1772.   hspi->TxISR       = NULL;
  1773.   hspi->TxXferSize  = 0U;
  1774.   hspi->TxXferCount = 0U;
  1775.  
  1776.   /* Configure communication direction : 1Line */
  1777.   if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1778.   {
  1779.     /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
  1780.     __HAL_SPI_DISABLE(hspi);
  1781.     SPI_1LINE_RX(hspi);
  1782.   }
  1783.  
  1784. #if (USE_SPI_CRC != 0U)
  1785.   /* Reset CRC Calculation */
  1786.   if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1787.   {
  1788.     SPI_RESET_CRC(hspi);
  1789.   }
  1790. #endif /* USE_SPI_CRC */
  1791.  
  1792.   /* Set the SPI RxDMA Half transfer complete callback */
  1793.   hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
  1794.  
  1795.   /* Set the SPI Rx DMA transfer complete callback */
  1796.   hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
  1797.  
  1798.   /* Set the DMA error callback */
  1799.   hspi->hdmarx->XferErrorCallback = SPI_DMAError;
  1800.  
  1801.   /* Set the DMA AbortCpltCallback */
  1802.   hspi->hdmarx->XferAbortCallback = NULL;
  1803.  
  1804.   /* Enable the Rx DMA Stream/Channel  */
  1805.   if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr,
  1806.                                  hspi->RxXferCount))
  1807.   {
  1808.     /* Update SPI error code */
  1809.     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
  1810.     errorcode = HAL_ERROR;
  1811.  
  1812.     hspi->State = HAL_SPI_STATE_READY;
  1813.     goto error;
  1814.   }
  1815.  
  1816.   /* Check if the SPI is already enabled */
  1817.   if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  1818.   {
  1819.     /* Enable SPI peripheral */
  1820.     __HAL_SPI_ENABLE(hspi);
  1821.   }
  1822.  
  1823.   /* Enable the SPI Error Interrupt Bit */
  1824.   __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));
  1825.  
  1826.   /* Enable Rx DMA Request */
  1827.   SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1828.  
  1829. error:
  1830.   /* Process Unlocked */
  1831.   __HAL_UNLOCK(hspi);
  1832.   return errorcode;
  1833. }
  1834.  
  1835. /**
  1836.   * @brief  Transmit and Receive an amount of data in non-blocking mode with DMA.
  1837.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  1838.   *               the configuration information for SPI module.
  1839.   * @param  pTxData pointer to transmission data buffer
  1840.   * @param  pRxData pointer to reception data buffer
  1841.   * @note   When the CRC feature is enabled the pRxData Length must be Size + 1
  1842.   * @param  Size amount of data to be sent
  1843.   * @retval HAL status
  1844.   */
  1845. HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
  1846.                                               uint16_t Size)
  1847. {
  1848.   uint32_t             tmp_mode;
  1849.   HAL_SPI_StateTypeDef tmp_state;
  1850.   HAL_StatusTypeDef errorcode = HAL_OK;
  1851.  
  1852.   /* Check rx & tx dma handles */
  1853.   assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx));
  1854.   assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx));
  1855.  
  1856.   /* Check Direction parameter */
  1857.   assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  1858.  
  1859.   /* Process locked */
  1860.   __HAL_LOCK(hspi);
  1861.  
  1862.   /* Init temporary variables */
  1863.   tmp_state           = hspi->State;
  1864.   tmp_mode            = hspi->Init.Mode;
  1865.  
  1866.   if (!((tmp_state == HAL_SPI_STATE_READY) ||
  1867.         ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
  1868.   {
  1869.     errorcode = HAL_BUSY;
  1870.     goto error;
  1871.   }
  1872.  
  1873.   if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
  1874.   {
  1875.     errorcode = HAL_ERROR;
  1876.     goto error;
  1877.   }
  1878.  
  1879.   /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  1880.   if (hspi->State != HAL_SPI_STATE_BUSY_RX)
  1881.   {
  1882.     hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  1883.   }
  1884.  
  1885.   /* Set the transaction information */
  1886.   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
  1887.   hspi->pTxBuffPtr  = (uint8_t *)pTxData;
  1888.   hspi->TxXferSize  = Size;
  1889.   hspi->TxXferCount = Size;
  1890.   hspi->pRxBuffPtr  = (uint8_t *)pRxData;
  1891.   hspi->RxXferSize  = Size;
  1892.   hspi->RxXferCount = Size;
  1893.  
  1894.   /* Init field not used in handle to zero */
  1895.   hspi->RxISR       = NULL;
  1896.   hspi->TxISR       = NULL;
  1897.  
  1898. #if (USE_SPI_CRC != 0U)
  1899.   /* Reset CRC Calculation */
  1900.   if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1901.   {
  1902.     SPI_RESET_CRC(hspi);
  1903.   }
  1904. #endif /* USE_SPI_CRC */
  1905.  
  1906.   /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */
  1907.   if (hspi->State == HAL_SPI_STATE_BUSY_RX)
  1908.   {
  1909.     /* Set the SPI Rx DMA Half transfer complete callback */
  1910.     hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
  1911.     hspi->hdmarx->XferCpltCallback     = SPI_DMAReceiveCplt;
  1912.   }
  1913.   else
  1914.   {
  1915.     /* Set the SPI Tx/Rx DMA Half transfer complete callback */
  1916.     hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
  1917.     hspi->hdmarx->XferCpltCallback     = SPI_DMATransmitReceiveCplt;
  1918.   }
  1919.  
  1920.   /* Set the DMA error callback */
  1921.   hspi->hdmarx->XferErrorCallback = SPI_DMAError;
  1922.  
  1923.   /* Set the DMA AbortCpltCallback */
  1924.   hspi->hdmarx->XferAbortCallback = NULL;
  1925.  
  1926.   /* Enable the Rx DMA Stream/Channel  */
  1927.   if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr,
  1928.                                  hspi->RxXferCount))
  1929.   {
  1930.     /* Update SPI error code */
  1931.     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
  1932.     errorcode = HAL_ERROR;
  1933.  
  1934.     hspi->State = HAL_SPI_STATE_READY;
  1935.     goto error;
  1936.   }
  1937.  
  1938.   /* Enable Rx DMA Request */
  1939.   SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1940.  
  1941.   /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
  1942.   is performed in DMA reception complete callback  */
  1943.   hspi->hdmatx->XferHalfCpltCallback = NULL;
  1944.   hspi->hdmatx->XferCpltCallback     = NULL;
  1945.   hspi->hdmatx->XferErrorCallback    = NULL;
  1946.   hspi->hdmatx->XferAbortCallback    = NULL;
  1947.  
  1948.   /* Enable the Tx DMA Stream/Channel  */
  1949.   if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR,
  1950.                                  hspi->TxXferCount))
  1951.   {
  1952.     /* Update SPI error code */
  1953.     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
  1954.     errorcode = HAL_ERROR;
  1955.  
  1956.     hspi->State = HAL_SPI_STATE_READY;
  1957.     goto error;
  1958.   }
  1959.  
  1960.   /* Check if the SPI is already enabled */
  1961.   if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  1962.   {
  1963.     /* Enable SPI peripheral */
  1964.     __HAL_SPI_ENABLE(hspi);
  1965.   }
  1966.   /* Enable the SPI Error Interrupt Bit */
  1967.   __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));
  1968.  
  1969.   /* Enable Tx DMA Request */
  1970.   SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1971.  
  1972. error :
  1973.   /* Process Unlocked */
  1974.   __HAL_UNLOCK(hspi);
  1975.   return errorcode;
  1976. }
  1977.  
  1978. /**
  1979.   * @brief  Abort ongoing transfer (blocking mode).
  1980.   * @param  hspi SPI handle.
  1981.   * @note   This procedure could be used for aborting any ongoing transfer (Tx and Rx),
  1982.   *         started in Interrupt or DMA mode.
  1983.   *         This procedure performs following operations :
  1984.   *           - Disable SPI Interrupts (depending of transfer direction)
  1985.   *           - Disable the DMA transfer in the peripheral register (if enabled)
  1986.   *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
  1987.   *           - Set handle State to READY
  1988.   * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
  1989.   * @retval HAL status
  1990.   */
  1991. HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi)
  1992. {
  1993.   HAL_StatusTypeDef errorcode;
  1994.   __IO uint32_t count;
  1995.   __IO uint32_t resetcount;
  1996.  
  1997.   /* Initialized local variable  */
  1998.   errorcode = HAL_OK;
  1999.   resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
  2000.   count = resetcount;
  2001.  
  2002.   /* Clear ERRIE interrupt to avoid error interrupts generation during Abort procedure */
  2003.   CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE);
  2004.  
  2005.   /* Disable TXEIE, RXNEIE and ERRIE(mode fault event, overrun error, TI frame error) interrupts */
  2006.   if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE))
  2007.   {
  2008.     hspi->TxISR = SPI_AbortTx_ISR;
  2009.     /* Wait HAL_SPI_STATE_ABORT state */
  2010.     do
  2011.     {
  2012.       if (count == 0U)
  2013.       {
  2014.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
  2015.         break;
  2016.       }
  2017.       count--;
  2018.     } while (hspi->State != HAL_SPI_STATE_ABORT);
  2019.     /* Reset Timeout Counter */
  2020.     count = resetcount;
  2021.   }
  2022.  
  2023.   if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE))
  2024.   {
  2025.     hspi->RxISR = SPI_AbortRx_ISR;
  2026.     /* Wait HAL_SPI_STATE_ABORT state */
  2027.     do
  2028.     {
  2029.       if (count == 0U)
  2030.       {
  2031.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
  2032.         break;
  2033.       }
  2034.       count--;
  2035.     } while (hspi->State != HAL_SPI_STATE_ABORT);
  2036.     /* Reset Timeout Counter */
  2037.     count = resetcount;
  2038.   }
  2039.  
  2040.   /* Disable the SPI DMA Tx request if enabled */
  2041.   if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN))
  2042.   {
  2043.     /* Abort the SPI DMA Tx Stream/Channel : use blocking DMA Abort API (no callback) */
  2044.     if (hspi->hdmatx != NULL)
  2045.     {
  2046.       /* Set the SPI DMA Abort callback :
  2047.       will lead to call HAL_SPI_AbortCpltCallback() at end of DMA abort procedure */
  2048.       hspi->hdmatx->XferAbortCallback = NULL;
  2049.  
  2050.       /* Abort DMA Tx Handle linked to SPI Peripheral */
  2051.       if (HAL_DMA_Abort(hspi->hdmatx) != HAL_OK)
  2052.       {
  2053.         hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
  2054.       }
  2055.  
  2056.       /* Disable Tx DMA Request */
  2057.       CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN));
  2058.  
  2059.       /* Wait until TXE flag is set */
  2060.       do
  2061.       {
  2062.         if (count == 0U)
  2063.         {
  2064.           SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
  2065.           break;
  2066.         }
  2067.         count--;
  2068.       } while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);
  2069.     }
  2070.   }
  2071.  
  2072.   /* Disable the SPI DMA Rx request if enabled */
  2073.   if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN))
  2074.   {
  2075.     /* Abort the SPI DMA Rx Stream/Channel : use blocking DMA Abort API (no callback) */
  2076.     if (hspi->hdmarx != NULL)
  2077.     {
  2078.       /* Set the SPI DMA Abort callback :
  2079.       will lead to call HAL_SPI_AbortCpltCallback() at end of DMA abort procedure */
  2080.       hspi->hdmarx->XferAbortCallback = NULL;
  2081.  
  2082.       /* Abort DMA Rx Handle linked to SPI Peripheral */
  2083.       if (HAL_DMA_Abort(hspi->hdmarx) != HAL_OK)
  2084.       {
  2085.         hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
  2086.       }
  2087.  
  2088.       /* Disable peripheral */
  2089.       __HAL_SPI_DISABLE(hspi);
  2090.  
  2091.       /* Disable Rx DMA Request */
  2092.       CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_RXDMAEN));
  2093.     }
  2094.   }
  2095.   /* Reset Tx and Rx transfer counters */
  2096.   hspi->RxXferCount = 0U;
  2097.   hspi->TxXferCount = 0U;
  2098.  
  2099.   /* Check error during Abort procedure */
  2100.   if (hspi->ErrorCode == HAL_SPI_ERROR_ABORT)
  2101.   {
  2102.     /* return HAL_Error in case of error during Abort procedure */
  2103.     errorcode = HAL_ERROR;
  2104.   }
  2105.   else
  2106.   {
  2107.     /* Reset errorCode */
  2108.     hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  2109.   }
  2110.  
  2111.   /* Clear the Error flags in the SR register */
  2112.   __HAL_SPI_CLEAR_OVRFLAG(hspi);
  2113. #if defined(SPI_CR2_FRF)
  2114.   __HAL_SPI_CLEAR_FREFLAG(hspi);
  2115. #endif
  2116.  
  2117.   /* Restore hspi->state to ready */
  2118.   hspi->State = HAL_SPI_STATE_READY;
  2119.  
  2120.   return errorcode;
  2121. }
  2122.  
  2123. /**
  2124.   * @brief  Abort ongoing transfer (Interrupt mode).
  2125.   * @param  hspi SPI handle.
  2126.   * @note   This procedure could be used for aborting any ongoing transfer (Tx and Rx),
  2127.   *         started in Interrupt or DMA mode.
  2128.   *         This procedure performs following operations :
  2129.   *           - Disable SPI Interrupts (depending of transfer direction)
  2130.   *           - Disable the DMA transfer in the peripheral register (if enabled)
  2131.   *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
  2132.   *           - Set handle State to READY
  2133.   *           - At abort completion, call user abort complete callback
  2134.   * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
  2135.   *         considered as completed only when user abort complete callback is executed (not when exiting function).
  2136.   * @retval HAL status
  2137.   */
  2138. HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi)
  2139. {
  2140.   HAL_StatusTypeDef errorcode;
  2141.   uint32_t abortcplt ;
  2142.   __IO uint32_t count;
  2143.   __IO uint32_t resetcount;
  2144.  
  2145.   /* Initialized local variable  */
  2146.   errorcode = HAL_OK;
  2147.   abortcplt = 1U;
  2148.   resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
  2149.   count = resetcount;
  2150.  
  2151.   /* Clear ERRIE interrupt to avoid error interrupts generation during Abort procedure */
  2152.   CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE);
  2153.  
  2154.   /* Change Rx and Tx Irq Handler to Disable TXEIE, RXNEIE and ERRIE interrupts */
  2155.   if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE))
  2156.   {
  2157.     hspi->TxISR = SPI_AbortTx_ISR;
  2158.     /* Wait HAL_SPI_STATE_ABORT state */
  2159.     do
  2160.     {
  2161.       if (count == 0U)
  2162.       {
  2163.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
  2164.         break;
  2165.       }
  2166.       count--;
  2167.     } while (hspi->State != HAL_SPI_STATE_ABORT);
  2168.     /* Reset Timeout Counter */
  2169.     count = resetcount;
  2170.   }
  2171.  
  2172.   if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE))
  2173.   {
  2174.     hspi->RxISR = SPI_AbortRx_ISR;
  2175.     /* Wait HAL_SPI_STATE_ABORT state */
  2176.     do
  2177.     {
  2178.       if (count == 0U)
  2179.       {
  2180.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
  2181.         break;
  2182.       }
  2183.       count--;
  2184.     } while (hspi->State != HAL_SPI_STATE_ABORT);
  2185.     /* Reset Timeout Counter */
  2186.     count = resetcount;
  2187.   }
  2188.  
  2189.   /* If DMA Tx and/or DMA Rx Handles are associated to SPI Handle, DMA Abort complete callbacks should be initialised
  2190.      before any call to DMA Abort functions */
  2191.   /* DMA Tx Handle is valid */
  2192.   if (hspi->hdmatx != NULL)
  2193.   {
  2194.     /* Set DMA Abort Complete callback if UART DMA Tx request if enabled.
  2195.        Otherwise, set it to NULL */
  2196.     if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN))
  2197.     {
  2198.       hspi->hdmatx->XferAbortCallback = SPI_DMATxAbortCallback;
  2199.     }
  2200.     else
  2201.     {
  2202.       hspi->hdmatx->XferAbortCallback = NULL;
  2203.     }
  2204.   }
  2205.   /* DMA Rx Handle is valid */
  2206.   if (hspi->hdmarx != NULL)
  2207.   {
  2208.     /* Set DMA Abort Complete callback if UART DMA Rx request if enabled.
  2209.        Otherwise, set it to NULL */
  2210.     if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN))
  2211.     {
  2212.       hspi->hdmarx->XferAbortCallback = SPI_DMARxAbortCallback;
  2213.     }
  2214.     else
  2215.     {
  2216.       hspi->hdmarx->XferAbortCallback = NULL;
  2217.     }
  2218.   }
  2219.  
  2220.   /* Disable the SPI DMA Tx request if enabled */
  2221.   if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN))
  2222.   {
  2223.     /* Abort the SPI DMA Tx Stream/Channel */
  2224.     if (hspi->hdmatx != NULL)
  2225.     {
  2226.       /* Abort DMA Tx Handle linked to SPI Peripheral */
  2227.       if (HAL_DMA_Abort_IT(hspi->hdmatx) != HAL_OK)
  2228.       {
  2229.         hspi->hdmatx->XferAbortCallback = NULL;
  2230.         hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
  2231.       }
  2232.       else
  2233.       {
  2234.         abortcplt = 0U;
  2235.       }
  2236.     }
  2237.   }
  2238.   /* Disable the SPI DMA Rx request if enabled */
  2239.   if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN))
  2240.   {
  2241.     /* Abort the SPI DMA Rx Stream/Channel */
  2242.     if (hspi->hdmarx != NULL)
  2243.     {
  2244.       /* Abort DMA Rx Handle linked to SPI Peripheral */
  2245.       if (HAL_DMA_Abort_IT(hspi->hdmarx) !=  HAL_OK)
  2246.       {
  2247.         hspi->hdmarx->XferAbortCallback = NULL;
  2248.         hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
  2249.       }
  2250.       else
  2251.       {
  2252.         abortcplt = 0U;
  2253.       }
  2254.     }
  2255.   }
  2256.  
  2257.   if (abortcplt == 1U)
  2258.   {
  2259.     /* Reset Tx and Rx transfer counters */
  2260.     hspi->RxXferCount = 0U;
  2261.     hspi->TxXferCount = 0U;
  2262.  
  2263.     /* Check error during Abort procedure */
  2264.     if (hspi->ErrorCode == HAL_SPI_ERROR_ABORT)
  2265.     {
  2266.       /* return HAL_Error in case of error during Abort procedure */
  2267.       errorcode = HAL_ERROR;
  2268.     }
  2269.     else
  2270.     {
  2271.       /* Reset errorCode */
  2272.       hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  2273.     }
  2274.  
  2275.     /* Clear the Error flags in the SR register */
  2276.     __HAL_SPI_CLEAR_OVRFLAG(hspi);
  2277. #if defined(SPI_CR2_FRF)
  2278.     __HAL_SPI_CLEAR_FREFLAG(hspi);
  2279. #endif
  2280.  
  2281.     /* Restore hspi->State to Ready */
  2282.     hspi->State = HAL_SPI_STATE_READY;
  2283.  
  2284.     /* As no DMA to be aborted, call directly user Abort complete callback */
  2285. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  2286.     hspi->AbortCpltCallback(hspi);
  2287. #else
  2288.     HAL_SPI_AbortCpltCallback(hspi);
  2289. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  2290.   }
  2291.  
  2292.   return errorcode;
  2293. }
  2294.  
  2295. /**
  2296.   * @brief  Pause the DMA Transfer.
  2297.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  2298.   *               the configuration information for the specified SPI module.
  2299.   * @retval HAL status
  2300.   */
  2301. HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
  2302. {
  2303.   /* Process Locked */
  2304.   __HAL_LOCK(hspi);
  2305.  
  2306.   /* Disable the SPI DMA Tx & Rx requests */
  2307.   CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
  2308.  
  2309.   /* Process Unlocked */
  2310.   __HAL_UNLOCK(hspi);
  2311.  
  2312.   return HAL_OK;
  2313. }
  2314.  
  2315. /**
  2316.   * @brief  Resume the DMA Transfer.
  2317.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  2318.   *               the configuration information for the specified SPI module.
  2319.   * @retval HAL status
  2320.   */
  2321. HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
  2322. {
  2323.   /* Process Locked */
  2324.   __HAL_LOCK(hspi);
  2325.  
  2326.   /* Enable the SPI DMA Tx & Rx requests */
  2327.   SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
  2328.  
  2329.   /* Process Unlocked */
  2330.   __HAL_UNLOCK(hspi);
  2331.  
  2332.   return HAL_OK;
  2333. }
  2334.  
  2335. /**
  2336.   * @brief  Stop the DMA Transfer.
  2337.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  2338.   *               the configuration information for the specified SPI module.
  2339.   * @retval HAL status
  2340.   */
  2341. HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
  2342. {
  2343.   HAL_StatusTypeDef errorcode = HAL_OK;
  2344.   /* The Lock is not implemented on this API to allow the user application
  2345.      to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
  2346.      when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
  2347.      and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
  2348.      */
  2349.  
  2350.   /* Abort the SPI DMA tx Stream/Channel  */
  2351.   if (hspi->hdmatx != NULL)
  2352.   {
  2353.     if (HAL_OK != HAL_DMA_Abort(hspi->hdmatx))
  2354.     {
  2355.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
  2356.       errorcode = HAL_ERROR;
  2357.     }
  2358.   }
  2359.   /* Abort the SPI DMA rx Stream/Channel  */
  2360.   if (hspi->hdmarx != NULL)
  2361.   {
  2362.     if (HAL_OK != HAL_DMA_Abort(hspi->hdmarx))
  2363.     {
  2364.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
  2365.       errorcode = HAL_ERROR;
  2366.     }
  2367.   }
  2368.  
  2369.   /* Disable the SPI DMA Tx & Rx requests */
  2370.   CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
  2371.   hspi->State = HAL_SPI_STATE_READY;
  2372.   return errorcode;
  2373. }
  2374.  
  2375. /**
  2376.   * @brief  Handle SPI interrupt request.
  2377.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  2378.   *               the configuration information for the specified SPI module.
  2379.   * @retval None
  2380.   */
  2381. void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
  2382. {
  2383.   uint32_t itsource = hspi->Instance->CR2;
  2384.   uint32_t itflag   = hspi->Instance->SR;
  2385.  
  2386.   /* SPI in mode Receiver ----------------------------------------------------*/
  2387.   if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) == RESET) &&
  2388.       (SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXNE) != RESET))
  2389.   {
  2390.     hspi->RxISR(hspi);
  2391.     return;
  2392.   }
  2393.  
  2394.   /* SPI in mode Transmitter -------------------------------------------------*/
  2395.   if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_TXE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_TXE) != RESET))
  2396.   {
  2397.     hspi->TxISR(hspi);
  2398.     return;
  2399.   }
  2400.  
  2401.   /* SPI in Error Treatment --------------------------------------------------*/
  2402. #if defined(SPI_CR2_FRF)
  2403.   if (((SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET) || (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET)
  2404.        || (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_ERR) != RESET))
  2405. #else
  2406.   if (((SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET) || (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET))
  2407.       && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_ERR) != RESET))
  2408. #endif
  2409.   {
  2410.     /* SPI Overrun error interrupt occurred ----------------------------------*/
  2411.     if (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET)
  2412.     {
  2413.       if (hspi->State != HAL_SPI_STATE_BUSY_TX)
  2414.       {
  2415.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
  2416.         __HAL_SPI_CLEAR_OVRFLAG(hspi);
  2417.       }
  2418.       else
  2419.       {
  2420.         __HAL_SPI_CLEAR_OVRFLAG(hspi);
  2421.         return;
  2422.       }
  2423.     }
  2424.  
  2425.     /* SPI Mode Fault error interrupt occurred -------------------------------*/
  2426.     if (SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET)
  2427.     {
  2428.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
  2429.       __HAL_SPI_CLEAR_MODFFLAG(hspi);
  2430.     }
  2431.  
  2432.     /* SPI Frame error interrupt occurred ------------------------------------*/
  2433. #if defined(SPI_CR2_FRF)
  2434.     if (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)
  2435.     {
  2436.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE);
  2437.       __HAL_SPI_CLEAR_FREFLAG(hspi);
  2438.     }
  2439. #endif
  2440.  
  2441.     if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  2442.     {
  2443.       /* Disable all interrupts */
  2444.       __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);
  2445.  
  2446.       hspi->State = HAL_SPI_STATE_READY;
  2447.       /* Disable the SPI DMA requests if enabled */
  2448.       if ((HAL_IS_BIT_SET(itsource, SPI_CR2_TXDMAEN)) || (HAL_IS_BIT_SET(itsource, SPI_CR2_RXDMAEN)))
  2449.       {
  2450.         CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN));
  2451.  
  2452.         /* Abort the SPI DMA Rx channel */
  2453.         if (hspi->hdmarx != NULL)
  2454.         {
  2455.           /* Set the SPI DMA Abort callback :
  2456.           will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */
  2457.           hspi->hdmarx->XferAbortCallback = SPI_DMAAbortOnError;
  2458.           if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmarx))
  2459.           {
  2460.             SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
  2461.           }
  2462.         }
  2463.         /* Abort the SPI DMA Tx channel */
  2464.         if (hspi->hdmatx != NULL)
  2465.         {
  2466.           /* Set the SPI DMA Abort callback :
  2467.           will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */
  2468.           hspi->hdmatx->XferAbortCallback = SPI_DMAAbortOnError;
  2469.           if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmatx))
  2470.           {
  2471.             SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
  2472.           }
  2473.         }
  2474.       }
  2475.       else
  2476.       {
  2477.         /* Call user error callback */
  2478. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  2479.         hspi->ErrorCallback(hspi);
  2480. #else
  2481.         HAL_SPI_ErrorCallback(hspi);
  2482. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  2483.       }
  2484.     }
  2485.     return;
  2486.   }
  2487. }
  2488.  
  2489. /**
  2490.   * @brief  Tx Transfer completed callback.
  2491.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  2492.   *               the configuration information for SPI module.
  2493.   * @retval None
  2494.   */
  2495. __weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
  2496. {
  2497.   /* Prevent unused argument(s) compilation warning */
  2498.   UNUSED(hspi);
  2499.  
  2500.   /* NOTE : This function should not be modified, when the callback is needed,
  2501.             the HAL_SPI_TxCpltCallback should be implemented in the user file
  2502.    */
  2503. }
  2504.  
  2505. /**
  2506.   * @brief  Rx Transfer completed callback.
  2507.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  2508.   *               the configuration information for SPI module.
  2509.   * @retval None
  2510.   */
  2511. __weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
  2512. {
  2513.   /* Prevent unused argument(s) compilation warning */
  2514.   UNUSED(hspi);
  2515.  
  2516.   /* NOTE : This function should not be modified, when the callback is needed,
  2517.             the HAL_SPI_RxCpltCallback should be implemented in the user file
  2518.    */
  2519. }
  2520.  
  2521. /**
  2522.   * @brief  Tx and Rx Transfer completed callback.
  2523.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  2524.   *               the configuration information for SPI module.
  2525.   * @retval None
  2526.   */
  2527. __weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
  2528. {
  2529.   /* Prevent unused argument(s) compilation warning */
  2530.   UNUSED(hspi);
  2531.  
  2532.   /* NOTE : This function should not be modified, when the callback is needed,
  2533.             the HAL_SPI_TxRxCpltCallback should be implemented in the user file
  2534.    */
  2535. }
  2536.  
  2537. /**
  2538.   * @brief  Tx Half Transfer completed callback.
  2539.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  2540.   *               the configuration information for SPI module.
  2541.   * @retval None
  2542.   */
  2543. __weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  2544. {
  2545.   /* Prevent unused argument(s) compilation warning */
  2546.   UNUSED(hspi);
  2547.  
  2548.   /* NOTE : This function should not be modified, when the callback is needed,
  2549.             the HAL_SPI_TxHalfCpltCallback should be implemented in the user file
  2550.    */
  2551. }
  2552.  
  2553. /**
  2554.   * @brief  Rx Half Transfer completed callback.
  2555.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  2556.   *               the configuration information for SPI module.
  2557.   * @retval None
  2558.   */
  2559. __weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  2560. {
  2561.   /* Prevent unused argument(s) compilation warning */
  2562.   UNUSED(hspi);
  2563.  
  2564.   /* NOTE : This function should not be modified, when the callback is needed,
  2565.             the HAL_SPI_RxHalfCpltCallback() should be implemented in the user file
  2566.    */
  2567. }
  2568.  
  2569. /**
  2570.   * @brief  Tx and Rx Half Transfer callback.
  2571.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  2572.   *               the configuration information for SPI module.
  2573.   * @retval None
  2574.   */
  2575. __weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  2576. {
  2577.   /* Prevent unused argument(s) compilation warning */
  2578.   UNUSED(hspi);
  2579.  
  2580.   /* NOTE : This function should not be modified, when the callback is needed,
  2581.             the HAL_SPI_TxRxHalfCpltCallback() should be implemented in the user file
  2582.    */
  2583. }
  2584.  
  2585. /**
  2586.   * @brief  SPI error callback.
  2587.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  2588.   *               the configuration information for SPI module.
  2589.   * @retval None
  2590.   */
  2591. __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
  2592. {
  2593.   /* Prevent unused argument(s) compilation warning */
  2594.   UNUSED(hspi);
  2595.  
  2596.   /* NOTE : This function should not be modified, when the callback is needed,
  2597.             the HAL_SPI_ErrorCallback should be implemented in the user file
  2598.    */
  2599.   /* NOTE : The ErrorCode parameter in the hspi handle is updated by the SPI processes
  2600.             and user can use HAL_SPI_GetError() API to check the latest error occurred
  2601.    */
  2602. }
  2603.  
  2604. /**
  2605.   * @brief  SPI Abort Complete callback.
  2606.   * @param  hspi SPI handle.
  2607.   * @retval None
  2608.   */
  2609. __weak void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi)
  2610. {
  2611.   /* Prevent unused argument(s) compilation warning */
  2612.   UNUSED(hspi);
  2613.  
  2614.   /* NOTE : This function should not be modified, when the callback is needed,
  2615.             the HAL_SPI_AbortCpltCallback can be implemented in the user file.
  2616.    */
  2617. }
  2618.  
  2619. /**
  2620.   * @}
  2621.   */
  2622.  
  2623. /** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
  2624.   * @brief   SPI control functions
  2625.   *
  2626. @verbatim
  2627.  ===============================================================================
  2628.                       ##### Peripheral State and Errors functions #####
  2629.  ===============================================================================
  2630.     [..]
  2631.     This subsection provides a set of functions allowing to control the SPI.
  2632.      (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
  2633.      (+) HAL_SPI_GetError() check in run-time Errors occurring during communication
  2634. @endverbatim
  2635.   * @{
  2636.   */
  2637.  
  2638. /**
  2639.   * @brief  Return the SPI handle state.
  2640.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  2641.   *               the configuration information for SPI module.
  2642.   * @retval SPI state
  2643.   */
  2644. HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
  2645. {
  2646.   /* Return SPI handle state */
  2647.   return hspi->State;
  2648. }
  2649.  
  2650. /**
  2651.   * @brief  Return the SPI error code.
  2652.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  2653.   *               the configuration information for SPI module.
  2654.   * @retval SPI error code in bitmap format
  2655.   */
  2656. uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
  2657. {
  2658.   /* Return SPI ErrorCode */
  2659.   return hspi->ErrorCode;
  2660. }
  2661.  
  2662. /**
  2663.   * @}
  2664.   */
  2665.  
  2666. /**
  2667.   * @}
  2668.   */
  2669.  
  2670. /** @addtogroup SPI_Private_Functions
  2671.   * @brief   Private functions
  2672.   * @{
  2673.   */
  2674.  
  2675. /**
  2676.   * @brief  DMA SPI transmit process complete callback.
  2677.   * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
  2678.   *               the configuration information for the specified DMA module.
  2679.   * @retval None
  2680.   */
  2681. static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
  2682. {
  2683.   SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
  2684.   uint32_t tickstart;
  2685.  
  2686.   /* Init tickstart for timeout management*/
  2687.   tickstart = HAL_GetTick();
  2688.  
  2689.   /* DMA Normal Mode */
  2690.   if ((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC)
  2691.   {
  2692.     /* Disable ERR interrupt */
  2693.     __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
  2694.  
  2695.     /* Disable Tx DMA Request */
  2696.     CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  2697.  
  2698.     /* Check the end of the transaction */
  2699.     if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
  2700.     {
  2701.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  2702.     }
  2703.  
  2704.     /* Clear overrun flag in 2 Lines communication mode because received data is not read */
  2705.     if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
  2706.     {
  2707.       __HAL_SPI_CLEAR_OVRFLAG(hspi);
  2708.     }
  2709.  
  2710.     hspi->TxXferCount = 0U;
  2711.     hspi->State = HAL_SPI_STATE_READY;
  2712.  
  2713.     if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  2714.     {
  2715.       /* Call user error callback */
  2716. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  2717.       hspi->ErrorCallback(hspi);
  2718. #else
  2719.       HAL_SPI_ErrorCallback(hspi);
  2720. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  2721.       return;
  2722.     }
  2723.   }
  2724.   /* Call user Tx complete callback */
  2725. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  2726.   hspi->TxCpltCallback(hspi);
  2727. #else
  2728.   HAL_SPI_TxCpltCallback(hspi);
  2729. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  2730. }
  2731.  
  2732. /**
  2733.   * @brief  DMA SPI receive process complete callback.
  2734.   * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
  2735.   *               the configuration information for the specified DMA module.
  2736.   * @retval None
  2737.   */
  2738. static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
  2739. {
  2740.   SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
  2741.   uint32_t tickstart;
  2742.  
  2743.   /* Init tickstart for timeout management*/
  2744.   tickstart = HAL_GetTick();
  2745.  
  2746.   /* DMA Normal Mode */
  2747.   if ((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC)
  2748.   {
  2749.     /* Disable ERR interrupt */
  2750.     __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
  2751.  
  2752. #if (USE_SPI_CRC != 0U)
  2753.     /* CRC handling */
  2754.     if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  2755.     {
  2756.       /* Wait until RXNE flag */
  2757.       if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
  2758.       {
  2759.         /* Error on the CRC reception */
  2760.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  2761.       }
  2762.       /* Read CRC */
  2763.       READ_REG(hspi->Instance->DR);
  2764.     }
  2765. #endif /* USE_SPI_CRC */
  2766.  
  2767.     /* Check if we are in Master RX 2 line mode */
  2768.     if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
  2769.     {
  2770.       /* Disable Rx/Tx DMA Request (done by default to handle the case master rx direction 2 lines) */
  2771.       CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
  2772.     }
  2773.     else
  2774.     {
  2775.       /* Normal case */
  2776.       CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  2777.     }
  2778.  
  2779.     /* Check the end of the transaction */
  2780.     if (SPI_EndRxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
  2781.     {
  2782.       hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
  2783.     }
  2784.  
  2785.     hspi->RxXferCount = 0U;
  2786.     hspi->State = HAL_SPI_STATE_READY;
  2787.  
  2788. #if (USE_SPI_CRC != 0U)
  2789.     /* Check if CRC error occurred */
  2790.     if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
  2791.     {
  2792.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  2793.       __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  2794.     }
  2795. #endif /* USE_SPI_CRC */
  2796.  
  2797.     if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  2798.     {
  2799.       /* Call user error callback */
  2800. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  2801.       hspi->ErrorCallback(hspi);
  2802. #else
  2803.       HAL_SPI_ErrorCallback(hspi);
  2804. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  2805.       return;
  2806.     }
  2807.   }
  2808.   /* Call user Rx complete callback */
  2809. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  2810.   hspi->RxCpltCallback(hspi);
  2811. #else
  2812.   HAL_SPI_RxCpltCallback(hspi);
  2813. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  2814. }
  2815.  
  2816. /**
  2817.   * @brief  DMA SPI transmit receive process complete callback.
  2818.   * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
  2819.   *               the configuration information for the specified DMA module.
  2820.   * @retval None
  2821.   */
  2822. static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
  2823. {
  2824.   SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
  2825.   uint32_t tickstart;
  2826.  
  2827.   /* Init tickstart for timeout management*/
  2828.   tickstart = HAL_GetTick();
  2829.  
  2830.   /* DMA Normal Mode */
  2831.   if ((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC)
  2832.   {
  2833.     /* Disable ERR interrupt */
  2834.     __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
  2835.  
  2836. #if (USE_SPI_CRC != 0U)
  2837.     /* CRC handling */
  2838.     if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  2839.     {
  2840.       /* Wait the CRC data */
  2841.       if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
  2842.       {
  2843.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  2844.       }
  2845.       /* Read CRC to Flush DR and RXNE flag */
  2846.       READ_REG(hspi->Instance->DR);
  2847.     }
  2848. #endif /* USE_SPI_CRC */
  2849.  
  2850.     /* Check the end of the transaction */
  2851.     if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
  2852.     {
  2853.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  2854.     }
  2855.  
  2856.     /* Disable Rx/Tx DMA Request */
  2857.     CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
  2858.  
  2859.     hspi->TxXferCount = 0U;
  2860.     hspi->RxXferCount = 0U;
  2861.     hspi->State = HAL_SPI_STATE_READY;
  2862.  
  2863. #if (USE_SPI_CRC != 0U)
  2864.     /* Check if CRC error occurred */
  2865.     if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
  2866.     {
  2867.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  2868.       __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  2869.     }
  2870. #endif /* USE_SPI_CRC */
  2871.  
  2872.     if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  2873.     {
  2874.       /* Call user error callback */
  2875. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  2876.       hspi->ErrorCallback(hspi);
  2877. #else
  2878.       HAL_SPI_ErrorCallback(hspi);
  2879. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  2880.       return;
  2881.     }
  2882.   }
  2883.   /* Call user TxRx complete callback */
  2884. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  2885.   hspi->TxRxCpltCallback(hspi);
  2886. #else
  2887.   HAL_SPI_TxRxCpltCallback(hspi);
  2888. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  2889. }
  2890.  
  2891. /**
  2892.   * @brief  DMA SPI half transmit process complete callback.
  2893.   * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
  2894.   *               the configuration information for the specified DMA module.
  2895.   * @retval None
  2896.   */
  2897. static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma)
  2898. {
  2899.   SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
  2900.  
  2901.   /* Call user Tx half complete callback */
  2902. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  2903.   hspi->TxHalfCpltCallback(hspi);
  2904. #else
  2905.   HAL_SPI_TxHalfCpltCallback(hspi);
  2906. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  2907. }
  2908.  
  2909. /**
  2910.   * @brief  DMA SPI half receive process complete callback
  2911.   * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
  2912.   *               the configuration information for the specified DMA module.
  2913.   * @retval None
  2914.   */
  2915. static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma)
  2916. {
  2917.   SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
  2918.  
  2919.   /* Call user Rx half complete callback */
  2920. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  2921.   hspi->RxHalfCpltCallback(hspi);
  2922. #else
  2923.   HAL_SPI_RxHalfCpltCallback(hspi);
  2924. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  2925. }
  2926.  
  2927. /**
  2928.   * @brief  DMA SPI half transmit receive process complete callback.
  2929.   * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
  2930.   *               the configuration information for the specified DMA module.
  2931.   * @retval None
  2932.   */
  2933. static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma)
  2934. {
  2935.   SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
  2936.  
  2937.   /* Call user TxRx half complete callback */
  2938. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  2939.   hspi->TxRxHalfCpltCallback(hspi);
  2940. #else
  2941.   HAL_SPI_TxRxHalfCpltCallback(hspi);
  2942. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  2943. }
  2944.  
  2945. /**
  2946.   * @brief  DMA SPI communication error callback.
  2947.   * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
  2948.   *               the configuration information for the specified DMA module.
  2949.   * @retval None
  2950.   */
  2951. static void SPI_DMAError(DMA_HandleTypeDef *hdma)
  2952. {
  2953.   SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
  2954.  
  2955.   /* Stop the disable DMA transfer on SPI side */
  2956.   CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
  2957.  
  2958.   SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
  2959.   hspi->State = HAL_SPI_STATE_READY;
  2960.   /* Call user error callback */
  2961. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  2962.   hspi->ErrorCallback(hspi);
  2963. #else
  2964.   HAL_SPI_ErrorCallback(hspi);
  2965. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  2966. }
  2967.  
  2968. /**
  2969.   * @brief  DMA SPI communication abort callback, when initiated by HAL services on Error
  2970.   *         (To be called at end of DMA Abort procedure following error occurrence).
  2971.   * @param  hdma DMA handle.
  2972.   * @retval None
  2973.   */
  2974. static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma)
  2975. {
  2976.   SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
  2977.   hspi->RxXferCount = 0U;
  2978.   hspi->TxXferCount = 0U;
  2979.  
  2980.   /* Call user error callback */
  2981. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  2982.   hspi->ErrorCallback(hspi);
  2983. #else
  2984.   HAL_SPI_ErrorCallback(hspi);
  2985. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  2986. }
  2987.  
  2988. /**
  2989.   * @brief  DMA SPI Tx communication abort callback, when initiated by user
  2990.   *         (To be called at end of DMA Tx Abort procedure following user abort request).
  2991.   * @note   When this callback is executed, User Abort complete call back is called only if no
  2992.   *         Abort still ongoing for Rx DMA Handle.
  2993.   * @param  hdma DMA handle.
  2994.   * @retval None
  2995.   */
  2996. static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
  2997. {
  2998.   SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
  2999.   __IO uint32_t count;
  3000.  
  3001.   hspi->hdmatx->XferAbortCallback = NULL;
  3002.   count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
  3003.  
  3004.   /* Disable Tx DMA Request */
  3005.   CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  3006.  
  3007.   /* Wait until TXE flag is set */
  3008.   do
  3009.   {
  3010.     if (count == 0U)
  3011.     {
  3012.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
  3013.       break;
  3014.     }
  3015.     count--;
  3016.   } while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);
  3017.  
  3018.   /* Check if an Abort process is still ongoing */
  3019.   if (hspi->hdmarx != NULL)
  3020.   {
  3021.     if (hspi->hdmarx->XferAbortCallback != NULL)
  3022.     {
  3023.       return;
  3024.     }
  3025.   }
  3026.  
  3027.   /* No Abort process still ongoing : All DMA Stream/Channel are aborted, call user Abort Complete callback */
  3028.   hspi->RxXferCount = 0U;
  3029.   hspi->TxXferCount = 0U;
  3030.  
  3031.   /* Check no error during Abort procedure */
  3032.   if (hspi->ErrorCode != HAL_SPI_ERROR_ABORT)
  3033.   {
  3034.     /* Reset errorCode */
  3035.     hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  3036.   }
  3037.  
  3038.   /* Clear the Error flags in the SR register */
  3039.   __HAL_SPI_CLEAR_OVRFLAG(hspi);
  3040. #if defined(SPI_CR2_FRF)
  3041.   __HAL_SPI_CLEAR_FREFLAG(hspi);
  3042. #endif
  3043.  
  3044.   /* Restore hspi->State to Ready */
  3045.   hspi->State  = HAL_SPI_STATE_READY;
  3046.  
  3047.   /* Call user Abort complete callback */
  3048. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  3049.   hspi->AbortCpltCallback(hspi);
  3050. #else
  3051.   HAL_SPI_AbortCpltCallback(hspi);
  3052. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  3053. }
  3054.  
  3055. /**
  3056.   * @brief  DMA SPI Rx communication abort callback, when initiated by user
  3057.   *         (To be called at end of DMA Rx Abort procedure following user abort request).
  3058.   * @note   When this callback is executed, User Abort complete call back is called only if no
  3059.   *         Abort still ongoing for Tx DMA Handle.
  3060.   * @param  hdma DMA handle.
  3061.   * @retval None
  3062.   */
  3063. static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
  3064. {
  3065.   SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
  3066.  
  3067.   /* Disable SPI Peripheral */
  3068.   __HAL_SPI_DISABLE(hspi);
  3069.  
  3070.   hspi->hdmarx->XferAbortCallback = NULL;
  3071.  
  3072.   /* Disable Rx DMA Request */
  3073.   CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  3074.  
  3075.   /* Check Busy flag */
  3076.   if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
  3077.   {
  3078.     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
  3079.   }
  3080.  
  3081.   /* Check if an Abort process is still ongoing */
  3082.   if (hspi->hdmatx != NULL)
  3083.   {
  3084.     if (hspi->hdmatx->XferAbortCallback != NULL)
  3085.     {
  3086.       return;
  3087.     }
  3088.   }
  3089.  
  3090.   /* No Abort process still ongoing : All DMA Stream/Channel are aborted, call user Abort Complete callback */
  3091.   hspi->RxXferCount = 0U;
  3092.   hspi->TxXferCount = 0U;
  3093.  
  3094.   /* Check no error during Abort procedure */
  3095.   if (hspi->ErrorCode != HAL_SPI_ERROR_ABORT)
  3096.   {
  3097.     /* Reset errorCode */
  3098.     hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  3099.   }
  3100.  
  3101.   /* Clear the Error flags in the SR register */
  3102.   __HAL_SPI_CLEAR_OVRFLAG(hspi);
  3103. #if defined(SPI_CR2_FRF)
  3104.   __HAL_SPI_CLEAR_FREFLAG(hspi);
  3105. #endif
  3106.  
  3107.   /* Restore hspi->State to Ready */
  3108.   hspi->State  = HAL_SPI_STATE_READY;
  3109.  
  3110.   /* Call user Abort complete callback */
  3111. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  3112.   hspi->AbortCpltCallback(hspi);
  3113. #else
  3114.   HAL_SPI_AbortCpltCallback(hspi);
  3115. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  3116. }
  3117.  
  3118. /**
  3119.   * @brief  Rx 8-bit handler for Transmit and Receive in Interrupt mode.
  3120.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  3121.   *               the configuration information for SPI module.
  3122.   * @retval None
  3123.   */
  3124. static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
  3125. {
  3126.   /* Receive data in 8bit mode */
  3127.   *hspi->pRxBuffPtr = *((__IO uint8_t *)&hspi->Instance->DR);
  3128.   hspi->pRxBuffPtr++;
  3129.   hspi->RxXferCount--;
  3130.  
  3131.   /* Check end of the reception */
  3132.   if (hspi->RxXferCount == 0U)
  3133.   {
  3134. #if (USE_SPI_CRC != 0U)
  3135.     if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  3136.     {
  3137.       hspi->RxISR =  SPI_2linesRxISR_8BITCRC;
  3138.       return;
  3139.     }
  3140. #endif /* USE_SPI_CRC */
  3141.  
  3142.     /* Disable RXNE  and ERR interrupt */
  3143.     __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
  3144.  
  3145.     if (hspi->TxXferCount == 0U)
  3146.     {
  3147.       SPI_CloseRxTx_ISR(hspi);
  3148.     }
  3149.   }
  3150. }
  3151.  
  3152. #if (USE_SPI_CRC != 0U)
  3153. /**
  3154.   * @brief  Rx 8-bit handler for Transmit and Receive in Interrupt mode.
  3155.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  3156.   *               the configuration information for SPI module.
  3157.   * @retval None
  3158.   */
  3159. static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
  3160. {
  3161.   /* Read 8bit CRC to flush Data Register */
  3162.   READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
  3163.  
  3164.   /* Disable RXNE and ERR interrupt */
  3165.   __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
  3166.  
  3167.   if (hspi->TxXferCount == 0U)
  3168.   {
  3169.     SPI_CloseRxTx_ISR(hspi);
  3170.   }
  3171. }
  3172. #endif /* USE_SPI_CRC */
  3173.  
  3174. /**
  3175.   * @brief  Tx 8-bit handler for Transmit and Receive in Interrupt mode.
  3176.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  3177.   *               the configuration information for SPI module.
  3178.   * @retval None
  3179.   */
  3180. static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
  3181. {
  3182.   *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
  3183.   hspi->pTxBuffPtr++;
  3184.   hspi->TxXferCount--;
  3185.  
  3186.   /* Check the end of the transmission */
  3187.   if (hspi->TxXferCount == 0U)
  3188.   {
  3189. #if (USE_SPI_CRC != 0U)
  3190.     if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  3191.     {
  3192.       /* Set CRC Next Bit to send CRC */
  3193.       SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  3194.       /* Disable TXE interrupt */
  3195.       __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
  3196.       return;
  3197.     }
  3198. #endif /* USE_SPI_CRC */
  3199.  
  3200.     /* Disable TXE interrupt */
  3201.     __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
  3202.  
  3203.     if (hspi->RxXferCount == 0U)
  3204.     {
  3205.       SPI_CloseRxTx_ISR(hspi);
  3206.     }
  3207.   }
  3208. }
  3209.  
  3210. /**
  3211.   * @brief  Rx 16-bit handler for Transmit and Receive in Interrupt mode.
  3212.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  3213.   *               the configuration information for SPI module.
  3214.   * @retval None
  3215.   */
  3216. static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
  3217. {
  3218.   /* Receive data in 16 Bit mode */
  3219.   *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR);
  3220.   hspi->pRxBuffPtr += sizeof(uint16_t);
  3221.   hspi->RxXferCount--;
  3222.  
  3223.   if (hspi->RxXferCount == 0U)
  3224.   {
  3225. #if (USE_SPI_CRC != 0U)
  3226.     if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  3227.     {
  3228.       hspi->RxISR =  SPI_2linesRxISR_16BITCRC;
  3229.       return;
  3230.     }
  3231. #endif /* USE_SPI_CRC */
  3232.  
  3233.     /* Disable RXNE interrupt */
  3234.     __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
  3235.  
  3236.     if (hspi->TxXferCount == 0U)
  3237.     {
  3238.       SPI_CloseRxTx_ISR(hspi);
  3239.     }
  3240.   }
  3241. }
  3242.  
  3243. #if (USE_SPI_CRC != 0U)
  3244. /**
  3245.   * @brief  Manage the CRC 16-bit receive for Transmit and Receive in Interrupt mode.
  3246.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  3247.   *               the configuration information for SPI module.
  3248.   * @retval None
  3249.   */
  3250. static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
  3251. {
  3252.   /* Read 16bit CRC to flush Data Register */
  3253.   READ_REG(hspi->Instance->DR);
  3254.  
  3255.   /* Disable RXNE interrupt */
  3256.   __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
  3257.  
  3258.   SPI_CloseRxTx_ISR(hspi);
  3259. }
  3260. #endif /* USE_SPI_CRC */
  3261.  
  3262. /**
  3263.   * @brief  Tx 16-bit handler for Transmit and Receive in Interrupt mode.
  3264.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  3265.   *               the configuration information for SPI module.
  3266.   * @retval None
  3267.   */
  3268. static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
  3269. {
  3270.   /* Transmit data in 16 Bit mode */
  3271.   hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
  3272.   hspi->pTxBuffPtr += sizeof(uint16_t);
  3273.   hspi->TxXferCount--;
  3274.  
  3275.   /* Enable CRC Transmission */
  3276.   if (hspi->TxXferCount == 0U)
  3277.   {
  3278. #if (USE_SPI_CRC != 0U)
  3279.     if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  3280.     {
  3281.       /* Set CRC Next Bit to send CRC */
  3282.       SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  3283.       /* Disable TXE interrupt */
  3284.       __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
  3285.       return;
  3286.     }
  3287. #endif /* USE_SPI_CRC */
  3288.  
  3289.     /* Disable TXE interrupt */
  3290.     __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
  3291.  
  3292.     if (hspi->RxXferCount == 0U)
  3293.     {
  3294.       SPI_CloseRxTx_ISR(hspi);
  3295.     }
  3296.   }
  3297. }
  3298.  
  3299. #if (USE_SPI_CRC != 0U)
  3300. /**
  3301.   * @brief  Manage the CRC 8-bit receive in Interrupt context.
  3302.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  3303.   *               the configuration information for SPI module.
  3304.   * @retval None
  3305.   */
  3306. static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
  3307. {
  3308.   /* Read 8bit CRC to flush Data Register */
  3309.   READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
  3310.  
  3311.   SPI_CloseRx_ISR(hspi);
  3312. }
  3313. #endif /* USE_SPI_CRC */
  3314.  
  3315. /**
  3316.   * @brief  Manage the receive 8-bit in Interrupt context.
  3317.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  3318.   *               the configuration information for SPI module.
  3319.   * @retval None
  3320.   */
  3321. static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
  3322. {
  3323.   *hspi->pRxBuffPtr = (*(__IO uint8_t *)&hspi->Instance->DR);
  3324.   hspi->pRxBuffPtr++;
  3325.   hspi->RxXferCount--;
  3326.  
  3327. #if (USE_SPI_CRC != 0U)
  3328.   /* Enable CRC Transmission */
  3329.   if ((hspi->RxXferCount == 1U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
  3330.   {
  3331.     SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  3332.   }
  3333. #endif /* USE_SPI_CRC */
  3334.  
  3335.   if (hspi->RxXferCount == 0U)
  3336.   {
  3337. #if (USE_SPI_CRC != 0U)
  3338.     if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  3339.     {
  3340.       hspi->RxISR =  SPI_RxISR_8BITCRC;
  3341.       return;
  3342.     }
  3343. #endif /* USE_SPI_CRC */
  3344.     SPI_CloseRx_ISR(hspi);
  3345.   }
  3346. }
  3347.  
  3348. #if (USE_SPI_CRC != 0U)
  3349. /**
  3350.   * @brief  Manage the CRC 16-bit receive in Interrupt context.
  3351.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  3352.   *               the configuration information for SPI module.
  3353.   * @retval None
  3354.   */
  3355. static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
  3356. {
  3357.   /* Read 16bit CRC to flush Data Register */
  3358.   READ_REG(hspi->Instance->DR);
  3359.  
  3360.   /* Disable RXNE and ERR interrupt */
  3361.   __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
  3362.  
  3363.   SPI_CloseRx_ISR(hspi);
  3364. }
  3365. #endif /* USE_SPI_CRC */
  3366.  
  3367. /**
  3368.   * @brief  Manage the 16-bit receive in Interrupt context.
  3369.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  3370.   *               the configuration information for SPI module.
  3371.   * @retval None
  3372.   */
  3373. static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
  3374. {
  3375.   *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR);
  3376.   hspi->pRxBuffPtr += sizeof(uint16_t);
  3377.   hspi->RxXferCount--;
  3378.  
  3379. #if (USE_SPI_CRC != 0U)
  3380.   /* Enable CRC Transmission */
  3381.   if ((hspi->RxXferCount == 1U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
  3382.   {
  3383.     SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  3384.   }
  3385. #endif /* USE_SPI_CRC */
  3386.  
  3387.   if (hspi->RxXferCount == 0U)
  3388.   {
  3389. #if (USE_SPI_CRC != 0U)
  3390.     if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  3391.     {
  3392.       hspi->RxISR = SPI_RxISR_16BITCRC;
  3393.       return;
  3394.     }
  3395. #endif /* USE_SPI_CRC */
  3396.     SPI_CloseRx_ISR(hspi);
  3397.   }
  3398. }
  3399.  
  3400. /**
  3401.   * @brief  Handle the data 8-bit transmit in Interrupt mode.
  3402.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  3403.   *               the configuration information for SPI module.
  3404.   * @retval None
  3405.   */
  3406. static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
  3407. {
  3408.   *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
  3409.   hspi->pTxBuffPtr++;
  3410.   hspi->TxXferCount--;
  3411.  
  3412.   if (hspi->TxXferCount == 0U)
  3413.   {
  3414. #if (USE_SPI_CRC != 0U)
  3415.     if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  3416.     {
  3417.       /* Enable CRC Transmission */
  3418.       SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  3419.     }
  3420. #endif /* USE_SPI_CRC */
  3421.     SPI_CloseTx_ISR(hspi);
  3422.   }
  3423. }
  3424.  
  3425. /**
  3426.   * @brief  Handle the data 16-bit transmit in Interrupt mode.
  3427.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  3428.   *               the configuration information for SPI module.
  3429.   * @retval None
  3430.   */
  3431. static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
  3432. {
  3433.   /* Transmit data in 16 Bit mode */
  3434.   hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
  3435.   hspi->pTxBuffPtr += sizeof(uint16_t);
  3436.   hspi->TxXferCount--;
  3437.  
  3438.   if (hspi->TxXferCount == 0U)
  3439.   {
  3440. #if (USE_SPI_CRC != 0U)
  3441.     if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  3442.     {
  3443.       /* Enable CRC Transmission */
  3444.       SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  3445.     }
  3446. #endif /* USE_SPI_CRC */
  3447.     SPI_CloseTx_ISR(hspi);
  3448.   }
  3449. }
  3450.  
  3451. /**
  3452.   * @brief  Handle SPI Communication Timeout.
  3453.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  3454.   *              the configuration information for SPI module.
  3455.   * @param  Flag SPI flag to check
  3456.   * @param  State flag state to check
  3457.   * @param  Timeout Timeout duration
  3458.   * @param  Tickstart tick start value
  3459.   * @retval HAL status
  3460.   */
  3461. static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State,
  3462.                                                        uint32_t Timeout, uint32_t Tickstart)
  3463. {
  3464.   __IO uint32_t count;
  3465.   uint32_t tmp_timeout;
  3466.   uint32_t tmp_tickstart;
  3467.  
  3468.   /* Adjust Timeout value  in case of end of transfer */
  3469.   tmp_timeout   = Timeout - (HAL_GetTick() - Tickstart);
  3470.   tmp_tickstart = HAL_GetTick();
  3471.  
  3472.   /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */
  3473.   count = tmp_timeout * ((SystemCoreClock * 32U) >> 20U);
  3474.  
  3475.   while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
  3476.   {
  3477.     if (Timeout != HAL_MAX_DELAY)
  3478.     {
  3479.       if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U))
  3480.       {
  3481.         /* Disable the SPI and reset the CRC: the CRC value should be cleared
  3482.            on both master and slave sides in order to resynchronize the master
  3483.            and slave for their respective CRC calculation */
  3484.  
  3485.         /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
  3486.         __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  3487.  
  3488.         if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
  3489.                                                      || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  3490.         {
  3491.           /* Disable SPI peripheral */
  3492.           __HAL_SPI_DISABLE(hspi);
  3493.         }
  3494.  
  3495.         /* Reset CRC Calculation */
  3496.         if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  3497.         {
  3498.           SPI_RESET_CRC(hspi);
  3499.         }
  3500.  
  3501.         hspi->State = HAL_SPI_STATE_READY;
  3502.  
  3503.         /* Process Unlocked */
  3504.         __HAL_UNLOCK(hspi);
  3505.  
  3506.         return HAL_TIMEOUT;
  3507.       }
  3508.       /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */
  3509.       if(count == 0U)
  3510.       {
  3511.         tmp_timeout = 0U;
  3512.       }
  3513.       count--;
  3514.     }
  3515.   }
  3516.  
  3517.   return HAL_OK;
  3518. }
  3519.  
  3520. /**
  3521.   * @brief  Handle the check of the RX transaction complete.
  3522.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  3523.   *               the configuration information for SPI module.
  3524.   * @param  Timeout Timeout duration
  3525.   * @param  Tickstart tick start value
  3526.   * @retval HAL status
  3527.   */
  3528. static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi,  uint32_t Timeout, uint32_t Tickstart)
  3529. {
  3530.   if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
  3531.                                                || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  3532.   {
  3533.     /* Disable SPI peripheral */
  3534.     __HAL_SPI_DISABLE(hspi);
  3535.   }
  3536.  
  3537.   /* Erratasheet: BSY bit may stay high at the end of a data transfer in Slave mode */
  3538.   if (hspi->Init.Mode == SPI_MODE_MASTER)
  3539.   {
  3540.     if (hspi->Init.Direction != SPI_DIRECTION_2LINES_RXONLY)
  3541.     {
  3542.       /* Control the BSY flag */
  3543.       if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
  3544.       {
  3545.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  3546.         return HAL_TIMEOUT;
  3547.       }
  3548.     }
  3549.     else
  3550.     {
  3551.       /* Wait the RXNE reset */
  3552.       if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout, Tickstart) != HAL_OK)
  3553.       {
  3554.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  3555.         return HAL_TIMEOUT;
  3556.       }
  3557.     }
  3558.   }
  3559.   else
  3560.   {
  3561.     /* Wait the RXNE reset */
  3562.     if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout, Tickstart) != HAL_OK)
  3563.     {
  3564.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  3565.       return HAL_TIMEOUT;
  3566.     }
  3567.   }
  3568.   return HAL_OK;
  3569. }
  3570.  
  3571. /**
  3572.   * @brief  Handle the check of the RXTX or TX transaction complete.
  3573.   * @param  hspi SPI handle
  3574.   * @param  Timeout Timeout duration
  3575.   * @param  Tickstart tick start value
  3576.   * @retval HAL status
  3577.   */
  3578. static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
  3579. {
  3580.   /* Timeout in µs */
  3581.   __IO uint32_t count = SPI_BSY_FLAG_WORKAROUND_TIMEOUT * (SystemCoreClock / 24U / 1000000U);
  3582.   /* Erratasheet: BSY bit may stay high at the end of a data transfer in Slave mode */
  3583.   if (hspi->Init.Mode == SPI_MODE_MASTER)
  3584.   {
  3585.     /* Control the BSY flag */
  3586.     if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
  3587.     {
  3588.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  3589.       return HAL_TIMEOUT;
  3590.     }
  3591.   }
  3592.   else
  3593.   {
  3594.     /* Wait BSY flag during 1 Byte time transfer in case of Full-Duplex and Tx transfer
  3595.     * If Timeout is reached, the transfer is considered as finish.
  3596.     * User have to calculate the timeout value to fit with the time of 1 byte transfer.
  3597.     * This time is directly link with the SPI clock from Master device.
  3598.     */
  3599.     do
  3600.     {
  3601.       if (count == 0U)
  3602.       {
  3603.         break;
  3604.       }
  3605.       count--;
  3606.     } while (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_BSY) != RESET);
  3607.   }
  3608.  
  3609.   return HAL_OK;
  3610. }
  3611.  
  3612. /**
  3613.   * @brief  Handle the end of the RXTX transaction.
  3614.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  3615.   *               the configuration information for SPI module.
  3616.   * @retval None
  3617.   */
  3618. static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi)
  3619. {
  3620.   uint32_t tickstart;
  3621.   __IO uint32_t count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
  3622.  
  3623.   /* Init tickstart for timeout management */
  3624.   tickstart = HAL_GetTick();
  3625.  
  3626.   /* Disable ERR interrupt */
  3627.   __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
  3628.  
  3629.   /* Wait until TXE flag is set */
  3630.   do
  3631.   {
  3632.     if (count == 0U)
  3633.     {
  3634.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  3635.       break;
  3636.     }
  3637.     count--;
  3638.   } while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);
  3639.  
  3640.   /* Check the end of the transaction */
  3641.   if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
  3642.   {
  3643.     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  3644.   }
  3645.  
  3646.   /* Clear overrun flag in 2 Lines communication mode because received is not read */
  3647.   if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
  3648.   {
  3649.     __HAL_SPI_CLEAR_OVRFLAG(hspi);
  3650.   }
  3651.  
  3652. #if (USE_SPI_CRC != 0U)
  3653.   /* Check if CRC error occurred */
  3654.   if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  3655.   {
  3656.     hspi->State = HAL_SPI_STATE_READY;
  3657.     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  3658.     __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  3659.     /* Call user error callback */
  3660. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  3661.     hspi->ErrorCallback(hspi);
  3662. #else
  3663.     HAL_SPI_ErrorCallback(hspi);
  3664. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  3665.   }
  3666.   else
  3667.   {
  3668. #endif /* USE_SPI_CRC */
  3669.     if (hspi->ErrorCode == HAL_SPI_ERROR_NONE)
  3670.     {
  3671.       if (hspi->State == HAL_SPI_STATE_BUSY_RX)
  3672.       {
  3673.         hspi->State = HAL_SPI_STATE_READY;
  3674.         /* Call user Rx complete callback */
  3675. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  3676.         hspi->RxCpltCallback(hspi);
  3677. #else
  3678.         HAL_SPI_RxCpltCallback(hspi);
  3679. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  3680.       }
  3681.       else
  3682.       {
  3683.         hspi->State = HAL_SPI_STATE_READY;
  3684.         /* Call user TxRx complete callback */
  3685. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  3686.         hspi->TxRxCpltCallback(hspi);
  3687. #else
  3688.         HAL_SPI_TxRxCpltCallback(hspi);
  3689. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  3690.       }
  3691.     }
  3692.     else
  3693.     {
  3694.       hspi->State = HAL_SPI_STATE_READY;
  3695.       /* Call user error callback */
  3696. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  3697.       hspi->ErrorCallback(hspi);
  3698. #else
  3699.       HAL_SPI_ErrorCallback(hspi);
  3700. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  3701.     }
  3702. #if (USE_SPI_CRC != 0U)
  3703.   }
  3704. #endif /* USE_SPI_CRC */
  3705. }
  3706.  
  3707. /**
  3708.   * @brief  Handle the end of the RX transaction.
  3709.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  3710.   *               the configuration information for SPI module.
  3711.   * @retval None
  3712.   */
  3713. static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi)
  3714. {
  3715.   /* Disable RXNE and ERR interrupt */
  3716.   __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
  3717.  
  3718.   /* Check the end of the transaction */
  3719.   if (SPI_EndRxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
  3720.   {
  3721.     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  3722.   }
  3723.  
  3724.   /* Clear overrun flag in 2 Lines communication mode because received is not read */
  3725.   if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
  3726.   {
  3727.     __HAL_SPI_CLEAR_OVRFLAG(hspi);
  3728.   }
  3729.   hspi->State = HAL_SPI_STATE_READY;
  3730.  
  3731. #if (USE_SPI_CRC != 0U)
  3732.   /* Check if CRC error occurred */
  3733.   if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  3734.   {
  3735.     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  3736.     __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  3737.     /* Call user error callback */
  3738. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  3739.     hspi->ErrorCallback(hspi);
  3740. #else
  3741.     HAL_SPI_ErrorCallback(hspi);
  3742. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  3743.   }
  3744.   else
  3745.   {
  3746. #endif /* USE_SPI_CRC */
  3747.     if (hspi->ErrorCode == HAL_SPI_ERROR_NONE)
  3748.     {
  3749.       /* Call user Rx complete callback */
  3750. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  3751.       hspi->RxCpltCallback(hspi);
  3752. #else
  3753.       HAL_SPI_RxCpltCallback(hspi);
  3754. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  3755.     }
  3756.     else
  3757.     {
  3758.       /* Call user error callback */
  3759. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  3760.       hspi->ErrorCallback(hspi);
  3761. #else
  3762.       HAL_SPI_ErrorCallback(hspi);
  3763. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  3764.     }
  3765. #if (USE_SPI_CRC != 0U)
  3766.   }
  3767. #endif /* USE_SPI_CRC */
  3768. }
  3769.  
  3770. /**
  3771.   * @brief  Handle the end of the TX transaction.
  3772.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  3773.   *               the configuration information for SPI module.
  3774.   * @retval None
  3775.   */
  3776. static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi)
  3777. {
  3778.   uint32_t tickstart;
  3779.   __IO uint32_t count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
  3780.  
  3781.   /* Init tickstart for timeout management*/
  3782.   tickstart = HAL_GetTick();
  3783.  
  3784.   /* Wait until TXE flag is set */
  3785.   do
  3786.   {
  3787.     if (count == 0U)
  3788.     {
  3789.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  3790.       break;
  3791.     }
  3792.     count--;
  3793.   } while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);
  3794.  
  3795.   /* Disable TXE and ERR interrupt */
  3796.   __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
  3797.  
  3798.   /* Check the end of the transaction */
  3799.   if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
  3800.   {
  3801.     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  3802.   }
  3803.  
  3804.   /* Clear overrun flag in 2 Lines communication mode because received is not read */
  3805.   if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
  3806.   {
  3807.     __HAL_SPI_CLEAR_OVRFLAG(hspi);
  3808.   }
  3809.  
  3810.   hspi->State = HAL_SPI_STATE_READY;
  3811.   if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  3812.   {
  3813.     /* Call user error callback */
  3814. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  3815.     hspi->ErrorCallback(hspi);
  3816. #else
  3817.     HAL_SPI_ErrorCallback(hspi);
  3818. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  3819.   }
  3820.   else
  3821.   {
  3822.     /* Call user Rx complete callback */
  3823. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  3824.     hspi->TxCpltCallback(hspi);
  3825. #else
  3826.     HAL_SPI_TxCpltCallback(hspi);
  3827. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  3828.   }
  3829. }
  3830.  
  3831. /**
  3832.   * @brief  Handle abort a Rx transaction.
  3833.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  3834.   *               the configuration information for SPI module.
  3835.   * @retval None
  3836.   */
  3837. static void SPI_AbortRx_ISR(SPI_HandleTypeDef *hspi)
  3838. {
  3839.   __IO uint32_t count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
  3840.  
  3841.   /* Wait until TXE flag is set */
  3842.   do
  3843.   {
  3844.     if (count == 0U)
  3845.     {
  3846.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
  3847.       break;
  3848.     }
  3849.     count--;
  3850.   } while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);
  3851.  
  3852.   /* Disable SPI Peripheral */
  3853.   __HAL_SPI_DISABLE(hspi);
  3854.  
  3855.   /* Disable TXEIE, RXNEIE and ERRIE(mode fault event, overrun error, TI frame error) interrupts */
  3856.   CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXEIE | SPI_CR2_RXNEIE | SPI_CR2_ERRIE));
  3857.  
  3858.   /* Read CRC to flush Data Register */
  3859.   READ_REG(hspi->Instance->DR);
  3860.  
  3861.   hspi->State = HAL_SPI_STATE_ABORT;
  3862. }
  3863.  
  3864. /**
  3865.   * @brief  Handle abort a Tx or Rx/Tx transaction.
  3866.   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  3867.   *               the configuration information for SPI module.
  3868.   * @retval None
  3869.   */
  3870. static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi)
  3871. {
  3872.   /* Disable TXEIE interrupt */
  3873.   CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXEIE));
  3874.  
  3875.   /* Disable SPI Peripheral */
  3876.   __HAL_SPI_DISABLE(hspi);
  3877.  
  3878.   hspi->State = HAL_SPI_STATE_ABORT;
  3879. }
  3880.  
  3881. /**
  3882.   * @}
  3883.   */
  3884.  
  3885. #endif /* HAL_SPI_MODULE_ENABLED */
  3886.  
  3887. /**
  3888.   * @}
  3889.   */
  3890.  
  3891. /**
  3892.   * @}
  3893.   */
  3894.  
  3895. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  3896.