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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32l1xx_hal_pwr.c
  4.   * @author  MCD Application Team
  5.   * @brief   PWR HAL module driver.
  6.   *
  7.   *          This file provides firmware functions to manage the following
  8.   *          functionalities of the Power Controller (PWR) peripheral:
  9.   *           + Initialization/de-initialization functions
  10.   *           + Peripheral Control functions
  11.   *
  12.   ******************************************************************************
  13.   * @attention
  14.   *
  15.   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  16.   * All rights reserved.</center></h2>
  17.   *
  18.   * This software component is licensed by ST under BSD 3-Clause license,
  19.   * the "License"; You may not use this file except in compliance with the
  20.   * License. You may obtain a copy of the License at:
  21.   *                        opensource.org/licenses/BSD-3-Clause
  22.   *
  23.   ******************************************************************************
  24.   */
  25.  
  26. /* Includes ------------------------------------------------------------------*/
  27. #include "stm32l1xx_hal.h"
  28.  
  29. /** @addtogroup STM32L1xx_HAL_Driver
  30.   * @{
  31.   */
  32.  
  33. /** @defgroup PWR PWR
  34.   * @brief    PWR HAL module driver
  35.   * @{
  36.   */
  37.  
  38. #ifdef HAL_PWR_MODULE_ENABLED
  39.  
  40. /* Private typedef -----------------------------------------------------------*/
  41. /* Private define ------------------------------------------------------------*/
  42. #define PVD_MODE_IT               (0x00010000U)
  43. #define PVD_MODE_EVT              (0x00020000U)
  44. #define PVD_RISING_EDGE           (0x00000001U)
  45. #define PVD_FALLING_EDGE          (0x00000002U)
  46.  
  47. /* Private macro -------------------------------------------------------------*/
  48. /* Private variables ---------------------------------------------------------*/
  49. /* Private function prototypes -----------------------------------------------*/
  50. /* Private functions ---------------------------------------------------------*/
  51.  
  52. /** @defgroup PWR_Exported_Functions PWR Exported Functions
  53.   * @{
  54.   */
  55.  
  56. /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
  57.   *  @brief   Initialization and de-initialization functions
  58.   *
  59. @verbatim
  60.  ===============================================================================
  61.               ##### Initialization and de-initialization functions #####
  62.  ===============================================================================
  63.     [..]
  64.       After reset, the backup domain (RTC registers, RTC backup data
  65.       registers) is protected against possible unwanted
  66.       write accesses.
  67.       To enable access to the RTC Domain and RTC registers, proceed as follows:
  68.         (+) Enable the Power Controller (PWR) APB1 interface clock using the
  69.             __HAL_RCC_PWR_CLK_ENABLE() macro.
  70.         (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
  71.  
  72. @endverbatim
  73.   * @{
  74.   */
  75.  
  76. /**
  77.   * @brief  Deinitializes the PWR peripheral registers to their default reset values.
  78.   * @note   Before calling this function, the VOS[1:0] bits should be configured
  79.   *         to "10" and the system frequency has to be configured accordingly.
  80.   *         To configure the VOS[1:0] bits, use the PWR_VoltageScalingConfig()
  81.   *         function.
  82.   * @note   ULP and FWU bits are not reset by this function.
  83.   * @retval None
  84.   */
  85. void HAL_PWR_DeInit(void)
  86. {
  87.   __HAL_RCC_PWR_FORCE_RESET();
  88.   __HAL_RCC_PWR_RELEASE_RESET();
  89. }
  90.  
  91. /**
  92.   * @brief  Enables access to the backup domain (RTC registers, RTC
  93.   *         backup data registers ).
  94.   * @note   If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
  95.   *         Backup Domain Access should be kept enabled.
  96.   * @retval None
  97.   */
  98. void HAL_PWR_EnableBkUpAccess(void)
  99. {
  100.   /* Enable access to RTC and backup registers */
  101.   *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE;
  102. }
  103.  
  104. /**
  105.   * @brief  Disables access to the backup domain (RTC registers, RTC
  106.   *         backup data registers).
  107.   * @note   If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
  108.   *         Backup Domain Access should be kept enabled.
  109.   * @retval None
  110.   */
  111. void HAL_PWR_DisableBkUpAccess(void)
  112. {
  113.   /* Disable access to RTC and backup registers */
  114.   *(__IO uint32_t *) CR_DBP_BB = (uint32_t)DISABLE;
  115. }
  116.  
  117. /**
  118.   * @}
  119.   */
  120.  
  121. /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
  122.   * @brief    Low Power modes configuration functions
  123.   *
  124. @verbatim
  125.  
  126.  ===============================================================================
  127.                  ##### Peripheral Control functions #####
  128.  ===============================================================================
  129.  
  130.     *** PVD configuration ***
  131.     =========================
  132.     [..]
  133.       (+) The PVD is used to monitor the VDD power supply by comparing it to a
  134.           threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
  135.       (+) The PVD can use an external input analog voltage (PVD_IN) which is compared
  136.       internally to VREFINT. The PVD_IN (PB7) has to be configured in Analog mode
  137.       when PWR_PVDLevel_7 is selected (PLS[2:0] = 111).
  138.  
  139.       (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
  140.           than the PVD threshold. This event is internally connected to the EXTI
  141.           line16 and can generate an interrupt if enabled. This is done through
  142.           __HAL_PWR_PVD_EXTI_ENABLE_IT() macro.
  143.       (+) The PVD is stopped in Standby mode.
  144.  
  145.     *** WakeUp pin configuration ***
  146.     ================================
  147.     [..]
  148.       (+) WakeUp pin is used to wake up the system from Standby mode. This pin is
  149.           forced in input pull-down configuration and is active on rising edges.
  150.       (+) There are two or three WakeUp pins:
  151.           WakeUp Pin 1 on PA.00.
  152.           WakeUp Pin 2 on PC.13.
  153.           WakeUp Pin 3 on PE.06. : Only on product with GPIOE available
  154.  
  155.     [..]
  156.     *** Main and Backup Regulators configuration ***
  157.     ================================================
  158.  
  159.       (+) The main internal regulator can be configured to have a tradeoff between
  160.           performance and power consumption when the device does not operate at
  161.           the maximum frequency. This is done through __HAL_PWR_VOLTAGESCALING_CONFIG()
  162.           macro which configure VOS bit in PWR_CR register:
  163.         (++) When this bit is set (Regulator voltage output Scale 1 mode selected)
  164.              the System frequency can go up to 32 MHz.
  165.         (++) When this bit is reset (Regulator voltage output Scale 2 mode selected)
  166.              the System frequency can go up to 16 MHz.
  167.         (++) When this bit is reset (Regulator voltage output Scale 3 mode selected)
  168.              the System frequency can go up to 4.2 MHz.
  169.  
  170.         Refer to the datasheets for more details.
  171.  
  172.     *** Low Power modes configuration ***
  173.     =====================================
  174.      [..]
  175.       The device features 5 low-power modes:
  176.       (+) Low power run mode: regulator in low power mode, limited clock frequency,
  177.         limited number of peripherals running.
  178.       (+) Sleep mode: Cortex-M3 core stopped, peripherals kept running.
  179.       (+) Low power sleep mode: Cortex-M3 core stopped, limited clock frequency,
  180.          limited number of peripherals running, regulator in low power mode.
  181.       (+) Stop mode: All clocks are stopped, regulator running, regulator in low power mode.
  182.       (+) Standby mode: VCORE domain powered off
  183.  
  184.    *** Low power run mode ***
  185.    =========================
  186.     [..]
  187.        To further reduce the consumption when the system is in Run mode, the regulator can be
  188.         configured in low power mode. In this mode, the system frequency should not exceed
  189.         MSI frequency range1.
  190.         In Low power run mode, all I/O pins keep the same state as in Run mode.
  191.  
  192.       (+) Entry:
  193.         (++) VCORE in range2
  194.         (++) Decrease the system frequency tonot exceed the frequency of MSI frequency range1.
  195.         (++) The regulator is forced in low power mode using the HAL_PWREx_EnableLowPowerRunMode()
  196.              function.
  197.       (+) Exit:
  198.         (++) The regulator is forced in Main regulator mode using the HAL_PWREx_DisableLowPowerRunMode()
  199.               function.
  200.         (++) Increase the system frequency if needed.
  201.  
  202.    *** Sleep mode ***
  203.    ==================
  204.     [..]
  205.       (+) Entry:
  206.           The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFx)
  207.               functions with
  208.           (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
  209.           (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
  210.  
  211.       (+) Exit:
  212.         (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
  213.               controller (NVIC) can wake up the device from Sleep mode.
  214.  
  215.    *** Low power sleep mode ***
  216.    ============================
  217.     [..]
  218.       (+) Entry:
  219.           The Low power sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFx)
  220.               functions with
  221.           (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
  222.           (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
  223.        (+) The Flash memory can be switched off by using the control bits (SLEEP_PD in the FLASH_ACR register.
  224.              This reduces power consumption but increases the wake-up time.
  225.  
  226.       (+) Exit:
  227.         (++) If the WFI instruction was used to enter Low power sleep mode, any peripheral interrupt
  228.               acknowledged by the nested vectored interrupt controller (NVIC) can wake up the device
  229.               from Low power sleep mode. If the WFE instruction was used to enter Low power sleep mode,
  230.               the MCU exits Sleep mode as soon as an event occurs.
  231.  
  232.    *** Stop mode ***
  233.    =================
  234.     [..]
  235.       The Stop mode is based on the Cortex-M3 deepsleep mode combined with peripheral
  236.       clock gating. The voltage regulator can be configured either in normal or low-power mode.
  237.       In Stop mode, all clocks in the VCORE domain are stopped, the PLL, the MSI, the HSI and
  238.       the HSE RC oscillators are disabled. Internal SRAM and register contents are preserved.
  239.       To get the lowest consumption in Stop mode, the internal Flash memory also enters low
  240.       power mode. When the Flash memory is in power-down mode, an additional startup delay is
  241.       incurred when waking up from Stop mode.
  242.       To minimize the consumption In Stop mode, VREFINT, the BOR, PVD, and temperature
  243.       sensor can be switched off before entering Stop mode. They can be switched on again by
  244.       software after exiting Stop mode using the ULP bit in the PWR_CR register.
  245.       In Stop mode, all I/O pins keep the same state as in Run mode.
  246.  
  247.       (+) Entry:
  248.            The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI )
  249.              function with:
  250.           (++) Main regulator ON.
  251.           (++) Low Power regulator ON.
  252.           (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
  253.           (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
  254.       (+) Exit:
  255.         (++) By issuing an interrupt or a wakeup event, the MSI RC oscillator is selected as system clock.
  256.  
  257.    *** Standby mode ***
  258.    ====================
  259.      [..]
  260.       The Standby mode allows to achieve the lowest power consumption. It is based on the
  261.       Cortex-M3 deepsleep mode, with the voltage regulator disabled. The VCORE domain is
  262.       consequently powered off. The PLL, the MSI, the HSI oscillator and the HSE oscillator are
  263.       also switched off. SRAM and register contents are lost except for the RTC registers, RTC
  264.       backup registers and Standby circuitry.
  265.  
  266.       To minimize the consumption In Standby mode, VREFINT, the BOR, PVD, and temperature
  267.        sensor can be switched off before entering the Standby mode. They can be switched
  268.        on again by software after exiting the Standby mode.
  269.        function.
  270.  
  271.       (+) Entry:
  272.         (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
  273.       (+) Exit:
  274.         (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
  275.              tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
  276.  
  277.    *** Auto-wakeup (AWU) from low-power mode ***
  278.    =============================================
  279.     [..]
  280.       The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
  281.       Wakeup event, a tamper event, a time-stamp event, or a comparator event,
  282.       without depending on an external interrupt (Auto-wakeup mode).
  283.  
  284.     (+) RTC auto-wakeup (AWU) from the Stop mode
  285.         (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to:
  286.              (+++) Configure the EXTI Line 17 to be sensitive to rising edges (Interrupt
  287.                    or Event modes) and Enable the RTC Alarm Interrupt using the HAL_RTC_SetAlarm_IT()
  288.                    function
  289.              (+++) Configure the RTC to generate the RTC alarm using the HAL_RTC_Init()
  290.                    and HAL_RTC_SetTime() functions.
  291.         (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
  292.              is necessary to:
  293.              (+++) Configure the EXTI Line 19 to be sensitive to rising edges (Interrupt or Event modes) and
  294.                    Enable the RTC Tamper or time stamp Interrupt using the HAL_RTCEx_SetTamper_IT()
  295.                    or HAL_RTCEx_SetTimeStamp_IT() functions.
  296.         (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to:
  297.              (+++) Configure the EXTI Line 20 to be sensitive to rising edges (Interrupt or Event modes) and
  298.                    Enable the RTC WakeUp Interrupt using the HAL_RTCEx_SetWakeUpTimer_IT() function.
  299.              (+++) Configure the RTC to generate the RTC WakeUp event using the HAL_RTCEx_SetWakeUpTimer()
  300.                    function.
  301.  
  302.     (+) RTC auto-wakeup (AWU) from the Standby mode
  303.         (++) To wake up from the Standby mode with an RTC alarm event, it is necessary to:
  304.              (+++) Enable the RTC Alarm Interrupt using the HAL_RTC_SetAlarm_IT() function.
  305.              (+++) Configure the RTC to generate the RTC alarm using the HAL_RTC_Init()
  306.                    and HAL_RTC_SetTime() functions.
  307.         (++) To wake up from the Standby mode with an RTC Tamper or time stamp event, it
  308.              is necessary to:
  309.              (+++) Enable the RTC Tamper or time stamp Interrupt and Configure the RTC to
  310.                    detect the tamper or time stamp event using the HAL_RTCEx_SetTimeStamp_IT()
  311.                    or HAL_RTCEx_SetTamper_IT()functions.
  312.         (++) To wake up from the Standby mode with an RTC WakeUp event, it is necessary to:
  313.              (+++) Enable the RTC WakeUp Interrupt and Configure the RTC to generate the RTC WakeUp event
  314.                    using the HAL_RTCEx_SetWakeUpTimer_IT() and HAL_RTCEx_SetWakeUpTimer() functions.
  315.  
  316.     (+) Comparator auto-wakeup (AWU) from the Stop mode
  317.         (++) To wake up from the Stop mode with an comparator 1 or comparator 2 wakeup
  318.              event, it is necessary to:
  319.              (+++) Configure the EXTI Line 21 or EXTI Line 22 for comparator to be sensitive to to the
  320.                    selected edges (falling, rising or falling and rising) (Interrupt or Event modes) using
  321.                    the COMP functions.
  322.              (+++) Configure the comparator to generate the event.
  323.  
  324.  
  325.  
  326. @endverbatim
  327.   * @{
  328.   */
  329.  
  330. /**
  331.   * @brief  Configures the voltage threshold detected by the Power Voltage Detector(PVD).
  332.   * @param  sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration
  333.   *         information for the PVD.
  334.   * @note   Refer to the electrical characteristics of your device datasheet for
  335.   *         more details about the voltage threshold corresponding to each
  336.   *         detection level.
  337.   * @retval None
  338.   */
  339. void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
  340. {
  341.   /* Check the parameters */
  342.   assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
  343.   assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
  344.  
  345.   /* Set PLS[7:5] bits according to PVDLevel value */
  346.   MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
  347.  
  348.   /* Clear any previous config. Keep it clear if no event or IT mode is selected */
  349.   __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
  350.   __HAL_PWR_PVD_EXTI_DISABLE_IT();
  351.   __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE();
  352.  
  353.   /* Configure interrupt mode */
  354.   if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
  355.   {
  356.     __HAL_PWR_PVD_EXTI_ENABLE_IT();
  357.   }
  358.  
  359.   /* Configure event mode */
  360.   if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
  361.   {
  362.     __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
  363.   }
  364.  
  365.   /* Configure the edge */
  366.   if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
  367.   {
  368.     __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
  369.   }
  370.  
  371.   if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
  372.   {
  373.     __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
  374.   }
  375. }
  376.  
  377. /**
  378.   * @brief  Enables the Power Voltage Detector(PVD).
  379.   * @retval None
  380.   */
  381. void HAL_PWR_EnablePVD(void)
  382. {
  383.   /* Enable the power voltage detector */
  384.   *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)ENABLE;
  385. }
  386.  
  387. /**
  388.   * @brief  Disables the Power Voltage Detector(PVD).
  389.   * @retval None
  390.   */
  391. void HAL_PWR_DisablePVD(void)
  392. {
  393.   /* Disable the power voltage detector */
  394.   *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)DISABLE;
  395. }
  396.  
  397. /**
  398.   * @brief Enables the WakeUp PINx functionality.
  399.   * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable.
  400.   *        This parameter can be one of the following values:
  401.   *           @arg PWR_WAKEUP_PIN1
  402.   *           @arg PWR_WAKEUP_PIN2
  403.   *           @arg PWR_WAKEUP_PIN3: Only on product with GPIOE available
  404.   * @retval None
  405.   */
  406. void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
  407. {
  408.   /* Check the parameter */
  409.   assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
  410.   /* Enable the EWUPx pin */
  411.   *(__IO uint32_t *) CSR_EWUP_BB(WakeUpPinx) = (uint32_t)ENABLE;
  412. }
  413.  
  414. /**
  415.   * @brief Disables the WakeUp PINx functionality.
  416.   * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
  417.   *        This parameter can be one of the following values:
  418.   *           @arg PWR_WAKEUP_PIN1
  419.   *           @arg PWR_WAKEUP_PIN2
  420.   *           @arg PWR_WAKEUP_PIN3: Only on product with GPIOE available
  421.   * @retval None
  422.   */
  423. void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
  424. {
  425.   /* Check the parameter */
  426.   assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
  427.   /* Disable the EWUPx pin */
  428.   *(__IO uint32_t *) CSR_EWUP_BB(WakeUpPinx) = (uint32_t)DISABLE;
  429. }
  430.  
  431. /**
  432.   * @brief Enters Sleep mode.
  433.   * @note  In Sleep mode, all I/O pins keep the same state as in Run mode.
  434.   * @param Regulator: Specifies the regulator state in SLEEP mode.
  435.   *         This parameter can be one of the following values:
  436.   *            @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
  437.   *            @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
  438.   * @param SLEEPEntry: Specifies if SLEEP mode is entered with WFI or WFE instruction.
  439.   *           When WFI entry is used, tick interrupt have to be disabled if not desired as
  440.   *           the interrupt wake up source.
  441.   *           This parameter can be one of the following values:
  442.   *            @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
  443.   *            @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
  444.   * @retval None
  445.   */
  446. void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
  447. {
  448.   /* Check the parameters */
  449.   assert_param(IS_PWR_REGULATOR(Regulator));
  450.   assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
  451.  
  452.   /* Select the regulator state in Sleep mode: Set PDDS and LPSDSR bit according to PWR_Regulator value */
  453.   MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPSDSR), Regulator);
  454.  
  455.   /* Clear SLEEPDEEP bit of Cortex System Control Register */
  456.   CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
  457.  
  458.   /* Select SLEEP mode entry -------------------------------------------------*/
  459.   if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
  460.   {
  461.     /* Request Wait For Interrupt */
  462.     __WFI();
  463.   }
  464.   else
  465.   {
  466.     /* Request Wait For Event */
  467.     __SEV();
  468.     __WFE();
  469.     __WFE();
  470.   }
  471. }
  472.  
  473. /**
  474.   * @brief Enters Stop mode.
  475.   * @note  In Stop mode, all I/O pins keep the same state as in Run mode.
  476.   * @note  When exiting Stop mode by using an interrupt or a wakeup event,
  477.   *        MSI RC oscillator is selected as system clock.
  478.   * @note  When the voltage regulator operates in low power mode, an additional
  479.   *         startup delay is incurred when waking up from Stop mode.
  480.   *         By keeping the internal regulator ON during Stop mode, the consumption
  481.   *         is higher although the startup time is reduced.
  482.   * @param Regulator: Specifies the regulator state in Stop mode.
  483.   *          This parameter can be one of the following values:
  484.   *            @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON
  485.   *            @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON
  486.   * @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction.
  487.   *          This parameter can be one of the following values:
  488.   *            @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction
  489.   *            @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction
  490.   * @retval None
  491.   */
  492. void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
  493. {
  494.   /* Check the parameters */
  495.   assert_param(IS_PWR_REGULATOR(Regulator));
  496.   assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
  497.  
  498.   /* Select the regulator state in Stop mode: Set PDDS and LPSDSR bit according to PWR_Regulator value */
  499.   MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPSDSR), Regulator);
  500.  
  501.   /* Set SLEEPDEEP bit of Cortex System Control Register */
  502.   SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
  503.  
  504.   /* Select Stop mode entry --------------------------------------------------*/
  505.   if(STOPEntry == PWR_STOPENTRY_WFI)
  506.   {
  507.     /* Request Wait For Interrupt */
  508.     __WFI();
  509.   }
  510.   else
  511.   {
  512.     /* Request Wait For Event */
  513.     __SEV();
  514.     __WFE();
  515.     __WFE();
  516.   }
  517.   /* Reset SLEEPDEEP bit of Cortex System Control Register */
  518.   CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
  519. }
  520.  
  521. /**
  522.   * @brief Enters Standby mode.
  523.   * @note  In Standby mode, all I/O pins are high impedance except for:
  524.   *          - Reset pad (still available)
  525.   *          - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC
  526.   *            Alarm out, or RTC clock calibration out.
  527.   *          - WKUP pin 1 (PA0) if enabled.
  528.   *          - WKUP pin 2 (PC13) if enabled.
  529.   *          - WKUP pin 3 (PE6) if enabled.
  530.   * @retval None
  531.   */
  532. void HAL_PWR_EnterSTANDBYMode(void)
  533. {
  534.   /* Select Standby mode */
  535.   SET_BIT(PWR->CR, PWR_CR_PDDS);
  536.  
  537.   /* Set SLEEPDEEP bit of Cortex System Control Register */
  538.   SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
  539.  
  540.   /* This option is used to ensure that store operations are completed */
  541. #if defined ( __CC_ARM)
  542.   __force_stores();
  543. #endif
  544.   /* Request Wait For Interrupt */
  545.   __WFI();
  546. }
  547.  
  548.  
  549. /**
  550.   * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode.
  551.   * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
  552.   *       re-enters SLEEP mode when an interruption handling is over.
  553.   *       Setting this bit is useful when the processor is expected to run only on
  554.   *       interruptions handling.
  555.   * @retval None
  556.   */
  557. void HAL_PWR_EnableSleepOnExit(void)
  558. {
  559.   /* Set SLEEPONEXIT bit of Cortex System Control Register */
  560.   SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
  561. }
  562.  
  563.  
  564. /**
  565.   * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode.
  566.   * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor
  567.   *       re-enters SLEEP mode when an interruption handling is over.
  568.   * @retval None
  569.   */
  570. void HAL_PWR_DisableSleepOnExit(void)
  571. {
  572.   /* Clear SLEEPONEXIT bit of Cortex System Control Register */
  573.   CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
  574. }
  575.  
  576.  
  577. /**
  578.   * @brief Enables CORTEX M3 SEVONPEND bit.
  579.   * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes
  580.   *       WFE to wake up when an interrupt moves from inactive to pended.
  581.   * @retval None
  582.   */
  583. void HAL_PWR_EnableSEVOnPend(void)
  584. {
  585.   /* Set SEVONPEND bit of Cortex System Control Register */
  586.   SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
  587. }
  588.  
  589.  
  590. /**
  591.   * @brief Disables CORTEX M3 SEVONPEND bit.
  592.   * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes
  593.   *       WFE to wake up when an interrupt moves from inactive to pended.
  594.   * @retval None
  595.   */
  596. void HAL_PWR_DisableSEVOnPend(void)
  597. {
  598.   /* Clear SEVONPEND bit of Cortex System Control Register */
  599.   CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
  600. }
  601.  
  602.  
  603.  
  604. /**
  605.   * @brief  This function handles the PWR PVD interrupt request.
  606.   * @note   This API should be called under the PVD_IRQHandler().
  607.   * @retval None
  608.   */
  609. void HAL_PWR_PVD_IRQHandler(void)
  610. {
  611.   /* Check PWR exti flag */
  612.   if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
  613.   {
  614.     /* PWR PVD interrupt user callback */
  615.     HAL_PWR_PVDCallback();
  616.  
  617.     /* Clear PWR Exti pending bit */
  618.     __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
  619.   }
  620. }
  621.  
  622. /**
  623.   * @brief  PWR PVD interrupt callback
  624.   * @retval None
  625.   */
  626. __weak void HAL_PWR_PVDCallback(void)
  627. {
  628.   /* NOTE : This function Should not be modified, when the callback is needed,
  629.             the HAL_PWR_PVDCallback could be implemented in the user file
  630.    */
  631. }
  632.  
  633. /**
  634.   * @}
  635.   */
  636.  
  637. /**
  638.   * @}
  639.   */
  640.  
  641. #endif /* HAL_PWR_MODULE_ENABLED */
  642. /**
  643.   * @}
  644.   */
  645.  
  646. /**
  647.   * @}
  648.   */
  649.  
  650. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  651.