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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32f1xx_hal_tim_ex.c
  4.   * @author  MCD Application Team
  5.   * @brief   TIM HAL module driver.
  6.   *          This file provides firmware functions to manage the following
  7.   *          functionalities of the Timer Extended peripheral:
  8.   *           + Time Hall Sensor Interface Initialization
  9.   *           + Time Hall Sensor Interface Start
  10.   *           + Time Complementary signal break and dead time configuration
  11.   *           + Time Master and Slave synchronization configuration
  12.   *           + Timer remapping capabilities configuration
  13.   @verbatim
  14.   ==============================================================================
  15.                       ##### TIMER Extended features #####
  16.   ==============================================================================
  17.   [..]
  18.     The Timer Extended features include:
  19.     (#) Complementary outputs with programmable dead-time for :
  20.         (++) Output Compare
  21.         (++) PWM generation (Edge and Center-aligned Mode)
  22.         (++) One-pulse mode output
  23.     (#) Synchronization circuit to control the timer with external signals and to
  24.         interconnect several timers together.
  25.     (#) Break input to put the timer output signals in reset state or in a known state.
  26.     (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
  27.         positioning purposes
  28.  
  29.             ##### How to use this driver #####
  30.   ==============================================================================
  31.     [..]
  32.      (#) Initialize the TIM low level resources by implementing the following functions
  33.          depending on the selected feature:
  34.            (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
  35.  
  36.      (#) Initialize the TIM low level resources :
  37.         (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
  38.         (##) TIM pins configuration
  39.             (+++) Enable the clock for the TIM GPIOs using the following function:
  40.               __HAL_RCC_GPIOx_CLK_ENABLE();
  41.             (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
  42.  
  43.      (#) The external Clock can be configured, if needed (the default clock is the
  44.          internal clock from the APBx), using the following function:
  45.          HAL_TIM_ConfigClockSource, the clock configuration should be done before
  46.          any start function.
  47.  
  48.      (#) Configure the TIM in the desired functioning mode using one of the
  49.          initialization function of this driver:
  50.           (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the
  51.                Timer Hall Sensor Interface and the commutation event with the corresponding
  52.                Interrupt and DMA request if needed (Note that One Timer is used to interface
  53.                with the Hall sensor Interface and another Timer should be used to use
  54.                the commutation event).
  55.  
  56.      (#) Activate the TIM peripheral using one of the start functions:
  57.            (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OCN_Start_IT()
  58.            (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT()
  59.            (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
  60.            (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT().
  61.  
  62.   @endverbatim
  63.   ******************************************************************************
  64.   * @attention
  65.   *
  66.   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  67.   * All rights reserved.</center></h2>
  68.   *
  69.   * This software component is licensed by ST under BSD 3-Clause license,
  70.   * the "License"; You may not use this file except in compliance with the
  71.   * License. You may obtain a copy of the License at:
  72.   *                        opensource.org/licenses/BSD-3-Clause
  73.   *
  74.   ******************************************************************************
  75.   */
  76.  
  77. /* Includes ------------------------------------------------------------------*/
  78. #include "stm32f1xx_hal.h"
  79.  
  80. /** @addtogroup STM32F1xx_HAL_Driver
  81.   * @{
  82.   */
  83.  
  84. /** @defgroup TIMEx TIMEx
  85.   * @brief TIM Extended HAL module driver
  86.   * @{
  87.   */
  88.  
  89. #ifdef HAL_TIM_MODULE_ENABLED
  90.  
  91. /* Private typedef -----------------------------------------------------------*/
  92. /* Private define ------------------------------------------------------------*/
  93. /* Private macros ------------------------------------------------------------*/
  94. /* Private variables ---------------------------------------------------------*/
  95. /* Private function prototypes -----------------------------------------------*/
  96. static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma);
  97. static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma);
  98. static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState);
  99.  
  100. /* Exported functions --------------------------------------------------------*/
  101. /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
  102.   * @{
  103.   */
  104.  
  105. /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
  106.   * @brief    Timer Hall Sensor functions
  107.   *
  108. @verbatim
  109.   ==============================================================================
  110.                       ##### Timer Hall Sensor functions #####
  111.   ==============================================================================
  112.   [..]
  113.     This section provides functions allowing to:
  114.     (+) Initialize and configure TIM HAL Sensor.
  115.     (+) De-initialize TIM HAL Sensor.
  116.     (+) Start the Hall Sensor Interface.
  117.     (+) Stop the Hall Sensor Interface.
  118.     (+) Start the Hall Sensor Interface and enable interrupts.
  119.     (+) Stop the Hall Sensor Interface and disable interrupts.
  120.     (+) Start the Hall Sensor Interface and enable DMA transfers.
  121.     (+) Stop the Hall Sensor Interface and disable DMA transfers.
  122.  
  123. @endverbatim
  124.   * @{
  125.   */
  126. /**
  127.   * @brief  Initializes the TIM Hall Sensor Interface and initialize the associated handle.
  128.   * @note   When the timer instance is initialized in Hall Sensor Interface mode,
  129.   *         timer channels 1 and channel 2 are reserved and cannot be used for
  130.   *         other purpose.
  131.   * @param  htim TIM Hall Sensor Interface handle
  132.   * @param  sConfig TIM Hall Sensor configuration structure
  133.   * @retval HAL status
  134.   */
  135. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig)
  136. {
  137.   TIM_OC_InitTypeDef OC_Config;
  138.  
  139.   /* Check the TIM handle allocation */
  140.   if (htim == NULL)
  141.   {
  142.     return HAL_ERROR;
  143.   }
  144.  
  145.   /* Check the parameters */
  146.   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  147.   assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
  148.   assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
  149.   assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
  150.   assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
  151.   assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
  152.   assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
  153.  
  154.   if (htim->State == HAL_TIM_STATE_RESET)
  155.   {
  156.     /* Allocate lock resource and initialize it */
  157.     htim->Lock = HAL_UNLOCKED;
  158.  
  159. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  160.     /* Reset interrupt callbacks to legacy week callbacks */
  161.     TIM_ResetCallback(htim);
  162.  
  163.     if (htim->HallSensor_MspInitCallback == NULL)
  164.     {
  165.       htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
  166.     }
  167.     /* Init the low level hardware : GPIO, CLOCK, NVIC */
  168.     htim->HallSensor_MspInitCallback(htim);
  169. #else
  170.     /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
  171.     HAL_TIMEx_HallSensor_MspInit(htim);
  172. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  173.   }
  174.  
  175.   /* Set the TIM state */
  176.   htim->State = HAL_TIM_STATE_BUSY;
  177.  
  178.   /* Configure the Time base in the Encoder Mode */
  179.   TIM_Base_SetConfig(htim->Instance, &htim->Init);
  180.  
  181.   /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the  Hall sensor */
  182.   TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
  183.  
  184.   /* Reset the IC1PSC Bits */
  185.   htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
  186.   /* Set the IC1PSC value */
  187.   htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
  188.  
  189.   /* Enable the Hall sensor interface (XOR function of the three inputs) */
  190.   htim->Instance->CR2 |= TIM_CR2_TI1S;
  191.  
  192.   /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
  193.   htim->Instance->SMCR &= ~TIM_SMCR_TS;
  194.   htim->Instance->SMCR |= TIM_TS_TI1F_ED;
  195.  
  196.   /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
  197.   htim->Instance->SMCR &= ~TIM_SMCR_SMS;
  198.   htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
  199.  
  200.   /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
  201.   OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
  202.   OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
  203.   OC_Config.OCMode = TIM_OCMODE_PWM2;
  204.   OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
  205.   OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
  206.   OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
  207.   OC_Config.Pulse = sConfig->Commutation_Delay;
  208.  
  209.   TIM_OC2_SetConfig(htim->Instance, &OC_Config);
  210.  
  211.   /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
  212.     register to 101 */
  213.   htim->Instance->CR2 &= ~TIM_CR2_MMS;
  214.   htim->Instance->CR2 |= TIM_TRGO_OC2REF;
  215.  
  216.   /* Initialize the DMA burst operation state */
  217.   htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
  218.  
  219.   /* Initialize the TIM channels state */
  220.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  221.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  222.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  223.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  224.  
  225.   /* Initialize the TIM state*/
  226.   htim->State = HAL_TIM_STATE_READY;
  227.  
  228.   return HAL_OK;
  229. }
  230.  
  231. /**
  232.   * @brief  DeInitializes the TIM Hall Sensor interface
  233.   * @param  htim TIM Hall Sensor Interface handle
  234.   * @retval HAL status
  235.   */
  236. HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
  237. {
  238.   /* Check the parameters */
  239.   assert_param(IS_TIM_INSTANCE(htim->Instance));
  240.  
  241.   htim->State = HAL_TIM_STATE_BUSY;
  242.  
  243.   /* Disable the TIM Peripheral Clock */
  244.   __HAL_TIM_DISABLE(htim);
  245.  
  246. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  247.   if (htim->HallSensor_MspDeInitCallback == NULL)
  248.   {
  249.     htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
  250.   }
  251.   /* DeInit the low level hardware */
  252.   htim->HallSensor_MspDeInitCallback(htim);
  253. #else
  254.   /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  255.   HAL_TIMEx_HallSensor_MspDeInit(htim);
  256. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  257.  
  258.   /* Change the DMA burst operation state */
  259.   htim->DMABurstState = HAL_DMA_BURST_STATE_RESET;
  260.  
  261.   /* Change the TIM channels state */
  262.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
  263.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
  264.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
  265.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
  266.  
  267.   /* Change TIM state */
  268.   htim->State = HAL_TIM_STATE_RESET;
  269.  
  270.   /* Release Lock */
  271.   __HAL_UNLOCK(htim);
  272.  
  273.   return HAL_OK;
  274. }
  275.  
  276. /**
  277.   * @brief  Initializes the TIM Hall Sensor MSP.
  278.   * @param  htim TIM Hall Sensor Interface handle
  279.   * @retval None
  280.   */
  281. __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
  282. {
  283.   /* Prevent unused argument(s) compilation warning */
  284.   UNUSED(htim);
  285.  
  286.   /* NOTE : This function should not be modified, when the callback is needed,
  287.             the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
  288.    */
  289. }
  290.  
  291. /**
  292.   * @brief  DeInitializes TIM Hall Sensor MSP.
  293.   * @param  htim TIM Hall Sensor Interface handle
  294.   * @retval None
  295.   */
  296. __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
  297. {
  298.   /* Prevent unused argument(s) compilation warning */
  299.   UNUSED(htim);
  300.  
  301.   /* NOTE : This function should not be modified, when the callback is needed,
  302.             the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
  303.    */
  304. }
  305.  
  306. /**
  307.   * @brief  Starts the TIM Hall Sensor Interface.
  308.   * @param  htim TIM Hall Sensor Interface handle
  309.   * @retval HAL status
  310.   */
  311. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
  312. {
  313.   uint32_t tmpsmcr;
  314.   HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  315.   HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
  316.   HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  317.   HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
  318.  
  319.   /* Check the parameters */
  320.   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  321.  
  322.   /* Check the TIM channels state */
  323.   if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  324.       || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
  325.       || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  326.       || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
  327.   {
  328.     return HAL_ERROR;
  329.   }
  330.  
  331.   /* Set the TIM channels state */
  332.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  333.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  334.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  335.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  336.  
  337.   /* Enable the Input Capture channel 1
  338.   (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  339.   TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  340.  
  341.   /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  342.   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  343.   {
  344.     tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  345.     if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  346.     {
  347.       __HAL_TIM_ENABLE(htim);
  348.     }
  349.   }
  350.   else
  351.   {
  352.     __HAL_TIM_ENABLE(htim);
  353.   }
  354.  
  355.   /* Return function status */
  356.   return HAL_OK;
  357. }
  358.  
  359. /**
  360.   * @brief  Stops the TIM Hall sensor Interface.
  361.   * @param  htim TIM Hall Sensor Interface handle
  362.   * @retval HAL status
  363.   */
  364. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
  365. {
  366.   /* Check the parameters */
  367.   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  368.  
  369.   /* Disable the Input Capture channels 1, 2 and 3
  370.     (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  371.   TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  372.  
  373.   /* Disable the Peripheral */
  374.   __HAL_TIM_DISABLE(htim);
  375.  
  376.   /* Set the TIM channels state */
  377.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  378.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  379.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  380.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  381.  
  382.   /* Return function status */
  383.   return HAL_OK;
  384. }
  385.  
  386. /**
  387.   * @brief  Starts the TIM Hall Sensor Interface in interrupt mode.
  388.   * @param  htim TIM Hall Sensor Interface handle
  389.   * @retval HAL status
  390.   */
  391. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
  392. {
  393.   uint32_t tmpsmcr;
  394.   HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  395.   HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
  396.   HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  397.   HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
  398.  
  399.   /* Check the parameters */
  400.   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  401.  
  402.   /* Check the TIM channels state */
  403.   if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  404.       || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
  405.       || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  406.       || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
  407.   {
  408.     return HAL_ERROR;
  409.   }
  410.  
  411.   /* Set the TIM channels state */
  412.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  413.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  414.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  415.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  416.  
  417.   /* Enable the capture compare Interrupts 1 event */
  418.   __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  419.  
  420.   /* Enable the Input Capture channel 1
  421.     (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  422.   TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  423.  
  424.   /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  425.   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  426.   {
  427.     tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  428.     if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  429.     {
  430.       __HAL_TIM_ENABLE(htim);
  431.     }
  432.   }
  433.   else
  434.   {
  435.     __HAL_TIM_ENABLE(htim);
  436.   }
  437.  
  438.   /* Return function status */
  439.   return HAL_OK;
  440. }
  441.  
  442. /**
  443.   * @brief  Stops the TIM Hall Sensor Interface in interrupt mode.
  444.   * @param  htim TIM Hall Sensor Interface handle
  445.   * @retval HAL status
  446.   */
  447. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
  448. {
  449.   /* Check the parameters */
  450.   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  451.  
  452.   /* Disable the Input Capture channel 1
  453.     (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  454.   TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  455.  
  456.   /* Disable the capture compare Interrupts event */
  457.   __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  458.  
  459.   /* Disable the Peripheral */
  460.   __HAL_TIM_DISABLE(htim);
  461.  
  462.   /* Set the TIM channels state */
  463.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  464.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  465.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  466.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  467.  
  468.   /* Return function status */
  469.   return HAL_OK;
  470. }
  471.  
  472. /**
  473.   * @brief  Starts the TIM Hall Sensor Interface in DMA mode.
  474.   * @param  htim TIM Hall Sensor Interface handle
  475.   * @param  pData The destination Buffer address.
  476.   * @param  Length The length of data to be transferred from TIM peripheral to memory.
  477.   * @retval HAL status
  478.   */
  479. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
  480. {
  481.   uint32_t tmpsmcr;
  482.   HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  483.   HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  484.  
  485.   /* Check the parameters */
  486.   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  487.  
  488.   /* Set the TIM channel state */
  489.   if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)
  490.       || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY))
  491.   {
  492.     return HAL_BUSY;
  493.   }
  494.   else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
  495.            && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
  496.   {
  497.     if ((pData == NULL) && (Length > 0U))
  498.     {
  499.       return HAL_ERROR;
  500.     }
  501.     else
  502.     {
  503.       TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  504.       TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  505.     }
  506.   }
  507.   else
  508.   {
  509.     return HAL_ERROR;
  510.   }
  511.  
  512.   /* Enable the Input Capture channel 1
  513.     (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  514.   TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  515.  
  516.   /* Set the DMA Input Capture 1 Callbacks */
  517.   htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
  518.   htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
  519.   /* Set the DMA error callback */
  520.   htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
  521.  
  522.   /* Enable the DMA channel for Capture 1*/
  523.   if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK)
  524.   {
  525.     /* Return error status */
  526.     return HAL_ERROR;
  527.   }
  528.   /* Enable the capture compare 1 Interrupt */
  529.   __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  530.  
  531.   /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  532.   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  533.   {
  534.     tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  535.     if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  536.     {
  537.       __HAL_TIM_ENABLE(htim);
  538.     }
  539.   }
  540.   else
  541.   {
  542.     __HAL_TIM_ENABLE(htim);
  543.   }
  544.  
  545.   /* Return function status */
  546.   return HAL_OK;
  547. }
  548.  
  549. /**
  550.   * @brief  Stops the TIM Hall Sensor Interface in DMA mode.
  551.   * @param  htim TIM Hall Sensor Interface handle
  552.   * @retval HAL status
  553.   */
  554. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
  555. {
  556.   /* Check the parameters */
  557.   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  558.  
  559.   /* Disable the Input Capture channel 1
  560.     (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  561.   TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  562.  
  563.  
  564.   /* Disable the capture compare Interrupts 1 event */
  565.   __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  566.  
  567.   (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
  568.  
  569.   /* Disable the Peripheral */
  570.   __HAL_TIM_DISABLE(htim);
  571.  
  572.   /* Set the TIM channel state */
  573.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  574.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  575.  
  576.   /* Return function status */
  577.   return HAL_OK;
  578. }
  579.  
  580. /**
  581.   * @}
  582.   */
  583.  
  584. /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
  585.   *  @brief   Timer Complementary Output Compare functions
  586.   *
  587. @verbatim
  588.   ==============================================================================
  589.               ##### Timer Complementary Output Compare functions #####
  590.   ==============================================================================
  591.   [..]
  592.     This section provides functions allowing to:
  593.     (+) Start the Complementary Output Compare/PWM.
  594.     (+) Stop the Complementary Output Compare/PWM.
  595.     (+) Start the Complementary Output Compare/PWM and enable interrupts.
  596.     (+) Stop the Complementary Output Compare/PWM and disable interrupts.
  597.     (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
  598.     (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
  599.  
  600. @endverbatim
  601.   * @{
  602.   */
  603.  
  604. /**
  605.   * @brief  Starts the TIM Output Compare signal generation on the complementary
  606.   *         output.
  607.   * @param  htim TIM Output Compare handle
  608.   * @param  Channel TIM Channel to be enabled
  609.   *          This parameter can be one of the following values:
  610.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  611.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  612.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  613.   * @retval HAL status
  614.   */
  615. HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
  616. {
  617.   uint32_t tmpsmcr;
  618.  
  619.   /* Check the parameters */
  620.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  621.  
  622.   /* Check the TIM complementary channel state */
  623.   if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  624.   {
  625.     return HAL_ERROR;
  626.   }
  627.  
  628.   /* Set the TIM complementary channel state */
  629.   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  630.  
  631.   /* Enable the Capture compare channel N */
  632.   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  633.  
  634.   /* Enable the Main Output */
  635.   __HAL_TIM_MOE_ENABLE(htim);
  636.  
  637.   /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  638.   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  639.   {
  640.     tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  641.     if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  642.     {
  643.       __HAL_TIM_ENABLE(htim);
  644.     }
  645.   }
  646.   else
  647.   {
  648.     __HAL_TIM_ENABLE(htim);
  649.   }
  650.  
  651.   /* Return function status */
  652.   return HAL_OK;
  653. }
  654.  
  655. /**
  656.   * @brief  Stops the TIM Output Compare signal generation on the complementary
  657.   *         output.
  658.   * @param  htim TIM handle
  659.   * @param  Channel TIM Channel to be disabled
  660.   *          This parameter can be one of the following values:
  661.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  662.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  663.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  664.   * @retval HAL status
  665.   */
  666. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
  667. {
  668.   /* Check the parameters */
  669.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  670.  
  671.   /* Disable the Capture compare channel N */
  672.   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  673.  
  674.   /* Disable the Main Output */
  675.   __HAL_TIM_MOE_DISABLE(htim);
  676.  
  677.   /* Disable the Peripheral */
  678.   __HAL_TIM_DISABLE(htim);
  679.  
  680.   /* Set the TIM complementary channel state */
  681.   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  682.  
  683.   /* Return function status */
  684.   return HAL_OK;
  685. }
  686.  
  687. /**
  688.   * @brief  Starts the TIM Output Compare signal generation in interrupt mode
  689.   *         on the complementary output.
  690.   * @param  htim TIM OC handle
  691.   * @param  Channel TIM Channel to be enabled
  692.   *          This parameter can be one of the following values:
  693.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  694.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  695.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  696.   * @retval HAL status
  697.   */
  698. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  699. {
  700.   uint32_t tmpsmcr;
  701.  
  702.   /* Check the parameters */
  703.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  704.  
  705.   /* Check the TIM complementary channel state */
  706.   if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  707.   {
  708.     return HAL_ERROR;
  709.   }
  710.  
  711.   /* Set the TIM complementary channel state */
  712.   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  713.  
  714.   switch (Channel)
  715.   {
  716.     case TIM_CHANNEL_1:
  717.     {
  718.       /* Enable the TIM Output Compare interrupt */
  719.       __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  720.       break;
  721.     }
  722.  
  723.     case TIM_CHANNEL_2:
  724.     {
  725.       /* Enable the TIM Output Compare interrupt */
  726.       __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  727.       break;
  728.     }
  729.  
  730.     case TIM_CHANNEL_3:
  731.     {
  732.       /* Enable the TIM Output Compare interrupt */
  733.       __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
  734.       break;
  735.     }
  736.  
  737.  
  738.     default:
  739.       break;
  740.   }
  741.  
  742.   /* Enable the TIM Break interrupt */
  743.   __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
  744.  
  745.   /* Enable the Capture compare channel N */
  746.   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  747.  
  748.   /* Enable the Main Output */
  749.   __HAL_TIM_MOE_ENABLE(htim);
  750.  
  751.   /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  752.   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  753.   {
  754.     tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  755.     if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  756.     {
  757.       __HAL_TIM_ENABLE(htim);
  758.     }
  759.   }
  760.   else
  761.   {
  762.     __HAL_TIM_ENABLE(htim);
  763.   }
  764.  
  765.   /* Return function status */
  766.   return HAL_OK;
  767. }
  768.  
  769. /**
  770.   * @brief  Stops the TIM Output Compare signal generation in interrupt mode
  771.   *         on the complementary output.
  772.   * @param  htim TIM Output Compare handle
  773.   * @param  Channel TIM Channel to be disabled
  774.   *          This parameter can be one of the following values:
  775.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  776.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  777.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  778.   * @retval HAL status
  779.   */
  780. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  781. {
  782.   uint32_t tmpccer;
  783.   /* Check the parameters */
  784.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  785.  
  786.   switch (Channel)
  787.   {
  788.     case TIM_CHANNEL_1:
  789.     {
  790.       /* Disable the TIM Output Compare interrupt */
  791.       __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  792.       break;
  793.     }
  794.  
  795.     case TIM_CHANNEL_2:
  796.     {
  797.       /* Disable the TIM Output Compare interrupt */
  798.       __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  799.       break;
  800.     }
  801.  
  802.     case TIM_CHANNEL_3:
  803.     {
  804.       /* Disable the TIM Output Compare interrupt */
  805.       __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
  806.       break;
  807.     }
  808.  
  809.     default:
  810.       break;
  811.   }
  812.  
  813.   /* Disable the Capture compare channel N */
  814.   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  815.  
  816.   /* Disable the TIM Break interrupt (only if no more channel is active) */
  817.   tmpccer = htim->Instance->CCER;
  818.   if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
  819.   {
  820.     __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
  821.   }
  822.  
  823.   /* Disable the Main Output */
  824.   __HAL_TIM_MOE_DISABLE(htim);
  825.  
  826.   /* Disable the Peripheral */
  827.   __HAL_TIM_DISABLE(htim);
  828.  
  829.   /* Set the TIM complementary channel state */
  830.   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  831.  
  832.   /* Return function status */
  833.   return HAL_OK;
  834. }
  835.  
  836. /**
  837.   * @brief  Starts the TIM Output Compare signal generation in DMA mode
  838.   *         on the complementary output.
  839.   * @param  htim TIM Output Compare handle
  840.   * @param  Channel TIM Channel to be enabled
  841.   *          This parameter can be one of the following values:
  842.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  843.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  844.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  845.   * @param  pData The source Buffer address.
  846.   * @param  Length The length of data to be transferred from memory to TIM peripheral
  847.   * @retval HAL status
  848.   */
  849. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
  850. {
  851.   uint32_t tmpsmcr;
  852.  
  853.   /* Check the parameters */
  854.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  855.  
  856.   /* Set the TIM complementary channel state */
  857.   if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
  858.   {
  859.     return HAL_BUSY;
  860.   }
  861.   else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
  862.   {
  863.     if ((pData == NULL) && (Length > 0U))
  864.     {
  865.       return HAL_ERROR;
  866.     }
  867.     else
  868.     {
  869.       TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  870.     }
  871.   }
  872.   else
  873.   {
  874.     return HAL_ERROR;
  875.   }
  876.  
  877.   switch (Channel)
  878.   {
  879.     case TIM_CHANNEL_1:
  880.     {
  881.       /* Set the DMA compare callbacks */
  882.       htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  883.       htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  884.  
  885.       /* Set the DMA error callback */
  886.       htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
  887.  
  888.       /* Enable the DMA channel */
  889.       if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
  890.       {
  891.         /* Return error status */
  892.         return HAL_ERROR;
  893.       }
  894.       /* Enable the TIM Output Compare DMA request */
  895.       __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  896.       break;
  897.     }
  898.  
  899.     case TIM_CHANNEL_2:
  900.     {
  901.       /* Set the DMA compare callbacks */
  902.       htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  903.       htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  904.  
  905.       /* Set the DMA error callback */
  906.       htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
  907.  
  908.       /* Enable the DMA channel */
  909.       if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
  910.       {
  911.         /* Return error status */
  912.         return HAL_ERROR;
  913.       }
  914.       /* Enable the TIM Output Compare DMA request */
  915.       __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
  916.       break;
  917.     }
  918.  
  919.     case TIM_CHANNEL_3:
  920.     {
  921.       /* Set the DMA compare callbacks */
  922.       htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  923.       htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  924.  
  925.       /* Set the DMA error callback */
  926.       htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
  927.  
  928.       /* Enable the DMA channel */
  929.       if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
  930.       {
  931.         /* Return error status */
  932.         return HAL_ERROR;
  933.       }
  934.       /* Enable the TIM Output Compare DMA request */
  935.       __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
  936.       break;
  937.     }
  938.  
  939.     default:
  940.       break;
  941.   }
  942.  
  943.   /* Enable the Capture compare channel N */
  944.   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  945.  
  946.   /* Enable the Main Output */
  947.   __HAL_TIM_MOE_ENABLE(htim);
  948.  
  949.   /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  950.   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  951.   {
  952.     tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  953.     if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  954.     {
  955.       __HAL_TIM_ENABLE(htim);
  956.     }
  957.   }
  958.   else
  959.   {
  960.     __HAL_TIM_ENABLE(htim);
  961.   }
  962.  
  963.   /* Return function status */
  964.   return HAL_OK;
  965. }
  966.  
  967. /**
  968.   * @brief  Stops the TIM Output Compare signal generation in DMA mode
  969.   *         on the complementary output.
  970.   * @param  htim TIM Output Compare handle
  971.   * @param  Channel TIM Channel to be disabled
  972.   *          This parameter can be one of the following values:
  973.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  974.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  975.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  976.   * @retval HAL status
  977.   */
  978. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
  979. {
  980.   /* Check the parameters */
  981.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  982.  
  983.   switch (Channel)
  984.   {
  985.     case TIM_CHANNEL_1:
  986.     {
  987.       /* Disable the TIM Output Compare DMA request */
  988.       __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  989.       (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
  990.       break;
  991.     }
  992.  
  993.     case TIM_CHANNEL_2:
  994.     {
  995.       /* Disable the TIM Output Compare DMA request */
  996.       __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
  997.       (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
  998.       break;
  999.     }
  1000.  
  1001.     case TIM_CHANNEL_3:
  1002.     {
  1003.       /* Disable the TIM Output Compare DMA request */
  1004.       __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
  1005.       (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
  1006.       break;
  1007.     }
  1008.  
  1009.     default:
  1010.       break;
  1011.   }
  1012.  
  1013.   /* Disable the Capture compare channel N */
  1014.   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  1015.  
  1016.   /* Disable the Main Output */
  1017.   __HAL_TIM_MOE_DISABLE(htim);
  1018.  
  1019.   /* Disable the Peripheral */
  1020.   __HAL_TIM_DISABLE(htim);
  1021.  
  1022.   /* Set the TIM complementary channel state */
  1023.   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  1024.  
  1025.   /* Return function status */
  1026.   return HAL_OK;
  1027. }
  1028.  
  1029. /**
  1030.   * @}
  1031.   */
  1032.  
  1033. /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
  1034.   * @brief    Timer Complementary PWM functions
  1035.   *
  1036. @verbatim
  1037.   ==============================================================================
  1038.                  ##### Timer Complementary PWM functions #####
  1039.   ==============================================================================
  1040.   [..]
  1041.     This section provides functions allowing to:
  1042.     (+) Start the Complementary PWM.
  1043.     (+) Stop the Complementary PWM.
  1044.     (+) Start the Complementary PWM and enable interrupts.
  1045.     (+) Stop the Complementary PWM and disable interrupts.
  1046.     (+) Start the Complementary PWM and enable DMA transfers.
  1047.     (+) Stop the Complementary PWM and disable DMA transfers.
  1048.     (+) Start the Complementary Input Capture measurement.
  1049.     (+) Stop the Complementary Input Capture.
  1050.     (+) Start the Complementary Input Capture and enable interrupts.
  1051.     (+) Stop the Complementary Input Capture and disable interrupts.
  1052.     (+) Start the Complementary Input Capture and enable DMA transfers.
  1053.     (+) Stop the Complementary Input Capture and disable DMA transfers.
  1054.     (+) Start the Complementary One Pulse generation.
  1055.     (+) Stop the Complementary One Pulse.
  1056.     (+) Start the Complementary One Pulse and enable interrupts.
  1057.     (+) Stop the Complementary One Pulse and disable interrupts.
  1058.  
  1059. @endverbatim
  1060.   * @{
  1061.   */
  1062.  
  1063. /**
  1064.   * @brief  Starts the PWM signal generation on the complementary output.
  1065.   * @param  htim TIM handle
  1066.   * @param  Channel TIM Channel to be enabled
  1067.   *          This parameter can be one of the following values:
  1068.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1069.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1070.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1071.   * @retval HAL status
  1072.   */
  1073. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
  1074. {
  1075.   uint32_t tmpsmcr;
  1076.  
  1077.   /* Check the parameters */
  1078.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1079.  
  1080.   /* Check the TIM complementary channel state */
  1081.   if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  1082.   {
  1083.     return HAL_ERROR;
  1084.   }
  1085.  
  1086.   /* Set the TIM complementary channel state */
  1087.   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  1088.  
  1089.   /* Enable the complementary PWM output  */
  1090.   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  1091.  
  1092.   /* Enable the Main Output */
  1093.   __HAL_TIM_MOE_ENABLE(htim);
  1094.  
  1095.   /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  1096.   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  1097.   {
  1098.     tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  1099.     if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  1100.     {
  1101.       __HAL_TIM_ENABLE(htim);
  1102.     }
  1103.   }
  1104.   else
  1105.   {
  1106.     __HAL_TIM_ENABLE(htim);
  1107.   }
  1108.  
  1109.   /* Return function status */
  1110.   return HAL_OK;
  1111. }
  1112.  
  1113. /**
  1114.   * @brief  Stops the PWM signal generation on the complementary output.
  1115.   * @param  htim TIM handle
  1116.   * @param  Channel TIM Channel to be disabled
  1117.   *          This parameter can be one of the following values:
  1118.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1119.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1120.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1121.   * @retval HAL status
  1122.   */
  1123. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
  1124. {
  1125.   /* Check the parameters */
  1126.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1127.  
  1128.   /* Disable the complementary PWM output  */
  1129.   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  1130.  
  1131.   /* Disable the Main Output */
  1132.   __HAL_TIM_MOE_DISABLE(htim);
  1133.  
  1134.   /* Disable the Peripheral */
  1135.   __HAL_TIM_DISABLE(htim);
  1136.  
  1137.   /* Set the TIM complementary channel state */
  1138.   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  1139.  
  1140.   /* Return function status */
  1141.   return HAL_OK;
  1142. }
  1143.  
  1144. /**
  1145.   * @brief  Starts the PWM signal generation in interrupt mode on the
  1146.   *         complementary output.
  1147.   * @param  htim TIM handle
  1148.   * @param  Channel TIM Channel to be disabled
  1149.   *          This parameter can be one of the following values:
  1150.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1151.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1152.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1153.   * @retval HAL status
  1154.   */
  1155. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  1156. {
  1157.   uint32_t tmpsmcr;
  1158.  
  1159.   /* Check the parameters */
  1160.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1161.  
  1162.   /* Check the TIM complementary channel state */
  1163.   if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  1164.   {
  1165.     return HAL_ERROR;
  1166.   }
  1167.  
  1168.   /* Set the TIM complementary channel state */
  1169.   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  1170.  
  1171.   switch (Channel)
  1172.   {
  1173.     case TIM_CHANNEL_1:
  1174.     {
  1175.       /* Enable the TIM Capture/Compare 1 interrupt */
  1176.       __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  1177.       break;
  1178.     }
  1179.  
  1180.     case TIM_CHANNEL_2:
  1181.     {
  1182.       /* Enable the TIM Capture/Compare 2 interrupt */
  1183.       __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  1184.       break;
  1185.     }
  1186.  
  1187.     case TIM_CHANNEL_3:
  1188.     {
  1189.       /* Enable the TIM Capture/Compare 3 interrupt */
  1190.       __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
  1191.       break;
  1192.     }
  1193.  
  1194.     default:
  1195.       break;
  1196.   }
  1197.  
  1198.   /* Enable the TIM Break interrupt */
  1199.   __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
  1200.  
  1201.   /* Enable the complementary PWM output  */
  1202.   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  1203.  
  1204.   /* Enable the Main Output */
  1205.   __HAL_TIM_MOE_ENABLE(htim);
  1206.  
  1207.   /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  1208.   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  1209.   {
  1210.     tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  1211.     if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  1212.     {
  1213.       __HAL_TIM_ENABLE(htim);
  1214.     }
  1215.   }
  1216.   else
  1217.   {
  1218.     __HAL_TIM_ENABLE(htim);
  1219.   }
  1220.  
  1221.   /* Return function status */
  1222.   return HAL_OK;
  1223. }
  1224.  
  1225. /**
  1226.   * @brief  Stops the PWM signal generation in interrupt mode on the
  1227.   *         complementary output.
  1228.   * @param  htim TIM handle
  1229.   * @param  Channel TIM Channel to be disabled
  1230.   *          This parameter can be one of the following values:
  1231.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1232.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1233.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1234.   * @retval HAL status
  1235.   */
  1236. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  1237. {
  1238.   uint32_t tmpccer;
  1239.  
  1240.   /* Check the parameters */
  1241.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1242.  
  1243.   switch (Channel)
  1244.   {
  1245.     case TIM_CHANNEL_1:
  1246.     {
  1247.       /* Disable the TIM Capture/Compare 1 interrupt */
  1248.       __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  1249.       break;
  1250.     }
  1251.  
  1252.     case TIM_CHANNEL_2:
  1253.     {
  1254.       /* Disable the TIM Capture/Compare 2 interrupt */
  1255.       __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  1256.       break;
  1257.     }
  1258.  
  1259.     case TIM_CHANNEL_3:
  1260.     {
  1261.       /* Disable the TIM Capture/Compare 3 interrupt */
  1262.       __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
  1263.       break;
  1264.     }
  1265.  
  1266.     default:
  1267.       break;
  1268.   }
  1269.  
  1270.   /* Disable the complementary PWM output  */
  1271.   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  1272.  
  1273.   /* Disable the TIM Break interrupt (only if no more channel is active) */
  1274.   tmpccer = htim->Instance->CCER;
  1275.   if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
  1276.   {
  1277.     __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
  1278.   }
  1279.  
  1280.   /* Disable the Main Output */
  1281.   __HAL_TIM_MOE_DISABLE(htim);
  1282.  
  1283.   /* Disable the Peripheral */
  1284.   __HAL_TIM_DISABLE(htim);
  1285.  
  1286.   /* Set the TIM complementary channel state */
  1287.   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  1288.  
  1289.   /* Return function status */
  1290.   return HAL_OK;
  1291. }
  1292.  
  1293. /**
  1294.   * @brief  Starts the TIM PWM signal generation in DMA mode on the
  1295.   *         complementary output
  1296.   * @param  htim TIM handle
  1297.   * @param  Channel TIM Channel to be enabled
  1298.   *          This parameter can be one of the following values:
  1299.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1300.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1301.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1302.   * @param  pData The source Buffer address.
  1303.   * @param  Length The length of data to be transferred from memory to TIM peripheral
  1304.   * @retval HAL status
  1305.   */
  1306. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
  1307. {
  1308.   uint32_t tmpsmcr;
  1309.  
  1310.   /* Check the parameters */
  1311.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1312.  
  1313.   /* Set the TIM complementary channel state */
  1314.   if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
  1315.   {
  1316.     return HAL_BUSY;
  1317.   }
  1318.   else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
  1319.   {
  1320.     if ((pData == NULL) && (Length > 0U))
  1321.     {
  1322.       return HAL_ERROR;
  1323.     }
  1324.     else
  1325.     {
  1326.       TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  1327.     }
  1328.   }
  1329.   else
  1330.   {
  1331.     return HAL_ERROR;
  1332.   }
  1333.  
  1334.   switch (Channel)
  1335.   {
  1336.     case TIM_CHANNEL_1:
  1337.     {
  1338.       /* Set the DMA compare callbacks */
  1339.       htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  1340.       htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  1341.  
  1342.       /* Set the DMA error callback */
  1343.       htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
  1344.  
  1345.       /* Enable the DMA channel */
  1346.       if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
  1347.       {
  1348.         /* Return error status */
  1349.         return HAL_ERROR;
  1350.       }
  1351.       /* Enable the TIM Capture/Compare 1 DMA request */
  1352.       __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  1353.       break;
  1354.     }
  1355.  
  1356.     case TIM_CHANNEL_2:
  1357.     {
  1358.       /* Set the DMA compare callbacks */
  1359.       htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  1360.       htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  1361.  
  1362.       /* Set the DMA error callback */
  1363.       htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
  1364.  
  1365.       /* Enable the DMA channel */
  1366.       if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
  1367.       {
  1368.         /* Return error status */
  1369.         return HAL_ERROR;
  1370.       }
  1371.       /* Enable the TIM Capture/Compare 2 DMA request */
  1372.       __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
  1373.       break;
  1374.     }
  1375.  
  1376.     case TIM_CHANNEL_3:
  1377.     {
  1378.       /* Set the DMA compare callbacks */
  1379.       htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  1380.       htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  1381.  
  1382.       /* Set the DMA error callback */
  1383.       htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
  1384.  
  1385.       /* Enable the DMA channel */
  1386.       if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
  1387.       {
  1388.         /* Return error status */
  1389.         return HAL_ERROR;
  1390.       }
  1391.       /* Enable the TIM Capture/Compare 3 DMA request */
  1392.       __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
  1393.       break;
  1394.     }
  1395.  
  1396.     default:
  1397.       break;
  1398.   }
  1399.  
  1400.   /* Enable the complementary PWM output  */
  1401.   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  1402.  
  1403.   /* Enable the Main Output */
  1404.   __HAL_TIM_MOE_ENABLE(htim);
  1405.  
  1406.   /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  1407.   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  1408.   {
  1409.     tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  1410.     if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  1411.     {
  1412.       __HAL_TIM_ENABLE(htim);
  1413.     }
  1414.   }
  1415.   else
  1416.   {
  1417.     __HAL_TIM_ENABLE(htim);
  1418.   }
  1419.  
  1420.   /* Return function status */
  1421.   return HAL_OK;
  1422. }
  1423.  
  1424. /**
  1425.   * @brief  Stops the TIM PWM signal generation in DMA mode on the complementary
  1426.   *         output
  1427.   * @param  htim TIM handle
  1428.   * @param  Channel TIM Channel to be disabled
  1429.   *          This parameter can be one of the following values:
  1430.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1431.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1432.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1433.   * @retval HAL status
  1434.   */
  1435. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
  1436. {
  1437.   /* Check the parameters */
  1438.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1439.  
  1440.   switch (Channel)
  1441.   {
  1442.     case TIM_CHANNEL_1:
  1443.     {
  1444.       /* Disable the TIM Capture/Compare 1 DMA request */
  1445.       __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  1446.       (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
  1447.       break;
  1448.     }
  1449.  
  1450.     case TIM_CHANNEL_2:
  1451.     {
  1452.       /* Disable the TIM Capture/Compare 2 DMA request */
  1453.       __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
  1454.       (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
  1455.       break;
  1456.     }
  1457.  
  1458.     case TIM_CHANNEL_3:
  1459.     {
  1460.       /* Disable the TIM Capture/Compare 3 DMA request */
  1461.       __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
  1462.       (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
  1463.       break;
  1464.     }
  1465.  
  1466.     default:
  1467.       break;
  1468.   }
  1469.  
  1470.   /* Disable the complementary PWM output */
  1471.   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  1472.  
  1473.   /* Disable the Main Output */
  1474.   __HAL_TIM_MOE_DISABLE(htim);
  1475.  
  1476.   /* Disable the Peripheral */
  1477.   __HAL_TIM_DISABLE(htim);
  1478.  
  1479.   /* Set the TIM complementary channel state */
  1480.   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  1481.  
  1482.   /* Return function status */
  1483.   return HAL_OK;
  1484. }
  1485.  
  1486. /**
  1487.   * @}
  1488.   */
  1489.  
  1490. /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
  1491.   * @brief    Timer Complementary One Pulse functions
  1492.   *
  1493. @verbatim
  1494.   ==============================================================================
  1495.                 ##### Timer Complementary One Pulse functions #####
  1496.   ==============================================================================
  1497.   [..]
  1498.     This section provides functions allowing to:
  1499.     (+) Start the Complementary One Pulse generation.
  1500.     (+) Stop the Complementary One Pulse.
  1501.     (+) Start the Complementary One Pulse and enable interrupts.
  1502.     (+) Stop the Complementary One Pulse and disable interrupts.
  1503.  
  1504. @endverbatim
  1505.   * @{
  1506.   */
  1507.  
  1508. /**
  1509.   * @brief  Starts the TIM One Pulse signal generation on the complementary
  1510.   *         output.
  1511.   * @param  htim TIM One Pulse handle
  1512.   * @param  OutputChannel TIM Channel to be enabled
  1513.   *          This parameter can be one of the following values:
  1514.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1515.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1516.   * @retval HAL status
  1517.   */
  1518. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1519. {
  1520.   uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1521.   HAL_TIM_ChannelStateTypeDef input_channel_state = TIM_CHANNEL_STATE_GET(htim, input_channel);
  1522.   HAL_TIM_ChannelStateTypeDef output_channel_state = TIM_CHANNEL_N_STATE_GET(htim, OutputChannel);
  1523.  
  1524.   /* Check the parameters */
  1525.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1526.  
  1527.   /* Check the TIM channels state */
  1528.   if ((output_channel_state != HAL_TIM_CHANNEL_STATE_READY)
  1529.       || (input_channel_state != HAL_TIM_CHANNEL_STATE_READY))
  1530.   {
  1531.     return HAL_ERROR;
  1532.   }
  1533.  
  1534.   /* Set the TIM channels state */
  1535.   TIM_CHANNEL_N_STATE_SET(htim, OutputChannel, HAL_TIM_CHANNEL_STATE_BUSY);
  1536.   TIM_CHANNEL_STATE_SET(htim, input_channel, HAL_TIM_CHANNEL_STATE_BUSY);
  1537.  
  1538.   /* Enable the complementary One Pulse output channel and the Input Capture channel */
  1539.   TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
  1540.   TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
  1541.  
  1542.   /* Enable the Main Output */
  1543.   __HAL_TIM_MOE_ENABLE(htim);
  1544.  
  1545.   /* Return function status */
  1546.   return HAL_OK;
  1547. }
  1548.  
  1549. /**
  1550.   * @brief  Stops the TIM One Pulse signal generation on the complementary
  1551.   *         output.
  1552.   * @param  htim TIM One Pulse handle
  1553.   * @param  OutputChannel TIM Channel to be disabled
  1554.   *          This parameter can be one of the following values:
  1555.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1556.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1557.   * @retval HAL status
  1558.   */
  1559. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1560. {
  1561.   uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1562.  
  1563.   /* Check the parameters */
  1564.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1565.  
  1566.   /* Disable the complementary One Pulse output channel and the Input Capture channel */
  1567.   TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
  1568.   TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
  1569.  
  1570.   /* Disable the Main Output */
  1571.   __HAL_TIM_MOE_DISABLE(htim);
  1572.  
  1573.   /* Disable the Peripheral */
  1574.   __HAL_TIM_DISABLE(htim);
  1575.  
  1576.   /* Set the TIM  channels state */
  1577.   TIM_CHANNEL_N_STATE_SET(htim, OutputChannel, HAL_TIM_CHANNEL_STATE_READY);
  1578.   TIM_CHANNEL_STATE_SET(htim, input_channel, HAL_TIM_CHANNEL_STATE_READY);
  1579.  
  1580.   /* Return function status */
  1581.   return HAL_OK;
  1582. }
  1583.  
  1584. /**
  1585.   * @brief  Starts the TIM One Pulse signal generation in interrupt mode on the
  1586.   *         complementary channel.
  1587.   * @param  htim TIM One Pulse handle
  1588.   * @param  OutputChannel TIM Channel to be enabled
  1589.   *          This parameter can be one of the following values:
  1590.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1591.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1592.   * @retval HAL status
  1593.   */
  1594. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1595. {
  1596.   uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1597.   HAL_TIM_ChannelStateTypeDef input_channel_state = TIM_CHANNEL_STATE_GET(htim, input_channel);
  1598.   HAL_TIM_ChannelStateTypeDef output_channel_state = TIM_CHANNEL_N_STATE_GET(htim, OutputChannel);
  1599.  
  1600.   /* Check the parameters */
  1601.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1602.  
  1603.   /* Check the TIM channels state */
  1604.   if ((output_channel_state != HAL_TIM_CHANNEL_STATE_READY)
  1605.       || (input_channel_state != HAL_TIM_CHANNEL_STATE_READY))
  1606.   {
  1607.     return HAL_ERROR;
  1608.   }
  1609.  
  1610.   /* Set the TIM channels state */
  1611.   TIM_CHANNEL_N_STATE_SET(htim, OutputChannel, HAL_TIM_CHANNEL_STATE_BUSY);
  1612.   TIM_CHANNEL_STATE_SET(htim, input_channel, HAL_TIM_CHANNEL_STATE_BUSY);
  1613.  
  1614.   /* Enable the TIM Capture/Compare 1 interrupt */
  1615.   __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  1616.  
  1617.   /* Enable the TIM Capture/Compare 2 interrupt */
  1618.   __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  1619.  
  1620.   /* Enable the complementary One Pulse output channel and the Input Capture channel */
  1621.   TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
  1622.   TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
  1623.  
  1624.   /* Enable the Main Output */
  1625.   __HAL_TIM_MOE_ENABLE(htim);
  1626.  
  1627.   /* Return function status */
  1628.   return HAL_OK;
  1629. }
  1630.  
  1631. /**
  1632.   * @brief  Stops the TIM One Pulse signal generation in interrupt mode on the
  1633.   *         complementary channel.
  1634.   * @param  htim TIM One Pulse handle
  1635.   * @param  OutputChannel TIM Channel to be disabled
  1636.   *          This parameter can be one of the following values:
  1637.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1638.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1639.   * @retval HAL status
  1640.   */
  1641. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1642. {
  1643.   uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1644.  
  1645.   /* Check the parameters */
  1646.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1647.  
  1648.   /* Disable the TIM Capture/Compare 1 interrupt */
  1649.   __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  1650.  
  1651.   /* Disable the TIM Capture/Compare 2 interrupt */
  1652.   __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  1653.  
  1654.   /* Disable the complementary One Pulse output channel and the Input Capture channel */
  1655.   TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
  1656.   TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
  1657.  
  1658.   /* Disable the Main Output */
  1659.   __HAL_TIM_MOE_DISABLE(htim);
  1660.  
  1661.   /* Disable the Peripheral */
  1662.   __HAL_TIM_DISABLE(htim);
  1663.  
  1664.   /* Set the TIM  channels state */
  1665.   TIM_CHANNEL_N_STATE_SET(htim, OutputChannel, HAL_TIM_CHANNEL_STATE_READY);
  1666.   TIM_CHANNEL_STATE_SET(htim, input_channel, HAL_TIM_CHANNEL_STATE_READY);
  1667.  
  1668.   /* Return function status */
  1669.   return HAL_OK;
  1670. }
  1671.  
  1672. /**
  1673.   * @}
  1674.   */
  1675.  
  1676. /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
  1677.   * @brief    Peripheral Control functions
  1678.   *
  1679. @verbatim
  1680.   ==============================================================================
  1681.                     ##### Peripheral Control functions #####
  1682.   ==============================================================================
  1683.   [..]
  1684.     This section provides functions allowing to:
  1685.       (+) Configure the commutation event in case of use of the Hall sensor interface.
  1686.       (+) Configure Output channels for OC and PWM mode.
  1687.  
  1688.       (+) Configure Complementary channels, break features and dead time.
  1689.       (+) Configure Master synchronization.
  1690.       (+) Configure timer remapping capabilities.
  1691.  
  1692. @endverbatim
  1693.   * @{
  1694.   */
  1695.  
  1696. /**
  1697.   * @brief  Configure the TIM commutation event sequence.
  1698.   * @note  This function is mandatory to use the commutation event in order to
  1699.   *        update the configuration at each commutation detection on the TRGI input of the Timer,
  1700.   *        the typical use of this feature is with the use of another Timer(interface Timer)
  1701.   *        configured in Hall sensor interface, this interface Timer will generate the
  1702.   *        commutation at its TRGO output (connected to Timer used in this function) each time
  1703.   *        the TI1 of the Interface Timer detect a commutation at its input TI1.
  1704.   * @param  htim TIM handle
  1705.   * @param  InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
  1706.   *          This parameter can be one of the following values:
  1707.   *            @arg TIM_TS_ITR0: Internal trigger 0 selected
  1708.   *            @arg TIM_TS_ITR1: Internal trigger 1 selected
  1709.   *            @arg TIM_TS_ITR2: Internal trigger 2 selected
  1710.   *            @arg TIM_TS_ITR3: Internal trigger 3 selected
  1711.   *            @arg TIM_TS_NONE: No trigger is needed
  1712.   * @param  CommutationSource the Commutation Event source
  1713.   *          This parameter can be one of the following values:
  1714.   *            @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1715.   *            @arg TIM_COMMUTATION_SOFTWARE:  Commutation source is set by software using the COMG bit
  1716.   * @retval HAL status
  1717.   */
  1718. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t  InputTrigger,
  1719.                                               uint32_t  CommutationSource)
  1720. {
  1721.   /* Check the parameters */
  1722.   assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1723.   assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1724.  
  1725.   __HAL_LOCK(htim);
  1726.  
  1727.   if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1728.       (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  1729.   {
  1730.     /* Select the Input trigger */
  1731.     htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1732.     htim->Instance->SMCR |= InputTrigger;
  1733.   }
  1734.  
  1735.   /* Select the Capture Compare preload feature */
  1736.   htim->Instance->CR2 |= TIM_CR2_CCPC;
  1737.   /* Select the Commutation event source */
  1738.   htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1739.   htim->Instance->CR2 |= CommutationSource;
  1740.  
  1741.   /* Disable Commutation Interrupt */
  1742.   __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
  1743.  
  1744.   /* Disable Commutation DMA request */
  1745.   __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
  1746.  
  1747.   __HAL_UNLOCK(htim);
  1748.  
  1749.   return HAL_OK;
  1750. }
  1751.  
  1752. /**
  1753.   * @brief  Configure the TIM commutation event sequence with interrupt.
  1754.   * @note  This function is mandatory to use the commutation event in order to
  1755.   *        update the configuration at each commutation detection on the TRGI input of the Timer,
  1756.   *        the typical use of this feature is with the use of another Timer(interface Timer)
  1757.   *        configured in Hall sensor interface, this interface Timer will generate the
  1758.   *        commutation at its TRGO output (connected to Timer used in this function) each time
  1759.   *        the TI1 of the Interface Timer detect a commutation at its input TI1.
  1760.   * @param  htim TIM handle
  1761.   * @param  InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
  1762.   *          This parameter can be one of the following values:
  1763.   *            @arg TIM_TS_ITR0: Internal trigger 0 selected
  1764.   *            @arg TIM_TS_ITR1: Internal trigger 1 selected
  1765.   *            @arg TIM_TS_ITR2: Internal trigger 2 selected
  1766.   *            @arg TIM_TS_ITR3: Internal trigger 3 selected
  1767.   *            @arg TIM_TS_NONE: No trigger is needed
  1768.   * @param  CommutationSource the Commutation Event source
  1769.   *          This parameter can be one of the following values:
  1770.   *            @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1771.   *            @arg TIM_COMMUTATION_SOFTWARE:  Commutation source is set by software using the COMG bit
  1772.   * @retval HAL status
  1773.   */
  1774. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t  InputTrigger,
  1775.                                                  uint32_t  CommutationSource)
  1776. {
  1777.   /* Check the parameters */
  1778.   assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1779.   assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1780.  
  1781.   __HAL_LOCK(htim);
  1782.  
  1783.   if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1784.       (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  1785.   {
  1786.     /* Select the Input trigger */
  1787.     htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1788.     htim->Instance->SMCR |= InputTrigger;
  1789.   }
  1790.  
  1791.   /* Select the Capture Compare preload feature */
  1792.   htim->Instance->CR2 |= TIM_CR2_CCPC;
  1793.   /* Select the Commutation event source */
  1794.   htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1795.   htim->Instance->CR2 |= CommutationSource;
  1796.  
  1797.   /* Disable Commutation DMA request */
  1798.   __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
  1799.  
  1800.   /* Enable the Commutation Interrupt */
  1801.   __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
  1802.  
  1803.   __HAL_UNLOCK(htim);
  1804.  
  1805.   return HAL_OK;
  1806. }
  1807.  
  1808. /**
  1809.   * @brief  Configure the TIM commutation event sequence with DMA.
  1810.   * @note  This function is mandatory to use the commutation event in order to
  1811.   *        update the configuration at each commutation detection on the TRGI input of the Timer,
  1812.   *        the typical use of this feature is with the use of another Timer(interface Timer)
  1813.   *        configured in Hall sensor interface, this interface Timer will generate the
  1814.   *        commutation at its TRGO output (connected to Timer used in this function) each time
  1815.   *        the TI1 of the Interface Timer detect a commutation at its input TI1.
  1816.   * @note  The user should configure the DMA in his own software, in This function only the COMDE bit is set
  1817.   * @param  htim TIM handle
  1818.   * @param  InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
  1819.   *          This parameter can be one of the following values:
  1820.   *            @arg TIM_TS_ITR0: Internal trigger 0 selected
  1821.   *            @arg TIM_TS_ITR1: Internal trigger 1 selected
  1822.   *            @arg TIM_TS_ITR2: Internal trigger 2 selected
  1823.   *            @arg TIM_TS_ITR3: Internal trigger 3 selected
  1824.   *            @arg TIM_TS_NONE: No trigger is needed
  1825.   * @param  CommutationSource the Commutation Event source
  1826.   *          This parameter can be one of the following values:
  1827.   *            @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1828.   *            @arg TIM_COMMUTATION_SOFTWARE:  Commutation source is set by software using the COMG bit
  1829.   * @retval HAL status
  1830.   */
  1831. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t  InputTrigger,
  1832.                                                   uint32_t  CommutationSource)
  1833. {
  1834.   /* Check the parameters */
  1835.   assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1836.   assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1837.  
  1838.   __HAL_LOCK(htim);
  1839.  
  1840.   if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1841.       (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  1842.   {
  1843.     /* Select the Input trigger */
  1844.     htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1845.     htim->Instance->SMCR |= InputTrigger;
  1846.   }
  1847.  
  1848.   /* Select the Capture Compare preload feature */
  1849.   htim->Instance->CR2 |= TIM_CR2_CCPC;
  1850.   /* Select the Commutation event source */
  1851.   htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1852.   htim->Instance->CR2 |= CommutationSource;
  1853.  
  1854.   /* Enable the Commutation DMA Request */
  1855.   /* Set the DMA Commutation Callback */
  1856.   htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
  1857.   htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
  1858.   /* Set the DMA error callback */
  1859.   htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
  1860.  
  1861.   /* Disable Commutation Interrupt */
  1862.   __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
  1863.  
  1864.   /* Enable the Commutation DMA Request */
  1865.   __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
  1866.  
  1867.   __HAL_UNLOCK(htim);
  1868.  
  1869.   return HAL_OK;
  1870. }
  1871.  
  1872. /**
  1873.   * @brief  Configures the TIM in master mode.
  1874.   * @param  htim TIM handle.
  1875.   * @param  sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
  1876.   *         contains the selected trigger output (TRGO) and the Master/Slave
  1877.   *         mode.
  1878.   * @retval HAL status
  1879.   */
  1880. HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
  1881.                                                         TIM_MasterConfigTypeDef *sMasterConfig)
  1882. {
  1883.   uint32_t tmpcr2;
  1884.   uint32_t tmpsmcr;
  1885.  
  1886.   /* Check the parameters */
  1887.   assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
  1888.   assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  1889.   assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
  1890.  
  1891.   /* Check input state */
  1892.   __HAL_LOCK(htim);
  1893.  
  1894.   /* Change the handler state */
  1895.   htim->State = HAL_TIM_STATE_BUSY;
  1896.  
  1897.   /* Get the TIMx CR2 register value */
  1898.   tmpcr2 = htim->Instance->CR2;
  1899.  
  1900.   /* Get the TIMx SMCR register value */
  1901.   tmpsmcr = htim->Instance->SMCR;
  1902.  
  1903.   /* Reset the MMS Bits */
  1904.   tmpcr2 &= ~TIM_CR2_MMS;
  1905.   /* Select the TRGO source */
  1906.   tmpcr2 |=  sMasterConfig->MasterOutputTrigger;
  1907.  
  1908.   /* Update TIMx CR2 */
  1909.   htim->Instance->CR2 = tmpcr2;
  1910.  
  1911.   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  1912.   {
  1913.     /* Reset the MSM Bit */
  1914.     tmpsmcr &= ~TIM_SMCR_MSM;
  1915.     /* Set master mode */
  1916.     tmpsmcr |= sMasterConfig->MasterSlaveMode;
  1917.  
  1918.     /* Update TIMx SMCR */
  1919.     htim->Instance->SMCR = tmpsmcr;
  1920.   }
  1921.  
  1922.   /* Change the htim state */
  1923.   htim->State = HAL_TIM_STATE_READY;
  1924.  
  1925.   __HAL_UNLOCK(htim);
  1926.  
  1927.   return HAL_OK;
  1928. }
  1929.  
  1930. /**
  1931.   * @brief  Configures the Break feature, dead time, Lock level, OSSI/OSSR State
  1932.   *         and the AOE(automatic output enable).
  1933.   * @param  htim TIM handle
  1934.   * @param  sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
  1935.   *         contains the BDTR Register configuration  information for the TIM peripheral.
  1936.   * @note   Interrupts can be generated when an active level is detected on the
  1937.   *         break input, the break 2 input or the system break input. Break
  1938.   *         interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
  1939.   * @retval HAL status
  1940.   */
  1941. HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
  1942.                                                 TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
  1943. {
  1944.   /* Keep this variable initialized to 0 as it is used to configure BDTR register */
  1945.   uint32_t tmpbdtr = 0U;
  1946.  
  1947.   /* Check the parameters */
  1948.   assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
  1949.   assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
  1950.   assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
  1951.   assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
  1952.   assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
  1953.   assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
  1954.   assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
  1955.   assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
  1956.  
  1957.   /* Check input state */
  1958.   __HAL_LOCK(htim);
  1959.  
  1960.   /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
  1961.      the OSSI State, the dead time value and the Automatic Output Enable Bit */
  1962.  
  1963.   /* Set the BDTR bits */
  1964.   MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
  1965.   MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
  1966.   MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
  1967.   MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
  1968.   MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
  1969.   MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
  1970.   MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
  1971.  
  1972.  
  1973.   /* Set TIMx_BDTR */
  1974.   htim->Instance->BDTR = tmpbdtr;
  1975.  
  1976.   __HAL_UNLOCK(htim);
  1977.  
  1978.   return HAL_OK;
  1979. }
  1980.  
  1981. /**
  1982.   * @brief  Configures the TIMx Remapping input capabilities.
  1983.   * @param  htim TIM handle.
  1984.   * @param  Remap specifies the TIM remapping source.
  1985.   *
  1986.   * @retval HAL status
  1987.   */
  1988. HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
  1989. {
  1990.   /* Prevent unused argument(s) compilation warning */
  1991.   UNUSED(htim);
  1992.   UNUSED(Remap);
  1993.  
  1994.   return HAL_OK;
  1995. }
  1996.  
  1997. /**
  1998.   * @}
  1999.   */
  2000.  
  2001. /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
  2002.   * @brief    Extended Callbacks functions
  2003.   *
  2004. @verbatim
  2005.   ==============================================================================
  2006.                     ##### Extended Callbacks functions #####
  2007.   ==============================================================================
  2008.   [..]
  2009.     This section provides Extended TIM callback functions:
  2010.     (+) Timer Commutation callback
  2011.     (+) Timer Break callback
  2012.  
  2013. @endverbatim
  2014.   * @{
  2015.   */
  2016.  
  2017. /**
  2018.   * @brief  Hall commutation changed callback in non-blocking mode
  2019.   * @param  htim TIM handle
  2020.   * @retval None
  2021.   */
  2022. __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
  2023. {
  2024.   /* Prevent unused argument(s) compilation warning */
  2025.   UNUSED(htim);
  2026.  
  2027.   /* NOTE : This function should not be modified, when the callback is needed,
  2028.             the HAL_TIMEx_CommutCallback could be implemented in the user file
  2029.    */
  2030. }
  2031. /**
  2032.   * @brief  Hall commutation changed half complete callback in non-blocking mode
  2033.   * @param  htim TIM handle
  2034.   * @retval None
  2035.   */
  2036. __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
  2037. {
  2038.   /* Prevent unused argument(s) compilation warning */
  2039.   UNUSED(htim);
  2040.  
  2041.   /* NOTE : This function should not be modified, when the callback is needed,
  2042.             the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file
  2043.    */
  2044. }
  2045.  
  2046. /**
  2047.   * @brief  Hall Break detection callback in non-blocking mode
  2048.   * @param  htim TIM handle
  2049.   * @retval None
  2050.   */
  2051. __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
  2052. {
  2053.   /* Prevent unused argument(s) compilation warning */
  2054.   UNUSED(htim);
  2055.  
  2056.   /* NOTE : This function should not be modified, when the callback is needed,
  2057.             the HAL_TIMEx_BreakCallback could be implemented in the user file
  2058.    */
  2059. }
  2060. /**
  2061.   * @}
  2062.   */
  2063.  
  2064. /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
  2065.   * @brief    Extended Peripheral State functions
  2066.   *
  2067. @verbatim
  2068.   ==============================================================================
  2069.                 ##### Extended Peripheral State functions #####
  2070.   ==============================================================================
  2071.   [..]
  2072.     This subsection permits to get in run-time the status of the peripheral
  2073.     and the data flow.
  2074.  
  2075. @endverbatim
  2076.   * @{
  2077.   */
  2078.  
  2079. /**
  2080.   * @brief  Return the TIM Hall Sensor interface handle state.
  2081.   * @param  htim TIM Hall Sensor handle
  2082.   * @retval HAL state
  2083.   */
  2084. HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
  2085. {
  2086.   return htim->State;
  2087. }
  2088.  
  2089. /**
  2090.   * @brief  Return actual state of the TIM complementary channel.
  2091.   * @param  htim TIM handle
  2092.   * @param  ChannelN TIM Complementary channel
  2093.   *          This parameter can be one of the following values:
  2094.   *            @arg TIM_CHANNEL_1: TIM Channel 1
  2095.   *            @arg TIM_CHANNEL_2: TIM Channel 2
  2096.   *            @arg TIM_CHANNEL_3: TIM Channel 3
  2097.   * @retval TIM Complementary channel state
  2098.   */
  2099. HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim,  uint32_t ChannelN)
  2100. {
  2101.   HAL_TIM_ChannelStateTypeDef channel_state;
  2102.  
  2103.   /* Check the parameters */
  2104.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, ChannelN));
  2105.  
  2106.   channel_state = TIM_CHANNEL_N_STATE_GET(htim, ChannelN);
  2107.  
  2108.   return channel_state;
  2109. }
  2110. /**
  2111.   * @}
  2112.   */
  2113.  
  2114. /**
  2115.   * @}
  2116.   */
  2117.  
  2118. /* Private functions ---------------------------------------------------------*/
  2119. /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
  2120.   * @{
  2121.   */
  2122.  
  2123. /**
  2124.   * @brief  TIM DMA Commutation callback.
  2125.   * @param  hdma pointer to DMA handle.
  2126.   * @retval None
  2127.   */
  2128. void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
  2129. {
  2130.   TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  2131.  
  2132.   /* Change the htim state */
  2133.   htim->State = HAL_TIM_STATE_READY;
  2134.  
  2135. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  2136.   htim->CommutationCallback(htim);
  2137. #else
  2138.   HAL_TIMEx_CommutCallback(htim);
  2139. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  2140. }
  2141.  
  2142. /**
  2143.   * @brief  TIM DMA Commutation half complete callback.
  2144.   * @param  hdma pointer to DMA handle.
  2145.   * @retval None
  2146.   */
  2147. void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
  2148. {
  2149.   TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  2150.  
  2151.   /* Change the htim state */
  2152.   htim->State = HAL_TIM_STATE_READY;
  2153.  
  2154. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  2155.   htim->CommutationHalfCpltCallback(htim);
  2156. #else
  2157.   HAL_TIMEx_CommutHalfCpltCallback(htim);
  2158. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  2159. }
  2160.  
  2161.  
  2162. /**
  2163.   * @brief  TIM DMA Delay Pulse complete callback (complementary channel).
  2164.   * @param  hdma pointer to DMA handle.
  2165.   * @retval None
  2166.   */
  2167. static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma)
  2168. {
  2169.   TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  2170.  
  2171.   if (hdma == htim->hdma[TIM_DMA_ID_CC1])
  2172.   {
  2173.     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
  2174.  
  2175.     if (hdma->Init.Mode == DMA_NORMAL)
  2176.     {
  2177.       TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  2178.     }
  2179.   }
  2180.   else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
  2181.   {
  2182.     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
  2183.  
  2184.     if (hdma->Init.Mode == DMA_NORMAL)
  2185.     {
  2186.       TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  2187.     }
  2188.   }
  2189.   else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
  2190.   {
  2191.     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
  2192.  
  2193.     if (hdma->Init.Mode == DMA_NORMAL)
  2194.     {
  2195.       TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
  2196.     }
  2197.   }
  2198.   else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
  2199.   {
  2200.     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
  2201.  
  2202.     if (hdma->Init.Mode == DMA_NORMAL)
  2203.     {
  2204.       TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
  2205.     }
  2206.   }
  2207.   else
  2208.   {
  2209.     /* nothing to do */
  2210.   }
  2211.  
  2212. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  2213.   htim->PWM_PulseFinishedCallback(htim);
  2214. #else
  2215.   HAL_TIM_PWM_PulseFinishedCallback(htim);
  2216. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  2217.  
  2218.   htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
  2219. }
  2220.  
  2221. /**
  2222.   * @brief  TIM DMA error callback (complementary channel)
  2223.   * @param  hdma pointer to DMA handle.
  2224.   * @retval None
  2225.   */
  2226. static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma)
  2227. {
  2228.   TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  2229.  
  2230.   if (hdma == htim->hdma[TIM_DMA_ID_CC1])
  2231.   {
  2232.     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
  2233.     TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  2234.   }
  2235.   else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
  2236.   {
  2237.     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
  2238.     TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  2239.   }
  2240.   else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
  2241.   {
  2242.     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
  2243.     TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
  2244.   }
  2245.   else
  2246.   {
  2247.     /* nothing to do */
  2248.   }
  2249.  
  2250. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  2251.   htim->ErrorCallback(htim);
  2252. #else
  2253.   HAL_TIM_ErrorCallback(htim);
  2254. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  2255.  
  2256.   htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
  2257. }
  2258.  
  2259. /**
  2260.   * @brief  Enables or disables the TIM Capture Compare Channel xN.
  2261.   * @param  TIMx to select the TIM peripheral
  2262.   * @param  Channel specifies the TIM Channel
  2263.   *          This parameter can be one of the following values:
  2264.   *            @arg TIM_CHANNEL_1: TIM Channel 1
  2265.   *            @arg TIM_CHANNEL_2: TIM Channel 2
  2266.   *            @arg TIM_CHANNEL_3: TIM Channel 3
  2267.   * @param  ChannelNState specifies the TIM Channel CCxNE bit new state.
  2268.   *          This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
  2269.   * @retval None
  2270.   */
  2271. static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
  2272. {
  2273.   uint32_t tmp;
  2274.  
  2275.   tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
  2276.  
  2277.   /* Reset the CCxNE Bit */
  2278.   TIMx->CCER &=  ~tmp;
  2279.  
  2280.   /* Set or reset the CCxNE Bit */
  2281.   TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
  2282. }
  2283. /**
  2284.   * @}
  2285.   */
  2286.  
  2287. #endif /* HAL_TIM_MODULE_ENABLED */
  2288. /**
  2289.   * @}
  2290.   */
  2291.  
  2292. /**
  2293.   * @}
  2294.   */
  2295.  
  2296. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  2297.