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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32f1xx_hal_spi.c
  4.   * @author  MCD Application Team
  5.   * @version V1.0.4
  6.   * @date    29-April-2016
  7.   * @brief   SPI HAL module driver.
  8.   *    
  9.   *          This file provides firmware functions to manage the following
  10.   *          functionalities of the Serial Peripheral Interface (SPI) peripheral:
  11.   *           + Initialization and de-initialization functions
  12.   *           + IO operation functions
  13.   *           + Peripheral Control functions
  14.   *           + Peripheral State functions
  15.   @verbatim
  16.   ==============================================================================
  17.                         ##### How to use this driver #####
  18.   ==============================================================================
  19.     [..]
  20.       The SPI HAL driver can be used as follows:
  21.  
  22.       (#) Declare a SPI_HandleTypeDef handle structure, for example:
  23.           SPI_HandleTypeDef  hspi;
  24.  
  25.       (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit ()API:
  26.           (##) Enable the SPIx interface clock
  27.           (##) SPI pins configuration
  28.               (+++) Enable the clock for the SPI GPIOs
  29.               (+++) Configure these SPI pins as alternate function push-pull
  30.           (##) NVIC configuration if you need to use interrupt process
  31.               (+++) Configure the SPIx interrupt priority
  32.               (+++) Enable the NVIC SPI IRQ handle
  33.           (##) DMA Configuration if you need to use DMA process
  34.               (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive Channel
  35.               (+++) Enable the DMAx clock
  36.               (+++) Configure the DMA handle parameters
  37.               (+++) Configure the DMA Tx or Rx Channel
  38.               (+++) Associate the initilalized hdma_tx(or _rx) handle to the hspi DMA Tx (or Rx) handle
  39.               (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Channel
  40.  
  41.       (#) Program the Mode, Direction , Data size, Baudrate Prescaler, NSS
  42.           management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
  43.  
  44.       (#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
  45.           (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
  46.               by calling the customed HAL_SPI_MspInit() API.
  47.      [..]
  48.        Circular mode restriction:
  49.       (#) The DMA circular mode cannot be used when the SPI is configured in these modes:
  50.           (##) Master 2Lines RxOnly
  51.           (##) Master 1Line Rx
  52.       (#) The CRC feature is not managed when the DMA circular mode is enabled
  53.       (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
  54.           the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
  55.  
  56.   @endverbatim
  57.   ******************************************************************************
  58.   * @attention
  59.   *
  60.   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  61.   *
  62.   * Redistribution and use in source and binary forms, with or without modification,
  63.   * are permitted provided that the following conditions are met:
  64.   *   1. Redistributions of source code must retain the above copyright notice,
  65.   *      this list of conditions and the following disclaimer.
  66.   *   2. Redistributions in binary form must reproduce the above copyright notice,
  67.   *      this list of conditions and the following disclaimer in the documentation
  68.   *      and/or other materials provided with the distribution.
  69.   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  70.   *      may be used to endorse or promote products derived from this software
  71.   *      without specific prior written permission.
  72.   *
  73.   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  74.   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  75.   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  76.   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  77.   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  78.   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  79.   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  80.   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  81.   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  82.   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  83.   *
  84.   ******************************************************************************
  85.   */
  86.  
  87. /*
  88.     Using the HAL it is not possible to reach all supported SPI frequency with the differents SPI Modes,
  89.     the following table resume the max SPI frequency reached with data size 8bits/16bits,
  90.     according to frequency used on APBx Peripheral Clock (fPCLK) used by the SPI instance :
  91.  
  92.     For 8 bits SPI data size transfers :
  93.    +--------------------------------------------------------------------------------------------------+
  94.    |         |                | 2Lines Fullduplex     |     2Lines RxOnly     |        1Line          |
  95.    | Process | Tranfert mode  |-----------------------|-----------------------|-----------------------|
  96.    |         |                |  Master   |  Slave    |  Master   |  Slave    |  Master   |  Slave    |
  97.    |==================================================================================================|
  98.    |    T    |     Polling    |  fPCLK/8  | fPCLK/8   |    NA     |    NA     |    NA     |    NA     |
  99.    |    X    |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  100.    |    /    |     Interrupt  |  fPCLK/32 | fPCLK/32  |    NA     |    NA     |    NA     |    NA     |
  101.    |    R    |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  102.    |    X    |       DMA      |  fPCLK/2  | fPCLK/4   |    NA     |    NA     |    NA     |    NA     |
  103.    |=========|================|===========|===========|===========|===========|===========|===========|
  104.    |         |     Polling    |  fPCLK/4  | fPCLK/8   | fPCLK/128 | fPCLK/16  | fPCLK/128 | fPCLK/8   |
  105.    |         |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  106.    |    R    |     Interrupt  |  fPCLK/32 | fPCLK/16  | fPCLK/128 | fPCLK/16  | fPCLK/128 | fPCLK/16  |
  107.    |    X    |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  108.    |         |       DMA      |  fPCLK/2  |  fPCLK/2  | fPCLK/128 | fPCLK/16  | fPCLK/128 | fPCLK/2   |
  109.    |=========|================|===========|===========|===========|===========|===========|===========|
  110.    |         |     Polling    |  fPCLK/4  |  fPCLK/4  |    NA     |    NA     |  fPCLK/4  | fPCLK/64  |
  111.    |         |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  112.    |    T    |     Interrupt  |  fPCLK/8  | fPCLK/16  |    NA     |    NA     |  fPCLK/8  | fPCLK/128 |
  113.    |    X    |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  114.    |         |       DMA      |  fPCLK/2  |  fPCLK/4  |    NA     |    NA     |  fPCLK/2  | fPCLK/64  |
  115.    +--------------------------------------------------------------------------------------------------+
  116.  
  117.     For 16 bits SPI data size transfers :
  118.    +--------------------------------------------------------------------------------------------------+
  119.    |         |                | 2Lines Fullduplex     |     2Lines RxOnly     |        1Line          |
  120.    | Process | Tranfert mode  |-----------------------|-----------------------|-----------------------|
  121.    |         |                |  Master   |  Slave    |  Master   |  Slave    |  Master   |  Slave    |
  122.    |==================================================================================================|
  123.    |    T    |     Polling    |  fPCLK/2  | fPCLK/4   |    NA     |    NA     |    NA     |    NA     |
  124.    |    X    |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  125.    |    /    |     Interrupt  |  fPCLK/16 | fPCLK/16  |    NA     |    NA     |    NA     |    NA     |
  126.    |    R    |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  127.    |    X    |       DMA      |  fPCLK/2  | fPCLK/4   |    NA     |    NA     |    NA     |    NA     |
  128.    |=========|================|===========|===========|===========|===========|===========|===========|
  129.    |         |     Polling    |  fPCLK/2  |  fPCLK/4  | fPCLK/64  | fPCLK/8   | fPCLK/64  | fPCLK/4   |
  130.    |         |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  131.    |    R    |     Interrupt  |  fPCLK/16 |  fPCLK/8  | fPCLK/128 | fPCLK/8   | fPCLK/128 | fPCLK/8   |
  132.    |    X    |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  133.    |         |       DMA      |  fPCLK/2  |  fPCLK/2  | fPCLK/128 | fPCLK/8   | fPCLK/128 | fPCLK/2   |
  134.    |=========|================|===========|===========|===========|===========|===========|===========|
  135.    |         |     Polling    |  fPCLK/2  |  fPCLK/4  |    NA     |    NA     |  fPCLK/2  | fPCLK/64  |
  136.    |         |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  137.    |    T    |     Interrupt  |  fPCLK/4  |  fPCLK/8  |    NA     |    NA     |  fPCLK/4  | fPCLK/256 |
  138.    |    X    |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  139.    |         |       DMA      |  fPCLK/2  |  fPCLK/4  |    NA     |    NA     |  fPCLK/2  | fPCLK/32  |
  140.    +--------------------------------------------------------------------------------------------------+
  141.  
  142.   note:
  143.     The max SPI frequency depend on SPI data size (8bits, 16bits),
  144.     SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, IT, DMA).
  145.  
  146.   note:
  147.     TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and HAL_SPI_TransmitReceive_DMA()
  148.     RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA()
  149.     TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA()
  150.  
  151. */
  152.  
  153. /* Includes ------------------------------------------------------------------*/
  154. #include "stm32f1xx_hal.h"
  155.  
  156. /** @addtogroup STM32F1xx_HAL_Driver
  157.   * @{
  158.   */
  159.  
  160. /** @defgroup SPI SPI
  161.   * @brief SPI HAL module driver
  162.   * @{
  163.   */
  164.  
  165. #ifdef HAL_SPI_MODULE_ENABLED
  166.  
  167. /* Private typedef -----------------------------------------------------------*/
  168. /* Private define ------------------------------------------------------------*/
  169. /** @defgroup SPI_Private_Constants SPI Private Constants
  170.   * @{
  171.   */
  172. #define SPI_TIMEOUT_VALUE  10
  173. /**
  174.   * @}
  175.   */
  176.  
  177. /* Private macro -------------------------------------------------------------*/
  178. /* Private variables ---------------------------------------------------------*/
  179. /* Private function prototypes -----------------------------------------------*/
  180. /** @defgroup SPI_Private_Functions SPI Private Functions
  181.   * @{
  182.   */
  183. static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi);
  184. static void SPI_TxISR(SPI_HandleTypeDef *hspi);
  185. static void SPI_RxCloseIRQHandler(SPI_HandleTypeDef *hspi);
  186. static void SPI_2LinesRxISR(SPI_HandleTypeDef *hspi);
  187. static void SPI_RxISR(SPI_HandleTypeDef *hspi);
  188. static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma);
  189. static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
  190. static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma);
  191. static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma);
  192. static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma);
  193. static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma);
  194. static void SPI_DMAError(DMA_HandleTypeDef *hdma);
  195. static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
  196. /**
  197.   * @}
  198.   */
  199.  
  200. /* Exported functions ---------------------------------------------------------*/
  201.  
  202. /** @defgroup SPI_Exported_Functions SPI Exported Functions
  203.   * @{
  204.   */
  205.  
  206. /** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
  207.  *  @brief    Initialization and Configuration functions
  208.  *
  209. @verbatim
  210.  ===============================================================================
  211.               ##### Initialization and de-initialization functions #####
  212.  ===============================================================================
  213.     [..]  This subsection provides a set of functions allowing to initialize and
  214.           de-initialiaze the SPIx peripheral:
  215.  
  216.       (+) User must implement HAL_SPI_MspInit() function in which he configures
  217.           all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
  218.  
  219.       (+) Call the function HAL_SPI_Init() to configure the selected device with
  220.           the selected configuration:
  221.         (++) Mode
  222.         (++) Direction
  223.         (++) Data Size
  224.         (++) Clock Polarity and Phase
  225.         (++) NSS Management
  226.         (++) BaudRate Prescaler
  227.         (++) FirstBit
  228.         (++) TIMode
  229.         (++) CRC Calculation
  230.         (++) CRC Polynomial if CRC enabled
  231.  
  232.       (+) Call the function HAL_SPI_DeInit() to restore the default configuration
  233.           of the selected SPIx periperal.      
  234.  
  235. @endverbatim
  236.   * @{
  237.   */
  238.  
  239. /**
  240.   * @brief  Initializes the SPI according to the specified parameters
  241.   *         in the SPI_InitTypeDef and create the associated handle.
  242.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  243.   *                the configuration information for SPI module.
  244.   * @retval HAL status
  245.   */
  246. __weak HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
  247. {
  248.   /* Check the SPI handle allocation */
  249.   if(hspi == NULL)
  250.   {
  251.     return HAL_ERROR;
  252.   }
  253.  
  254.   /* Check the parameters */
  255.   assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
  256.   assert_param(IS_SPI_MODE(hspi->Init.Mode));
  257.   assert_param(IS_SPI_DIRECTION_MODE(hspi->Init.Direction));
  258.   assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
  259.   assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
  260.   assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
  261.   assert_param(IS_SPI_NSS(hspi->Init.NSS));
  262.   assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
  263.   assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
  264.   assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
  265.   assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
  266.   assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
  267.  
  268.   if(hspi->State == HAL_SPI_STATE_RESET)
  269.   {
  270.     /* Allocate lock resource and initialize it */
  271.     hspi->Lock = HAL_UNLOCKED;
  272.    
  273.     /* Init the low level hardware : GPIO, CLOCK, NVIC... */
  274.     HAL_SPI_MspInit(hspi);
  275.   }
  276.  
  277.   hspi->State = HAL_SPI_STATE_BUSY;
  278.  
  279.   /* Disble the selected SPI peripheral */
  280.   __HAL_SPI_DISABLE(hspi);
  281.  
  282.   /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
  283.   /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
  284.   Communication speed, First bit and CRC calculation state */
  285.   WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize |
  286.                                   hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
  287.                                   hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit  | hspi->Init.CRCCalculation) );
  288.  
  289.   /* Configure : NSS management */
  290.   WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16) & SPI_CR2_SSOE) | hspi->Init.TIMode));
  291.  
  292.   /*---------------------------- SPIx CRCPOLY Configuration ------------------*/
  293.   /* Configure : CRC Polynomial */
  294.   WRITE_REG(hspi->Instance->CRCPR, hspi->Init.CRCPolynomial);
  295.  
  296.   hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  297.   hspi->State = HAL_SPI_STATE_READY;
  298.  
  299.   return HAL_OK;
  300. }
  301.  
  302. /**
  303.   * @brief  DeInitializes the SPI peripheral
  304.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  305.   *                the configuration information for SPI module.
  306.   * @retval HAL status
  307.   */
  308. HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
  309. {
  310.   /* Check the SPI handle allocation */
  311.   if(hspi == NULL)
  312.   {
  313.     return HAL_ERROR;
  314.   }
  315.  
  316.   hspi->State = HAL_SPI_STATE_BUSY;
  317.  
  318.   /* Disable the SPI Peripheral Clock */
  319.   __HAL_SPI_DISABLE(hspi);
  320.  
  321.   /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
  322.   HAL_SPI_MspDeInit(hspi);
  323.  
  324.   hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  325.   hspi->State = HAL_SPI_STATE_RESET;
  326.  
  327.   /* Release Lock */
  328.   __HAL_UNLOCK(hspi);
  329.  
  330.   return HAL_OK;
  331. }
  332.  
  333. /**
  334.   * @brief SPI MSP Init
  335.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  336.   *               the configuration information for SPI module.
  337.   * @retval None
  338.   */
  339.  __weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
  340.  {
  341.   /* Prevent unused argument(s) compilation warning */
  342.   UNUSED(hspi);
  343.    /* NOTE : This function Should not be modified, when the callback is needed,
  344.              the HAL_SPI_MspInit could be implenetd in the user file
  345.    */
  346. }
  347.  
  348. /**
  349.   * @brief SPI MSP DeInit
  350.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  351.   *               the configuration information for SPI module.
  352.   * @retval None
  353.   */
  354.  __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
  355. {
  356.   /* Prevent unused argument(s) compilation warning */
  357.   UNUSED(hspi);
  358.   /* NOTE : This function Should not be modified, when the callback is needed,
  359.             the HAL_SPI_MspDeInit could be implenetd in the user file
  360.    */
  361. }
  362.  
  363. /**
  364.   * @}
  365.   */
  366.  
  367. /** @defgroup SPI_Exported_Functions_Group2 IO operation functions
  368.  *  @brief   Data transfers functions
  369.  *
  370. @verbatim
  371.   ==============================================================================
  372.                       ##### IO operation functions #####
  373.  ===============================================================================
  374.     This subsection provides a set of functions allowing to manage the SPI
  375.     data transfers.
  376.  
  377.     [..] The SPI supports master and slave mode :
  378.  
  379.     (#) There are two modes of transfer:
  380.        (++) Blocking mode: The communication is performed in polling mode.
  381.             The HAL status of all data processing is returned by the same function
  382.             after finishing transfer.
  383.        (++) No-Blocking mode: The communication is performed using Interrupts
  384.             or DMA, These APIs return the HAL status.
  385.             The end of the data processing will be indicated through the
  386.             dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
  387.             using DMA mode.
  388.             The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
  389.             will be executed respectivelly at the end of the transmit or Receive process
  390.             The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
  391.  
  392.     (#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either Interrupt or DMA)
  393.         exist for 1Line (simplex) and 2Lines (full duplex) modes.
  394.  
  395. @endverbatim
  396.   * @{
  397.   */
  398.  
  399. /**
  400.   * @brief  Transmit an amount of data in blocking mode
  401.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  402.   *                the configuration information for SPI module.
  403.   * @param  pData: pointer to data buffer
  404.   * @param  Size: amount of data to be sent
  405.   * @param  Timeout: Timeout duration
  406.   * @retval HAL status
  407.   */
  408. HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  409. {
  410.  
  411.   if(hspi->State == HAL_SPI_STATE_READY)
  412.   {
  413.     if((pData == NULL ) || (Size == 0))
  414.     {
  415.       return  HAL_ERROR;
  416.     }
  417.  
  418.     /* Check the parameters */
  419.     assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  420.  
  421.     /* Process Locked */
  422.     __HAL_LOCK(hspi);
  423.  
  424.     /* Configure communication */
  425.     hspi->State = HAL_SPI_STATE_BUSY_TX;
  426.     hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
  427.  
  428.     hspi->pTxBuffPtr  = pData;
  429.     hspi->TxXferSize  = Size;
  430.     hspi->TxXferCount = Size;
  431.  
  432.     /*Init field not used in handle to zero */
  433.     hspi->TxISR = 0;
  434.     hspi->RxISR = 0;
  435.     hspi->pRxBuffPtr  = NULL;
  436.     hspi->RxXferSize  = 0;
  437.     hspi->RxXferCount = 0;
  438.  
  439.     /* Reset CRC Calculation */
  440.     if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  441.     {
  442.       SPI_RESET_CRC(hspi);
  443.     }
  444.  
  445.     if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  446.     {
  447.       /* Configure communication direction : 1Line */
  448.       SPI_1LINE_TX(hspi);
  449.     }
  450.  
  451.     /* Check if the SPI is already enabled */
  452.     if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  453.     {
  454.       /* Enable SPI peripheral */
  455.       __HAL_SPI_ENABLE(hspi);
  456.     }
  457.  
  458.     /* Transmit data in 8 Bit mode */
  459.     if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  460.     {
  461.       if((hspi->Init.Mode == SPI_MODE_SLAVE)|| (hspi->TxXferCount == 0x01))
  462.       {
  463.         hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  464.         hspi->TxXferCount--;
  465.       }
  466.  
  467.       while(hspi->TxXferCount > 0)
  468.       {
  469.         /* Wait until TXE flag is set to send data */
  470.         if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  471.         {
  472.           return HAL_TIMEOUT;
  473.         }
  474.         hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  475.         hspi->TxXferCount--;
  476.       }
  477.       /* Enable CRC Transmission */
  478.       if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  479.       {
  480.         SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  481.       }
  482.     }
  483.     /* Transmit data in 16 Bit mode */
  484.     else
  485.     {
  486.       if((hspi->Init.Mode == SPI_MODE_SLAVE) || (hspi->TxXferCount == 0x01))
  487.       {
  488.         hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  489.         hspi->pTxBuffPtr+=2;
  490.         hspi->TxXferCount--;
  491.       }
  492.  
  493.       while(hspi->TxXferCount > 0)
  494.       {
  495.         /* Wait until TXE flag is set to send data */
  496.         if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  497.         {
  498.           return HAL_TIMEOUT;
  499.         }
  500.         hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  501.         hspi->pTxBuffPtr+=2;
  502.         hspi->TxXferCount--;
  503.       }
  504.       /* Enable CRC Transmission */
  505.       if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  506.       {
  507.         SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  508.       }
  509.     }
  510.  
  511.     /* Wait until TXE flag is set to send data */
  512.     if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  513.     {
  514.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  515.       return HAL_TIMEOUT;
  516.     }
  517.  
  518.     /* Wait until Busy flag is reset before disabling SPI */
  519.     if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
  520.     {
  521.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  522.       return HAL_TIMEOUT;
  523.     }
  524.  
  525.     /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
  526.     if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
  527.     {
  528.       __HAL_SPI_CLEAR_OVRFLAG(hspi);
  529.     }
  530.  
  531.     hspi->State = HAL_SPI_STATE_READY;
  532.  
  533.     /* Process Unlocked */
  534.     __HAL_UNLOCK(hspi);
  535.  
  536.     return HAL_OK;
  537.   }
  538.   else
  539.   {
  540.     return HAL_BUSY;
  541.   }
  542. }
  543.  
  544. /**
  545.   * @brief  Receive an amount of data in blocking mode
  546.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  547.   *                the configuration information for SPI module.
  548.   * @param  pData: pointer to data buffer
  549.   * @param  Size: amount of data to be sent
  550.   * @param  Timeout: Timeout duration
  551.   * @retval HAL status
  552.   */
  553. HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  554. {
  555.   __IO uint16_t tmpreg = 0;
  556.  
  557.   if(hspi->State == HAL_SPI_STATE_READY)
  558.   {
  559.     if((pData == NULL ) || (Size == 0))
  560.     {
  561.       return  HAL_ERROR;
  562.     }
  563.  
  564.     /* Process Locked */
  565.     __HAL_LOCK(hspi);
  566.  
  567.     /* Configure communication */
  568.     hspi->State       = HAL_SPI_STATE_BUSY_RX;
  569.     hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
  570.  
  571.     hspi->pRxBuffPtr  = pData;
  572.     hspi->RxXferSize  = Size;
  573.     hspi->RxXferCount = Size;
  574.  
  575.     /*Init field not used in handle to zero */
  576.     hspi->RxISR = 0;
  577.     hspi->TxISR = 0;
  578.     hspi->pTxBuffPtr  = NULL;
  579.     hspi->TxXferSize  = 0;
  580.     hspi->TxXferCount = 0;
  581.  
  582.     /* Configure communication direction : 1Line */
  583.     if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  584.     {
  585.       SPI_1LINE_RX(hspi);
  586.     }
  587.  
  588.     /* Reset CRC Calculation */
  589.     if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  590.     {
  591.       SPI_RESET_CRC(hspi);
  592.     }
  593.    
  594.     if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
  595.     {
  596.       /* Process Unlocked */
  597.       __HAL_UNLOCK(hspi);
  598.  
  599.       /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  600.       return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
  601.     }
  602.  
  603.     /* Check if the SPI is already enabled */
  604.     if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  605.     {
  606.       /* Enable SPI peripheral */
  607.       __HAL_SPI_ENABLE(hspi);
  608.     }
  609.  
  610.     /* Receive data in 8 Bit mode */
  611.     if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  612.     {
  613.       while(hspi->RxXferCount > 1)
  614.       {
  615.         /* Wait until RXNE flag is set */
  616.         if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  617.         {
  618.           return HAL_TIMEOUT;
  619.         }
  620.  
  621.         (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  622.         hspi->RxXferCount--;
  623.       }
  624.       /* Enable CRC Reception */
  625.       if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  626.       {
  627.         SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  628.       }
  629.     }
  630.     /* Receive data in 16 Bit mode */
  631.     else
  632.     {
  633.       while(hspi->RxXferCount > 1)
  634.       {
  635.         /* Wait until RXNE flag is set to read data */
  636.         if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  637.         {
  638.           return HAL_TIMEOUT;
  639.         }
  640.  
  641.         *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  642.         hspi->pRxBuffPtr+=2;
  643.         hspi->RxXferCount--;
  644.       }
  645.       /* Enable CRC Reception */
  646.       if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  647.       {
  648.         SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  649.       }
  650.     }
  651.  
  652.     /* Wait until RXNE flag is set */
  653.     if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  654.     {
  655.       return HAL_TIMEOUT;
  656.     }
  657.  
  658.     /* Receive last data in 8 Bit mode */
  659.     if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  660.     {
  661.       (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  662.     }
  663.     /* Receive last data in 16 Bit mode */
  664.     else
  665.     {
  666.       *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  667.       hspi->pRxBuffPtr+=2;
  668.     }
  669.     hspi->RxXferCount--;
  670.  
  671.     /* If CRC computation is enabled */
  672.     if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  673.     {
  674.       /* Wait until RXNE flag is set: CRC Received */
  675.       if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  676.       {
  677.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  678.         return HAL_TIMEOUT;
  679.       }
  680.  
  681.       /* Read CRC to clear RXNE flag */
  682.       tmpreg = hspi->Instance->DR;
  683.       UNUSED(tmpreg);
  684.     }
  685.    
  686.     if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  687.     {
  688.       /* Disable SPI peripheral */
  689.       __HAL_SPI_DISABLE(hspi);
  690.     }
  691.  
  692.     hspi->State = HAL_SPI_STATE_READY;
  693.  
  694.     /* Check if CRC error occurred */
  695.     if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
  696.     {  
  697.       /* Check if CRC error is valid or not (workaround to be applied or not) */
  698.       if (SPI_ISCRCErrorValid(hspi) == SPI_VALID_CRC_ERROR)
  699.       {
  700.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  701.  
  702.         /* Reset CRC Calculation */
  703.         SPI_RESET_CRC(hspi);
  704.  
  705.         /* Process Unlocked */
  706.         __HAL_UNLOCK(hspi);
  707.  
  708.         return HAL_ERROR;
  709.       }
  710.       else
  711.       {
  712.         __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  713.       }
  714.     }
  715.  
  716.     /* Process Unlocked */
  717.     __HAL_UNLOCK(hspi);
  718.  
  719.     return HAL_OK;
  720.   }
  721.   else
  722.   {
  723.     return HAL_BUSY;
  724.   }
  725. }
  726.  
  727. /**
  728.   * @brief  Transmit and Receive an amount of data in blocking mode
  729.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  730.   *                the configuration information for SPI module.
  731.   * @param  pTxData: pointer to transmission data buffer
  732.   * @param  pRxData: pointer to reception data buffer to be
  733.   * @param  Size: amount of data to be sent
  734.   * @param  Timeout: Timeout duration
  735.   * @retval HAL status
  736.   */
  737. HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
  738. {
  739.   __IO uint16_t tmpreg = 0;
  740.  
  741.   if((hspi->State == HAL_SPI_STATE_READY) || (hspi->State == HAL_SPI_STATE_BUSY_RX))
  742.   {
  743.     if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
  744.     {
  745.       return  HAL_ERROR;
  746.     }
  747.  
  748.     /* Check the parameters */
  749.     assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  750.  
  751.     /* Process Locked */
  752.     __HAL_LOCK(hspi);
  753.  
  754.     /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  755.     if(hspi->State == HAL_SPI_STATE_READY)
  756.     {
  757.       hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  758.     }
  759.  
  760.      /* Configure communication */  
  761.     hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
  762.  
  763.     hspi->pRxBuffPtr  = pRxData;
  764.     hspi->RxXferSize  = Size;
  765.     hspi->RxXferCount = Size;  
  766.    
  767.     hspi->pTxBuffPtr  = pTxData;
  768.     hspi->TxXferSize  = Size;
  769.     hspi->TxXferCount = Size;
  770.  
  771.     /*Init field not used in handle to zero */
  772.     hspi->RxISR = 0;
  773.     hspi->TxISR = 0;
  774.  
  775.     /* Reset CRC Calculation */
  776.     if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  777.     {
  778.       SPI_RESET_CRC(hspi);
  779.     }
  780.  
  781.     /* Check if the SPI is already enabled */
  782.     if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  783.     {
  784.       /* Enable SPI peripheral */
  785.       __HAL_SPI_ENABLE(hspi);
  786.     }
  787.  
  788.     /* Transmit and Receive data in 16 Bit mode */
  789.     if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
  790.     {
  791.       if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
  792.       {
  793.         hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  794.         hspi->pTxBuffPtr+=2;
  795.         hspi->TxXferCount--;
  796.       }
  797.       if(hspi->TxXferCount == 0)
  798.       {
  799.         /* Enable CRC Transmission */
  800.         if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  801.         {
  802.           SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  803.         }
  804.  
  805.         /* Wait until RXNE flag is set */
  806.         if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  807.         {
  808.           return HAL_TIMEOUT;
  809.         }
  810.  
  811.         *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  812.         hspi->pRxBuffPtr+=2;
  813.         hspi->RxXferCount--;
  814.       }
  815.       else
  816.       {
  817.         while(hspi->TxXferCount > 0)
  818.         {
  819.           /* Wait until TXE flag is set to send data */
  820.           if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  821.           {
  822.             return HAL_TIMEOUT;
  823.           }
  824.  
  825.           hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  826.           hspi->pTxBuffPtr+=2;
  827.           hspi->TxXferCount--;
  828.  
  829.           /* Enable CRC Transmission */
  830.           if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
  831.           {
  832.             SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  833.           }
  834.  
  835.           /* Wait until RXNE flag is set */
  836.           if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  837.           {
  838.             return HAL_TIMEOUT;
  839.           }
  840.  
  841.           *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  842.           hspi->pRxBuffPtr+=2;
  843.           hspi->RxXferCount--;
  844.         }
  845.         /* Receive the last byte */
  846.         if(hspi->Init.Mode == SPI_MODE_SLAVE)
  847.         {
  848.           /* Wait until RXNE flag is set */
  849.           if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  850.           {
  851.             return HAL_TIMEOUT;
  852.           }
  853.          
  854.           *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  855.           hspi->pRxBuffPtr+=2;
  856.           hspi->RxXferCount--;
  857.         }
  858.       }
  859.     }
  860.     /* Transmit and Receive data in 8 Bit mode */
  861.     else
  862.     {
  863.       if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
  864.       {
  865.         hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  866.         hspi->TxXferCount--;
  867.       }
  868.       if(hspi->TxXferCount == 0)
  869.       {
  870.         /* Enable CRC Transmission */
  871.         if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  872.         {
  873.           SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  874.         }
  875.  
  876.         /* Wait until RXNE flag is set */
  877.         if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  878.         {
  879.           return HAL_TIMEOUT;
  880.         }
  881.  
  882.         (*hspi->pRxBuffPtr) = hspi->Instance->DR;
  883.         hspi->RxXferCount--;
  884.       }
  885.       else
  886.       {
  887.         while(hspi->TxXferCount > 0)
  888.         {
  889.           /* Wait until TXE flag is set to send data */
  890.           if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  891.           {
  892.             return HAL_TIMEOUT;
  893.           }
  894.  
  895.           hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  896.           hspi->TxXferCount--;
  897.  
  898.           /* Enable CRC Transmission */
  899.           if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
  900.           {
  901.             SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  902.           }
  903.  
  904.           /* Wait until RXNE flag is set */
  905.           if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  906.           {
  907.             return HAL_TIMEOUT;
  908.           }
  909.  
  910.           (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  911.           hspi->RxXferCount--;
  912.         }
  913.         if(hspi->Init.Mode == SPI_MODE_SLAVE)
  914.         {
  915.           /* Wait until RXNE flag is set */
  916.           if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  917.           {
  918.             return HAL_TIMEOUT;
  919.           }
  920.          
  921.           (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  922.           hspi->RxXferCount--;
  923.         }
  924.       }
  925.     }
  926.  
  927.     /* Read CRC from DR to close CRC calculation process */
  928.     if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  929.     {
  930.       /* Wait until RXNE flag is set */
  931.       if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  932.       {
  933.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  934.         return HAL_TIMEOUT;
  935.       }
  936.       /* Read CRC */
  937.       tmpreg = hspi->Instance->DR;
  938.       UNUSED(tmpreg);
  939.     }
  940.  
  941.     /* Wait until Busy flag is reset before disabling SPI */
  942.     if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
  943.     {
  944.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  945.       return HAL_TIMEOUT;
  946.     }
  947.    
  948.     hspi->State = HAL_SPI_STATE_READY;
  949.  
  950.     /* Check if CRC error occurred */
  951.     if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
  952.     {
  953.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  954.  
  955.       SPI_RESET_CRC(hspi);
  956.  
  957.       /* Process Unlocked */
  958.       __HAL_UNLOCK(hspi);
  959.      
  960.       return HAL_ERROR;
  961.     }
  962.  
  963.     /* Process Unlocked */
  964.     __HAL_UNLOCK(hspi);
  965.  
  966.     return HAL_OK;
  967.   }
  968.   else
  969.   {
  970.     return HAL_BUSY;
  971.   }
  972. }
  973.  
  974. /**
  975.   * @brief  Transmit an amount of data in no-blocking mode with Interrupt
  976.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  977.   *                the configuration information for SPI module.
  978.   * @param  pData: pointer to data buffer
  979.   * @param  Size: amount of data to be sent
  980.   * @retval HAL status
  981.   */
  982. HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  983. {
  984.   if(hspi->State == HAL_SPI_STATE_READY)
  985.   {
  986.     if((pData == NULL) || (Size == 0))
  987.     {
  988.       return  HAL_ERROR;
  989.     }
  990.  
  991.     /* Check the parameters */
  992.     assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  993.  
  994.     /* Process Locked */
  995.     __HAL_LOCK(hspi);
  996.  
  997.     /* Configure communication */
  998.     hspi->State        = HAL_SPI_STATE_BUSY_TX;
  999.     hspi->ErrorCode    = HAL_SPI_ERROR_NONE;
  1000.  
  1001.     hspi->TxISR        = &SPI_TxISR;
  1002.     hspi->pTxBuffPtr   = pData;
  1003.     hspi->TxXferSize   = Size;
  1004.     hspi->TxXferCount  = Size;
  1005.  
  1006.     /*Init field not used in handle to zero */
  1007.     hspi->RxISR        = 0;
  1008.     hspi->pRxBuffPtr   = NULL;
  1009.     hspi->RxXferSize   = 0;
  1010.     hspi->RxXferCount  = 0;
  1011.  
  1012.     /* Configure communication direction : 1Line */
  1013.     if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1014.     {
  1015.       SPI_1LINE_TX(hspi);
  1016.     }
  1017.  
  1018.     /* Reset CRC Calculation */
  1019.     if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1020.     {
  1021.       SPI_RESET_CRC(hspi);
  1022.     }
  1023.  
  1024.     if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
  1025.     {
  1026.       __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE));
  1027.     }
  1028.     else
  1029.     {
  1030.       /* Enable TXE and ERR interrupt */
  1031.       __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
  1032.     }
  1033.     /* Process Unlocked */
  1034.     __HAL_UNLOCK(hspi);
  1035.  
  1036.     /* Check if the SPI is already enabled */
  1037.     if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  1038.     {
  1039.       /* Enable SPI peripheral */
  1040.       __HAL_SPI_ENABLE(hspi);
  1041.     }
  1042.  
  1043.     return HAL_OK;
  1044.   }
  1045.   else
  1046.   {
  1047.     return HAL_BUSY;
  1048.   }
  1049. }
  1050.  
  1051. /**
  1052.   * @brief  Receive an amount of data in no-blocking mode with Interrupt
  1053.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1054.   *                the configuration information for SPI module.
  1055.   * @param  pData: pointer to data buffer
  1056.   * @param  Size: amount of data to be sent
  1057.   * @retval HAL status
  1058.   */
  1059. HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  1060. {
  1061.   if(hspi->State == HAL_SPI_STATE_READY)
  1062.   {
  1063.     if((pData == NULL) || (Size == 0))
  1064.     {
  1065.       return  HAL_ERROR;
  1066.     }
  1067.  
  1068.     /* Process Locked */
  1069.     __HAL_LOCK(hspi);
  1070.  
  1071.     /* Configure communication */
  1072.     hspi->State        = HAL_SPI_STATE_BUSY_RX;
  1073.     hspi->ErrorCode    = HAL_SPI_ERROR_NONE;
  1074.  
  1075.     hspi->RxISR        = &SPI_RxISR;
  1076.     hspi->pRxBuffPtr   = pData;
  1077.     hspi->RxXferSize   = Size;
  1078.     hspi->RxXferCount  = Size ;
  1079.  
  1080.    /*Init field not used in handle to zero */
  1081.     hspi->TxISR        = 0;
  1082.     hspi->pTxBuffPtr   = NULL;
  1083.     hspi->TxXferSize   = 0;
  1084.     hspi->TxXferCount  = 0;
  1085.  
  1086.     /* Configure communication direction : 1Line */
  1087.     if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1088.     {
  1089.       SPI_1LINE_RX(hspi);
  1090.     }
  1091.     else if((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
  1092.     {
  1093.       /* Process Unlocked */
  1094.       __HAL_UNLOCK(hspi);
  1095.  
  1096.       /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  1097.       return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
  1098.     }
  1099.  
  1100.     /* Reset CRC Calculation */
  1101.     if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1102.     {
  1103.       SPI_RESET_CRC(hspi);
  1104.     }
  1105.  
  1106.     /* Enable TXE and ERR interrupt */
  1107.     __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
  1108.  
  1109.     /* Process Unlocked */
  1110.     __HAL_UNLOCK(hspi);
  1111.  
  1112.     /* Note : The SPI must be enabled after unlocking current process
  1113.               to avoid the risk of SPI interrupt handle execution before current
  1114.               process unlock */
  1115.  
  1116.     /* Check if the SPI is already enabled */
  1117.     if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  1118.     {
  1119.       /* Enable SPI peripheral */
  1120.       __HAL_SPI_ENABLE(hspi);
  1121.     }
  1122.  
  1123.     return HAL_OK;
  1124.   }
  1125.   else
  1126.   {
  1127.     return HAL_BUSY;
  1128.   }
  1129. }
  1130.  
  1131. /**
  1132.   * @brief  Transmit and Receive an amount of data in no-blocking mode with Interrupt
  1133.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1134.   *                the configuration information for SPI module.
  1135.   * @param  pTxData: pointer to transmission data buffer
  1136.   * @param  pRxData: pointer to reception data buffer to be
  1137.   * @param  Size: amount of data to be sent
  1138.   * @retval HAL status
  1139.   */
  1140. HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
  1141. {
  1142.  
  1143.   if((hspi->State == HAL_SPI_STATE_READY) || \
  1144.      ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
  1145.   {
  1146.     if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
  1147.     {
  1148.       return  HAL_ERROR;
  1149.     }
  1150.  
  1151.     /* Check the parameters */
  1152.     assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  1153.  
  1154.     /* Process locked */
  1155.     __HAL_LOCK(hspi);
  1156.  
  1157.     /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  1158.     if(hspi->State != HAL_SPI_STATE_BUSY_RX)
  1159.     {
  1160.       hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  1161.     }
  1162.  
  1163.     /* Configure communication */
  1164.     hspi->ErrorCode    = HAL_SPI_ERROR_NONE;
  1165.  
  1166.     hspi->TxISR = &SPI_TxISR;
  1167.     hspi->pTxBuffPtr   = pTxData;
  1168.     hspi->TxXferSize   = Size;
  1169.     hspi->TxXferCount  = Size;
  1170.  
  1171.     hspi->RxISR = &SPI_2LinesRxISR;
  1172.     hspi->pRxBuffPtr   = pRxData;
  1173.     hspi->RxXferSize   = Size;
  1174.     hspi->RxXferCount  = Size;
  1175.  
  1176.     /* Reset CRC Calculation */
  1177.     if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1178.     {
  1179.       SPI_RESET_CRC(hspi);
  1180.     }
  1181.  
  1182.     /* Enable TXE, RXNE and ERR interrupt */
  1183.     __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  1184.  
  1185.     /* Process Unlocked */
  1186.     __HAL_UNLOCK(hspi);
  1187.  
  1188.     /* Check if the SPI is already enabled */
  1189.     if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  1190.     {
  1191.       /* Enable SPI peripheral */
  1192.       __HAL_SPI_ENABLE(hspi);
  1193.     }
  1194.  
  1195.     return HAL_OK;
  1196.   }
  1197.   else
  1198.   {
  1199.     return HAL_BUSY;
  1200.   }
  1201. }
  1202.  
  1203. /**
  1204.   * @brief  Transmit an amount of data in no-blocking mode with DMA
  1205.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1206.   *                the configuration information for SPI module.
  1207.   * @param  pData: pointer to data buffer
  1208.   * @param  Size: amount of data to be sent
  1209.   * @retval HAL status
  1210.   */
  1211. HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  1212. {
  1213.   if(hspi->State == HAL_SPI_STATE_READY)
  1214.   {
  1215.     if((pData == NULL) || (Size == 0))
  1216.     {
  1217.       return  HAL_ERROR;
  1218.     }
  1219.  
  1220.     /* Check the parameters */
  1221.     assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  1222.  
  1223.     /* Process Locked */
  1224.     __HAL_LOCK(hspi);
  1225.  
  1226.     /* Configure communication */
  1227.     hspi->State       = HAL_SPI_STATE_BUSY_TX;
  1228.     hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
  1229.  
  1230.     hspi->pTxBuffPtr  = pData;
  1231.     hspi->TxXferSize  = Size;
  1232.     hspi->TxXferCount = Size;
  1233.  
  1234.     /*Init field not used in handle to zero */
  1235.     hspi->TxISR       = 0;
  1236.     hspi->RxISR       = 0;
  1237.     hspi->pRxBuffPtr  = NULL;
  1238.     hspi->RxXferSize  = 0;
  1239.     hspi->RxXferCount = 0;
  1240.  
  1241.     /* Configure communication direction : 1Line */
  1242.     if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1243.     {
  1244.       SPI_1LINE_TX(hspi);
  1245.     }
  1246.  
  1247.     /* Reset CRC Calculation */
  1248.     if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1249.     {
  1250.       SPI_RESET_CRC(hspi);
  1251.     }
  1252.  
  1253.     /* Set the SPI TxDMA Half transfer complete callback */
  1254.     hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
  1255.  
  1256.     /* Set the SPI TxDMA transfer complete callback */
  1257.     hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
  1258.  
  1259.     /* Set the DMA error callback */
  1260.     hspi->hdmatx->XferErrorCallback = SPI_DMAError;
  1261.  
  1262.     /* Enable the Tx DMA Channel */
  1263.     HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
  1264.  
  1265.     /* Enable Tx DMA Request */
  1266.     SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1267.  
  1268.     /* Process Unlocked */
  1269.     __HAL_UNLOCK(hspi);
  1270.  
  1271.     /* Check if the SPI is already enabled */
  1272.     if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  1273.     {
  1274.       /* Enable SPI peripheral */
  1275.       __HAL_SPI_ENABLE(hspi);
  1276.     }
  1277.  
  1278.     return HAL_OK;
  1279.   }
  1280.   else
  1281.   {
  1282.     return HAL_BUSY;
  1283.   }
  1284. }
  1285.  
  1286. /**
  1287.   * @brief  Receive an amount of data in no-blocking mode with DMA
  1288.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1289.   *                the configuration information for SPI module.
  1290.   * @param  pData: pointer to data buffer
  1291.   * @note  When the CRC feature is enabled the pData Length must be Size + 1.
  1292.   * @param  Size: amount of data to be sent
  1293.   * @retval HAL status
  1294.   */
  1295. HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  1296. {
  1297.   if(hspi->State == HAL_SPI_STATE_READY)
  1298.   {
  1299.     if((pData == NULL) || (Size == 0))
  1300.     {
  1301.       return  HAL_ERROR;
  1302.     }
  1303.  
  1304.     /* Process Locked */
  1305.     __HAL_LOCK(hspi);
  1306.  
  1307.     /* Configure communication */
  1308.     hspi->State       = HAL_SPI_STATE_BUSY_RX;
  1309.     hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
  1310.  
  1311.     hspi->pRxBuffPtr  = pData;
  1312.     hspi->RxXferSize  = Size;
  1313.     hspi->RxXferCount = Size;
  1314.  
  1315.     /*Init field not used in handle to zero */
  1316.     hspi->RxISR       = 0;
  1317.     hspi->TxISR       = 0;
  1318.     hspi->pTxBuffPtr  = NULL;
  1319.     hspi->TxXferSize  = 0;
  1320.     hspi->TxXferCount = 0;
  1321.  
  1322.     /* Configure communication direction : 1Line */
  1323.     if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1324.     {
  1325.       SPI_1LINE_RX(hspi);
  1326.     }
  1327.     else if((hspi->Init.Direction == SPI_DIRECTION_2LINES)&&(hspi->Init.Mode == SPI_MODE_MASTER))
  1328.     {
  1329.       /* Process Unlocked */
  1330.       __HAL_UNLOCK(hspi);
  1331.  
  1332.       /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  1333.       return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
  1334.     }
  1335.  
  1336.     /* Reset CRC Calculation */
  1337.     if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1338.     {
  1339.       SPI_RESET_CRC(hspi);
  1340.     }
  1341.  
  1342.     /* Set the SPI RxDMA Half transfer complete callback */
  1343.     hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
  1344.  
  1345.     /* Set the SPI Rx DMA transfer complete callback */
  1346.     hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
  1347.  
  1348.     /* Set the DMA error callback */
  1349.     hspi->hdmarx->XferErrorCallback = SPI_DMAError;
  1350.  
  1351.     /* Enable the Rx DMA Channel */
  1352.     HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
  1353.  
  1354.     /* Enable Rx DMA Request */  
  1355.     SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1356.  
  1357.     /* Process Unlocked */
  1358.     __HAL_UNLOCK(hspi);
  1359.  
  1360.     /* Check if the SPI is already enabled */
  1361.     if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  1362.     {
  1363.       /* Enable SPI peripheral */
  1364.       __HAL_SPI_ENABLE(hspi);
  1365.     }
  1366.  
  1367.     return HAL_OK;
  1368.   }
  1369.   else
  1370.   {
  1371.     return HAL_BUSY;
  1372.   }
  1373. }
  1374.  
  1375. /**
  1376.   * @brief  Transmit and Receive an amount of data in no-blocking mode with DMA
  1377.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1378.   *                the configuration information for SPI module.
  1379.   * @param  pTxData: pointer to transmission data buffer
  1380.   * @param  pRxData: pointer to reception data buffer
  1381.   * @note  When the CRC feature is enabled the pRxData Length must be Size + 1
  1382.   * @param  Size: amount of data to be sent
  1383.   * @retval HAL status
  1384.   */
  1385. HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
  1386. {
  1387.   if((hspi->State == HAL_SPI_STATE_READY) || \
  1388.      ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
  1389.   {
  1390.     if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
  1391.     {
  1392.       return  HAL_ERROR;
  1393.     }
  1394.  
  1395.     /* Check the parameters */
  1396.     assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  1397.    
  1398.     /* Process locked */
  1399.     __HAL_LOCK(hspi);
  1400.  
  1401.     /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  1402.     if(hspi->State != HAL_SPI_STATE_BUSY_RX)
  1403.     {
  1404.       hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  1405.     }
  1406.  
  1407.     /* Configure communication */
  1408.     hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
  1409.  
  1410.     hspi->pTxBuffPtr  = (uint8_t*)pTxData;
  1411.     hspi->TxXferSize  = Size;
  1412.     hspi->TxXferCount = Size;
  1413.  
  1414.     hspi->pRxBuffPtr  = (uint8_t*)pRxData;
  1415.     hspi->RxXferSize  = Size;
  1416.     hspi->RxXferCount = Size;
  1417.  
  1418.     /*Init field not used in handle to zero */
  1419.     hspi->RxISR = 0;
  1420.     hspi->TxISR = 0;
  1421.  
  1422.     /* Reset CRC Calculation */
  1423.     if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1424.     {
  1425.       SPI_RESET_CRC(hspi);
  1426.     }
  1427.  
  1428.     /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */
  1429.     if(hspi->State == HAL_SPI_STATE_BUSY_RX)
  1430.     {
  1431.       /* Set the SPI Rx DMA Half transfer complete callback */
  1432.       hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
  1433.      
  1434.       hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
  1435.     }
  1436.     else
  1437.     {
  1438.       /* Set the SPI Tx/Rx DMA Half transfer complete callback */
  1439.       hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
  1440.  
  1441.       hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt;
  1442.     }
  1443.  
  1444.     /* Set the DMA error callback */
  1445.     hspi->hdmarx->XferErrorCallback = SPI_DMAError;
  1446.  
  1447.     /* Enable the Rx DMA Channel */
  1448.     HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
  1449.  
  1450.     /* Enable Rx DMA Request */  
  1451.     SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1452.  
  1453.     /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
  1454.     is performed in DMA reception complete callback  */
  1455.     if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
  1456.     {
  1457.       /* Set the DMA error callback */
  1458.       hspi->hdmatx->XferErrorCallback = SPI_DMAError;
  1459.     }
  1460.     else
  1461.     {
  1462.       hspi->hdmatx->XferErrorCallback = NULL;
  1463.     }
  1464.    
  1465.     /* Enable the Tx DMA Channel */
  1466.     HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
  1467.  
  1468.     /* Check if the SPI is already enabled */
  1469.     if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  1470.     {
  1471.       /* Enable SPI peripheral */
  1472.       __HAL_SPI_ENABLE(hspi);
  1473.     }
  1474.  
  1475.     /* Enable Tx DMA Request */  
  1476.     SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1477.  
  1478.     /* Process Unlocked */
  1479.     __HAL_UNLOCK(hspi);
  1480.  
  1481.     return HAL_OK;
  1482.   }
  1483.   else
  1484.   {
  1485.     return HAL_BUSY;
  1486.   }
  1487. }
  1488.  
  1489.  
  1490. /**
  1491.   * @brief Pauses the DMA Transfer.
  1492.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1493.   *                the configuration information for the specified SPI module.
  1494.   * @retval HAL status
  1495.   */
  1496. HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
  1497. {
  1498.   /* Process Locked */
  1499.   __HAL_LOCK(hspi);
  1500.  
  1501.   /* Disable the SPI DMA Tx & Rx requests */
  1502.   CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1503.   CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1504.  
  1505.   /* Process Unlocked */
  1506.   __HAL_UNLOCK(hspi);
  1507.  
  1508.   return HAL_OK;
  1509. }
  1510.  
  1511. /**
  1512.   * @brief Resumes the DMA Transfer.
  1513.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1514.   *                the configuration information for the specified SPI module.
  1515.   * @retval HAL status
  1516.   */
  1517. HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
  1518. {
  1519.   /* Process Locked */
  1520.   __HAL_LOCK(hspi);
  1521.  
  1522.   /* Enable the SPI DMA Tx & Rx requests */
  1523.   SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1524.   SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1525.  
  1526.   /* Process Unlocked */
  1527.   __HAL_UNLOCK(hspi);
  1528.  
  1529.   return HAL_OK;
  1530. }
  1531.  
  1532. /**
  1533.   * @brief Stops the DMA Transfer.
  1534.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1535.   *                the configuration information for the specified SPI module.
  1536.   * @retval HAL status
  1537.   */
  1538. HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
  1539. {
  1540.   /* The Lock is not implemented on this API to allow the user application
  1541.      to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
  1542.      when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
  1543.      and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
  1544.      */
  1545.  
  1546.   /* Abort the SPI DMA tx Channel */
  1547.   if(hspi->hdmatx != NULL)
  1548.   {
  1549.     HAL_DMA_Abort(hspi->hdmatx);
  1550.   }
  1551.   /* Abort the SPI DMA rx Channel */
  1552.   if(hspi->hdmarx != NULL)
  1553.   {
  1554.     HAL_DMA_Abort(hspi->hdmarx);
  1555.   }
  1556.  
  1557.   /* Disable the SPI DMA Tx & Rx requests */
  1558.   CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1559.   CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1560.  
  1561.   hspi->State = HAL_SPI_STATE_READY;
  1562.  
  1563.   return HAL_OK;
  1564. }
  1565.  
  1566. /**
  1567.   * @brief  This function handles SPI interrupt request.
  1568.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1569.   *                the configuration information for SPI module.
  1570.   * @retval None
  1571.   */
  1572. void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
  1573. {
  1574.   /* SPI in mode Receiver and Overrun not occurred ---------------------------*/
  1575.   if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) == RESET))
  1576.   {
  1577.     hspi->RxISR(hspi);
  1578.     return;
  1579.   }
  1580.  
  1581.   /* SPI in mode Tramitter ---------------------------------------------------*/
  1582.   if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE) != RESET))
  1583.   {
  1584.     hspi->TxISR(hspi);
  1585.     return;
  1586.   }
  1587.  
  1588.   if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_ERR) != RESET)
  1589.   {
  1590.     /* SPI CRC error interrupt occurred ---------------------------------------*/
  1591.     if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1592.     {
  1593.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1594.       __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1595.     }
  1596.     /* SPI Mode Fault error interrupt occurred --------------------------------*/
  1597.     if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_MODF) != RESET)
  1598.     {
  1599.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
  1600.       __HAL_SPI_CLEAR_MODFFLAG(hspi);
  1601.     }
  1602.    
  1603.     /* SPI Overrun error interrupt occurred -----------------------------------*/
  1604.     if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) != RESET)
  1605.     {
  1606.       if(hspi->State != HAL_SPI_STATE_BUSY_TX)
  1607.       {
  1608.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
  1609.         __HAL_SPI_CLEAR_OVRFLAG(hspi);      
  1610.       }
  1611.     }
  1612.  
  1613.     /* Call the Error call Back in case of Errors */
  1614.     if(hspi->ErrorCode!=HAL_SPI_ERROR_NONE)
  1615.     {
  1616.       __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);
  1617.       hspi->State = HAL_SPI_STATE_READY;
  1618.       HAL_SPI_ErrorCallback(hspi);
  1619.     }
  1620.   }
  1621. }
  1622.  
  1623. /**
  1624.   * @brief Tx Transfer completed callbacks
  1625.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1626.   *                the configuration information for SPI module.
  1627.   * @retval None
  1628.   */
  1629. __weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
  1630. {
  1631.   /* Prevent unused argument(s) compilation warning */
  1632.   UNUSED(hspi);
  1633.   /* NOTE : This function Should not be modified, when the callback is needed,
  1634.             the HAL_SPI_TxCpltCallback could be implenetd in the user file
  1635.    */
  1636. }
  1637.  
  1638. /**
  1639.   * @brief Rx Transfer completed callbacks
  1640.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1641.   *                the configuration information for SPI module.
  1642.   * @retval None
  1643.   */
  1644. __weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
  1645. {
  1646.   /* Prevent unused argument(s) compilation warning */
  1647.   UNUSED(hspi);
  1648.   /* NOTE : This function Should not be modified, when the callback is needed,
  1649.             the HAL_SPI_RxCpltCallback() could be implenetd in the user file
  1650.    */
  1651. }
  1652.  
  1653. /**
  1654.   * @brief Tx and Rx Transfer completed callbacks
  1655.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1656.   *                the configuration information for SPI module.
  1657.   * @retval None
  1658.   */
  1659. __weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
  1660. {
  1661.   /* Prevent unused argument(s) compilation warning */
  1662.   UNUSED(hspi);
  1663.   /* NOTE : This function Should not be modified, when the callback is needed,
  1664.             the HAL_SPI_TxRxCpltCallback() could be implenetd in the user file
  1665.    */
  1666. }
  1667.  
  1668. /**
  1669.   * @brief Tx Half Transfer completed callbacks
  1670.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1671.   *                the configuration information for SPI module.
  1672.   * @retval None
  1673.   */
  1674. __weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1675. {
  1676.   /* Prevent unused argument(s) compilation warning */
  1677.   UNUSED(hspi);
  1678.   /* NOTE : This function Should not be modified, when the callback is needed,
  1679.             the HAL_SPI_TxHalfCpltCallback could be implenetd in the user file
  1680.    */
  1681. }
  1682.  
  1683. /**
  1684.   * @brief Rx Half Transfer completed callbacks
  1685.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1686.   *                the configuration information for SPI module.
  1687.   * @retval None
  1688.   */
  1689. __weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1690. {
  1691.   /* Prevent unused argument(s) compilation warning */
  1692.   UNUSED(hspi);
  1693.   /* NOTE : This function Should not be modified, when the callback is needed,
  1694.             the HAL_SPI_RxHalfCpltCallback() could be implenetd in the user file
  1695.    */
  1696. }
  1697.  
  1698. /**
  1699.   * @brief Tx and Rx Transfer completed callbacks
  1700.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1701.   *                the configuration information for SPI module.
  1702.   * @retval None
  1703.   */
  1704. __weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1705. {
  1706.   /* Prevent unused argument(s) compilation warning */
  1707.   UNUSED(hspi);
  1708.   /* NOTE : This function Should not be modified, when the callback is needed,
  1709.             the HAL_SPI_TxRxHalfCpltCallback() could be implenetd in the user file
  1710.    */
  1711. }
  1712.  
  1713. /**
  1714.   * @brief SPI error callbacks
  1715.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1716.   *                the configuration information for SPI module.
  1717.   * @retval None
  1718.   */
  1719.  __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
  1720. {
  1721.   /* Prevent unused argument(s) compilation warning */
  1722.   UNUSED(hspi);
  1723.   /* NOTE : - This function Should not be modified, when the callback is needed,
  1724.             the HAL_SPI_ErrorCallback() could be implenetd in the user file.
  1725.             - The ErrorCode parameter in the hspi handle is updated by the SPI processes
  1726.             and user can use HAL_SPI_GetError() API to check the latest error occurred.
  1727.    */
  1728. }
  1729.  
  1730. /**
  1731.   * @}
  1732.   */
  1733.  
  1734. /** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
  1735.   *  @brief   SPI control functions
  1736.   *
  1737. @verbatim
  1738.  ===============================================================================
  1739.                       ##### Peripheral State and Errors functions #####
  1740.  ===============================================================================  
  1741.     [..]
  1742.     This subsection provides a set of functions allowing to control the SPI.
  1743.      (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
  1744.      (+) HAL_SPI_GetError() check in run-time Errors occurring during communication
  1745. @endverbatim
  1746.   * @{
  1747.   */
  1748.  
  1749. /**
  1750.   * @brief  Return the SPI state
  1751.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1752.   *                the configuration information for SPI module.
  1753.   * @retval SPI state
  1754.   */
  1755. HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
  1756. {
  1757.   return hspi->State;
  1758. }
  1759.  
  1760. /**
  1761.   * @brief  Return the SPI error code
  1762.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1763.   *                the configuration information for SPI module.
  1764.   * @retval SPI Error Code
  1765.   */
  1766. uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
  1767. {
  1768.   return hspi->ErrorCode;
  1769. }
  1770.  
  1771. /**
  1772.   * @}
  1773.   */
  1774.  
  1775. /**
  1776.     * @}
  1777.     */
  1778.  
  1779.  
  1780.  
  1781. /** @addtogroup SPI_Private_Functions
  1782.     * @{
  1783.     */
  1784.  
  1785.  
  1786.   /**
  1787.   * @brief  Interrupt Handler to close Tx transfer
  1788.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1789.   *                the configuration information for SPI module.
  1790.   * @retval None
  1791.   */
  1792. static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi)
  1793. {
  1794.   /* Wait until TXE flag is set to send data */
  1795.   if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1796.   {
  1797.     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1798.   }
  1799.  
  1800.   /* Disable TXE interrupt */
  1801.   __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE));
  1802.  
  1803.   /* Disable ERR interrupt if Receive process is finished */
  1804.   if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) == RESET)
  1805.   {
  1806.     __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
  1807.  
  1808.     /* Wait until Busy flag is reset before disabling SPI */
  1809.     if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1810.     {
  1811.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1812.     }
  1813.  
  1814.     /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
  1815.     if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
  1816.     {
  1817.       __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1818.     }
  1819.    
  1820.     /* Check if Errors has been detected during transfer */
  1821.     if(hspi->ErrorCode ==  HAL_SPI_ERROR_NONE)
  1822.     {
  1823.       /* Check if we are in Tx or in Rx/Tx Mode */
  1824.       if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
  1825.       {
  1826.         /* Set state to READY before run the Callback Complete */
  1827.         hspi->State = HAL_SPI_STATE_READY;
  1828.         HAL_SPI_TxRxCpltCallback(hspi);
  1829.       }
  1830.       else
  1831.       {
  1832.         /* Set state to READY before run the Callback Complete */
  1833.         hspi->State = HAL_SPI_STATE_READY;
  1834.         HAL_SPI_TxCpltCallback(hspi);
  1835.       }
  1836.     }
  1837.     else
  1838.     {
  1839.       /* Set state to READY before run the Callback Complete */
  1840.       hspi->State = HAL_SPI_STATE_READY;
  1841.       /* Call Error call back in case of Error */
  1842.       HAL_SPI_ErrorCallback(hspi);
  1843.     }
  1844.   }
  1845. }
  1846.  
  1847. /**
  1848.   * @brief  Interrupt Handler to transmit amount of data in no-blocking mode
  1849.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1850.   *                the configuration information for SPI module.
  1851.   * @retval None
  1852.   */
  1853. static void SPI_TxISR(SPI_HandleTypeDef *hspi)
  1854. {
  1855.   /* Transmit data in 8 Bit mode */
  1856.   if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  1857.   {
  1858.     hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  1859.   }
  1860.   /* Transmit data in 16 Bit mode */
  1861.   else
  1862.   {
  1863.     hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  1864.     hspi->pTxBuffPtr+=2;
  1865.   }
  1866.   hspi->TxXferCount--;
  1867.  
  1868.   if(hspi->TxXferCount == 0)
  1869.   {
  1870.     if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1871.     {
  1872.       /* calculate and transfer CRC on Tx line */
  1873.       SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  1874.     }
  1875.     SPI_TxCloseIRQHandler(hspi);
  1876.   }
  1877. }
  1878.  
  1879. /**
  1880.   * @brief  Interrupt Handler to close Rx transfer
  1881.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1882.   *                the configuration information for SPI module.
  1883.   * @retval None
  1884.   */
  1885. static void SPI_RxCloseIRQHandler(SPI_HandleTypeDef *hspi)
  1886. {
  1887.   __IO uint16_t tmpreg = 0;
  1888.  
  1889.   if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1890.   {
  1891.     /* Wait until RXNE flag is set to read CRC data */
  1892.     if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1893.     {
  1894.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1895.     }
  1896.  
  1897.     /* Read CRC to reset RXNE flag */
  1898.     tmpreg = hspi->Instance->DR;
  1899.     UNUSED(tmpreg);
  1900.  
  1901.     /* Wait until RXNE flag is reset */
  1902.     if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1903.     {
  1904.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1905.     }
  1906.  
  1907.     /* Check if CRC error occurred */
  1908.     if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1909.     {
  1910.       /* Check if CRC error is valid or not (workaround to be applied or not) */
  1911.       if (   (hspi->State != HAL_SPI_STATE_BUSY_RX)
  1912.           || (SPI_ISCRCErrorValid(hspi) == SPI_VALID_CRC_ERROR) )
  1913.       {
  1914.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1915.  
  1916.         /* Reset CRC Calculation */
  1917.         SPI_RESET_CRC(hspi);
  1918.       }
  1919.       else
  1920.       {
  1921.         __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1922.       }
  1923.     }
  1924.   }
  1925.  
  1926.   /* Disable RXNE interrupt */
  1927.   __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE));
  1928.  
  1929.   /* if Transmit process is finished */
  1930.   if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) == RESET)
  1931.   {
  1932.     /* Disable ERR interrupt */
  1933.     __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
  1934.  
  1935.     if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  1936.     {
  1937.       /* Disable SPI peripheral */
  1938.       __HAL_SPI_DISABLE(hspi);
  1939.     }
  1940.    
  1941.     /* Check if Errors has been detected during transfer */
  1942.     if(hspi->ErrorCode ==  HAL_SPI_ERROR_NONE)
  1943.     {
  1944.       /* Check if we are in Rx or in Rx/Tx Mode */
  1945.       if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
  1946.       {
  1947.         /* Set state to READY before run the Callback Complete */
  1948.         hspi->State = HAL_SPI_STATE_READY;
  1949.         HAL_SPI_TxRxCpltCallback(hspi);
  1950.       }
  1951.       else
  1952.       {
  1953.         /* Set state to READY before run the Callback Complete */
  1954.         hspi->State = HAL_SPI_STATE_READY;
  1955.         HAL_SPI_RxCpltCallback(hspi);
  1956.       }
  1957.     }
  1958.     else
  1959.     {
  1960.       /* Set state to READY before run the Callback Complete */
  1961.       hspi->State = HAL_SPI_STATE_READY;
  1962.       /* Call Error call back in case of Error */
  1963.       HAL_SPI_ErrorCallback(hspi);
  1964.     }
  1965.   }
  1966. }
  1967.  
  1968. /**
  1969.   * @brief  Interrupt Handler to receive amount of data in 2Lines mode
  1970.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1971.   *                the configuration information for SPI module.
  1972.   * @retval None
  1973.   */
  1974. static void SPI_2LinesRxISR(SPI_HandleTypeDef *hspi)
  1975. {
  1976.   /* Receive data in 8 Bit mode */
  1977.   if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  1978.   {
  1979.     (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  1980.   }
  1981.   /* Receive data in 16 Bit mode */
  1982.   else
  1983.   {
  1984.     *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  1985.     hspi->pRxBuffPtr+=2;
  1986.   }
  1987.   hspi->RxXferCount--;
  1988.  
  1989.   if(hspi->RxXferCount==0)
  1990.   {
  1991.     SPI_RxCloseIRQHandler(hspi);
  1992.   }
  1993. }
  1994.  
  1995. /**
  1996.   * @brief  Interrupt Handler to receive amount of data in no-blocking mode
  1997.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  1998.   *                the configuration information for SPI module.
  1999.   * @retval None
  2000.   */
  2001. static void SPI_RxISR(SPI_HandleTypeDef *hspi)
  2002. {
  2003.   /* Receive data in 8 Bit mode */
  2004.   if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  2005.   {
  2006.     (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  2007.   }
  2008.   /* Receive data in 16 Bit mode */
  2009.   else
  2010.   {
  2011.     *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  2012.     hspi->pRxBuffPtr+=2;
  2013.   }
  2014.     hspi->RxXferCount--;
  2015.  
  2016.   /* Enable CRC Transmission */
  2017.   if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
  2018.   {
  2019.     /* Set CRC Next to calculate CRC on Rx side */
  2020.     SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  2021.   }
  2022.  
  2023.   if(hspi->RxXferCount == 0)
  2024.   {
  2025.     SPI_RxCloseIRQHandler(hspi);
  2026.   }
  2027. }
  2028.  
  2029. /**
  2030.   * @brief DMA SPI transmit process complete callback
  2031.   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  2032.   *                the configuration information for the specified DMA module.
  2033.   * @retval None
  2034.   */
  2035. static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
  2036. {
  2037.   SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  2038.  
  2039.   /* DMA Normal Mode */
  2040.   if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
  2041.   {
  2042.     /* Wait until TXE flag is set to send data */
  2043.     if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  2044.     {
  2045.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  2046.     }
  2047.  
  2048.     /* Disable Tx DMA Request */
  2049.     CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  2050.  
  2051.     /* Wait until Busy flag is reset before disabling SPI */
  2052.     if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  2053.     {
  2054.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  2055.     }
  2056.  
  2057.     hspi->TxXferCount = 0;
  2058.     hspi->State = HAL_SPI_STATE_READY;
  2059.   }
  2060.  
  2061.   /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
  2062.   if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
  2063.   {
  2064.     __HAL_SPI_CLEAR_OVRFLAG(hspi);
  2065.   }
  2066.  
  2067.   /* Check if Errors has been detected during transfer */
  2068.   if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  2069.   {
  2070.     HAL_SPI_ErrorCallback(hspi);
  2071.   }
  2072.   else
  2073.   {
  2074.     HAL_SPI_TxCpltCallback(hspi);
  2075.   }
  2076. }
  2077.  
  2078. /**
  2079.   * @brief DMA SPI receive process complete callback
  2080.   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  2081.   *                the configuration information for the specified DMA module.
  2082.   * @retval None
  2083.   */
  2084. static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
  2085. {
  2086.   __IO uint16_t tmpreg = 0;
  2087.   SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  2088.  
  2089.   /* DMA Normal mode */
  2090.   if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
  2091.   {
  2092.     /* Disable Rx DMA Request */
  2093.     CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  2094.  
  2095.     /* Disable Tx DMA Request (done by default to handle the case Master RX direction 2 lines) */
  2096.     CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  2097.  
  2098.     /* CRC Calculation handling */
  2099.     if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  2100.     {
  2101.       /* Wait until RXNE flag is set (CRC ready) */
  2102.       if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  2103.       {
  2104.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  2105.       }
  2106.  
  2107.       /* Read CRC */
  2108.       tmpreg = hspi->Instance->DR;
  2109.       UNUSED(tmpreg);
  2110.  
  2111.       /* Wait until RXNE flag is reset */
  2112.       if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  2113.       {
  2114.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  2115.       }
  2116.  
  2117.       /* Check if CRC error occurred */
  2118.       if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  2119.       {
  2120.         /* Check if CRC error is valid or not (workaround to be applied or not) */
  2121.         if (SPI_ISCRCErrorValid(hspi) == SPI_VALID_CRC_ERROR)
  2122.         {
  2123.           SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  2124.          
  2125.           /* Reset CRC Calculation */
  2126.           SPI_RESET_CRC(hspi);
  2127.         }
  2128.         __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  2129.       }
  2130.     }
  2131.  
  2132.     if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  2133.     {
  2134.       /* Disable SPI peripheral */
  2135.       __HAL_SPI_DISABLE(hspi);
  2136.     }
  2137.  
  2138.     hspi->RxXferCount = 0;
  2139.     hspi->State = HAL_SPI_STATE_READY;
  2140.  
  2141.     /* Check if Errors has been detected during transfer */
  2142.     if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  2143.     {
  2144.       HAL_SPI_ErrorCallback(hspi);
  2145.     }
  2146.     else
  2147.     {
  2148.       HAL_SPI_RxCpltCallback(hspi);
  2149.     }
  2150.   }
  2151.   else
  2152.   {
  2153.     HAL_SPI_RxCpltCallback(hspi);
  2154.   }
  2155. }
  2156.  
  2157. /**
  2158.   * @brief DMA SPI transmit receive process complete callback
  2159.   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  2160.   *                the configuration information for the specified DMA module.
  2161.   * @retval None
  2162.   */
  2163. static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)  
  2164. {
  2165.   __IO uint16_t tmpreg = 0;
  2166.  
  2167.   SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  2168.  
  2169.   if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
  2170.   {
  2171.     /* CRC Calculation handling */
  2172.     if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  2173.     {
  2174.       /* Check if CRC is done on going (RXNE flag set) */
  2175.       if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) == HAL_OK)
  2176.       {
  2177.         /* Wait until RXNE flag is set to send data */
  2178.         if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  2179.         {
  2180.           SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  2181.         }
  2182.       }
  2183.       /* Read CRC */
  2184.       tmpreg = hspi->Instance->DR;
  2185.       UNUSED(tmpreg);
  2186.  
  2187.       /* Check if CRC error occurred */
  2188.       if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  2189.       {
  2190.         SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  2191.         __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  2192.       }
  2193.     }
  2194.  
  2195.     /* Wait until TXE flag is set to send data */
  2196.     if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  2197.     {
  2198.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  2199.     }
  2200.  
  2201.     /* Disable Tx DMA Request */
  2202.     CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  2203.  
  2204.     /* Wait until Busy flag is reset before disabling SPI */
  2205.     if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  2206.     {
  2207.       SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  2208.     }
  2209.  
  2210.     /* Disable Rx DMA Request */
  2211.     CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  2212.  
  2213.     hspi->TxXferCount = 0;
  2214.     hspi->RxXferCount = 0;
  2215.  
  2216.     hspi->State = HAL_SPI_STATE_READY;
  2217.  
  2218.     /* Check if Errors has been detected during transfer */
  2219.     if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  2220.     {
  2221.       HAL_SPI_ErrorCallback(hspi);
  2222.     }
  2223.     else
  2224.     {
  2225.       HAL_SPI_TxRxCpltCallback(hspi);
  2226.     }
  2227.   }
  2228.   else
  2229.   {
  2230.     HAL_SPI_TxRxCpltCallback(hspi);
  2231.   }
  2232. }
  2233.  
  2234. /**
  2235.   * @brief DMA SPI half transmit process complete callback
  2236.   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  2237.   *                the configuration information for the specified DMA module.
  2238.   * @retval None
  2239.   */
  2240. static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma)
  2241. {
  2242.   SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  2243.  
  2244.   HAL_SPI_TxHalfCpltCallback(hspi);
  2245. }
  2246.  
  2247. /**
  2248.   * @brief DMA SPI half receive process complete callback
  2249.   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  2250.   *                the configuration information for the specified DMA module.
  2251.   * @retval None
  2252.   */
  2253. static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma)
  2254. {
  2255.   SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  2256.  
  2257.   HAL_SPI_RxHalfCpltCallback(hspi);
  2258. }
  2259.  
  2260. /**
  2261.   * @brief DMA SPI Half transmit receive process complete callback
  2262.   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  2263.   *                the configuration information for the specified DMA module.
  2264.   * @retval None
  2265.   */
  2266. static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma)  
  2267. {
  2268.   SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  2269.  
  2270.   HAL_SPI_TxRxHalfCpltCallback(hspi);
  2271. }
  2272.  
  2273. /**
  2274.   * @brief DMA SPI communication error callback
  2275.   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  2276.   *                the configuration information for the specified DMA module.
  2277.   * @retval None
  2278.   */
  2279. static void SPI_DMAError(DMA_HandleTypeDef *hdma)
  2280. {
  2281.   SPI_HandleTypeDef* hspi = (SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  2282.   hspi->TxXferCount = 0;
  2283.   hspi->RxXferCount = 0;
  2284.   hspi->State= HAL_SPI_STATE_READY;
  2285.   SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
  2286.   HAL_SPI_ErrorCallback(hspi);
  2287. }
  2288.  
  2289. /**
  2290.   * @brief  This function handles SPI Communication Timeout.
  2291.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  2292.   *                the configuration information for SPI module.
  2293.   * @param  Flag: SPI flag to check
  2294.   * @param  Status: Flag status to check: RESET or set
  2295.   * @param  Timeout: Timeout duration
  2296.   * @retval HAL status
  2297.   */
  2298. static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout)  
  2299. {
  2300.   uint32_t tickstart = 0;
  2301.  
  2302.   /* Get tick */
  2303.   tickstart = HAL_GetTick();
  2304.  
  2305.   /* Wait until flag is set */
  2306.   if(Status == RESET)
  2307.   {
  2308.     while(__HAL_SPI_GET_FLAG(hspi, Flag) == RESET)
  2309.     {
  2310.       if(Timeout != HAL_MAX_DELAY)
  2311.       {
  2312.         if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
  2313.         {
  2314.           /* Disable the SPI and reset the CRC: the CRC value should be cleared
  2315.              on both master and slave sides in order to resynchronize the master
  2316.              and slave for their respective CRC calculation */
  2317.  
  2318.           /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
  2319.           __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  2320.  
  2321.           /* Disable SPI peripheral */
  2322.           __HAL_SPI_DISABLE(hspi);
  2323.  
  2324.           /* Reset CRC Calculation */
  2325.           if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  2326.           {
  2327.             SPI_RESET_CRC(hspi);
  2328.           }
  2329.  
  2330.           hspi->State= HAL_SPI_STATE_READY;
  2331.  
  2332.           /* Process Unlocked */
  2333.           __HAL_UNLOCK(hspi);
  2334.  
  2335.           return HAL_TIMEOUT;
  2336.         }
  2337.       }
  2338.     }
  2339.   }
  2340.   else
  2341.   {
  2342.     while(__HAL_SPI_GET_FLAG(hspi, Flag) != RESET)
  2343.     {
  2344.       if(Timeout != HAL_MAX_DELAY)
  2345.       {
  2346.         if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
  2347.         {
  2348.           /* Disable the SPI and reset the CRC: the CRC value should be cleared
  2349.              on both master and slave sides in order to resynchronize the master
  2350.              and slave for their respective CRC calculation */
  2351.  
  2352.           /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
  2353.           __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  2354.  
  2355.           /* Disable SPI peripheral */
  2356.           __HAL_SPI_DISABLE(hspi);
  2357.  
  2358.           /* Reset CRC Calculation */
  2359.           if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  2360.           {
  2361.             SPI_RESET_CRC(hspi);
  2362.           }
  2363.  
  2364.           hspi->State= HAL_SPI_STATE_READY;
  2365.  
  2366.           /* Process Unlocked */
  2367.           __HAL_UNLOCK(hspi);
  2368.  
  2369.           return HAL_TIMEOUT;
  2370.         }
  2371.       }
  2372.     }
  2373.   }
  2374.   return HAL_OK;
  2375. }
  2376.  
  2377. /**
  2378.   * @}
  2379.   */
  2380.  
  2381. /** @addtogroup SPI_Private_Functions
  2382.   * @{
  2383.   */
  2384.  
  2385. /**
  2386.   * @brief  Checks if encountered CRC error could be corresponding to wrongly detected errors
  2387.   *         according to SPI instance, Device type, and revision ID.
  2388.   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
  2389.   *               the configuration information for SPI module.
  2390.   * @retval CRC error validity (SPI_INVALID_CRC_ERROR or SPI_VALID_CRC_ERROR).  
  2391. */
  2392. __weak uint8_t SPI_ISCRCErrorValid(SPI_HandleTypeDef *hspi)
  2393. {
  2394.   return (SPI_VALID_CRC_ERROR);
  2395. }
  2396. /**
  2397.   * @}
  2398.   */
  2399.  
  2400.  
  2401. #endif /* HAL_SPI_MODULE_ENABLED */
  2402. /**
  2403.   * @}
  2404.   */
  2405.  
  2406. /**
  2407.   * @}
  2408.   */
  2409.  
  2410. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  2411.