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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32f1xx_hal_i2s.c
  4.   * @author  MCD Application Team
  5.   * @brief   I2S HAL module driver.
  6.   *          This file provides firmware functions to manage the following
  7.   *          functionalities of the Integrated Interchip Sound (I2S) peripheral:
  8.   *           + Initialization and de-initialization functions
  9.   *           + IO operation functions
  10.   *           + Peripheral State and Errors functions
  11.   @verbatim
  12.  ===============================================================================
  13.                   ##### How to use this driver #####
  14.  ===============================================================================
  15.  [..]
  16.     The I2S HAL driver can be used as follow:
  17.  
  18.     (#) Declare a I2S_HandleTypeDef handle structure.
  19.     (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API:
  20.         (##) Enable the SPIx interface clock.
  21.         (##) I2S pins configuration:
  22.             (+++) Enable the clock for the I2S GPIOs.
  23.             (+++) Configure these I2S pins as alternate function.
  24.         (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT()
  25.              and HAL_I2S_Receive_IT() APIs).
  26.             (+++) Configure the I2Sx interrupt priority.
  27.             (+++) Enable the NVIC I2S IRQ handle.
  28.         (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA()
  29.              and HAL_I2S_Receive_DMA() APIs:
  30.             (+++) Declare a DMA handle structure for the Tx/Rx Channel.
  31.             (+++) Enable the DMAx interface clock.
  32.             (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.                
  33.             (+++) Configure the DMA Tx/Rx Channel.
  34.             (+++) Associate the initialized DMA handle to the I2S DMA Tx/Rx handle.
  35.             (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
  36.                   DMA Tx/Rx Channel.
  37.  
  38.    (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity
  39.        using HAL_I2S_Init() function.
  40.  
  41.    -@- The specific I2S interrupts (Transmission complete interrupt,
  42.        RXNE interrupt and Error Interrupts) will be managed using the macros
  43.        __HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process.
  44.    -@- The I2SxCLK source is the system clock (provided by the HSI, the HSE or the PLL, and sourcing the AHB clock).
  45.        For connectivity line devices, the I2SxCLK source can be either SYSCLK or the PLL3 VCO (2 x PLL3CLK) clock
  46.        in order to achieve the maximum accuracy.
  47.    -@- Make sure that either:
  48.        (+@) External clock source is configured after setting correctly
  49.             the define constant HSE_VALUE in the stm32f1xx_hal_conf.h file.
  50.  
  51.    (#) Three operation modes are available within this driver :
  52.  
  53.    *** Polling mode IO operation ***
  54.    =================================
  55.    [..]
  56.      (+) Send an amount of data in blocking mode using HAL_I2S_Transmit()
  57.      (+) Receive an amount of data in blocking mode using HAL_I2S_Receive()
  58.  
  59.    *** Interrupt mode IO operation ***
  60.    ===================================
  61.    [..]
  62.      (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT()
  63.      (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
  64.          add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
  65.      (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
  66.          add his own code by customization of function pointer HAL_I2S_TxCpltCallback
  67.      (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT()
  68.      (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
  69.          add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
  70.      (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
  71.          add his own code by customization of function pointer HAL_I2S_RxCpltCallback
  72.      (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
  73.          add his own code by customization of function pointer HAL_I2S_ErrorCallback
  74.  
  75.    *** DMA mode IO operation ***
  76.    ==============================
  77.    [..]
  78.      (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA()
  79.      (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
  80.          add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
  81.      (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
  82.          add his own code by customization of function pointer HAL_I2S_TxCpltCallback
  83.      (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA()
  84.      (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
  85.          add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
  86.      (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
  87.          add his own code by customization of function pointer HAL_I2S_RxCpltCallback
  88.      (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
  89.          add his own code by customization of function pointer HAL_I2S_ErrorCallback
  90.      (+) Pause the DMA Transfer using HAL_I2S_DMAPause()
  91.      (+) Resume the DMA Transfer using HAL_I2S_DMAResume()
  92.      (+) Stop the DMA Transfer using HAL_I2S_DMAStop()
  93.  
  94.    *** I2S HAL driver macros list ***
  95.    =============================================
  96.    [..]
  97.      Below the list of most used macros in I2S HAL driver.
  98.  
  99.       (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode)
  100.       (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode)
  101.       (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts
  102.       (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts
  103.       (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not
  104.  
  105.     [..]
  106.       (@) You can refer to the I2S HAL driver header file for more useful macros
  107.  
  108.  
  109.      *** I2C Workarounds linked to Silicon Limitation ***
  110.      ====================================================
  111.      [..]
  112.        (@) Only the 16-bit mode with no data extension can be used when the I2S
  113.            is in Master and used the PCM long synchronization mode.
  114.  
  115.  
  116.   @endverbatim
  117.   ******************************************************************************
  118.   * @attention
  119.   *
  120.   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  121.   *
  122.   * Redistribution and use in source and binary forms, with or without modification,
  123.   * are permitted provided that the following conditions are met:
  124.   *   1. Redistributions of source code must retain the above copyright notice,
  125.   *      this list of conditions and the following disclaimer.
  126.   *   2. Redistributions in binary form must reproduce the above copyright notice,
  127.   *      this list of conditions and the following disclaimer in the documentation
  128.   *      and/or other materials provided with the distribution.
  129.   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  130.   *      may be used to endorse or promote products derived from this software
  131.   *      without specific prior written permission.
  132.   *
  133.   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  134.   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  135.   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  136.   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  137.   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  138.   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  139.   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  140.   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  141.   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  142.   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  143.   *
  144.   ******************************************************************************
  145.   */
  146.  
  147. /* Includes ------------------------------------------------------------------*/
  148. #include "stm32f1xx_hal.h"
  149.  
  150. /** @addtogroup STM32F1xx_HAL_Driver
  151.   * @{
  152.   */
  153.  
  154. #ifdef HAL_I2S_MODULE_ENABLED
  155. #if defined(STM32F103xE) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC)
  156.  
  157. /** @defgroup I2S I2S
  158.   * @brief I2S HAL module driver
  159.   * @{
  160.   */
  161.  
  162. /* Private typedef -----------------------------------------------------------*/
  163. /* Private define ------------------------------------------------------------*/
  164. /* Private macro -------------------------------------------------------------*/
  165. /* Private variables ---------------------------------------------------------*/
  166. /* Private function prototypes -----------------------------------------------*/
  167. /** @addtogroup I2S_Private_Functions I2S Private Functions
  168.   * @{
  169.   */
  170. static void               I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
  171. static void               I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
  172. static void               I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
  173. static void               I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
  174. static void               I2S_DMAError(DMA_HandleTypeDef *hdma);
  175. static void               I2S_Transmit_IT(I2S_HandleTypeDef *hi2s);
  176. static void               I2S_Receive_IT(I2S_HandleTypeDef *hi2s);
  177. static void               I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
  178. static HAL_StatusTypeDef  I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t State,
  179.                                                         uint32_t Timeout);
  180. /**
  181.   * @}
  182.   */
  183.  
  184. /* Exported functions ---------------------------------------------------------*/
  185. /** @defgroup I2S_Exported_Functions I2S Exported Functions
  186.   * @{
  187.   */
  188.  
  189. /** @defgroup  I2S_Exported_Functions_Group1 Initialization and de-initialization functions
  190.   *  @brief    Initialization and Configuration functions
  191.   *
  192. @verbatim
  193.  ===============================================================================
  194.               ##### Initialization and de-initialization functions #####
  195.  ===============================================================================
  196.     [..]  This subsection provides a set of functions allowing to initialize and
  197.           de-initialize the I2Sx peripheral in simplex mode:
  198.  
  199.       (+) User must Implement HAL_I2S_MspInit() function in which he configures
  200.           all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
  201.  
  202.       (+) Call the function HAL_I2S_Init() to configure the selected device with
  203.           the selected configuration:
  204.         (++) Mode
  205.         (++) Standard
  206.         (++) Data Format
  207.         (++) MCLK Output
  208.         (++) Audio frequency
  209.         (++) Polarity
  210.  
  211.       (+) Call the function HAL_I2S_DeInit() to restore the default configuration
  212.           of the selected I2Sx peripheral.
  213. @endverbatim
  214.   * @{
  215.   */
  216.  
  217. /**
  218.   * @brief Initializes the I2S according to the specified parameters
  219.   *         in the I2S_InitTypeDef and create the associated handle.
  220.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  221.   *         the configuration information for I2S module
  222.   * @retval HAL status
  223.   */
  224. HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
  225. {
  226.   uint32_t tmpreg = 0U, i2sdiv = 2U, i2sodd = 0U, packetlength = 16U;
  227.   uint32_t tmp = 0U, i2sclk = 0U;
  228.  
  229.   /* Check the I2S handle allocation */
  230.   if(hi2s == NULL)
  231.   {
  232.     return HAL_ERROR;
  233.   }
  234.  
  235.   /* Check the I2S parameters */
  236.   assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
  237.   assert_param(IS_I2S_MODE(hi2s->Init.Mode));
  238.   assert_param(IS_I2S_STANDARD(hi2s->Init.Standard));
  239.   assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat));
  240.   assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput));
  241.   assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq));
  242.   assert_param(IS_I2S_CPOL(hi2s->Init.CPOL));
  243.  
  244.   hi2s->State = HAL_I2S_STATE_BUSY;
  245.  
  246.   /* Initialize Default I2S IrqHandler ISR */
  247.   hi2s->IrqHandlerISR = I2S_IRQHandler;
  248.  
  249.   /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
  250.   HAL_I2S_MspInit(hi2s);
  251.  
  252.   /*----------------------- SPIx I2SCFGR & I2SPR Configuration ---------------*/
  253.   /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
  254.   CLEAR_BIT(hi2s->Instance->I2SCFGR,(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \
  255.                                      SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \
  256.                                      SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD));
  257.   hi2s->Instance->I2SPR = 0x0002U;
  258.  
  259.   /* Get the I2SCFGR register value */
  260.   tmpreg = hi2s->Instance->I2SCFGR;
  261.  
  262.   /* If the default frequency value has to be written, reinitialize i2sdiv and i2sodd */
  263.   /* If the requested audio frequency is not the default, compute the prescaler */
  264.   if(hi2s->Init.AudioFreq != I2S_AUDIOFREQ_DEFAULT)
  265.   {
  266.     /* Check the frame length (For the Prescaler computing) *******************/
  267.     /* Set I2S Packet Length value*/
  268.     if(hi2s->Init.DataFormat != I2S_DATAFORMAT_16B)
  269.     {
  270.       /* Packet length is 32 bits */
  271.       packetlength = 32U;
  272.     }
  273.     else
  274.     {
  275.       /* Packet length is 16 bits */
  276.       packetlength = 16U;
  277.     }
  278.  
  279.     /* I2S standard */
  280.     if(hi2s->Init.Standard <= I2S_STANDARD_LSB)
  281.     {
  282.       /* In I2S standard packet lenght is multiplied by 2 */
  283.       packetlength = packetlength * 2U;
  284.     }
  285.  
  286.     if(hi2s->Instance == SPI2)
  287.     {
  288.       /* Get the source clock value: based on SPI2 Instance */
  289.       i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S2);
  290.     }
  291.     else if(hi2s->Instance == SPI3)
  292.     {
  293.       /* Get the source clock value: based on SPI3 Instance */
  294.       i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S3);
  295.     }
  296.     else
  297.     {
  298.       /* Get the source clock value: based on System Clock value */
  299.       i2sclk = HAL_RCC_GetSysClockFreq();
  300.     }
  301.  
  302.     /* Compute the Real divider depending on the MCLK output state, with a floating point */
  303.     if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE)
  304.     {
  305.       /* MCLK output is enabled */
  306.       if (hi2s->Init.DataFormat != I2S_DATAFORMAT_16B)
  307.       {
  308.         tmp = (uint32_t)(((((i2sclk / (packetlength*4)) * 10) / hi2s->Init.AudioFreq)) + 5);
  309.       }
  310.       else
  311.       {
  312.         tmp = (uint32_t)(((((i2sclk / (packetlength*8)) * 10) / hi2s->Init.AudioFreq)) + 5);
  313.       }
  314.     }
  315.     else
  316.     {
  317.       /* MCLK output is disabled */
  318.       tmp = (uint32_t)(((((i2sclk / packetlength) *10 ) / hi2s->Init.AudioFreq)) + 5);
  319.     }
  320.  
  321.     /* Remove the flatting point */
  322.     tmp = tmp / 10U;
  323.  
  324.     /* Check the parity of the divider */
  325.     i2sodd = (uint16_t)(tmp & (uint16_t)1U);
  326.  
  327.     /* Compute the i2sdiv prescaler */
  328.     i2sdiv = (uint16_t)((tmp - i2sodd) / 2U);
  329.  
  330.     /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
  331.     i2sodd = (uint32_t) (i2sodd << 8U);
  332.   }
  333.  
  334.   /* Test if the divider is 1 or 0 or greater than 0xFF */
  335.   if((i2sdiv < 2U) || (i2sdiv > 0xFFU))
  336.   {
  337.     /* Set the default values */
  338.     i2sdiv = 2U;
  339.     i2sodd = 0U;
  340.  
  341.     /* Set the error code and execute error callback*/
  342.     SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_PRESCALER);
  343.     HAL_I2S_ErrorCallback(hi2s);
  344.     return  HAL_ERROR;
  345.   }
  346.  
  347.   /* Write to SPIx I2SPR register the computed value */
  348.   hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv | (uint32_t)(i2sodd | (uint32_t)hi2s->Init.MCLKOutput));
  349.  
  350.   /* Configure the I2S with the I2S_InitStruct values */
  351.   tmpreg |= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD | (uint16_t)(hi2s->Init.Mode | \
  352.                        (uint16_t)(hi2s->Init.Standard | (uint16_t)(hi2s->Init.DataFormat | \
  353.                        (uint16_t)hi2s->Init.CPOL))));
  354.   /* Write to SPIx I2SCFGR */
  355.     WRITE_REG(hi2s->Instance->I2SCFGR,tmpreg);
  356.   hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  357.   hi2s->State     = HAL_I2S_STATE_READY;
  358.  
  359.   return HAL_OK;
  360. }
  361.  
  362. /**
  363.   * @brief DeInitializes the I2S peripheral
  364.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  365.   *         the configuration information for I2S module
  366.   * @retval HAL status
  367.   */
  368. HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
  369. {
  370.   /* Check the I2S handle allocation */
  371.   if(hi2s == NULL)
  372.   {
  373.     return HAL_ERROR;
  374.   }
  375.  
  376.   hi2s->State = HAL_I2S_STATE_BUSY;
  377.  
  378.   /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
  379.   HAL_I2S_MspDeInit(hi2s);
  380.  
  381.   hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  382.   hi2s->State     = HAL_I2S_STATE_RESET;
  383.  
  384.   /* Release Lock */
  385.   __HAL_UNLOCK(hi2s);
  386.  
  387.   return HAL_OK;
  388. }
  389.  
  390. /**
  391.   * @brief I2S MSP Init
  392.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  393.   *         the configuration information for I2S module
  394.   * @retval None
  395.   */
  396.  __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
  397. {
  398.   /* Prevent unused argument(s) compilation warning */
  399.   UNUSED(hi2s);
  400.   /* NOTE : This function Should not be modified, when the callback is needed,
  401.             the HAL_I2S_MspInit could be implemented in the user file
  402.    */
  403. }
  404.  
  405. /**
  406.   * @brief I2S MSP DeInit
  407.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  408.   *         the configuration information for I2S module
  409.   * @retval None
  410.   */
  411.  __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
  412. {
  413.   /* Prevent unused argument(s) compilation warning */
  414.   UNUSED(hi2s);
  415.   /* NOTE : This function Should not be modified, when the callback is needed,
  416.             the HAL_I2S_MspDeInit could be implemented in the user file
  417.    */
  418. }
  419. /**
  420.   * @}
  421.   */
  422.  
  423. /** @defgroup I2S_Exported_Functions_Group2 IO operation functions
  424.   *  @brief Data transfers functions
  425.   *
  426. @verbatim
  427.  ===============================================================================
  428.                       ##### IO operation functions #####
  429.  ===============================================================================
  430.     [..]
  431.     This subsection provides a set of functions allowing to manage the I2S data
  432.     transfers.
  433.  
  434.     (#) There are two modes of transfer:
  435.        (++) Blocking mode : The communication is performed in the polling mode.
  436.             The status of all data processing is returned by the same function
  437.             after finishing transfer.
  438.        (++) No-Blocking mode : The communication is performed using Interrupts
  439.             or DMA. These functions return the status of the transfer startup.
  440.             The end of the data processing will be indicated through the
  441.             dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when
  442.             using DMA mode.
  443.  
  444.     (#) Blocking mode functions are :
  445.         (++) HAL_I2S_Transmit()
  446.         (++) HAL_I2S_Receive()
  447.  
  448.     (#) No-Blocking mode functions with Interrupt are :
  449.         (++) HAL_I2S_Transmit_IT()
  450.         (++) HAL_I2S_Receive_IT()
  451.  
  452.     (#) No-Blocking mode functions with DMA are :
  453.         (++) HAL_I2S_Transmit_DMA()
  454.         (++) HAL_I2S_Receive_DMA()
  455.  
  456.     (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
  457.         (++) HAL_I2S_TxCpltCallback()
  458.         (++) HAL_I2S_RxCpltCallback()
  459.         (++) HAL_I2S_ErrorCallback()
  460.  
  461. @endverbatim
  462.   * @{
  463.   */
  464.  
  465. /**
  466.   * @brief Transmit an amount of data in blocking mode
  467.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  468.   *         the configuration information for I2S module
  469.   * @param pData: a 16-bit pointer to data buffer.
  470.   * @param Size: number of data sample to be sent:
  471.   * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
  472.   *       configuration phase, the Size parameter means the number of 16-bit data length
  473.   *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
  474.   *       the Size parameter means the number of 16-bit data length.
  475.   * @param  Timeout: Timeout duration
  476.   * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
  477.   *       between Master and Slave(example: audio streaming).
  478.   * @retval HAL status
  479.   */
  480. HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
  481. {
  482.   uint32_t tmp1 = 0U;
  483.  
  484.   if((pData == NULL ) || (Size == 0U))
  485.   {
  486.     return  HAL_ERROR;
  487.   }
  488.  
  489.   if(hi2s->State == HAL_I2S_STATE_READY)
  490.   {
  491.     tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
  492.  
  493.     if((tmp1 == I2S_DATAFORMAT_24B) || (tmp1 == I2S_DATAFORMAT_32B))
  494.     {
  495.       hi2s->TxXferSize  = (Size << 1U);
  496.       hi2s->TxXferCount = (Size << 1U);
  497.     }
  498.     else
  499.     {
  500.       hi2s->TxXferSize  = Size;
  501.       hi2s->TxXferCount = Size;
  502.     }
  503.  
  504.     /* Process Locked */
  505.     __HAL_LOCK(hi2s);
  506.  
  507.     hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  508.     hi2s->State     = HAL_I2S_STATE_BUSY_TX;
  509.  
  510.     /* Check if the I2S is already enabled */
  511.     if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
  512.     {
  513.       /* Enable I2S peripheral */
  514.       __HAL_I2S_ENABLE(hi2s);
  515.     }
  516.  
  517.     while(hi2s->TxXferCount > 0U)
  518.     {
  519.       hi2s->Instance->DR = (*pData++);
  520.       hi2s->TxXferCount--;
  521.  
  522.       /* Wait until TXE flag is set */
  523.       if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, SET, Timeout) != HAL_OK)
  524.       {
  525.         /* Set the error code and execute error callback*/
  526.         SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_TIMEOUT);
  527.         HAL_I2S_ErrorCallback(hi2s);
  528.         return HAL_TIMEOUT;
  529.       }
  530.  
  531.       /* Check if an underrun occurs */
  532.       if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR) == SET)
  533.       {
  534.         /* Clear underrun flag */
  535.         __HAL_I2S_CLEAR_UDRFLAG(hi2s);
  536.         /* Set the I2S State ready */
  537.         hi2s->State = HAL_I2S_STATE_READY;
  538.  
  539.         /* Process Unlocked */
  540.         __HAL_UNLOCK(hi2s);
  541.  
  542.         /* Set the error code and execute error callback*/
  543.         SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR);
  544.         HAL_I2S_ErrorCallback(hi2s);
  545.  
  546.         return HAL_ERROR;
  547.       }
  548.     }
  549.     hi2s->State = HAL_I2S_STATE_READY;
  550.  
  551.     /* Process Unlocked */
  552.     __HAL_UNLOCK(hi2s);
  553.  
  554.     return HAL_OK;
  555.   }
  556.   else
  557.   {
  558.     return HAL_BUSY;
  559.   }
  560. }
  561.  
  562. /**
  563.   * @brief Receive an amount of data in blocking mode
  564.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  565.   *         the configuration information for I2S module
  566.   * @param pData: a 16-bit pointer to data buffer
  567.   * @param Size: number of data sample to be sent:
  568.   * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
  569.   *       configuration phase, the Size parameter means the number of 16-bit data length
  570.   *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
  571.   *       the Size parameter means the number of 16-bit data length.
  572.   * @param Timeout: Timeout duration
  573.   * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
  574.   *       between Master and Slave(example: audio streaming)
  575.   * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate
  576.   *       in continuous way and as the I2S is not disabled at the end of the I2S transaction
  577.   * @retval HAL status
  578.   */
  579. HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
  580. {
  581.   uint32_t tmp1 = 0U;
  582.  
  583.   if((pData == NULL ) || (Size == 0U))
  584.   {
  585.     return  HAL_ERROR;
  586.   }
  587.  
  588.   if(hi2s->State == HAL_I2S_STATE_READY)
  589.   {
  590.     tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
  591.     if((tmp1 == I2S_DATAFORMAT_24B) || (tmp1 == I2S_DATAFORMAT_32B))
  592.     {
  593.       hi2s->RxXferSize  = (Size << 1U);
  594.       hi2s->RxXferCount = (Size << 1U);
  595.     }
  596.     else
  597.     {
  598.       hi2s->RxXferSize  = Size;
  599.       hi2s->RxXferCount = Size;
  600.     }
  601.     /* Process Locked */
  602.     __HAL_LOCK(hi2s);
  603.  
  604.     hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  605.     hi2s->State     = HAL_I2S_STATE_BUSY_RX;
  606.  
  607.     /* Check if the I2S is already enabled */
  608.     if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
  609.     {
  610.       /* Enable I2S peripheral */
  611.       __HAL_I2S_ENABLE(hi2s);
  612.     }
  613.  
  614.     /* Check if Master Receiver mode is selected */
  615.     if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
  616.     {
  617.       /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read
  618.       access to the SPI_SR register. */
  619.       __HAL_I2S_CLEAR_OVRFLAG(hi2s);
  620.     }
  621.  
  622.     /* Receive data */
  623.     while(hi2s->RxXferCount > 0U)
  624.     {
  625.       /* Wait until RXNE flag is set */
  626.       if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, SET, Timeout) != HAL_OK)
  627.       {
  628.         /* Set the error code and execute error callback*/
  629.         SET_BIT(hi2s->ErrorCode,HAL_I2S_ERROR_TIMEOUT);
  630.         HAL_I2S_ErrorCallback(hi2s);
  631.         return HAL_TIMEOUT;
  632.       }
  633.  
  634.       /* Check if an overrun occurs */
  635.       if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR) == SET)
  636.       {
  637.         /* Clear overrun flag */
  638.         __HAL_I2S_CLEAR_OVRFLAG(hi2s);
  639.  
  640.         /* Set the I2S State ready */
  641.         hi2s->State = HAL_I2S_STATE_READY;
  642.  
  643.         /* Process Unlocked */
  644.         __HAL_UNLOCK(hi2s);
  645.  
  646.         /* Set the error code and execute error callback*/
  647.         SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR);
  648.         HAL_I2S_ErrorCallback(hi2s);
  649.  
  650.         return HAL_ERROR;
  651.       }
  652.  
  653.       (*pData++) = hi2s->Instance->DR;
  654.       hi2s->RxXferCount--;
  655.     }
  656.  
  657.     hi2s->State = HAL_I2S_STATE_READY;
  658.  
  659.     /* Process Unlocked */
  660.     __HAL_UNLOCK(hi2s);
  661.  
  662.     return HAL_OK;
  663.   }
  664.   else
  665.   {
  666.     return HAL_BUSY;
  667.   }
  668. }
  669.  
  670. /**
  671.   * @brief Transmit an amount of data in non-blocking mode with Interrupt
  672.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  673.   *         the configuration information for I2S module
  674.   * @param pData: a 16-bit pointer to data buffer.
  675.   * @param Size: number of data sample to be sent:
  676.   * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
  677.   *       configuration phase, the Size parameter means the number of 16-bit data length
  678.   *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
  679.   *       the Size parameter means the number of 16-bit data length.
  680.   * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
  681.   *       between Master and Slave(example: audio streaming).
  682.   * @retval HAL status
  683.   */
  684. HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
  685. {
  686.   uint32_t tmp1 = 0U;
  687.  
  688.   if(hi2s->State == HAL_I2S_STATE_READY)
  689.   {
  690.     if((pData == NULL) || (Size == 0U))
  691.     {
  692.       return  HAL_ERROR;
  693.     }
  694.  
  695.     hi2s->pTxBuffPtr = pData;
  696.     tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
  697.     if((tmp1 == I2S_DATAFORMAT_24B) || (tmp1 == I2S_DATAFORMAT_32B))
  698.     {
  699.       hi2s->TxXferSize  = (Size << 1U);
  700.       hi2s->TxXferCount = (Size << 1U);
  701.     }
  702.     else
  703.     {
  704.       hi2s->TxXferSize  = Size;
  705.       hi2s->TxXferCount = Size;
  706.     }
  707.  
  708.     /* Process Locked */
  709.     __HAL_LOCK(hi2s);
  710.  
  711.     hi2s->State     = HAL_I2S_STATE_BUSY_TX;
  712.     hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  713.  
  714.     /* Enable TXE and ERR interrupt */
  715.     __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
  716.  
  717.     /* Check if the I2S is already enabled */
  718.     if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
  719.     {
  720.       /* Enable I2S peripheral */
  721.       __HAL_I2S_ENABLE(hi2s);
  722.     }
  723.  
  724.     /* Process Unlocked */
  725.     __HAL_UNLOCK(hi2s);
  726.  
  727.     return HAL_OK;
  728.   }
  729.   else
  730.   {
  731.     return HAL_BUSY;
  732.   }
  733. }
  734.  
  735. /**
  736.   * @brief Receive an amount of data in non-blocking mode with Interrupt
  737.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  738.   *         the configuration information for I2S module
  739.   * @param pData: a 16-bit pointer to the Receive data buffer.
  740.   * @param Size: number of data sample to be sent:
  741.   * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
  742.   *       configuration phase, the Size parameter means the number of 16-bit data length
  743.   *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
  744.   *       the Size parameter means the number of 16-bit data length.
  745.   * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
  746.   *       between Master and Slave(example: audio streaming).
  747.   * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation
  748.   * between Master and Slave otherwise the I2S interrupt should be optimized.
  749.   * @retval HAL status
  750.   */
  751. HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
  752. {
  753.   uint32_t tmp1 = 0U;
  754.  
  755.   if(hi2s->State == HAL_I2S_STATE_READY)
  756.   {
  757.     if((pData == NULL) || (Size == 0U))
  758.     {
  759.       return  HAL_ERROR;
  760.     }
  761.  
  762.     hi2s->pRxBuffPtr = pData;
  763.     tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
  764.     if((tmp1 == I2S_DATAFORMAT_24B) || (tmp1 == I2S_DATAFORMAT_32B))
  765.     {
  766.       hi2s->RxXferSize  = (Size << 1U);
  767.       hi2s->RxXferCount = (Size << 1U);
  768.     }
  769.     else
  770.     {
  771.       hi2s->RxXferSize  = Size;
  772.       hi2s->RxXferCount = Size;
  773.     }
  774.     /* Process Locked */
  775.     __HAL_LOCK(hi2s);
  776.  
  777.     hi2s->State     = HAL_I2S_STATE_BUSY_RX;
  778.     hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  779.  
  780.     /* Enable TXE and ERR interrupt */
  781.     __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
  782.  
  783.     /* Check if the I2S is already enabled */
  784.     if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
  785.     {
  786.       /* Enable I2S peripheral */
  787.       __HAL_I2S_ENABLE(hi2s);
  788.     }
  789.  
  790.     /* Process Unlocked */
  791.     __HAL_UNLOCK(hi2s);
  792.  
  793.     return HAL_OK;
  794.   }
  795.  
  796.   else
  797.   {
  798.     return HAL_BUSY;
  799.   }
  800. }
  801.  
  802. /**
  803.   * @brief Transmit an amount of data in non-blocking mode with DMA
  804.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  805.   *         the configuration information for I2S module
  806.   * @param pData: a 16-bit pointer to the Transmit data buffer.
  807.   * @param Size: number of data sample to be sent:
  808.   * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
  809.   *       configuration phase, the Size parameter means the number of 16-bit data length
  810.   *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
  811.   *       the Size parameter means the number of 16-bit data length.
  812.   * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
  813.   *       between Master and Slave(example: audio streaming).
  814.   * @retval HAL status
  815.   */
  816. HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
  817. {
  818.   uint32_t *tmp = NULL;
  819.   uint32_t tmp1 = 0U;
  820.  
  821.   if((pData == NULL) || (Size == 0U))
  822.   {
  823.     return  HAL_ERROR;
  824.   }
  825.  
  826.   if(hi2s->State == HAL_I2S_STATE_READY)
  827.   {
  828.     hi2s->pTxBuffPtr = pData;
  829.     tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
  830.     if((tmp1 == I2S_DATAFORMAT_24B) || (tmp1 == I2S_DATAFORMAT_32B))
  831.     {
  832.       hi2s->TxXferSize  = (Size << 1U);
  833.       hi2s->TxXferCount = (Size << 1U);
  834.     }
  835.     else
  836.     {
  837.       hi2s->TxXferSize  = Size;
  838.       hi2s->TxXferCount = Size;
  839.     }
  840.  
  841.     /* Process Locked */
  842.     __HAL_LOCK(hi2s);
  843.  
  844.     hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  845.     hi2s->State     = HAL_I2S_STATE_BUSY_TX;
  846.  
  847.     /* Set the I2S Tx DMA Half transfer complete callback */
  848.     hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt;
  849.  
  850.     /* Set the I2S Tx DMA transfer complete callback */
  851.     hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt;
  852.  
  853.     /* Set the DMA error callback */
  854.     hi2s->hdmatx->XferErrorCallback = I2S_DMAError;
  855.  
  856.     /* Enable the Tx DMA Stream */
  857.     tmp = (uint32_t*)&pData;
  858.     HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t*)tmp, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize);
  859.  
  860.     /* Check if the I2S is already enabled */
  861.     if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
  862.     {
  863.       /* Enable I2S peripheral */
  864.       __HAL_I2S_ENABLE(hi2s);
  865.     }
  866.  
  867.      /* Check if the I2S Tx request is already enabled */
  868.     if((hi2s->Instance->CR2 & SPI_CR2_TXDMAEN) != SPI_CR2_TXDMAEN)
  869.     {
  870.       /* Enable Tx DMA Request */
  871.       SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
  872.     }
  873.  
  874.     /* Process Unlocked */
  875.     __HAL_UNLOCK(hi2s);
  876.  
  877.     return HAL_OK;
  878.   }
  879.   else
  880.   {
  881.     return HAL_BUSY;
  882.   }
  883. }
  884.  
  885. /**
  886.   * @brief Receive an amount of data in non-blocking mode with DMA
  887.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  888.   *         the configuration information for I2S module
  889.   * @param pData: a 16-bit pointer to the Receive data buffer.
  890.   * @param Size: number of data sample to be sent:
  891.   * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
  892.   *       configuration phase, the Size parameter means the number of 16-bit data length
  893.   *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
  894.   *       the Size parameter means the number of 16-bit data length.
  895.   * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
  896.   *       between Master and Slave(example: audio streaming).
  897.   * @retval HAL status
  898.   */
  899. HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
  900. {
  901.   uint32_t *tmp = NULL;
  902.   uint32_t tmp1 = 0U;
  903.  
  904.   if((pData == NULL) || (Size == 0U))
  905.   {
  906.     return  HAL_ERROR;
  907.   }
  908.  
  909.   if(hi2s->State == HAL_I2S_STATE_READY)
  910.   {
  911.     hi2s->pRxBuffPtr = pData;
  912.     tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
  913.     if((tmp1 == I2S_DATAFORMAT_24B) || (tmp1 == I2S_DATAFORMAT_32B))
  914.     {
  915.       hi2s->RxXferSize  = (Size << 1U);
  916.       hi2s->RxXferCount = (Size << 1U);
  917.     }
  918.     else
  919.     {
  920.       hi2s->RxXferSize  = Size;
  921.       hi2s->RxXferCount = Size;
  922.     }
  923.     /* Process Locked */
  924.     __HAL_LOCK(hi2s);
  925.  
  926.     hi2s->State     = HAL_I2S_STATE_BUSY_RX;
  927.     hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  928.  
  929.     /* Set the I2S Rx DMA Half transfer complete callback */
  930.     hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt;
  931.  
  932.     /* Set the I2S Rx DMA transfer complete callback */
  933.     hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt;
  934.  
  935.     /* Set the DMA error callback */
  936.     hi2s->hdmarx->XferErrorCallback = I2S_DMAError;
  937.  
  938.     /* Check if Master Receiver mode is selected */
  939.     if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
  940.     {
  941.       /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read
  942.       access to the SPI_SR register. */
  943.       __HAL_I2S_CLEAR_OVRFLAG(hi2s);
  944.     }
  945.  
  946.     /* Enable the Rx DMA Stream */
  947.     tmp = (uint32_t*)&pData;
  948.     HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, *(uint32_t*)tmp, hi2s->RxXferSize);
  949.  
  950.     /* Check if the I2S is already enabled */
  951.     if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
  952.     {
  953.       /* Enable I2S peripheral */
  954.       __HAL_I2S_ENABLE(hi2s);
  955.     }
  956.  
  957.      /* Check if the I2S Rx request is already enabled */
  958.     if((hi2s->Instance->CR2 &SPI_CR2_RXDMAEN) != SPI_CR2_RXDMAEN)
  959.     {
  960.       /* Enable Rx DMA Request */
  961.       SET_BIT(hi2s->Instance->CR2,SPI_CR2_RXDMAEN);
  962.     }
  963.  
  964.     /* Process Unlocked */
  965.     __HAL_UNLOCK(hi2s);
  966.  
  967.     return HAL_OK;
  968.   }
  969.   else
  970.   {
  971.     return HAL_BUSY;
  972.   }
  973. }
  974.  
  975. /**
  976.   * @brief Pauses the audio channel playing from the Media.
  977.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  978.   *         the configuration information for I2S module
  979.   * @retval HAL status
  980.   */
  981. HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
  982. {
  983.   /* Process Locked */
  984.   __HAL_LOCK(hi2s);
  985.  
  986.   if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
  987.   {
  988.     /* Disable the I2S DMA Tx request */
  989.     CLEAR_BIT(hi2s->Instance->CR2,SPI_CR2_TXDMAEN);
  990.   }
  991.   else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
  992.   {
  993.     /* Disable the I2S DMA Rx request */
  994.     CLEAR_BIT(hi2s->Instance->CR2,SPI_CR2_RXDMAEN);
  995.   }
  996.  
  997.   /* Process Unlocked */
  998.   __HAL_UNLOCK(hi2s);
  999.  
  1000.   return HAL_OK;
  1001. }
  1002.  
  1003. /**
  1004.   * @brief Resumes the audio channel playing from the Media.
  1005.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  1006.   *         the configuration information for I2S module
  1007.   * @retval HAL status
  1008.   */
  1009. HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
  1010. {
  1011.   /* Process Locked */
  1012.   __HAL_LOCK(hi2s);
  1013.  
  1014.   if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
  1015.   {
  1016.     /* Enable the I2S DMA Tx request */
  1017.     SET_BIT(hi2s->Instance->CR2,SPI_CR2_TXDMAEN);
  1018.   }
  1019.   else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
  1020.   {
  1021.     /* Enable the I2S DMA Rx request */
  1022.     SET_BIT(hi2s->Instance->CR2,SPI_CR2_RXDMAEN);
  1023.   }
  1024.  
  1025.   /* If the I2S peripheral is still not enabled, enable it */
  1026.   if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) == 0U)
  1027.   {
  1028.     /* Enable I2S peripheral */
  1029.     __HAL_I2S_ENABLE(hi2s);
  1030.   }
  1031.  
  1032.   /* Process Unlocked */
  1033.   __HAL_UNLOCK(hi2s);
  1034.  
  1035.   return HAL_OK;
  1036. }
  1037.  
  1038. /**
  1039.   * @brief Resumes the audio channel playing from the Media.
  1040.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  1041.   *         the configuration information for I2S module
  1042.   * @retval HAL status
  1043.   */
  1044. HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
  1045. {
  1046.   /* Process Locked */
  1047.   __HAL_LOCK(hi2s);
  1048.  
  1049.   if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
  1050.   {
  1051.     /* Disable the I2S DMA requests */
  1052.     CLEAR_BIT(hi2s->Instance->CR2,SPI_CR2_TXDMAEN);
  1053.  
  1054.     /* Disable the I2S DMA Channel */
  1055.     HAL_DMA_Abort(hi2s->hdmatx);
  1056.   }
  1057.   else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
  1058.   {
  1059.     /* Disable the I2S DMA requests */
  1060.     CLEAR_BIT(hi2s->Instance->CR2,SPI_CR2_RXDMAEN);
  1061.  
  1062.     /* Disable the I2S DMA Channel */
  1063.     HAL_DMA_Abort(hi2s->hdmarx);
  1064.   }
  1065.   /* Disable I2S peripheral */
  1066.   __HAL_I2S_DISABLE(hi2s);
  1067.  
  1068.   hi2s->State = HAL_I2S_STATE_READY;
  1069.  
  1070.   /* Process Unlocked */
  1071.   __HAL_UNLOCK(hi2s);
  1072.  
  1073.   return HAL_OK;
  1074. }
  1075.  
  1076. /**
  1077.   * @brief  This function handles I2S interrupt request.
  1078.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  1079.   *         the configuration information for I2S module
  1080.   * @retval None
  1081.   */
  1082. void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
  1083. {
  1084.   /* Call the IrqHandler ISR set during HAL_I2S_INIT */
  1085.   hi2s->IrqHandlerISR(hi2s);
  1086. }
  1087.  
  1088. /**
  1089.   * @brief Tx Transfer Half completed callbacks
  1090.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  1091.   *         the configuration information for I2S module
  1092.   * @retval None
  1093.   */
  1094.  __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
  1095. {
  1096.   /* Prevent unused argument(s) compilation warning */
  1097.   UNUSED(hi2s);
  1098.   /* NOTE : This function Should not be modified, when the callback is needed,
  1099.             the HAL_I2S_TxHalfCpltCallback could be implemented in the user file
  1100.    */
  1101. }
  1102.  
  1103. /**
  1104.   * @brief Tx Transfer completed callbacks
  1105.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  1106.   *         the configuration information for I2S module
  1107.   * @retval None
  1108.   */
  1109.  __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
  1110. {
  1111.   /* Prevent unused argument(s) compilation warning */
  1112.   UNUSED(hi2s);
  1113.   /* NOTE : This function Should not be modified, when the callback is needed,
  1114.             the HAL_I2S_TxCpltCallback could be implemented in the user file
  1115.    */
  1116. }
  1117.  
  1118. /**
  1119.   * @brief Rx Transfer half completed callbacks
  1120.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  1121.   *         the configuration information for I2S module
  1122.   * @retval None
  1123.   */
  1124. __weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
  1125. {
  1126.   /* Prevent unused argument(s) compilation warning */
  1127.   UNUSED(hi2s);
  1128.   /* NOTE : This function Should not be modified, when the callback is needed,
  1129.             the HAL_I2S_RxHalfCpltCallback could be implemented in the user file
  1130.    */
  1131. }
  1132.  
  1133. /**
  1134.   * @brief Rx Transfer completed callbacks
  1135.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  1136.   *         the configuration information for I2S module
  1137.   * @retval None
  1138.   */
  1139. __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
  1140. {
  1141.   /* Prevent unused argument(s) compilation warning */
  1142.   UNUSED(hi2s);
  1143.   /* NOTE : This function Should not be modified, when the callback is needed,
  1144.             the HAL_I2S_RxCpltCallback could be implemented in the user file
  1145.    */
  1146. }
  1147.  
  1148. /**
  1149.   * @brief I2S error callbacks
  1150.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  1151.   *         the configuration information for I2S module
  1152.   * @retval None
  1153.   */
  1154.  __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
  1155. {
  1156.   /* Prevent unused argument(s) compilation warning */
  1157.   UNUSED(hi2s);
  1158.   /* NOTE : This function Should not be modified, when the callback is needed,
  1159.             the HAL_I2S_ErrorCallback could be implemented in the user file
  1160.    */
  1161. }
  1162.  
  1163. /**
  1164.   * @}
  1165.   */
  1166.  
  1167. /** @defgroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions
  1168.   *  @brief   Peripheral State functions
  1169.   *
  1170. @verbatim
  1171.  ===============================================================================
  1172.                       ##### Peripheral State and Errors functions #####
  1173.  ===============================================================================
  1174.     [..]
  1175.     This subsection permits to get in run-time the status of the peripheral
  1176.     and the data flow.
  1177.  
  1178. @endverbatim
  1179.   * @{
  1180.   */
  1181.  
  1182. /**
  1183.   * @brief  Return the I2S state
  1184.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  1185.   *         the configuration information for I2S module
  1186.   * @retval HAL state
  1187.   */
  1188. HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
  1189. {
  1190.   return hi2s->State;
  1191. }
  1192.  
  1193. /**
  1194.   * @brief  Return the I2S error code
  1195.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  1196.   *         the configuration information for I2S module
  1197.   * @retval I2S Error Code
  1198.   */
  1199. uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
  1200. {
  1201.   return hi2s->ErrorCode;
  1202. }
  1203. /**
  1204.   * @}
  1205.   */
  1206.  
  1207. /**
  1208.   * @}
  1209.   */
  1210.  
  1211. /* Private functions ---------------------------------------------------------*/
  1212. /** @addtogroup I2S_Private_Functions I2S Private Functions
  1213.   * @{
  1214.   */
  1215. /**
  1216.   * @brief DMA I2S transmit process complete callback
  1217.   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  1218.   *                the configuration information for the specified DMA module.
  1219.   * @retval None
  1220.   */
  1221. static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma)
  1222. {
  1223.   I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1224.  
  1225.   if(HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
  1226.   {
  1227.     /* Disable Tx DMA Request */
  1228.     CLEAR_BIT(hi2s->Instance->CR2,SPI_CR2_TXDMAEN);
  1229.  
  1230.     hi2s->TxXferCount = 0U;
  1231.     hi2s->State       = HAL_I2S_STATE_READY;
  1232.   }
  1233.   HAL_I2S_TxCpltCallback(hi2s);
  1234. }
  1235. /**
  1236.   * @brief DMA I2S transmit process half complete callback
  1237.   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  1238.   *                the configuration information for the specified DMA module.
  1239.   * @retval None
  1240.   */
  1241. static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
  1242. {
  1243.   I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  1244.  
  1245.   HAL_I2S_TxHalfCpltCallback(hi2s);
  1246. }
  1247.  
  1248. /**
  1249.   * @brief DMA I2S receive process complete callback
  1250.   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  1251.   *                the configuration information for the specified DMA module.
  1252.   * @retval None
  1253.   */
  1254. static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma)
  1255. {
  1256.   I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1257.  
  1258.   if(HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
  1259.   {
  1260.     /* Disable Rx DMA Request */
  1261.     CLEAR_BIT(hi2s->Instance->CR2,SPI_CR2_RXDMAEN);
  1262.     hi2s->RxXferCount = 0U;
  1263.     hi2s->State       = HAL_I2S_STATE_READY;
  1264.   }
  1265.   HAL_I2S_RxCpltCallback(hi2s);
  1266. }
  1267.  
  1268. /**
  1269.   * @brief DMA I2S receive process half complete callback
  1270.   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  1271.   *                the configuration information for the specified DMA module.
  1272.   * @retval None
  1273.   */
  1274. static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
  1275. {
  1276.   I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  1277.  
  1278.   HAL_I2S_RxHalfCpltCallback(hi2s);
  1279. }
  1280.  
  1281. /**
  1282.   * @brief DMA I2S communication error callback
  1283.   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  1284.   *                the configuration information for the specified DMA module.
  1285.   * @retval None
  1286.   */
  1287. static void I2S_DMAError(DMA_HandleTypeDef *hdma)
  1288. {
  1289.   I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  1290.  
  1291.   /* Disable Rx and Tx DMA Request */
  1292.   CLEAR_BIT(hi2s->Instance->CR2,(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN));
  1293.   hi2s->TxXferCount = 0U;
  1294.   hi2s->RxXferCount = 0U;
  1295.  
  1296.   hi2s->State= HAL_I2S_STATE_READY;
  1297.  
  1298.   SET_BIT(hi2s->ErrorCode,HAL_I2S_ERROR_DMA);
  1299.   HAL_I2S_ErrorCallback(hi2s);
  1300. }
  1301.  
  1302. /**
  1303.   * @brief Transmit an amount of data in non-blocking mode with Interrupt
  1304.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  1305.   *         the configuration information for I2S module
  1306.   * @retval HAL status
  1307.   */
  1308. static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
  1309. {
  1310.   /* Transmit data */
  1311.   hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
  1312.   hi2s->TxXferCount--;
  1313.  
  1314.   if(hi2s->TxXferCount == 0U)
  1315.   {
  1316.     /* Disable TXE and ERR interrupt */
  1317.     __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
  1318.  
  1319.     hi2s->State = HAL_I2S_STATE_READY;
  1320.     HAL_I2S_TxCpltCallback(hi2s);
  1321.   }
  1322. }
  1323.  
  1324. /**
  1325.   * @brief Receive an amount of data in non-blocking mode with Interrupt
  1326.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  1327.   *         the configuration information for I2S module
  1328.   * @retval HAL status
  1329.   */
  1330. static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s)
  1331. {
  1332.   /* Receive data */
  1333.   (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
  1334.   hi2s->RxXferCount--;
  1335.  
  1336.   if(hi2s->RxXferCount == 0U)
  1337.   {
  1338.     /* Disable RXNE and ERR interrupt */
  1339.     __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
  1340.  
  1341.     hi2s->State = HAL_I2S_STATE_READY;
  1342.     HAL_I2S_RxCpltCallback(hi2s);
  1343.   }
  1344. }
  1345.  
  1346. /**
  1347.   * @brief  This function handles I2S interrupt request.
  1348.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  1349.   *         the configuration information for I2S module
  1350.   * @retval None
  1351.   */
  1352. static void I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
  1353. {
  1354.   __IO uint32_t i2ssr = hi2s->Instance->SR;
  1355.  
  1356.   if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
  1357.   {
  1358.     /* I2S in mode Receiver ------------------------------------------------*/
  1359.     if(((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET))
  1360.     {
  1361.       I2S_Receive_IT(hi2s);
  1362.     }
  1363.  
  1364.     /* I2S Overrun error interrupt occurred -------------------------------------*/
  1365.     if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
  1366.     {
  1367.       /* Disable RXNE and ERR interrupt */
  1368.       __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
  1369.  
  1370.       /* Clear Overrun flag */
  1371.       __HAL_I2S_CLEAR_OVRFLAG(hi2s);
  1372.  
  1373.       /* Set the I2S State ready */
  1374.       hi2s->State = HAL_I2S_STATE_READY;
  1375.  
  1376.  
  1377.       /* Set the error code and execute error callback*/
  1378.       SET_BIT(hi2s->ErrorCode,HAL_I2S_ERROR_OVR);
  1379.       HAL_I2S_ErrorCallback(hi2s);
  1380.       }
  1381.     }
  1382.  
  1383.     if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
  1384.     {
  1385.       /* I2S in mode Transmitter -----------------------------------------------*/
  1386.     if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET))
  1387.       {
  1388.         I2S_Transmit_IT(hi2s);
  1389.       }
  1390.  
  1391.       /* I2S Underrun error interrupt occurred --------------------------------*/
  1392.     if(((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
  1393.       {
  1394.       /* Disable TXE and ERR interrupt */
  1395.       __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
  1396.  
  1397.       /* Clear Underrun flag */
  1398.       __HAL_I2S_CLEAR_UDRFLAG(hi2s);
  1399.  
  1400.       /* Set the I2S State ready */
  1401.       hi2s->State = HAL_I2S_STATE_READY;
  1402.  
  1403.       /* Set the error code and execute error callback*/
  1404.       SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR);
  1405.       HAL_I2S_ErrorCallback(hi2s);
  1406.     }
  1407.   }
  1408. }
  1409.  
  1410. /**
  1411.   * @brief This function handles I2S Communication Timeout.
  1412.   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
  1413.   *         the configuration information for I2S module
  1414.   * @param Flag: Flag checked
  1415.   * @param State: Value of the flag expected
  1416.   * @param Timeout: Duration of the timeout
  1417.   * @retval HAL status
  1418.   */
  1419. static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t State,
  1420.                                                        uint32_t Timeout)
  1421. {
  1422.   uint32_t tickstart = HAL_GetTick();
  1423.  
  1424.    /* Wait until flag is set to status*/
  1425.   while(((__HAL_I2S_GET_FLAG(hi2s, Flag)) ? SET : RESET) != State)
  1426.   {
  1427.     if(Timeout != HAL_MAX_DELAY)
  1428.     {
  1429.       if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
  1430.       {
  1431.         /* Set the I2S State ready */
  1432.         hi2s->State = HAL_I2S_STATE_READY;
  1433.  
  1434.         /* Process Unlocked */
  1435.         __HAL_UNLOCK(hi2s);
  1436.  
  1437.         return HAL_TIMEOUT;
  1438.       }
  1439.     }
  1440.   }
  1441.   return HAL_OK;
  1442. }
  1443.  
  1444. /**
  1445.   * @}
  1446.   */
  1447.  
  1448. /**
  1449.   * @}
  1450.   */
  1451.  
  1452. #endif /* STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
  1453. #endif /* HAL_I2S_MODULE_ENABLED */
  1454. /**
  1455.   * @}
  1456.   */
  1457.  
  1458. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  1459.