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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32f1xx_hal_i2c.c
  4.   * @author  MCD Application Team
  5.   * @brief   I2C HAL module driver.
  6.   *          This file provides firmware functions to manage the following
  7.   *          functionalities of the Inter Integrated Circuit (I2C) peripheral:
  8.   *           + Initialization and de-initialization functions
  9.   *           + IO operation functions
  10.   *           + Peripheral State, Mode and Error functions
  11.   *
  12.   @verbatim
  13.   ==============================================================================
  14.                         ##### How to use this driver #####
  15.   ==============================================================================
  16.   [..]
  17.     The I2C HAL driver can be used as follows:
  18.  
  19.     (#) Declare a I2C_HandleTypeDef handle structure, for example:
  20.         I2C_HandleTypeDef  hi2c;
  21.  
  22.     (#)Initialize the I2C low level resources by implementing the @ref HAL_I2C_MspInit() API:
  23.         (##) Enable the I2Cx interface clock
  24.         (##) I2C pins configuration
  25.             (+++) Enable the clock for the I2C GPIOs
  26.             (+++) Configure I2C pins as alternate function open-drain
  27.         (##) NVIC configuration if you need to use interrupt process
  28.             (+++) Configure the I2Cx interrupt priority
  29.             (+++) Enable the NVIC I2C IRQ Channel
  30.         (##) DMA Configuration if you need to use DMA process
  31.             (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
  32.             (+++) Enable the DMAx interface clock using
  33.             (+++) Configure the DMA handle parameters
  34.             (+++) Configure the DMA Tx or Rx channel
  35.             (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
  36.             (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
  37.                   the DMA Tx or Rx channel
  38.  
  39.     (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
  40.         Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
  41.  
  42.     (#) Initialize the I2C registers by calling the @ref HAL_I2C_Init(), configures also the low level Hardware
  43.         (GPIO, CLOCK, NVIC...etc) by calling the customized @ref HAL_I2C_MspInit() API.
  44.  
  45.     (#) To check if target device is ready for communication, use the function @ref HAL_I2C_IsDeviceReady()
  46.  
  47.     (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
  48.  
  49.     *** Polling mode IO operation ***
  50.     =================================
  51.     [..]
  52.       (+) Transmit in master mode an amount of data in blocking mode using @ref HAL_I2C_Master_Transmit()
  53.       (+) Receive in master mode an amount of data in blocking mode using @ref HAL_I2C_Master_Receive()
  54.       (+) Transmit in slave mode an amount of data in blocking mode using @ref HAL_I2C_Slave_Transmit()
  55.       (+) Receive in slave mode an amount of data in blocking mode using @ref HAL_I2C_Slave_Receive()
  56.  
  57.     *** Polling mode IO MEM operation ***
  58.     =====================================
  59.     [..]
  60.       (+) Write an amount of data in blocking mode to a specific memory address using @ref HAL_I2C_Mem_Write()
  61.       (+) Read an amount of data in blocking mode from a specific memory address using @ref HAL_I2C_Mem_Read()
  62.  
  63.  
  64.     *** Interrupt mode IO operation ***
  65.     ===================================
  66.     [..]
  67.       (+) Transmit in master mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Transmit_IT()
  68.       (+) At transmission end of transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can
  69.            add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback()
  70.       (+) Receive in master mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Receive_IT()
  71.       (+) At reception end of transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can
  72.            add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback()
  73.       (+) Transmit in slave mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Transmit_IT()
  74.       (+) At transmission end of transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can
  75.            add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback()
  76.       (+) Receive in slave mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Receive_IT()
  77.       (+) At reception end of transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can
  78.            add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback()
  79.       (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
  80.            add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
  81.       (+) Abort a master I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_IT()
  82.       (+) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can
  83.            add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback()
  84.  
  85.     *** Interrupt mode or DMA mode IO sequential operation ***
  86.     ==========================================================
  87.     [..]
  88.       (@) These interfaces allow to manage a sequential transfer with a repeated start condition
  89.           when a direction change during transfer
  90.     [..]
  91.       (+) A specific option field manage the different steps of a sequential transfer
  92.       (+) Option field values are defined through @ref I2C_XferOptions_definition and are listed below:
  93.       (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
  94.       (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
  95.                             and data to transfer without a final stop condition
  96.       (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a sequence with start condition, address
  97.                             and data to transfer without a final stop condition, an then permit a call the same master sequential interface
  98.                             several times (like @ref HAL_I2C_Master_Seq_Transmit_IT() then @ref HAL_I2C_Master_Seq_Transmit_IT()
  99.                             or @ref HAL_I2C_Master_Seq_Transmit_DMA() then @ref HAL_I2C_Master_Seq_Transmit_DMA())
  100.       (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
  101.                             and with new data to transfer if the direction change or manage only the new data to transfer
  102.                             if no direction change and without a final stop condition in both cases
  103.       (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
  104.                             and with new data to transfer if the direction change or manage only the new data to transfer
  105.                             if no direction change and with a final stop condition in both cases
  106.       (++) I2C_LAST_FRAME_NO_STOP: Sequential usage (Master only), this option allow to manage a restart condition after several call of the same master sequential
  107.                             interface several times (link with option I2C_FIRST_AND_NEXT_FRAME).
  108.                             Usage can, transfer several bytes one by one using HAL_I2C_Master_Seq_Transmit_IT(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)
  109.                               or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)
  110.                               or HAL_I2C_Master_Seq_Transmit_DMA(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)
  111.                               or HAL_I2C_Master_Seq_Receive_DMA(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME).
  112.                             Then usage of this option I2C_LAST_FRAME_NO_STOP at the last Transmit or Receive sequence permit to call the oposite interface Receive or Transmit
  113.                               without stopping the communication and so generate a restart condition.
  114.       (++) I2C_OTHER_FRAME: Sequential usage (Master only), this option allow to manage a restart condition after each call of the same master sequential
  115.                             interface.
  116.                             Usage can, transfer several bytes one by one with a restart with slave address between each bytes using HAL_I2C_Master_Seq_Transmit_IT(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)
  117.                               or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)
  118.                               or HAL_I2C_Master_Seq_Transmit_DMA(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)
  119.                               or HAL_I2C_Master_Seq_Receive_DMA(option I2C_FIRST_FRAME then I2C_OTHER_FRAME).
  120.                             Then usage of this option I2C_OTHER_AND_LAST_FRAME at the last frame to help automatic generation of STOP condition.
  121.  
  122.       (+) Differents sequential I2C interfaces are listed below:
  123.       (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Seq_Transmit_IT()
  124.             or using @ref HAL_I2C_Master_Seq_Transmit_DMA()
  125.       (+++) At transmission end of current frame transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can
  126.            add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback()
  127.       (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Seq_Receive_IT()
  128.             or using @ref HAL_I2C_Master_Seq_Receive_DMA()
  129.       (+++) At reception end of current frame transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can
  130.            add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback()
  131.       (++) Abort a master IT or DMA I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_IT()
  132.       (+++) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can
  133.            add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback()
  134.       (++) Enable/disable the Address listen mode in slave I2C mode using @ref HAL_I2C_EnableListen_IT() @ref HAL_I2C_DisableListen_IT()
  135.       (+++) When address slave I2C match, @ref HAL_I2C_AddrCallback() is executed and user can
  136.            add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
  137.       (+++) At Listen mode end @ref HAL_I2C_ListenCpltCallback() is executed and user can
  138.            add his own code by customization of function pointer @ref HAL_I2C_ListenCpltCallback()
  139.       (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Seq_Transmit_IT()
  140.             or using @ref HAL_I2C_Slave_Seq_Transmit_DMA()
  141.       (+++) At transmission end of current frame transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can
  142.            add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback()
  143.       (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Seq_Receive_IT()
  144.             or using @ref HAL_I2C_Slave_Seq_Receive_DMA()
  145.       (+++) At reception end of current frame transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can
  146.            add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback()
  147.       (++) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
  148.            add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
  149.  
  150.     *** Interrupt mode IO MEM operation ***
  151.     =======================================
  152.     [..]
  153.       (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using
  154.           @ref HAL_I2C_Mem_Write_IT()
  155.       (+) At Memory end of write transfer, @ref HAL_I2C_MemTxCpltCallback() is executed and user can
  156.            add his own code by customization of function pointer @ref HAL_I2C_MemTxCpltCallback()
  157.       (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using
  158.           @ref HAL_I2C_Mem_Read_IT()
  159.       (+) At Memory end of read transfer, @ref HAL_I2C_MemRxCpltCallback() is executed and user can
  160.            add his own code by customization of function pointer @ref HAL_I2C_MemRxCpltCallback()
  161.       (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
  162.            add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
  163.  
  164.     *** DMA mode IO operation ***
  165.     ==============================
  166.     [..]
  167.       (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using
  168.           @ref HAL_I2C_Master_Transmit_DMA()
  169.       (+) At transmission end of transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can
  170.            add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback()
  171.       (+) Receive in master mode an amount of data in non-blocking mode (DMA) using
  172.           @ref HAL_I2C_Master_Receive_DMA()
  173.       (+) At reception end of transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can
  174.            add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback()
  175.       (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using
  176.           @ref HAL_I2C_Slave_Transmit_DMA()
  177.       (+) At transmission end of transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can
  178.            add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback()
  179.       (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using
  180.           @ref HAL_I2C_Slave_Receive_DMA()
  181.       (+) At reception end of transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can
  182.            add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback()
  183.       (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
  184.            add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
  185.       (+) Abort a master I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_IT()
  186.       (+) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can
  187.            add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback()
  188.  
  189.     *** DMA mode IO MEM operation ***
  190.     =================================
  191.     [..]
  192.       (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using
  193.           @ref HAL_I2C_Mem_Write_DMA()
  194.       (+) At Memory end of write transfer, @ref HAL_I2C_MemTxCpltCallback() is executed and user can
  195.            add his own code by customization of function pointer @ref HAL_I2C_MemTxCpltCallback()
  196.       (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using
  197.           @ref HAL_I2C_Mem_Read_DMA()
  198.       (+) At Memory end of read transfer, @ref HAL_I2C_MemRxCpltCallback() is executed and user can
  199.            add his own code by customization of function pointer @ref HAL_I2C_MemRxCpltCallback()
  200.       (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
  201.            add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
  202.  
  203.  
  204.      *** I2C HAL driver macros list ***
  205.      ==================================
  206.      [..]
  207.        Below the list of most used macros in I2C HAL driver.
  208.  
  209.       (+) @ref __HAL_I2C_ENABLE:     Enable the I2C peripheral
  210.       (+) @ref __HAL_I2C_DISABLE:    Disable the I2C peripheral
  211.       (+) @ref __HAL_I2C_GET_FLAG:   Checks whether the specified I2C flag is set or not
  212.       (+) @ref __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag
  213.       (+) @ref __HAL_I2C_ENABLE_IT:  Enable the specified I2C interrupt
  214.       (+) @ref __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
  215.  
  216.      *** Callback registration ***
  217.      =============================================
  218.     [..]
  219.      The compilation flag USE_HAL_I2C_REGISTER_CALLBACKS when set to 1
  220.      allows the user to configure dynamically the driver callbacks.
  221.      Use Functions @ref HAL_I2C_RegisterCallback() or @ref HAL_I2C_RegisterAddrCallback()
  222.      to register an interrupt callback.
  223.     [..]
  224.      Function @ref HAL_I2C_RegisterCallback() allows to register following callbacks:
  225.        (+) MasterTxCpltCallback : callback for Master transmission end of transfer.
  226.        (+) MasterRxCpltCallback : callback for Master reception end of transfer.
  227.        (+) SlaveTxCpltCallback  : callback for Slave transmission end of transfer.
  228.        (+) SlaveRxCpltCallback  : callback for Slave reception end of transfer.
  229.        (+) ListenCpltCallback   : callback for end of listen mode.
  230.        (+) MemTxCpltCallback    : callback for Memory transmission end of transfer.
  231.        (+) MemRxCpltCallback    : callback for Memory reception end of transfer.
  232.        (+) ErrorCallback        : callback for error detection.
  233.        (+) AbortCpltCallback    : callback for abort completion process.
  234.        (+) MspInitCallback      : callback for Msp Init.
  235.        (+) MspDeInitCallback    : callback for Msp DeInit.
  236.      This function takes as parameters the HAL peripheral handle, the Callback ID
  237.      and a pointer to the user callback function.
  238.     [..]
  239.      For specific callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_RegisterAddrCallback().
  240.     [..]
  241.      Use function @ref HAL_I2C_UnRegisterCallback to reset a callback to the default
  242.      weak function.
  243.      @ref HAL_I2C_UnRegisterCallback takes as parameters the HAL peripheral handle,
  244.      and the Callback ID.
  245.      This function allows to reset following callbacks:
  246.        (+) MasterTxCpltCallback : callback for Master transmission end of transfer.
  247.        (+) MasterRxCpltCallback : callback for Master reception end of transfer.
  248.        (+) SlaveTxCpltCallback  : callback for Slave transmission end of transfer.
  249.        (+) SlaveRxCpltCallback  : callback for Slave reception end of transfer.
  250.        (+) ListenCpltCallback   : callback for end of listen mode.
  251.        (+) MemTxCpltCallback    : callback for Memory transmission end of transfer.
  252.        (+) MemRxCpltCallback    : callback for Memory reception end of transfer.
  253.        (+) ErrorCallback        : callback for error detection.
  254.        (+) AbortCpltCallback    : callback for abort completion process.
  255.        (+) MspInitCallback      : callback for Msp Init.
  256.        (+) MspDeInitCallback    : callback for Msp DeInit.
  257.     [..]
  258.      For callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_UnRegisterAddrCallback().
  259.     [..]
  260.      By default, after the @ref HAL_I2C_Init() and when the state is @ref HAL_I2C_STATE_RESET
  261.      all callbacks are set to the corresponding weak functions:
  262.      examples @ref HAL_I2C_MasterTxCpltCallback(), @ref HAL_I2C_MasterRxCpltCallback().
  263.      Exception done for MspInit and MspDeInit functions that are
  264.      reset to the legacy weak functions in the @ref HAL_I2C_Init()/ @ref HAL_I2C_DeInit() only when
  265.      these callbacks are null (not registered beforehand).
  266.      If MspInit or MspDeInit are not null, the @ref HAL_I2C_Init()/ @ref HAL_I2C_DeInit()
  267.      keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
  268.     [..]
  269.      Callbacks can be registered/unregistered in @ref HAL_I2C_STATE_READY state only.
  270.      Exception done MspInit/MspDeInit functions that can be registered/unregistered
  271.      in @ref HAL_I2C_STATE_READY or @ref HAL_I2C_STATE_RESET state,
  272.      thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
  273.      Then, the user first registers the MspInit/MspDeInit user callbacks
  274.      using @ref HAL_I2C_RegisterCallback() before calling @ref HAL_I2C_DeInit()
  275.      or @ref HAL_I2C_Init() function.
  276.     [..]
  277.      When the compilation flag USE_HAL_I2C_REGISTER_CALLBACKS is set to 0 or
  278.      not defined, the callback registration feature is not available and all callbacks
  279.      are set to the corresponding weak functions.
  280.  
  281.  
  282.      *** I2C Workarounds linked to Silicon Limitation ***
  283.      ====================================================
  284.      [..]
  285.        Below the list of all silicon limitations implemented for HAL on STM32F1xx product.
  286.        (@) See ErrataSheet to know full silicon limitation list of your product.
  287.  
  288.        (+) Workarounds Implemented inside I2C HAL Driver
  289.           (++) Wrong data read into data register (Polling and Interrupt mode)
  290.           (++) Start cannot be generated after a misplaced Stop
  291.           (++) Some software events must be managed before the current byte is being transferred:
  292.                Workaround: Use DMA in general, except when the Master is receiving a single byte.
  293.                For Interupt mode, I2C should have the highest priority in the application.
  294.           (++) Mismatch on the "Setup time for a repeated Start condition" timing parameter:
  295.                Workaround: Reduce the frequency down to 88 kHz or use the I2C Fast-mode if
  296.                supported by the slave.
  297.           (++) Data valid time (tVD;DAT) violated without the OVR flag being set:
  298.                Workaround: If the slave device allows it, use the clock stretching mechanism
  299.                by programming NoStretchMode = I2C_NOSTRETCH_DISABLE in @ref HAL_I2C_Init.
  300.  
  301.      [..]
  302.        (@) You can refer to the I2C HAL driver header file for more useful macros
  303.  
  304.   @endverbatim
  305.   ******************************************************************************
  306.   * @attention
  307.   *
  308.   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  309.   * All rights reserved.</center></h2>
  310.   *
  311.   * This software component is licensed by ST under BSD 3-Clause license,
  312.   * the "License"; You may not use this file except in compliance with the
  313.   * License. You may obtain a copy of the License at:
  314.   *                        opensource.org/licenses/BSD-3-Clause
  315.   *
  316.   ******************************************************************************
  317.   */
  318.  
  319. /* Includes ------------------------------------------------------------------*/
  320. #include "stm32f1xx_hal.h"
  321.  
  322. /** @addtogroup STM32F1xx_HAL_Driver
  323.   * @{
  324.   */
  325.  
  326. /** @defgroup I2C I2C
  327.   * @brief I2C HAL module driver
  328.   * @{
  329.   */
  330.  
  331. #ifdef HAL_I2C_MODULE_ENABLED
  332.  
  333. /* Private typedef -----------------------------------------------------------*/
  334. /* Private define ------------------------------------------------------------*/
  335. /** @addtogroup I2C_Private_Define
  336.   * @{
  337.   */
  338. #define I2C_TIMEOUT_FLAG          35U         /*!< Timeout 35 ms             */
  339. #define I2C_TIMEOUT_BUSY_FLAG     25U         /*!< Timeout 25 ms             */
  340. #define I2C_NO_OPTION_FRAME       0xFFFF0000U /*!< XferOptions default value */
  341.  
  342. /* Private define for @ref PreviousState usage */
  343. #define I2C_STATE_MSK             ((uint32_t)((uint32_t)((uint32_t)HAL_I2C_STATE_BUSY_TX | (uint32_t)HAL_I2C_STATE_BUSY_RX) & (uint32_t)(~((uint32_t)HAL_I2C_STATE_READY)))) /*!< Mask State define, keep only RX and TX bits            */
  344. #define I2C_STATE_NONE            ((uint32_t)(HAL_I2C_MODE_NONE))                                                        /*!< Default Value                                          */
  345. #define I2C_STATE_MASTER_BUSY_TX  ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MASTER))            /*!< Master Busy TX, combinaison of State LSB and Mode enum */
  346. #define I2C_STATE_MASTER_BUSY_RX  ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MASTER))            /*!< Master Busy RX, combinaison of State LSB and Mode enum */
  347. #define I2C_STATE_SLAVE_BUSY_TX   ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_SLAVE))             /*!< Slave Busy TX, combinaison of State LSB and Mode enum  */
  348. #define I2C_STATE_SLAVE_BUSY_RX   ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_SLAVE))             /*!< Slave Busy RX, combinaison of State LSB and Mode enum  */
  349.  
  350. /**
  351.   * @}
  352.   */
  353.  
  354. /* Private macro -------------------------------------------------------------*/
  355. /* Private variables ---------------------------------------------------------*/
  356. /* Private function prototypes -----------------------------------------------*/
  357.  
  358. /** @defgroup I2C_Private_Functions I2C Private Functions
  359.   * @{
  360.   */
  361. /* Private functions to handle DMA transfer */
  362. static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma);
  363. static void I2C_DMAError(DMA_HandleTypeDef *hdma);
  364. static void I2C_DMAAbort(DMA_HandleTypeDef *hdma);
  365.  
  366. static void I2C_ITError(I2C_HandleTypeDef *hi2c);
  367.  
  368. static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
  369. static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
  370. static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
  371. static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
  372.  
  373. /* Private functions to handle flags during polling transfer */
  374. static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
  375. static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart);
  376. static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  377. static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  378. static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  379. static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  380. static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
  381.  
  382. /* Private functions for I2C transfer IRQ handler */
  383. static void I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
  384. static void I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
  385. static void I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
  386. static void I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
  387. static void I2C_Master_SB(I2C_HandleTypeDef *hi2c);
  388. static void I2C_Master_ADD10(I2C_HandleTypeDef *hi2c);
  389. static void I2C_Master_ADDR(I2C_HandleTypeDef *hi2c);
  390.  
  391. static void I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
  392. static void I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
  393. static void I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
  394. static void I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
  395. static void I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c, uint32_t IT2Flags);
  396. static void I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
  397. static void I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
  398.  
  399. /* Private function to Convert Specific options */
  400. static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c);
  401. /**
  402.   * @}
  403.   */
  404.  
  405. /* Exported functions --------------------------------------------------------*/
  406.  
  407. /** @defgroup I2C_Exported_Functions I2C Exported Functions
  408.   * @{
  409.   */
  410.  
  411. /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
  412.  *  @brief    Initialization and Configuration functions
  413.  *
  414. @verbatim
  415.  ===============================================================================
  416.               ##### Initialization and de-initialization functions #####
  417.  ===============================================================================
  418.     [..]  This subsection provides a set of functions allowing to initialize and
  419.           deinitialize the I2Cx peripheral:
  420.  
  421.       (+) User must Implement HAL_I2C_MspInit() function in which he configures
  422.           all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
  423.  
  424.       (+) Call the function HAL_I2C_Init() to configure the selected device with
  425.           the selected configuration:
  426.         (++) Communication Speed
  427.         (++) Duty cycle
  428.         (++) Addressing mode
  429.         (++) Own Address 1
  430.         (++) Dual Addressing mode
  431.         (++) Own Address 2
  432.         (++) General call mode
  433.         (++) Nostretch mode
  434.  
  435.       (+) Call the function HAL_I2C_DeInit() to restore the default configuration
  436.           of the selected I2Cx peripheral.
  437.  
  438. @endverbatim
  439.   * @{
  440.   */
  441.  
  442. /**
  443.   * @brief  Initializes the I2C according to the specified parameters
  444.   *         in the I2C_InitTypeDef and initialize the associated handle.
  445.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  446.   *                the configuration information for the specified I2C.
  447.   * @retval HAL status
  448.   */
  449. HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
  450. {
  451.   uint32_t freqrange;
  452.   uint32_t pclk1;
  453.  
  454.   /* Check the I2C handle allocation */
  455.   if (hi2c == NULL)
  456.   {
  457.     return HAL_ERROR;
  458.   }
  459.  
  460.   /* Check the parameters */
  461.   assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
  462.   assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
  463.   assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
  464.   assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
  465.   assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
  466.   assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
  467.   assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
  468.   assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
  469.   assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
  470.  
  471.   if (hi2c->State == HAL_I2C_STATE_RESET)
  472.   {
  473.     /* Allocate lock resource and initialize it */
  474.     hi2c->Lock = HAL_UNLOCKED;
  475.  
  476. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  477.     /* Init the I2C Callback settings */
  478.     hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallback */
  479.     hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallback */
  480.     hi2c->SlaveTxCpltCallback  = HAL_I2C_SlaveTxCpltCallback;  /* Legacy weak SlaveTxCpltCallback  */
  481.     hi2c->SlaveRxCpltCallback  = HAL_I2C_SlaveRxCpltCallback;  /* Legacy weak SlaveRxCpltCallback  */
  482.     hi2c->ListenCpltCallback   = HAL_I2C_ListenCpltCallback;   /* Legacy weak ListenCpltCallback   */
  483.     hi2c->MemTxCpltCallback    = HAL_I2C_MemTxCpltCallback;    /* Legacy weak MemTxCpltCallback    */
  484.     hi2c->MemRxCpltCallback    = HAL_I2C_MemRxCpltCallback;    /* Legacy weak MemRxCpltCallback    */
  485.     hi2c->ErrorCallback        = HAL_I2C_ErrorCallback;        /* Legacy weak ErrorCallback        */
  486.     hi2c->AbortCpltCallback    = HAL_I2C_AbortCpltCallback;    /* Legacy weak AbortCpltCallback    */
  487.     hi2c->AddrCallback         = HAL_I2C_AddrCallback;         /* Legacy weak AddrCallback         */
  488.  
  489.     if (hi2c->MspInitCallback == NULL)
  490.     {
  491.       hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit  */
  492.     }
  493.  
  494.     /* Init the low level hardware : GPIO, CLOCK, NVIC */
  495.     hi2c->MspInitCallback(hi2c);
  496. #else
  497.     /* Init the low level hardware : GPIO, CLOCK, NVIC */
  498.     HAL_I2C_MspInit(hi2c);
  499. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  500.   }
  501.  
  502.   hi2c->State = HAL_I2C_STATE_BUSY;
  503.  
  504.   /* Disable the selected I2C peripheral */
  505.   __HAL_I2C_DISABLE(hi2c);
  506.  
  507.   /* Get PCLK1 frequency */
  508.   pclk1 = HAL_RCC_GetPCLK1Freq();
  509.  
  510.   /* Check the minimum allowed PCLK1 frequency */
  511.   if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
  512.   {
  513.     return HAL_ERROR;
  514.   }
  515.  
  516.   /* Calculate frequency range */
  517.   freqrange = I2C_FREQRANGE(pclk1);
  518.  
  519.   /*---------------------------- I2Cx CR2 Configuration ----------------------*/
  520.   /* Configure I2Cx: Frequency range */
  521.   MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
  522.  
  523.   /*---------------------------- I2Cx TRISE Configuration --------------------*/
  524.   /* Configure I2Cx: Rise Time */
  525.   MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
  526.  
  527.   /*---------------------------- I2Cx CCR Configuration ----------------------*/
  528.   /* Configure I2Cx: Speed */
  529.   MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
  530.  
  531.   /*---------------------------- I2Cx CR1 Configuration ----------------------*/
  532.   /* Configure I2Cx: Generalcall and NoStretch mode */
  533.   MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
  534.  
  535.   /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
  536.   /* Configure I2Cx: Own Address1 and addressing mode */
  537.   MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
  538.  
  539.   /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
  540.   /* Configure I2Cx: Dual mode and Own Address2 */
  541.   MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
  542.  
  543.   /* Enable the selected I2C peripheral */
  544.   __HAL_I2C_ENABLE(hi2c);
  545.  
  546.   hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  547.   hi2c->State = HAL_I2C_STATE_READY;
  548.   hi2c->PreviousState = I2C_STATE_NONE;
  549.   hi2c->Mode = HAL_I2C_MODE_NONE;
  550.  
  551.   return HAL_OK;
  552. }
  553.  
  554. /**
  555.   * @brief  DeInitialize the I2C peripheral.
  556.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  557.   *         the configuration information for the specified I2C.
  558.   * @retval HAL status
  559.   */
  560. HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
  561. {
  562.   /* Check the I2C handle allocation */
  563.   if (hi2c == NULL)
  564.   {
  565.     return HAL_ERROR;
  566.   }
  567.  
  568.   /* Check the parameters */
  569.   assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
  570.  
  571.   hi2c->State = HAL_I2C_STATE_BUSY;
  572.  
  573.   /* Disable the I2C Peripheral Clock */
  574.   __HAL_I2C_DISABLE(hi2c);
  575.  
  576. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  577.   if (hi2c->MspDeInitCallback == NULL)
  578.   {
  579.     hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit  */
  580.   }
  581.  
  582.   /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  583.   hi2c->MspDeInitCallback(hi2c);
  584. #else
  585.   /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  586.   HAL_I2C_MspDeInit(hi2c);
  587. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  588.  
  589.   hi2c->ErrorCode     = HAL_I2C_ERROR_NONE;
  590.   hi2c->State         = HAL_I2C_STATE_RESET;
  591.   hi2c->PreviousState = I2C_STATE_NONE;
  592.   hi2c->Mode          = HAL_I2C_MODE_NONE;
  593.  
  594.   /* Release Lock */
  595.   __HAL_UNLOCK(hi2c);
  596.  
  597.   return HAL_OK;
  598. }
  599.  
  600. /**
  601.   * @brief  Initialize the I2C MSP.
  602.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  603.   *         the configuration information for the specified I2C.
  604.   * @retval None
  605.   */
  606. __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
  607. {
  608.   /* Prevent unused argument(s) compilation warning */
  609.   UNUSED(hi2c);
  610.  
  611.   /* NOTE : This function should not be modified, when the callback is needed,
  612.             the HAL_I2C_MspInit could be implemented in the user file
  613.    */
  614. }
  615.  
  616. /**
  617.   * @brief  DeInitialize the I2C MSP.
  618.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  619.   *         the configuration information for the specified I2C.
  620.   * @retval None
  621.   */
  622. __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
  623. {
  624.   /* Prevent unused argument(s) compilation warning */
  625.   UNUSED(hi2c);
  626.  
  627.   /* NOTE : This function should not be modified, when the callback is needed,
  628.             the HAL_I2C_MspDeInit could be implemented in the user file
  629.    */
  630. }
  631.  
  632. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  633. /**
  634.   * @brief  Register a User I2C Callback
  635.   *         To be used instead of the weak predefined callback
  636.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  637.   *                the configuration information for the specified I2C.
  638.   * @param  CallbackID ID of the callback to be registered
  639.   *         This parameter can be one of the following values:
  640.   *          @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID
  641.   *          @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID
  642.   *          @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID
  643.   *          @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID
  644.   *          @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID
  645.   *          @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID
  646.   *          @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID
  647.   *          @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID
  648.   *          @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID
  649.   *          @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID
  650.   *          @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID
  651.   * @param  pCallback pointer to the Callback function
  652.   * @retval HAL status
  653.   */
  654. HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback)
  655. {
  656.   HAL_StatusTypeDef status = HAL_OK;
  657.  
  658.   if (pCallback == NULL)
  659.   {
  660.     /* Update the error code */
  661.     hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  662.  
  663.     return HAL_ERROR;
  664.   }
  665.   /* Process locked */
  666.   __HAL_LOCK(hi2c);
  667.  
  668.   if (HAL_I2C_STATE_READY == hi2c->State)
  669.   {
  670.     switch (CallbackID)
  671.     {
  672.       case HAL_I2C_MASTER_TX_COMPLETE_CB_ID :
  673.         hi2c->MasterTxCpltCallback = pCallback;
  674.         break;
  675.  
  676.       case HAL_I2C_MASTER_RX_COMPLETE_CB_ID :
  677.         hi2c->MasterRxCpltCallback = pCallback;
  678.         break;
  679.  
  680.       case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID :
  681.         hi2c->SlaveTxCpltCallback = pCallback;
  682.         break;
  683.  
  684.       case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID :
  685.         hi2c->SlaveRxCpltCallback = pCallback;
  686.         break;
  687.  
  688.       case HAL_I2C_LISTEN_COMPLETE_CB_ID :
  689.         hi2c->ListenCpltCallback = pCallback;
  690.         break;
  691.  
  692.       case HAL_I2C_MEM_TX_COMPLETE_CB_ID :
  693.         hi2c->MemTxCpltCallback = pCallback;
  694.         break;
  695.  
  696.       case HAL_I2C_MEM_RX_COMPLETE_CB_ID :
  697.         hi2c->MemRxCpltCallback = pCallback;
  698.         break;
  699.  
  700.       case HAL_I2C_ERROR_CB_ID :
  701.         hi2c->ErrorCallback = pCallback;
  702.         break;
  703.  
  704.       case HAL_I2C_ABORT_CB_ID :
  705.         hi2c->AbortCpltCallback = pCallback;
  706.         break;
  707.  
  708.       case HAL_I2C_MSPINIT_CB_ID :
  709.         hi2c->MspInitCallback = pCallback;
  710.         break;
  711.  
  712.       case HAL_I2C_MSPDEINIT_CB_ID :
  713.         hi2c->MspDeInitCallback = pCallback;
  714.         break;
  715.  
  716.       default :
  717.         /* Update the error code */
  718.         hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  719.  
  720.         /* Return error status */
  721.         status =  HAL_ERROR;
  722.         break;
  723.     }
  724.   }
  725.   else if (HAL_I2C_STATE_RESET == hi2c->State)
  726.   {
  727.     switch (CallbackID)
  728.     {
  729.       case HAL_I2C_MSPINIT_CB_ID :
  730.         hi2c->MspInitCallback = pCallback;
  731.         break;
  732.  
  733.       case HAL_I2C_MSPDEINIT_CB_ID :
  734.         hi2c->MspDeInitCallback = pCallback;
  735.         break;
  736.  
  737.       default :
  738.         /* Update the error code */
  739.         hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  740.  
  741.         /* Return error status */
  742.         status =  HAL_ERROR;
  743.         break;
  744.     }
  745.   }
  746.   else
  747.   {
  748.     /* Update the error code */
  749.     hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  750.  
  751.     /* Return error status */
  752.     status =  HAL_ERROR;
  753.   }
  754.  
  755.   /* Release Lock */
  756.   __HAL_UNLOCK(hi2c);
  757.   return status;
  758. }
  759.  
  760. /**
  761.   * @brief  Unregister an I2C Callback
  762.   *         I2C callback is redirected to the weak predefined callback
  763.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  764.   *                the configuration information for the specified I2C.
  765.   * @param  CallbackID ID of the callback to be unregistered
  766.   *         This parameter can be one of the following values:
  767.   *         This parameter can be one of the following values:
  768.   *          @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID
  769.   *          @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID
  770.   *          @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID
  771.   *          @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID
  772.   *          @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID
  773.   *          @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID
  774.   *          @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID
  775.   *          @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID
  776.   *          @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID
  777.   *          @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID
  778.   *          @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID
  779.   * @retval HAL status
  780.   */
  781. HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID)
  782. {
  783.   HAL_StatusTypeDef status = HAL_OK;
  784.  
  785.   /* Process locked */
  786.   __HAL_LOCK(hi2c);
  787.  
  788.   if (HAL_I2C_STATE_READY == hi2c->State)
  789.   {
  790.     switch (CallbackID)
  791.     {
  792.       case HAL_I2C_MASTER_TX_COMPLETE_CB_ID :
  793.         hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallback */
  794.         break;
  795.  
  796.       case HAL_I2C_MASTER_RX_COMPLETE_CB_ID :
  797.         hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallback */
  798.         break;
  799.  
  800.       case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID :
  801.         hi2c->SlaveTxCpltCallback = HAL_I2C_SlaveTxCpltCallback;   /* Legacy weak SlaveTxCpltCallback  */
  802.         break;
  803.  
  804.       case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID :
  805.         hi2c->SlaveRxCpltCallback = HAL_I2C_SlaveRxCpltCallback;   /* Legacy weak SlaveRxCpltCallback  */
  806.         break;
  807.  
  808.       case HAL_I2C_LISTEN_COMPLETE_CB_ID :
  809.         hi2c->ListenCpltCallback = HAL_I2C_ListenCpltCallback;     /* Legacy weak ListenCpltCallback   */
  810.         break;
  811.  
  812.       case HAL_I2C_MEM_TX_COMPLETE_CB_ID :
  813.         hi2c->MemTxCpltCallback = HAL_I2C_MemTxCpltCallback;       /* Legacy weak MemTxCpltCallback    */
  814.         break;
  815.  
  816.       case HAL_I2C_MEM_RX_COMPLETE_CB_ID :
  817.         hi2c->MemRxCpltCallback = HAL_I2C_MemRxCpltCallback;       /* Legacy weak MemRxCpltCallback    */
  818.         break;
  819.  
  820.       case HAL_I2C_ERROR_CB_ID :
  821.         hi2c->ErrorCallback = HAL_I2C_ErrorCallback;               /* Legacy weak ErrorCallback        */
  822.         break;
  823.  
  824.       case HAL_I2C_ABORT_CB_ID :
  825.         hi2c->AbortCpltCallback = HAL_I2C_AbortCpltCallback;       /* Legacy weak AbortCpltCallback    */
  826.         break;
  827.  
  828.       case HAL_I2C_MSPINIT_CB_ID :
  829.         hi2c->MspInitCallback = HAL_I2C_MspInit;                   /* Legacy weak MspInit              */
  830.         break;
  831.  
  832.       case HAL_I2C_MSPDEINIT_CB_ID :
  833.         hi2c->MspDeInitCallback = HAL_I2C_MspDeInit;               /* Legacy weak MspDeInit            */
  834.         break;
  835.  
  836.       default :
  837.         /* Update the error code */
  838.         hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  839.  
  840.         /* Return error status */
  841.         status =  HAL_ERROR;
  842.         break;
  843.     }
  844.   }
  845.   else if (HAL_I2C_STATE_RESET == hi2c->State)
  846.   {
  847.     switch (CallbackID)
  848.     {
  849.       case HAL_I2C_MSPINIT_CB_ID :
  850.         hi2c->MspInitCallback = HAL_I2C_MspInit;                   /* Legacy weak MspInit              */
  851.         break;
  852.  
  853.       case HAL_I2C_MSPDEINIT_CB_ID :
  854.         hi2c->MspDeInitCallback = HAL_I2C_MspDeInit;               /* Legacy weak MspDeInit            */
  855.         break;
  856.  
  857.       default :
  858.         /* Update the error code */
  859.         hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  860.  
  861.         /* Return error status */
  862.         status =  HAL_ERROR;
  863.         break;
  864.     }
  865.   }
  866.   else
  867.   {
  868.     /* Update the error code */
  869.     hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  870.  
  871.     /* Return error status */
  872.     status =  HAL_ERROR;
  873.   }
  874.  
  875.   /* Release Lock */
  876.   __HAL_UNLOCK(hi2c);
  877.   return status;
  878. }
  879.  
  880. /**
  881.   * @brief  Register the Slave Address Match I2C Callback
  882.   *         To be used instead of the weak HAL_I2C_AddrCallback() predefined callback
  883.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  884.   *                the configuration information for the specified I2C.
  885.   * @param  pCallback pointer to the Address Match Callback function
  886.   * @retval HAL status
  887.   */
  888. HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback)
  889. {
  890.   HAL_StatusTypeDef status = HAL_OK;
  891.  
  892.   if (pCallback == NULL)
  893.   {
  894.     /* Update the error code */
  895.     hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  896.  
  897.     return HAL_ERROR;
  898.   }
  899.   /* Process locked */
  900.   __HAL_LOCK(hi2c);
  901.  
  902.   if (HAL_I2C_STATE_READY == hi2c->State)
  903.   {
  904.     hi2c->AddrCallback = pCallback;
  905.   }
  906.   else
  907.   {
  908.     /* Update the error code */
  909.     hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  910.  
  911.     /* Return error status */
  912.     status =  HAL_ERROR;
  913.   }
  914.  
  915.   /* Release Lock */
  916.   __HAL_UNLOCK(hi2c);
  917.   return status;
  918. }
  919.  
  920. /**
  921.   * @brief  UnRegister the Slave Address Match I2C Callback
  922.   *         Info Ready I2C Callback is redirected to the weak HAL_I2C_AddrCallback() predefined callback
  923.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  924.   *                the configuration information for the specified I2C.
  925.   * @retval HAL status
  926.   */
  927. HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c)
  928. {
  929.   HAL_StatusTypeDef status = HAL_OK;
  930.  
  931.   /* Process locked */
  932.   __HAL_LOCK(hi2c);
  933.  
  934.   if (HAL_I2C_STATE_READY == hi2c->State)
  935.   {
  936.     hi2c->AddrCallback = HAL_I2C_AddrCallback; /* Legacy weak AddrCallback  */
  937.   }
  938.   else
  939.   {
  940.     /* Update the error code */
  941.     hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  942.  
  943.     /* Return error status */
  944.     status =  HAL_ERROR;
  945.   }
  946.  
  947.   /* Release Lock */
  948.   __HAL_UNLOCK(hi2c);
  949.   return status;
  950. }
  951.  
  952. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  953.  
  954. /**
  955.   * @}
  956.   */
  957.  
  958. /** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions
  959.  *  @brief   Data transfers functions
  960.  *
  961. @verbatim
  962.  ===============================================================================
  963.                       ##### IO operation functions #####
  964.  ===============================================================================
  965.     [..]
  966.     This subsection provides a set of functions allowing to manage the I2C data
  967.     transfers.
  968.  
  969.     (#) There are two modes of transfer:
  970.        (++) Blocking mode : The communication is performed in the polling mode.
  971.             The status of all data processing is returned by the same function
  972.             after finishing transfer.
  973.        (++) No-Blocking mode : The communication is performed using Interrupts
  974.             or DMA. These functions return the status of the transfer startup.
  975.             The end of the data processing will be indicated through the
  976.             dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
  977.             using DMA mode.
  978.  
  979.     (#) Blocking mode functions are :
  980.         (++) HAL_I2C_Master_Transmit()
  981.         (++) HAL_I2C_Master_Receive()
  982.         (++) HAL_I2C_Slave_Transmit()
  983.         (++) HAL_I2C_Slave_Receive()
  984.         (++) HAL_I2C_Mem_Write()
  985.         (++) HAL_I2C_Mem_Read()
  986.         (++) HAL_I2C_IsDeviceReady()
  987.  
  988.     (#) No-Blocking mode functions with Interrupt are :
  989.         (++) HAL_I2C_Master_Transmit_IT()
  990.         (++) HAL_I2C_Master_Receive_IT()
  991.         (++) HAL_I2C_Slave_Transmit_IT()
  992.         (++) HAL_I2C_Slave_Receive_IT()
  993.         (++) HAL_I2C_Mem_Write_IT()
  994.         (++) HAL_I2C_Mem_Read_IT()
  995.         (++) HAL_I2C_Master_Seq_Transmit_IT()
  996.         (++) HAL_I2C_Master_Seq_Receive_IT()
  997.         (++) HAL_I2C_Slave_Seq_Transmit_IT()
  998.         (++) HAL_I2C_Slave_Seq_Receive_IT()
  999.         (++) HAL_I2C_EnableListen_IT()
  1000.         (++) HAL_I2C_DisableListen_IT()
  1001.         (++) HAL_I2C_Master_Abort_IT()
  1002.  
  1003.     (#) No-Blocking mode functions with DMA are :
  1004.         (++) HAL_I2C_Master_Transmit_DMA()
  1005.         (++) HAL_I2C_Master_Receive_DMA()
  1006.         (++) HAL_I2C_Slave_Transmit_DMA()
  1007.         (++) HAL_I2C_Slave_Receive_DMA()
  1008.         (++) HAL_I2C_Mem_Write_DMA()
  1009.         (++) HAL_I2C_Mem_Read_DMA()
  1010.         (++) HAL_I2C_Master_Seq_Transmit_DMA()
  1011.         (++) HAL_I2C_Master_Seq_Receive_DMA()
  1012.         (++) HAL_I2C_Slave_Seq_Transmit_DMA()
  1013.         (++) HAL_I2C_Slave_Seq_Receive_DMA()
  1014.  
  1015.     (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
  1016.         (++) HAL_I2C_MasterTxCpltCallback()
  1017.         (++) HAL_I2C_MasterRxCpltCallback()
  1018.         (++) HAL_I2C_SlaveTxCpltCallback()
  1019.         (++) HAL_I2C_SlaveRxCpltCallback()
  1020.         (++) HAL_I2C_MemTxCpltCallback()
  1021.         (++) HAL_I2C_MemRxCpltCallback()
  1022.         (++) HAL_I2C_AddrCallback()
  1023.         (++) HAL_I2C_ListenCpltCallback()
  1024.         (++) HAL_I2C_ErrorCallback()
  1025.         (++) HAL_I2C_AbortCpltCallback()
  1026.  
  1027. @endverbatim
  1028.   * @{
  1029.   */
  1030.  
  1031. /**
  1032.   * @brief  Transmits in master mode an amount of data in blocking mode.
  1033.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1034.   *                the configuration information for the specified I2C.
  1035.   * @param  DevAddress Target device address: The device 7 bits address value
  1036.   *         in datasheet must be shifted to the left before calling the interface
  1037.   * @param  pData Pointer to data buffer
  1038.   * @param  Size Amount of data to be sent
  1039.   * @param  Timeout Timeout duration
  1040.   * @retval HAL status
  1041.   */
  1042. HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  1043. {
  1044.   /* Init tickstart for timeout management*/
  1045.   uint32_t tickstart = HAL_GetTick();
  1046.  
  1047.   if (hi2c->State == HAL_I2C_STATE_READY)
  1048.   {
  1049.     /* Wait until BUSY flag is reset */
  1050.     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  1051.     {
  1052.       return HAL_BUSY;
  1053.     }
  1054.  
  1055.     /* Process Locked */
  1056.     __HAL_LOCK(hi2c);
  1057.  
  1058.     /* Check if the I2C is already enabled */
  1059.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1060.     {
  1061.       /* Enable I2C peripheral */
  1062.       __HAL_I2C_ENABLE(hi2c);
  1063.     }
  1064.  
  1065.     /* Disable Pos */
  1066.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1067.  
  1068.     hi2c->State       = HAL_I2C_STATE_BUSY_TX;
  1069.     hi2c->Mode        = HAL_I2C_MODE_MASTER;
  1070.     hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
  1071.  
  1072.     /* Prepare transfer parameters */
  1073.     hi2c->pBuffPtr    = pData;
  1074.     hi2c->XferCount   = Size;
  1075.     hi2c->XferSize    = hi2c->XferCount;
  1076.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1077.  
  1078.     /* Send Slave Address */
  1079.     if (I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
  1080.     {
  1081.       return HAL_ERROR;
  1082.     }
  1083.  
  1084.     /* Clear ADDR flag */
  1085.     __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1086.  
  1087.     while (hi2c->XferSize > 0U)
  1088.     {
  1089.       /* Wait until TXE flag is set */
  1090.       if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1091.       {
  1092.         if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1093.         {
  1094.           /* Generate Stop */
  1095.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1096.         }
  1097.         return HAL_ERROR;
  1098.       }
  1099.  
  1100.       /* Write data to DR */
  1101.       hi2c->Instance->DR = *hi2c->pBuffPtr;
  1102.  
  1103.       /* Increment Buffer pointer */
  1104.       hi2c->pBuffPtr++;
  1105.  
  1106.       /* Update counter */
  1107.       hi2c->XferCount--;
  1108.       hi2c->XferSize--;
  1109.  
  1110.       if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  1111.       {
  1112.         /* Write data to DR */
  1113.         hi2c->Instance->DR = *hi2c->pBuffPtr;
  1114.  
  1115.         /* Increment Buffer pointer */
  1116.         hi2c->pBuffPtr++;
  1117.  
  1118.         /* Update counter */
  1119.         hi2c->XferCount--;
  1120.         hi2c->XferSize--;
  1121.       }
  1122.  
  1123.       /* Wait until BTF flag is set */
  1124.       if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1125.       {
  1126.         if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1127.         {
  1128.           /* Generate Stop */
  1129.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1130.         }
  1131.         return HAL_ERROR;
  1132.       }
  1133.     }
  1134.  
  1135.     /* Generate Stop */
  1136.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1137.  
  1138.     hi2c->State = HAL_I2C_STATE_READY;
  1139.     hi2c->Mode = HAL_I2C_MODE_NONE;
  1140.  
  1141.     /* Process Unlocked */
  1142.     __HAL_UNLOCK(hi2c);
  1143.  
  1144.     return HAL_OK;
  1145.   }
  1146.   else
  1147.   {
  1148.     return HAL_BUSY;
  1149.   }
  1150. }
  1151.  
  1152. /**
  1153.   * @brief  Receives in master mode an amount of data in blocking mode.
  1154.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1155.   *                the configuration information for the specified I2C.
  1156.   * @param  DevAddress Target device address: The device 7 bits address value
  1157.   *         in datasheet must be shifted to the left before calling the interface
  1158.   * @param  pData Pointer to data buffer
  1159.   * @param  Size Amount of data to be sent
  1160.   * @param  Timeout Timeout duration
  1161.   * @retval HAL status
  1162.   */
  1163. HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  1164. {
  1165.   /* Init tickstart for timeout management*/
  1166.   uint32_t tickstart = HAL_GetTick();
  1167.  
  1168.   if (hi2c->State == HAL_I2C_STATE_READY)
  1169.   {
  1170.     /* Wait until BUSY flag is reset */
  1171.     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  1172.     {
  1173.       return HAL_BUSY;
  1174.     }
  1175.  
  1176.     /* Process Locked */
  1177.     __HAL_LOCK(hi2c);
  1178.  
  1179.     /* Check if the I2C is already enabled */
  1180.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1181.     {
  1182.       /* Enable I2C peripheral */
  1183.       __HAL_I2C_ENABLE(hi2c);
  1184.     }
  1185.  
  1186.     /* Disable Pos */
  1187.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1188.  
  1189.     hi2c->State       = HAL_I2C_STATE_BUSY_RX;
  1190.     hi2c->Mode        = HAL_I2C_MODE_MASTER;
  1191.     hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
  1192.  
  1193.     /* Prepare transfer parameters */
  1194.     hi2c->pBuffPtr    = pData;
  1195.     hi2c->XferCount   = Size;
  1196.     hi2c->XferSize    = hi2c->XferCount;
  1197.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1198.  
  1199.     /* Send Slave Address */
  1200.     if (I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
  1201.     {
  1202.       return HAL_ERROR;
  1203.     }
  1204.  
  1205.     if (hi2c->XferSize == 0U)
  1206.     {
  1207.       /* Clear ADDR flag */
  1208.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1209.  
  1210.       /* Generate Stop */
  1211.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1212.     }
  1213.     else if (hi2c->XferSize == 1U)
  1214.     {
  1215.       /* Disable Acknowledge */
  1216.       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1217.  
  1218.       /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  1219.       software sequence must complete before the current byte end of transfer */
  1220.       __disable_irq();
  1221.  
  1222.       /* Clear ADDR flag */
  1223.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1224.  
  1225.       /* Generate Stop */
  1226.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1227.  
  1228.       /* Re-enable IRQs */
  1229.       __enable_irq();
  1230.     }
  1231.     else if (hi2c->XferSize == 2U)
  1232.     {
  1233.       /* Enable Pos */
  1234.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1235.  
  1236.       /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  1237.       software sequence must complete before the current byte end of transfer */
  1238.       __disable_irq();
  1239.  
  1240.       /* Clear ADDR flag */
  1241.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1242.  
  1243.       /* Disable Acknowledge */
  1244.       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1245.  
  1246.       /* Re-enable IRQs */
  1247.       __enable_irq();
  1248.     }
  1249.     else
  1250.     {
  1251.       /* Enable Acknowledge */
  1252.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1253.  
  1254.       /* Clear ADDR flag */
  1255.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1256.     }
  1257.  
  1258.     while (hi2c->XferSize > 0U)
  1259.     {
  1260.       if (hi2c->XferSize <= 3U)
  1261.       {
  1262.         /* One byte */
  1263.         if (hi2c->XferSize == 1U)
  1264.         {
  1265.           /* Wait until RXNE flag is set */
  1266.           if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1267.           {
  1268.             return HAL_ERROR;
  1269.           }
  1270.  
  1271.           /* Read data from DR */
  1272.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1273.  
  1274.           /* Increment Buffer pointer */
  1275.           hi2c->pBuffPtr++;
  1276.  
  1277.           /* Update counter */
  1278.           hi2c->XferSize--;
  1279.           hi2c->XferCount--;
  1280.         }
  1281.         /* Two bytes */
  1282.         else if (hi2c->XferSize == 2U)
  1283.         {
  1284.           /* Wait until BTF flag is set */
  1285.           if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  1286.           {
  1287.             return HAL_ERROR;
  1288.           }
  1289.  
  1290.           /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  1291.              software sequence must complete before the current byte end of transfer */
  1292.           __disable_irq();
  1293.  
  1294.           /* Generate Stop */
  1295.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1296.  
  1297.           /* Read data from DR */
  1298.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1299.  
  1300.           /* Increment Buffer pointer */
  1301.           hi2c->pBuffPtr++;
  1302.  
  1303.           /* Update counter */
  1304.           hi2c->XferSize--;
  1305.           hi2c->XferCount--;
  1306.  
  1307.           /* Re-enable IRQs */
  1308.           __enable_irq();
  1309.  
  1310.           /* Read data from DR */
  1311.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1312.  
  1313.           /* Increment Buffer pointer */
  1314.           hi2c->pBuffPtr++;
  1315.  
  1316.           /* Update counter */
  1317.           hi2c->XferSize--;
  1318.           hi2c->XferCount--;
  1319.         }
  1320.         /* 3 Last bytes */
  1321.         else
  1322.         {
  1323.           /* Wait until BTF flag is set */
  1324.           if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  1325.           {
  1326.             return HAL_ERROR;
  1327.           }
  1328.  
  1329.           /* Disable Acknowledge */
  1330.           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1331.  
  1332.           /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  1333.              software sequence must complete before the current byte end of transfer */
  1334.           __disable_irq();
  1335.  
  1336.           /* Read data from DR */
  1337.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1338.  
  1339.           /* Increment Buffer pointer */
  1340.           hi2c->pBuffPtr++;
  1341.  
  1342.           /* Update counter */
  1343.           hi2c->XferSize--;
  1344.           hi2c->XferCount--;
  1345.  
  1346.           /* Wait until BTF flag is set */
  1347.           if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  1348.           {
  1349.             return HAL_ERROR;
  1350.           }
  1351.  
  1352.           /* Generate Stop */
  1353.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1354.  
  1355.           /* Read data from DR */
  1356.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1357.  
  1358.           /* Increment Buffer pointer */
  1359.           hi2c->pBuffPtr++;
  1360.  
  1361.           /* Update counter */
  1362.           hi2c->XferSize--;
  1363.           hi2c->XferCount--;
  1364.  
  1365.           /* Re-enable IRQs */
  1366.           __enable_irq();
  1367.  
  1368.           /* Read data from DR */
  1369.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1370.  
  1371.           /* Increment Buffer pointer */
  1372.           hi2c->pBuffPtr++;
  1373.  
  1374.           /* Update counter */
  1375.           hi2c->XferSize--;
  1376.           hi2c->XferCount--;
  1377.         }
  1378.       }
  1379.       else
  1380.       {
  1381.         /* Wait until RXNE flag is set */
  1382.         if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1383.         {
  1384.           return HAL_ERROR;
  1385.         }
  1386.  
  1387.         /* Read data from DR */
  1388.         *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1389.  
  1390.         /* Increment Buffer pointer */
  1391.         hi2c->pBuffPtr++;
  1392.  
  1393.         /* Update counter */
  1394.         hi2c->XferSize--;
  1395.         hi2c->XferCount--;
  1396.  
  1397.         if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  1398.         {
  1399.           /* Read data from DR */
  1400.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1401.  
  1402.           /* Increment Buffer pointer */
  1403.           hi2c->pBuffPtr++;
  1404.  
  1405.           /* Update counter */
  1406.           hi2c->XferSize--;
  1407.           hi2c->XferCount--;
  1408.         }
  1409.       }
  1410.     }
  1411.  
  1412.     hi2c->State = HAL_I2C_STATE_READY;
  1413.     hi2c->Mode = HAL_I2C_MODE_NONE;
  1414.  
  1415.     /* Process Unlocked */
  1416.     __HAL_UNLOCK(hi2c);
  1417.  
  1418.     return HAL_OK;
  1419.   }
  1420.   else
  1421.   {
  1422.     return HAL_BUSY;
  1423.   }
  1424. }
  1425.  
  1426. /**
  1427.   * @brief  Transmits in slave mode an amount of data in blocking mode.
  1428.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1429.   *                the configuration information for the specified I2C.
  1430.   * @param  pData Pointer to data buffer
  1431.   * @param  Size Amount of data to be sent
  1432.   * @param  Timeout Timeout duration
  1433.   * @retval HAL status
  1434.   */
  1435. HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  1436. {
  1437.   /* Init tickstart for timeout management*/
  1438.   uint32_t tickstart = HAL_GetTick();
  1439.  
  1440.   if (hi2c->State == HAL_I2C_STATE_READY)
  1441.   {
  1442.     if ((pData == NULL) || (Size == 0U))
  1443.     {
  1444.       return  HAL_ERROR;
  1445.     }
  1446.  
  1447.     /* Process Locked */
  1448.     __HAL_LOCK(hi2c);
  1449.  
  1450.     /* Check if the I2C is already enabled */
  1451.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1452.     {
  1453.       /* Enable I2C peripheral */
  1454.       __HAL_I2C_ENABLE(hi2c);
  1455.     }
  1456.  
  1457.     /* Disable Pos */
  1458.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1459.  
  1460.     hi2c->State       = HAL_I2C_STATE_BUSY_TX;
  1461.     hi2c->Mode        = HAL_I2C_MODE_SLAVE;
  1462.     hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
  1463.  
  1464.     /* Prepare transfer parameters */
  1465.     hi2c->pBuffPtr    = pData;
  1466.     hi2c->XferCount   = Size;
  1467.     hi2c->XferSize    = hi2c->XferCount;
  1468.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1469.  
  1470.     /* Enable Address Acknowledge */
  1471.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1472.  
  1473.     /* Wait until ADDR flag is set */
  1474.     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  1475.     {
  1476.       return HAL_ERROR;
  1477.     }
  1478.  
  1479.     /* Clear ADDR flag */
  1480.     __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1481.  
  1482.     /* If 10bit addressing mode is selected */
  1483.     if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
  1484.     {
  1485.       /* Wait until ADDR flag is set */
  1486.       if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  1487.       {
  1488.         return HAL_ERROR;
  1489.       }
  1490.  
  1491.       /* Clear ADDR flag */
  1492.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1493.     }
  1494.  
  1495.     while (hi2c->XferSize > 0U)
  1496.     {
  1497.       /* Wait until TXE flag is set */
  1498.       if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1499.       {
  1500.         /* Disable Address Acknowledge */
  1501.         CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1502.  
  1503.         return HAL_ERROR;
  1504.       }
  1505.  
  1506.       /* Write data to DR */
  1507.       hi2c->Instance->DR = *hi2c->pBuffPtr;
  1508.  
  1509.       /* Increment Buffer pointer */
  1510.       hi2c->pBuffPtr++;
  1511.  
  1512.       /* Update counter */
  1513.       hi2c->XferCount--;
  1514.       hi2c->XferSize--;
  1515.  
  1516.       if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  1517.       {
  1518.         /* Write data to DR */
  1519.         hi2c->Instance->DR = *hi2c->pBuffPtr;
  1520.  
  1521.         /* Increment Buffer pointer */
  1522.         hi2c->pBuffPtr++;
  1523.  
  1524.         /* Update counter */
  1525.         hi2c->XferCount--;
  1526.         hi2c->XferSize--;
  1527.       }
  1528.     }
  1529.  
  1530.     /* Wait until AF flag is set */
  1531.     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK)
  1532.     {
  1533.       return HAL_ERROR;
  1534.     }
  1535.  
  1536.     /* Clear AF flag */
  1537.     __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  1538.  
  1539.     /* Disable Address Acknowledge */
  1540.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1541.  
  1542.     hi2c->State = HAL_I2C_STATE_READY;
  1543.     hi2c->Mode = HAL_I2C_MODE_NONE;
  1544.  
  1545.     /* Process Unlocked */
  1546.     __HAL_UNLOCK(hi2c);
  1547.  
  1548.     return HAL_OK;
  1549.   }
  1550.   else
  1551.   {
  1552.     return HAL_BUSY;
  1553.   }
  1554. }
  1555.  
  1556. /**
  1557.   * @brief  Receive in slave mode an amount of data in blocking mode
  1558.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1559.   *         the configuration information for the specified I2C.
  1560.   * @param  pData Pointer to data buffer
  1561.   * @param  Size Amount of data to be sent
  1562.   * @param  Timeout Timeout duration
  1563.   * @retval HAL status
  1564.   */
  1565. HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  1566. {
  1567.   /* Init tickstart for timeout management*/
  1568.   uint32_t tickstart = HAL_GetTick();
  1569.  
  1570.   if (hi2c->State == HAL_I2C_STATE_READY)
  1571.   {
  1572.     if ((pData == NULL) || (Size == (uint16_t)0))
  1573.     {
  1574.       return HAL_ERROR;
  1575.     }
  1576.  
  1577.     /* Process Locked */
  1578.     __HAL_LOCK(hi2c);
  1579.  
  1580.     /* Check if the I2C is already enabled */
  1581.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1582.     {
  1583.       /* Enable I2C peripheral */
  1584.       __HAL_I2C_ENABLE(hi2c);
  1585.     }
  1586.  
  1587.     /* Disable Pos */
  1588.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1589.  
  1590.     hi2c->State       = HAL_I2C_STATE_BUSY_RX;
  1591.     hi2c->Mode        = HAL_I2C_MODE_SLAVE;
  1592.     hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
  1593.  
  1594.     /* Prepare transfer parameters */
  1595.     hi2c->pBuffPtr    = pData;
  1596.     hi2c->XferCount   = Size;
  1597.     hi2c->XferSize    = hi2c->XferCount;
  1598.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1599.  
  1600.     /* Enable Address Acknowledge */
  1601.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1602.  
  1603.     /* Wait until ADDR flag is set */
  1604.     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  1605.     {
  1606.       return HAL_ERROR;
  1607.     }
  1608.  
  1609.     /* Clear ADDR flag */
  1610.     __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1611.  
  1612.     while (hi2c->XferSize > 0U)
  1613.     {
  1614.       /* Wait until RXNE flag is set */
  1615.       if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1616.       {
  1617.         /* Disable Address Acknowledge */
  1618.         CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1619.  
  1620.         return HAL_ERROR;
  1621.       }
  1622.  
  1623.       /* Read data from DR */
  1624.       *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1625.  
  1626.       /* Increment Buffer pointer */
  1627.       hi2c->pBuffPtr++;
  1628.  
  1629.       /* Update counter */
  1630.       hi2c->XferSize--;
  1631.       hi2c->XferCount--;
  1632.  
  1633.       if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  1634.       {
  1635.         /* Read data from DR */
  1636.         *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1637.  
  1638.         /* Increment Buffer pointer */
  1639.         hi2c->pBuffPtr++;
  1640.  
  1641.         /* Update counter */
  1642.         hi2c->XferSize--;
  1643.         hi2c->XferCount--;
  1644.       }
  1645.     }
  1646.  
  1647.     /* Wait until STOP flag is set */
  1648.     if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1649.     {
  1650.       /* Disable Address Acknowledge */
  1651.       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1652.  
  1653.       return HAL_ERROR;
  1654.     }
  1655.  
  1656.     /* Clear STOP flag */
  1657.     __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  1658.  
  1659.     /* Disable Address Acknowledge */
  1660.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1661.  
  1662.     hi2c->State = HAL_I2C_STATE_READY;
  1663.     hi2c->Mode = HAL_I2C_MODE_NONE;
  1664.  
  1665.     /* Process Unlocked */
  1666.     __HAL_UNLOCK(hi2c);
  1667.  
  1668.     return HAL_OK;
  1669.   }
  1670.   else
  1671.   {
  1672.     return HAL_BUSY;
  1673.   }
  1674. }
  1675.  
  1676. /**
  1677.   * @brief  Transmit in master mode an amount of data in non-blocking mode with Interrupt
  1678.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1679.   *                the configuration information for the specified I2C.
  1680.   * @param  DevAddress Target device address: The device 7 bits address value
  1681.   *         in datasheet must be shifted to the left before calling the interface
  1682.   * @param  pData Pointer to data buffer
  1683.   * @param  Size Amount of data to be sent
  1684.   * @retval HAL status
  1685.   */
  1686. HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1687. {
  1688.   __IO uint32_t count = 0U;
  1689.  
  1690.   if (hi2c->State == HAL_I2C_STATE_READY)
  1691.   {
  1692.     /* Wait until BUSY flag is reset */
  1693.     count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  1694.     do
  1695.     {
  1696.       count--;
  1697.       if (count == 0U)
  1698.       {
  1699.         hi2c->PreviousState       = I2C_STATE_NONE;
  1700.         hi2c->State               = HAL_I2C_STATE_READY;
  1701.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  1702.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  1703.  
  1704.         /* Process Unlocked */
  1705.         __HAL_UNLOCK(hi2c);
  1706.  
  1707.         return HAL_ERROR;
  1708.       }
  1709.     }
  1710.     while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1711.  
  1712.     /* Process Locked */
  1713.     __HAL_LOCK(hi2c);
  1714.  
  1715.     /* Check if the I2C is already enabled */
  1716.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1717.     {
  1718.       /* Enable I2C peripheral */
  1719.       __HAL_I2C_ENABLE(hi2c);
  1720.     }
  1721.  
  1722.     /* Disable Pos */
  1723.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1724.  
  1725.     hi2c->State     = HAL_I2C_STATE_BUSY_TX;
  1726.     hi2c->Mode      = HAL_I2C_MODE_MASTER;
  1727.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1728.  
  1729.     /* Prepare transfer parameters */
  1730.     hi2c->pBuffPtr    = pData;
  1731.     hi2c->XferCount   = Size;
  1732.     hi2c->XferSize    = hi2c->XferCount;
  1733.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1734.     hi2c->Devaddress  = DevAddress;
  1735.  
  1736.     /* Generate Start */
  1737.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  1738.  
  1739.     /* Process Unlocked */
  1740.     __HAL_UNLOCK(hi2c);
  1741.  
  1742.     /* Note : The I2C interrupts must be enabled after unlocking current process
  1743.               to avoid the risk of I2C interrupt handle execution before current
  1744.               process unlock */
  1745.     /* Enable EVT, BUF and ERR interrupt */
  1746.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1747.  
  1748.     return HAL_OK;
  1749.   }
  1750.   else
  1751.   {
  1752.     return HAL_BUSY;
  1753.   }
  1754. }
  1755.  
  1756. /**
  1757.   * @brief  Receive in master mode an amount of data in non-blocking mode with Interrupt
  1758.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1759.   *                the configuration information for the specified I2C.
  1760.   * @param  DevAddress Target device address: The device 7 bits address value
  1761.   *         in datasheet must be shifted to the left before calling the interface
  1762.   * @param  pData Pointer to data buffer
  1763.   * @param  Size Amount of data to be sent
  1764.   * @retval HAL status
  1765.   */
  1766. HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1767. {
  1768.   __IO uint32_t count = 0U;
  1769.  
  1770.   if (hi2c->State == HAL_I2C_STATE_READY)
  1771.   {
  1772.     /* Wait until BUSY flag is reset */
  1773.     count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  1774.     do
  1775.     {
  1776.       count--;
  1777.       if (count == 0U)
  1778.       {
  1779.         hi2c->PreviousState       = I2C_STATE_NONE;
  1780.         hi2c->State               = HAL_I2C_STATE_READY;
  1781.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  1782.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  1783.  
  1784.         /* Process Unlocked */
  1785.         __HAL_UNLOCK(hi2c);
  1786.  
  1787.         return HAL_ERROR;
  1788.       }
  1789.     }
  1790.     while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1791.  
  1792.     /* Process Locked */
  1793.     __HAL_LOCK(hi2c);
  1794.  
  1795.     /* Check if the I2C is already enabled */
  1796.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1797.     {
  1798.       /* Enable I2C peripheral */
  1799.       __HAL_I2C_ENABLE(hi2c);
  1800.     }
  1801.  
  1802.     /* Disable Pos */
  1803.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1804.  
  1805.     hi2c->State     = HAL_I2C_STATE_BUSY_RX;
  1806.     hi2c->Mode      = HAL_I2C_MODE_MASTER;
  1807.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1808.  
  1809.     /* Prepare transfer parameters */
  1810.     hi2c->pBuffPtr    = pData;
  1811.     hi2c->XferCount   = Size;
  1812.     hi2c->XferSize    = hi2c->XferCount;
  1813.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1814.     hi2c->Devaddress  = DevAddress;
  1815.  
  1816.     /* Enable Acknowledge */
  1817.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1818.  
  1819.     /* Generate Start */
  1820.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  1821.  
  1822.     /* Process Unlocked */
  1823.     __HAL_UNLOCK(hi2c);
  1824.  
  1825.     /* Note : The I2C interrupts must be enabled after unlocking current process
  1826.     to avoid the risk of I2C interrupt handle execution before current
  1827.     process unlock */
  1828.  
  1829.     /* Enable EVT, BUF and ERR interrupt */
  1830.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1831.  
  1832.     return HAL_OK;
  1833.   }
  1834.   else
  1835.   {
  1836.     return HAL_BUSY;
  1837.   }
  1838. }
  1839.  
  1840. /**
  1841.   * @brief  Transmit in slave mode an amount of data in non-blocking mode with Interrupt
  1842.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1843.   *         the configuration information for the specified I2C.
  1844.   * @param  pData Pointer to data buffer
  1845.   * @param  Size Amount of data to be sent
  1846.   * @retval HAL status
  1847.   */
  1848. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1849. {
  1850.  
  1851.   if (hi2c->State == HAL_I2C_STATE_READY)
  1852.   {
  1853.     if ((pData == NULL) || (Size == 0U))
  1854.     {
  1855.       return  HAL_ERROR;
  1856.     }
  1857.  
  1858.     /* Process Locked */
  1859.     __HAL_LOCK(hi2c);
  1860.  
  1861.     /* Check if the I2C is already enabled */
  1862.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1863.     {
  1864.       /* Enable I2C peripheral */
  1865.       __HAL_I2C_ENABLE(hi2c);
  1866.     }
  1867.  
  1868.     /* Disable Pos */
  1869.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1870.  
  1871.     hi2c->State     = HAL_I2C_STATE_BUSY_TX;
  1872.     hi2c->Mode      = HAL_I2C_MODE_SLAVE;
  1873.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1874.  
  1875.     /* Prepare transfer parameters */
  1876.     hi2c->pBuffPtr    = pData;
  1877.     hi2c->XferCount   = Size;
  1878.     hi2c->XferSize    = hi2c->XferCount;
  1879.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1880.  
  1881.     /* Enable Address Acknowledge */
  1882.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1883.  
  1884.     /* Process Unlocked */
  1885.     __HAL_UNLOCK(hi2c);
  1886.  
  1887.     /* Note : The I2C interrupts must be enabled after unlocking current process
  1888.               to avoid the risk of I2C interrupt handle execution before current
  1889.               process unlock */
  1890.  
  1891.     /* Enable EVT, BUF and ERR interrupt */
  1892.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1893.  
  1894.     return HAL_OK;
  1895.   }
  1896.   else
  1897.   {
  1898.     return HAL_BUSY;
  1899.   }
  1900. }
  1901.  
  1902. /**
  1903.   * @brief  Receive in slave mode an amount of data in non-blocking mode with Interrupt
  1904.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1905.   *                the configuration information for the specified I2C.
  1906.   * @param  pData Pointer to data buffer
  1907.   * @param  Size Amount of data to be sent
  1908.   * @retval HAL status
  1909.   */
  1910. HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1911. {
  1912.  
  1913.   if (hi2c->State == HAL_I2C_STATE_READY)
  1914.   {
  1915.     if ((pData == NULL) || (Size == 0U))
  1916.     {
  1917.       return  HAL_ERROR;
  1918.     }
  1919.  
  1920.     /* Process Locked */
  1921.     __HAL_LOCK(hi2c);
  1922.  
  1923.     /* Check if the I2C is already enabled */
  1924.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1925.     {
  1926.       /* Enable I2C peripheral */
  1927.       __HAL_I2C_ENABLE(hi2c);
  1928.     }
  1929.  
  1930.     /* Disable Pos */
  1931.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1932.  
  1933.     hi2c->State     = HAL_I2C_STATE_BUSY_RX;
  1934.     hi2c->Mode      = HAL_I2C_MODE_SLAVE;
  1935.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1936.  
  1937.     /* Prepare transfer parameters */
  1938.     hi2c->pBuffPtr    = pData;
  1939.     hi2c->XferCount   = Size;
  1940.     hi2c->XferSize    = hi2c->XferCount;
  1941.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1942.  
  1943.     /* Enable Address Acknowledge */
  1944.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1945.  
  1946.     /* Process Unlocked */
  1947.     __HAL_UNLOCK(hi2c);
  1948.  
  1949.     /* Note : The I2C interrupts must be enabled after unlocking current process
  1950.               to avoid the risk of I2C interrupt handle execution before current
  1951.               process unlock */
  1952.  
  1953.     /* Enable EVT, BUF and ERR interrupt */
  1954.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1955.  
  1956.     return HAL_OK;
  1957.   }
  1958.   else
  1959.   {
  1960.     return HAL_BUSY;
  1961.   }
  1962. }
  1963.  
  1964. /**
  1965.   * @brief  Transmit in master mode an amount of data in non-blocking mode with DMA
  1966.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1967.   *                the configuration information for the specified I2C.
  1968.   * @param  DevAddress Target device address: The device 7 bits address value
  1969.   *         in datasheet must be shifted to the left before calling the interface
  1970.   * @param  pData Pointer to data buffer
  1971.   * @param  Size Amount of data to be sent
  1972.   * @retval HAL status
  1973.   */
  1974. HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1975. {
  1976.   __IO uint32_t count = 0U;
  1977.   HAL_StatusTypeDef dmaxferstatus;
  1978.  
  1979.   if (hi2c->State == HAL_I2C_STATE_READY)
  1980.   {
  1981.     /* Wait until BUSY flag is reset */
  1982.     count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  1983.     do
  1984.     {
  1985.       count--;
  1986.       if (count == 0U)
  1987.       {
  1988.         hi2c->PreviousState       = I2C_STATE_NONE;
  1989.         hi2c->State               = HAL_I2C_STATE_READY;
  1990.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  1991.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  1992.  
  1993.         /* Process Unlocked */
  1994.         __HAL_UNLOCK(hi2c);
  1995.  
  1996.         return HAL_ERROR;
  1997.       }
  1998.     }
  1999.     while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2000.  
  2001.     /* Process Locked */
  2002.     __HAL_LOCK(hi2c);
  2003.  
  2004.     /* Check if the I2C is already enabled */
  2005.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2006.     {
  2007.       /* Enable I2C peripheral */
  2008.       __HAL_I2C_ENABLE(hi2c);
  2009.     }
  2010.  
  2011.     /* Disable Pos */
  2012.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2013.  
  2014.     hi2c->State     = HAL_I2C_STATE_BUSY_TX;
  2015.     hi2c->Mode      = HAL_I2C_MODE_MASTER;
  2016.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2017.  
  2018.     /* Prepare transfer parameters */
  2019.     hi2c->pBuffPtr    = pData;
  2020.     hi2c->XferCount   = Size;
  2021.     hi2c->XferSize    = hi2c->XferCount;
  2022.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2023.     hi2c->Devaddress  = DevAddress;
  2024.  
  2025.     if (hi2c->XferSize > 0U)
  2026.     {
  2027.       /* Set the I2C DMA transfer complete callback */
  2028.       hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  2029.  
  2030.       /* Set the DMA error callback */
  2031.       hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  2032.  
  2033.       /* Set the unused DMA callbacks to NULL */
  2034.       hi2c->hdmatx->XferHalfCpltCallback = NULL;
  2035.       hi2c->hdmatx->XferAbortCallback = NULL;
  2036.  
  2037.       /* Enable the DMA channel */
  2038.       dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  2039.  
  2040.       if (dmaxferstatus == HAL_OK)
  2041.       {
  2042.         /* Enable Acknowledge */
  2043.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2044.  
  2045.         /* Generate Start */
  2046.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2047.  
  2048.         /* Process Unlocked */
  2049.         __HAL_UNLOCK(hi2c);
  2050.  
  2051.         /* Note : The I2C interrupts must be enabled after unlocking current process
  2052.         to avoid the risk of I2C interrupt handle execution before current
  2053.         process unlock */
  2054.  
  2055.         /* Enable EVT and ERR interrupt */
  2056.         __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  2057.  
  2058.         /* Enable DMA Request */
  2059.         SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  2060.       }
  2061.       else
  2062.       {
  2063.         /* Update I2C state */
  2064.         hi2c->State     = HAL_I2C_STATE_READY;
  2065.         hi2c->Mode      = HAL_I2C_MODE_NONE;
  2066.  
  2067.         /* Update I2C error code */
  2068.         hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  2069.  
  2070.         /* Process Unlocked */
  2071.         __HAL_UNLOCK(hi2c);
  2072.  
  2073.         return HAL_ERROR;
  2074.       }
  2075.     }
  2076.     else
  2077.     {
  2078.       /* Enable Acknowledge */
  2079.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2080.  
  2081.       /* Generate Start */
  2082.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2083.  
  2084.       /* Process Unlocked */
  2085.       __HAL_UNLOCK(hi2c);
  2086.  
  2087.       /* Note : The I2C interrupts must be enabled after unlocking current process
  2088.       to avoid the risk of I2C interrupt handle execution before current
  2089.       process unlock */
  2090.  
  2091.       /* Enable EVT, BUF and ERR interrupt */
  2092.       __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2093.     }
  2094.  
  2095.     return HAL_OK;
  2096.   }
  2097.   else
  2098.   {
  2099.     return HAL_BUSY;
  2100.   }
  2101. }
  2102.  
  2103. /**
  2104.   * @brief  Receive in master mode an amount of data in non-blocking mode with DMA
  2105.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2106.   *                the configuration information for the specified I2C.
  2107.   * @param  DevAddress Target device address: The device 7 bits address value
  2108.   *         in datasheet must be shifted to the left before calling the interface
  2109.   * @param  pData Pointer to data buffer
  2110.   * @param  Size Amount of data to be sent
  2111.   * @retval HAL status
  2112.   */
  2113. HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  2114. {
  2115.   __IO uint32_t count = 0U;
  2116.   HAL_StatusTypeDef dmaxferstatus;
  2117.  
  2118.   if (hi2c->State == HAL_I2C_STATE_READY)
  2119.   {
  2120.     /* Wait until BUSY flag is reset */
  2121.     count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  2122.     do
  2123.     {
  2124.       count--;
  2125.       if (count == 0U)
  2126.       {
  2127.         hi2c->PreviousState       = I2C_STATE_NONE;
  2128.         hi2c->State               = HAL_I2C_STATE_READY;
  2129.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  2130.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  2131.  
  2132.         /* Process Unlocked */
  2133.         __HAL_UNLOCK(hi2c);
  2134.  
  2135.         return HAL_ERROR;
  2136.       }
  2137.     }
  2138.     while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2139.  
  2140.     /* Process Locked */
  2141.     __HAL_LOCK(hi2c);
  2142.  
  2143.     /* Check if the I2C is already enabled */
  2144.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2145.     {
  2146.       /* Enable I2C peripheral */
  2147.       __HAL_I2C_ENABLE(hi2c);
  2148.     }
  2149.  
  2150.     /* Disable Pos */
  2151.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2152.  
  2153.     hi2c->State     = HAL_I2C_STATE_BUSY_RX;
  2154.     hi2c->Mode      = HAL_I2C_MODE_MASTER;
  2155.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2156.  
  2157.     /* Prepare transfer parameters */
  2158.     hi2c->pBuffPtr    = pData;
  2159.     hi2c->XferCount   = Size;
  2160.     hi2c->XferSize    = hi2c->XferCount;
  2161.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2162.     hi2c->Devaddress  = DevAddress;
  2163.  
  2164.     if (hi2c->XferSize > 0U)
  2165.     {
  2166.       /* Set the I2C DMA transfer complete callback */
  2167.       hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  2168.  
  2169.       /* Set the DMA error callback */
  2170.       hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  2171.  
  2172.       /* Set the unused DMA callbacks to NULL */
  2173.       hi2c->hdmarx->XferHalfCpltCallback = NULL;
  2174.       hi2c->hdmarx->XferAbortCallback = NULL;
  2175.  
  2176.       /* Enable the DMA channel */
  2177.       dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  2178.  
  2179.       if (dmaxferstatus == HAL_OK)
  2180.       {
  2181.         /* Enable Acknowledge */
  2182.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2183.  
  2184.         /* Generate Start */
  2185.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2186.  
  2187.         /* Process Unlocked */
  2188.         __HAL_UNLOCK(hi2c);
  2189.  
  2190.         /* Note : The I2C interrupts must be enabled after unlocking current process
  2191.         to avoid the risk of I2C interrupt handle execution before current
  2192.         process unlock */
  2193.  
  2194.         /* Enable EVT and ERR interrupt */
  2195.         __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  2196.  
  2197.         /* Enable DMA Request */
  2198.         SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  2199.       }
  2200.       else
  2201.       {
  2202.         /* Update I2C state */
  2203.         hi2c->State     = HAL_I2C_STATE_READY;
  2204.         hi2c->Mode      = HAL_I2C_MODE_NONE;
  2205.  
  2206.         /* Update I2C error code */
  2207.         hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  2208.  
  2209.         /* Process Unlocked */
  2210.         __HAL_UNLOCK(hi2c);
  2211.  
  2212.         return HAL_ERROR;
  2213.       }
  2214.     }
  2215.     else
  2216.     {
  2217.       /* Enable Acknowledge */
  2218.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2219.  
  2220.       /* Generate Start */
  2221.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2222.  
  2223.       /* Process Unlocked */
  2224.       __HAL_UNLOCK(hi2c);
  2225.  
  2226.       /* Note : The I2C interrupts must be enabled after unlocking current process
  2227.       to avoid the risk of I2C interrupt handle execution before current
  2228.       process unlock */
  2229.  
  2230.       /* Enable EVT, BUF and ERR interrupt */
  2231.       __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2232.     }
  2233.  
  2234.     return HAL_OK;
  2235.   }
  2236.   else
  2237.   {
  2238.     return HAL_BUSY;
  2239.   }
  2240. }
  2241.  
  2242. /**
  2243.   * @brief  Transmit in slave mode an amount of data in non-blocking mode with DMA
  2244.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2245.   *                the configuration information for the specified I2C.
  2246.   * @param  pData Pointer to data buffer
  2247.   * @param  Size Amount of data to be sent
  2248.   * @retval HAL status
  2249.   */
  2250. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  2251. {
  2252.   HAL_StatusTypeDef dmaxferstatus;
  2253.  
  2254.   if (hi2c->State == HAL_I2C_STATE_READY)
  2255.   {
  2256.     if ((pData == NULL) || (Size == 0U))
  2257.     {
  2258.       return  HAL_ERROR;
  2259.     }
  2260.  
  2261.     /* Process Locked */
  2262.     __HAL_LOCK(hi2c);
  2263.  
  2264.     /* Check if the I2C is already enabled */
  2265.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2266.     {
  2267.       /* Enable I2C peripheral */
  2268.       __HAL_I2C_ENABLE(hi2c);
  2269.     }
  2270.  
  2271.     /* Disable Pos */
  2272.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2273.  
  2274.     hi2c->State     = HAL_I2C_STATE_BUSY_TX;
  2275.     hi2c->Mode      = HAL_I2C_MODE_SLAVE;
  2276.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2277.  
  2278.     /* Prepare transfer parameters */
  2279.     hi2c->pBuffPtr    = pData;
  2280.     hi2c->XferCount   = Size;
  2281.     hi2c->XferSize    = hi2c->XferCount;
  2282.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2283.  
  2284.     /* Set the I2C DMA transfer complete callback */
  2285.     hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  2286.  
  2287.     /* Set the DMA error callback */
  2288.     hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  2289.  
  2290.     /* Set the unused DMA callbacks to NULL */
  2291.     hi2c->hdmatx->XferHalfCpltCallback = NULL;
  2292.     hi2c->hdmatx->XferAbortCallback = NULL;
  2293.  
  2294.     /* Enable the DMA channel */
  2295.     dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  2296.  
  2297.     if (dmaxferstatus == HAL_OK)
  2298.     {
  2299.       /* Enable Address Acknowledge */
  2300.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2301.  
  2302.       /* Process Unlocked */
  2303.       __HAL_UNLOCK(hi2c);
  2304.  
  2305.       /* Note : The I2C interrupts must be enabled after unlocking current process
  2306.       to avoid the risk of I2C interrupt handle execution before current
  2307.       process unlock */
  2308.       /* Enable EVT and ERR interrupt */
  2309.       __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  2310.  
  2311.       /* Enable DMA Request */
  2312.       hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  2313.  
  2314.       return HAL_OK;
  2315.     }
  2316.     else
  2317.     {
  2318.       /* Update I2C state */
  2319.       hi2c->State     = HAL_I2C_STATE_READY;
  2320.       hi2c->Mode      = HAL_I2C_MODE_NONE;
  2321.  
  2322.       /* Update I2C error code */
  2323.       hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  2324.  
  2325.       /* Process Unlocked */
  2326.       __HAL_UNLOCK(hi2c);
  2327.  
  2328.       return HAL_ERROR;
  2329.     }
  2330.   }
  2331.   else
  2332.   {
  2333.     return HAL_BUSY;
  2334.   }
  2335. }
  2336.  
  2337. /**
  2338.   * @brief  Receive in slave mode an amount of data in non-blocking mode with DMA
  2339.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2340.   *                the configuration information for the specified I2C.
  2341.   * @param  pData Pointer to data buffer
  2342.   * @param  Size Amount of data to be sent
  2343.   * @retval HAL status
  2344.   */
  2345. HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  2346. {
  2347.   HAL_StatusTypeDef dmaxferstatus;
  2348.  
  2349.   if (hi2c->State == HAL_I2C_STATE_READY)
  2350.   {
  2351.     if ((pData == NULL) || (Size == 0U))
  2352.     {
  2353.       return  HAL_ERROR;
  2354.     }
  2355.  
  2356.     /* Process Locked */
  2357.     __HAL_LOCK(hi2c);
  2358.  
  2359.     /* Check if the I2C is already enabled */
  2360.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2361.     {
  2362.       /* Enable I2C peripheral */
  2363.       __HAL_I2C_ENABLE(hi2c);
  2364.     }
  2365.  
  2366.     /* Disable Pos */
  2367.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2368.  
  2369.     hi2c->State     = HAL_I2C_STATE_BUSY_RX;
  2370.     hi2c->Mode      = HAL_I2C_MODE_SLAVE;
  2371.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2372.  
  2373.     /* Prepare transfer parameters */
  2374.     hi2c->pBuffPtr    = pData;
  2375.     hi2c->XferCount   = Size;
  2376.     hi2c->XferSize    = hi2c->XferCount;
  2377.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2378.  
  2379.     /* Set the I2C DMA transfer complete callback */
  2380.     hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  2381.  
  2382.     /* Set the DMA error callback */
  2383.     hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  2384.  
  2385.     /* Set the unused DMA callbacks to NULL */
  2386.     hi2c->hdmarx->XferHalfCpltCallback = NULL;
  2387.     hi2c->hdmarx->XferAbortCallback = NULL;
  2388.  
  2389.     /* Enable the DMA channel */
  2390.     dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  2391.  
  2392.     if (dmaxferstatus == HAL_OK)
  2393.     {
  2394.       /* Enable Address Acknowledge */
  2395.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2396.  
  2397.       /* Process Unlocked */
  2398.       __HAL_UNLOCK(hi2c);
  2399.  
  2400.       /* Note : The I2C interrupts must be enabled after unlocking current process
  2401.       to avoid the risk of I2C interrupt handle execution before current
  2402.       process unlock */
  2403.       /* Enable EVT and ERR interrupt */
  2404.       __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  2405.  
  2406.       /* Enable DMA Request */
  2407.       SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  2408.  
  2409.       return HAL_OK;
  2410.     }
  2411.     else
  2412.     {
  2413.       /* Update I2C state */
  2414.       hi2c->State     = HAL_I2C_STATE_READY;
  2415.       hi2c->Mode      = HAL_I2C_MODE_NONE;
  2416.  
  2417.       /* Update I2C error code */
  2418.       hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  2419.  
  2420.       /* Process Unlocked */
  2421.       __HAL_UNLOCK(hi2c);
  2422.  
  2423.       return HAL_ERROR;
  2424.     }
  2425.   }
  2426.   else
  2427.   {
  2428.     return HAL_BUSY;
  2429.   }
  2430. }
  2431.  
  2432. /**
  2433.   * @brief  Write an amount of data in blocking mode to a specific memory address
  2434.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2435.   *                the configuration information for the specified I2C.
  2436.   * @param  DevAddress Target device address: The device 7 bits address value
  2437.   *         in datasheet must be shifted to the left before calling the interface
  2438.   * @param  MemAddress Internal memory address
  2439.   * @param  MemAddSize Size of internal memory address
  2440.   * @param  pData Pointer to data buffer
  2441.   * @param  Size Amount of data to be sent
  2442.   * @param  Timeout Timeout duration
  2443.   * @retval HAL status
  2444.   */
  2445. HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  2446. {
  2447.   /* Init tickstart for timeout management*/
  2448.   uint32_t tickstart = HAL_GetTick();
  2449.  
  2450.   /* Check the parameters */
  2451.   assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2452.  
  2453.   if (hi2c->State == HAL_I2C_STATE_READY)
  2454.   {
  2455.     /* Wait until BUSY flag is reset */
  2456.     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2457.     {
  2458.       return HAL_BUSY;
  2459.     }
  2460.  
  2461.     /* Process Locked */
  2462.     __HAL_LOCK(hi2c);
  2463.  
  2464.     /* Check if the I2C is already enabled */
  2465.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2466.     {
  2467.       /* Enable I2C peripheral */
  2468.       __HAL_I2C_ENABLE(hi2c);
  2469.     }
  2470.  
  2471.     /* Disable Pos */
  2472.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2473.  
  2474.     hi2c->State     = HAL_I2C_STATE_BUSY_TX;
  2475.     hi2c->Mode      = HAL_I2C_MODE_MEM;
  2476.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2477.  
  2478.     /* Prepare transfer parameters */
  2479.     hi2c->pBuffPtr    = pData;
  2480.     hi2c->XferCount   = Size;
  2481.     hi2c->XferSize    = hi2c->XferCount;
  2482.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2483.  
  2484.     /* Send Slave Address and Memory Address */
  2485.     if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2486.     {
  2487.       return HAL_ERROR;
  2488.     }
  2489.  
  2490.     while (hi2c->XferSize > 0U)
  2491.     {
  2492.       /* Wait until TXE flag is set */
  2493.       if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2494.       {
  2495.         if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2496.         {
  2497.           /* Generate Stop */
  2498.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  2499.         }
  2500.         return HAL_ERROR;
  2501.       }
  2502.  
  2503.       /* Write data to DR */
  2504.       hi2c->Instance->DR = *hi2c->pBuffPtr;
  2505.  
  2506.       /* Increment Buffer pointer */
  2507.       hi2c->pBuffPtr++;
  2508.  
  2509.       /* Update counter */
  2510.       hi2c->XferSize--;
  2511.       hi2c->XferCount--;
  2512.  
  2513.       if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  2514.       {
  2515.         /* Write data to DR */
  2516.         hi2c->Instance->DR = *hi2c->pBuffPtr;
  2517.  
  2518.         /* Increment Buffer pointer */
  2519.         hi2c->pBuffPtr++;
  2520.  
  2521.         /* Update counter */
  2522.         hi2c->XferSize--;
  2523.         hi2c->XferCount--;
  2524.       }
  2525.     }
  2526.  
  2527.     /* Wait until BTF flag is set */
  2528.     if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2529.     {
  2530.       if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2531.       {
  2532.         /* Generate Stop */
  2533.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  2534.       }
  2535.       return HAL_ERROR;
  2536.     }
  2537.  
  2538.     /* Generate Stop */
  2539.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  2540.  
  2541.     hi2c->State = HAL_I2C_STATE_READY;
  2542.     hi2c->Mode = HAL_I2C_MODE_NONE;
  2543.  
  2544.     /* Process Unlocked */
  2545.     __HAL_UNLOCK(hi2c);
  2546.  
  2547.     return HAL_OK;
  2548.   }
  2549.   else
  2550.   {
  2551.     return HAL_BUSY;
  2552.   }
  2553. }
  2554.  
  2555. /**
  2556.   * @brief  Read an amount of data in blocking mode from a specific memory address
  2557.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2558.   *                the configuration information for the specified I2C.
  2559.   * @param  DevAddress Target device address: The device 7 bits address value
  2560.   *         in datasheet must be shifted to the left before calling the interface
  2561.   * @param  MemAddress Internal memory address
  2562.   * @param  MemAddSize Size of internal memory address
  2563.   * @param  pData Pointer to data buffer
  2564.   * @param  Size Amount of data to be sent
  2565.   * @param  Timeout Timeout duration
  2566.   * @retval HAL status
  2567.   */
  2568. HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  2569. {
  2570.   /* Init tickstart for timeout management*/
  2571.   uint32_t tickstart = HAL_GetTick();
  2572.  
  2573.   /* Check the parameters */
  2574.   assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2575.  
  2576.   if (hi2c->State == HAL_I2C_STATE_READY)
  2577.   {
  2578.     /* Wait until BUSY flag is reset */
  2579.     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2580.     {
  2581.       return HAL_BUSY;
  2582.     }
  2583.  
  2584.     /* Process Locked */
  2585.     __HAL_LOCK(hi2c);
  2586.  
  2587.     /* Check if the I2C is already enabled */
  2588.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2589.     {
  2590.       /* Enable I2C peripheral */
  2591.       __HAL_I2C_ENABLE(hi2c);
  2592.     }
  2593.  
  2594.     /* Disable Pos */
  2595.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2596.  
  2597.     hi2c->State     = HAL_I2C_STATE_BUSY_RX;
  2598.     hi2c->Mode      = HAL_I2C_MODE_MEM;
  2599.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2600.  
  2601.     /* Prepare transfer parameters */
  2602.     hi2c->pBuffPtr    = pData;
  2603.     hi2c->XferCount   = Size;
  2604.     hi2c->XferSize    = hi2c->XferCount;
  2605.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2606.  
  2607.     /* Send Slave Address and Memory Address */
  2608.     if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2609.     {
  2610.       return HAL_ERROR;
  2611.     }
  2612.  
  2613.     if (hi2c->XferSize == 0U)
  2614.     {
  2615.       /* Clear ADDR flag */
  2616.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2617.  
  2618.       /* Generate Stop */
  2619.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  2620.     }
  2621.     else if (hi2c->XferSize == 1U)
  2622.     {
  2623.       /* Disable Acknowledge */
  2624.       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2625.  
  2626.       /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  2627.          software sequence must complete before the current byte end of transfer */
  2628.       __disable_irq();
  2629.  
  2630.       /* Clear ADDR flag */
  2631.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2632.  
  2633.       /* Generate Stop */
  2634.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  2635.  
  2636.       /* Re-enable IRQs */
  2637.       __enable_irq();
  2638.     }
  2639.     else if (hi2c->XferSize == 2U)
  2640.     {
  2641.       /* Enable Pos */
  2642.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2643.  
  2644.       /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  2645.          software sequence must complete before the current byte end of transfer */
  2646.       __disable_irq();
  2647.  
  2648.       /* Clear ADDR flag */
  2649.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2650.  
  2651.       /* Disable Acknowledge */
  2652.       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2653.  
  2654.       /* Re-enable IRQs */
  2655.       __enable_irq();
  2656.     }
  2657.     else
  2658.     {
  2659.       /* Enable Acknowledge */
  2660.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2661.       /* Clear ADDR flag */
  2662.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2663.     }
  2664.  
  2665.     while (hi2c->XferSize > 0U)
  2666.     {
  2667.       if (hi2c->XferSize <= 3U)
  2668.       {
  2669.         /* One byte */
  2670.         if (hi2c->XferSize == 1U)
  2671.         {
  2672.           /* Wait until RXNE flag is set */
  2673.           if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2674.           {
  2675.             return HAL_ERROR;
  2676.           }
  2677.  
  2678.           /* Read data from DR */
  2679.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  2680.  
  2681.           /* Increment Buffer pointer */
  2682.           hi2c->pBuffPtr++;
  2683.  
  2684.           /* Update counter */
  2685.           hi2c->XferSize--;
  2686.           hi2c->XferCount--;
  2687.         }
  2688.         /* Two bytes */
  2689.         else if (hi2c->XferSize == 2U)
  2690.         {
  2691.           /* Wait until BTF flag is set */
  2692.           if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2693.           {
  2694.             return HAL_ERROR;
  2695.           }
  2696.  
  2697.           /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  2698.              software sequence must complete before the current byte end of transfer */
  2699.           __disable_irq();
  2700.  
  2701.           /* Generate Stop */
  2702.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  2703.  
  2704.           /* Read data from DR */
  2705.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  2706.  
  2707.           /* Increment Buffer pointer */
  2708.           hi2c->pBuffPtr++;
  2709.  
  2710.           /* Update counter */
  2711.           hi2c->XferSize--;
  2712.           hi2c->XferCount--;
  2713.  
  2714.           /* Re-enable IRQs */
  2715.           __enable_irq();
  2716.  
  2717.           /* Read data from DR */
  2718.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  2719.  
  2720.           /* Increment Buffer pointer */
  2721.           hi2c->pBuffPtr++;
  2722.  
  2723.           /* Update counter */
  2724.           hi2c->XferSize--;
  2725.           hi2c->XferCount--;
  2726.         }
  2727.         /* 3 Last bytes */
  2728.         else
  2729.         {
  2730.           /* Wait until BTF flag is set */
  2731.           if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2732.           {
  2733.             return HAL_ERROR;
  2734.           }
  2735.  
  2736.           /* Disable Acknowledge */
  2737.           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2738.  
  2739.           /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  2740.              software sequence must complete before the current byte end of transfer */
  2741.           __disable_irq();
  2742.  
  2743.           /* Read data from DR */
  2744.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  2745.  
  2746.           /* Increment Buffer pointer */
  2747.           hi2c->pBuffPtr++;
  2748.  
  2749.           /* Update counter */
  2750.           hi2c->XferSize--;
  2751.           hi2c->XferCount--;
  2752.  
  2753.           /* Wait until BTF flag is set */
  2754.           if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2755.           {
  2756.             return HAL_ERROR;
  2757.           }
  2758.  
  2759.           /* Generate Stop */
  2760.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  2761.  
  2762.           /* Read data from DR */
  2763.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  2764.  
  2765.           /* Increment Buffer pointer */
  2766.           hi2c->pBuffPtr++;
  2767.  
  2768.           /* Update counter */
  2769.           hi2c->XferSize--;
  2770.           hi2c->XferCount--;
  2771.  
  2772.           /* Re-enable IRQs */
  2773.           __enable_irq();
  2774.  
  2775.           /* Read data from DR */
  2776.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  2777.  
  2778.           /* Increment Buffer pointer */
  2779.           hi2c->pBuffPtr++;
  2780.  
  2781.           /* Update counter */
  2782.           hi2c->XferSize--;
  2783.           hi2c->XferCount--;
  2784.         }
  2785.       }
  2786.       else
  2787.       {
  2788.         /* Wait until RXNE flag is set */
  2789.         if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2790.         {
  2791.           return HAL_ERROR;
  2792.         }
  2793.  
  2794.         /* Read data from DR */
  2795.         *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  2796.  
  2797.         /* Increment Buffer pointer */
  2798.         hi2c->pBuffPtr++;
  2799.  
  2800.         /* Update counter */
  2801.         hi2c->XferSize--;
  2802.         hi2c->XferCount--;
  2803.  
  2804.         if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  2805.         {
  2806.           /* Read data from DR */
  2807.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  2808.  
  2809.           /* Increment Buffer pointer */
  2810.           hi2c->pBuffPtr++;
  2811.  
  2812.           /* Update counter */
  2813.           hi2c->XferSize--;
  2814.           hi2c->XferCount--;
  2815.         }
  2816.       }
  2817.     }
  2818.  
  2819.     hi2c->State = HAL_I2C_STATE_READY;
  2820.     hi2c->Mode = HAL_I2C_MODE_NONE;
  2821.  
  2822.     /* Process Unlocked */
  2823.     __HAL_UNLOCK(hi2c);
  2824.  
  2825.     return HAL_OK;
  2826.   }
  2827.   else
  2828.   {
  2829.     return HAL_BUSY;
  2830.   }
  2831. }
  2832.  
  2833. /**
  2834.   * @brief  Write an amount of data in non-blocking mode with Interrupt to a specific memory address
  2835.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2836.   *                the configuration information for the specified I2C.
  2837.   * @param  DevAddress Target device address: The device 7 bits address value
  2838.   *         in datasheet must be shifted to the left before calling the interface
  2839.   * @param  MemAddress Internal memory address
  2840.   * @param  MemAddSize Size of internal memory address
  2841.   * @param  pData Pointer to data buffer
  2842.   * @param  Size Amount of data to be sent
  2843.   * @retval HAL status
  2844.   */
  2845. HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2846. {
  2847.   __IO uint32_t count = 0U;
  2848.  
  2849.   /* Check the parameters */
  2850.   assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2851.  
  2852.   if (hi2c->State == HAL_I2C_STATE_READY)
  2853.   {
  2854.     /* Wait until BUSY flag is reset */
  2855.     count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  2856.     do
  2857.     {
  2858.       count--;
  2859.       if (count == 0U)
  2860.       {
  2861.         hi2c->PreviousState       = I2C_STATE_NONE;
  2862.         hi2c->State               = HAL_I2C_STATE_READY;
  2863.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  2864.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  2865.  
  2866.         /* Process Unlocked */
  2867.         __HAL_UNLOCK(hi2c);
  2868.  
  2869.         return HAL_ERROR;
  2870.       }
  2871.     }
  2872.     while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2873.  
  2874.     /* Process Locked */
  2875.     __HAL_LOCK(hi2c);
  2876.  
  2877.     /* Check if the I2C is already enabled */
  2878.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2879.     {
  2880.       /* Enable I2C peripheral */
  2881.       __HAL_I2C_ENABLE(hi2c);
  2882.     }
  2883.  
  2884.     /* Disable Pos */
  2885.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2886.  
  2887.     hi2c->State     = HAL_I2C_STATE_BUSY_TX;
  2888.     hi2c->Mode      = HAL_I2C_MODE_MEM;
  2889.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2890.  
  2891.     /* Prepare transfer parameters */
  2892.     hi2c->pBuffPtr    = pData;
  2893.     hi2c->XferCount   = Size;
  2894.     hi2c->XferSize    = hi2c->XferCount;
  2895.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2896.     hi2c->Devaddress  = DevAddress;
  2897.     hi2c->Memaddress  = MemAddress;
  2898.     hi2c->MemaddSize  = MemAddSize;
  2899.     hi2c->EventCount  = 0U;
  2900.  
  2901.     /* Generate Start */
  2902.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2903.  
  2904.     /* Process Unlocked */
  2905.     __HAL_UNLOCK(hi2c);
  2906.  
  2907.     /* Note : The I2C interrupts must be enabled after unlocking current process
  2908.     to avoid the risk of I2C interrupt handle execution before current
  2909.     process unlock */
  2910.  
  2911.     /* Enable EVT, BUF and ERR interrupt */
  2912.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2913.  
  2914.     return HAL_OK;
  2915.   }
  2916.   else
  2917.   {
  2918.     return HAL_BUSY;
  2919.   }
  2920. }
  2921.  
  2922. /**
  2923.   * @brief  Read an amount of data in non-blocking mode with Interrupt from a specific memory address
  2924.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2925.   *                the configuration information for the specified I2C.
  2926.   * @param  DevAddress Target device address
  2927.   * @param  MemAddress Internal memory address
  2928.   * @param  MemAddSize Size of internal memory address
  2929.   * @param  pData Pointer to data buffer
  2930.   * @param  Size Amount of data to be sent
  2931.   * @retval HAL status
  2932.   */
  2933. HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2934. {
  2935.   __IO uint32_t count = 0U;
  2936.  
  2937.   /* Check the parameters */
  2938.   assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2939.  
  2940.   if (hi2c->State == HAL_I2C_STATE_READY)
  2941.   {
  2942.     /* Wait until BUSY flag is reset */
  2943.     count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  2944.     do
  2945.     {
  2946.       count--;
  2947.       if (count == 0U)
  2948.       {
  2949.         hi2c->PreviousState       = I2C_STATE_NONE;
  2950.         hi2c->State               = HAL_I2C_STATE_READY;
  2951.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  2952.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  2953.  
  2954.         /* Process Unlocked */
  2955.         __HAL_UNLOCK(hi2c);
  2956.  
  2957.         return HAL_ERROR;
  2958.       }
  2959.     }
  2960.     while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2961.  
  2962.     /* Process Locked */
  2963.     __HAL_LOCK(hi2c);
  2964.  
  2965.     /* Check if the I2C is already enabled */
  2966.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2967.     {
  2968.       /* Enable I2C peripheral */
  2969.       __HAL_I2C_ENABLE(hi2c);
  2970.     }
  2971.  
  2972.     /* Disable Pos */
  2973.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2974.  
  2975.     hi2c->State     = HAL_I2C_STATE_BUSY_RX;
  2976.     hi2c->Mode      = HAL_I2C_MODE_MEM;
  2977.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2978.  
  2979.     /* Prepare transfer parameters */
  2980.     hi2c->pBuffPtr    = pData;
  2981.     hi2c->XferCount   = Size;
  2982.     hi2c->XferSize    = hi2c->XferCount;
  2983.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2984.     hi2c->Devaddress  = DevAddress;
  2985.     hi2c->Memaddress  = MemAddress;
  2986.     hi2c->MemaddSize  = MemAddSize;
  2987.     hi2c->EventCount  = 0U;
  2988.  
  2989.     /* Enable Acknowledge */
  2990.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2991.  
  2992.     /* Generate Start */
  2993.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2994.  
  2995.     /* Process Unlocked */
  2996.     __HAL_UNLOCK(hi2c);
  2997.  
  2998.     if (hi2c->XferSize > 0U)
  2999.     {
  3000.       /* Note : The I2C interrupts must be enabled after unlocking current process
  3001.       to avoid the risk of I2C interrupt handle execution before current
  3002.       process unlock */
  3003.  
  3004.       /* Enable EVT, BUF and ERR interrupt */
  3005.       __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3006.     }
  3007.     return HAL_OK;
  3008.   }
  3009.   else
  3010.   {
  3011.     return HAL_BUSY;
  3012.   }
  3013. }
  3014.  
  3015. /**
  3016.   * @brief  Write an amount of data in non-blocking mode with DMA to a specific memory address
  3017.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3018.   *                the configuration information for the specified I2C.
  3019.   * @param  DevAddress Target device address: The device 7 bits address value
  3020.   *         in datasheet must be shifted to the left before calling the interface
  3021.   * @param  MemAddress Internal memory address
  3022.   * @param  MemAddSize Size of internal memory address
  3023.   * @param  pData Pointer to data buffer
  3024.   * @param  Size Amount of data to be sent
  3025.   * @retval HAL status
  3026.   */
  3027. HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  3028. {
  3029.   __IO uint32_t count = 0U;
  3030.   HAL_StatusTypeDef dmaxferstatus;
  3031.  
  3032.   /* Init tickstart for timeout management*/
  3033.   uint32_t tickstart = HAL_GetTick();
  3034.  
  3035.   /* Check the parameters */
  3036.   assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  3037.  
  3038.   if (hi2c->State == HAL_I2C_STATE_READY)
  3039.   {
  3040.     /* Wait until BUSY flag is reset */
  3041.     count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  3042.     do
  3043.     {
  3044.       count--;
  3045.       if (count == 0U)
  3046.       {
  3047.         hi2c->PreviousState       = I2C_STATE_NONE;
  3048.         hi2c->State               = HAL_I2C_STATE_READY;
  3049.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  3050.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  3051.  
  3052.         /* Process Unlocked */
  3053.         __HAL_UNLOCK(hi2c);
  3054.  
  3055.         return HAL_ERROR;
  3056.       }
  3057.     }
  3058.     while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  3059.  
  3060.     /* Process Locked */
  3061.     __HAL_LOCK(hi2c);
  3062.  
  3063.     /* Check if the I2C is already enabled */
  3064.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  3065.     {
  3066.       /* Enable I2C peripheral */
  3067.       __HAL_I2C_ENABLE(hi2c);
  3068.     }
  3069.  
  3070.     /* Disable Pos */
  3071.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  3072.  
  3073.     hi2c->State     = HAL_I2C_STATE_BUSY_TX;
  3074.     hi2c->Mode      = HAL_I2C_MODE_MEM;
  3075.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  3076.  
  3077.     /* Prepare transfer parameters */
  3078.     hi2c->pBuffPtr    = pData;
  3079.     hi2c->XferCount   = Size;
  3080.     hi2c->XferSize    = hi2c->XferCount;
  3081.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3082.  
  3083.     if (hi2c->XferSize > 0U)
  3084.     {
  3085.       /* Set the I2C DMA transfer complete callback */
  3086.       hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  3087.  
  3088.       /* Set the DMA error callback */
  3089.       hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  3090.  
  3091.       /* Set the unused DMA callbacks to NULL */
  3092.       hi2c->hdmatx->XferHalfCpltCallback = NULL;
  3093.       hi2c->hdmatx->XferAbortCallback = NULL;
  3094.  
  3095.       /* Enable the DMA channel */
  3096.       dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  3097.  
  3098.       if (dmaxferstatus == HAL_OK)
  3099.       {
  3100.         /* Send Slave Address and Memory Address */
  3101.         if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  3102.         {
  3103.           return HAL_ERROR;
  3104.         }
  3105.  
  3106.         /* Clear ADDR flag */
  3107.         __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3108.  
  3109.         /* Process Unlocked */
  3110.         __HAL_UNLOCK(hi2c);
  3111.  
  3112.         /* Note : The I2C interrupts must be enabled after unlocking current process
  3113.         to avoid the risk of I2C interrupt handle execution before current
  3114.         process unlock */
  3115.         /* Enable ERR interrupt */
  3116.         __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  3117.  
  3118.         /* Enable DMA Request */
  3119.         SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  3120.  
  3121.         return HAL_OK;
  3122.       }
  3123.       else
  3124.       {
  3125.         /* Update I2C state */
  3126.         hi2c->State     = HAL_I2C_STATE_READY;
  3127.         hi2c->Mode      = HAL_I2C_MODE_NONE;
  3128.  
  3129.         /* Update I2C error code */
  3130.         hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  3131.  
  3132.         /* Process Unlocked */
  3133.         __HAL_UNLOCK(hi2c);
  3134.  
  3135.         return HAL_ERROR;
  3136.       }
  3137.     }
  3138.     else
  3139.     {
  3140.       /* Update I2C state */
  3141.       hi2c->State     = HAL_I2C_STATE_READY;
  3142.       hi2c->Mode      = HAL_I2C_MODE_NONE;
  3143.  
  3144.       /* Update I2C error code */
  3145.       hi2c->ErrorCode |= HAL_I2C_ERROR_SIZE;
  3146.  
  3147.       /* Process Unlocked */
  3148.       __HAL_UNLOCK(hi2c);
  3149.  
  3150.       return HAL_ERROR;
  3151.     }
  3152.   }
  3153.   else
  3154.   {
  3155.     return HAL_BUSY;
  3156.   }
  3157. }
  3158.  
  3159. /**
  3160.   * @brief  Reads an amount of data in non-blocking mode with DMA from a specific memory address.
  3161.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3162.   *                the configuration information for the specified I2C.
  3163.   * @param  DevAddress Target device address: The device 7 bits address value
  3164.   *         in datasheet must be shifted to the left before calling the interface
  3165.   * @param  MemAddress Internal memory address
  3166.   * @param  MemAddSize Size of internal memory address
  3167.   * @param  pData Pointer to data buffer
  3168.   * @param  Size Amount of data to be read
  3169.   * @retval HAL status
  3170.   */
  3171. HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  3172. {
  3173.   /* Init tickstart for timeout management*/
  3174.   uint32_t tickstart = HAL_GetTick();
  3175.   __IO uint32_t count = 0U;
  3176.   HAL_StatusTypeDef dmaxferstatus;
  3177.  
  3178.   /* Check the parameters */
  3179.   assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  3180.  
  3181.   if (hi2c->State == HAL_I2C_STATE_READY)
  3182.   {
  3183.     /* Wait until BUSY flag is reset */
  3184.     count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  3185.     do
  3186.     {
  3187.       count--;
  3188.       if (count == 0U)
  3189.       {
  3190.         hi2c->PreviousState       = I2C_STATE_NONE;
  3191.         hi2c->State               = HAL_I2C_STATE_READY;
  3192.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  3193.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  3194.  
  3195.         /* Process Unlocked */
  3196.         __HAL_UNLOCK(hi2c);
  3197.  
  3198.         return HAL_ERROR;
  3199.       }
  3200.     }
  3201.     while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  3202.  
  3203.     /* Process Locked */
  3204.     __HAL_LOCK(hi2c);
  3205.  
  3206.     /* Check if the I2C is already enabled */
  3207.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  3208.     {
  3209.       /* Enable I2C peripheral */
  3210.       __HAL_I2C_ENABLE(hi2c);
  3211.     }
  3212.  
  3213.     /* Disable Pos */
  3214.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  3215.  
  3216.     hi2c->State     = HAL_I2C_STATE_BUSY_RX;
  3217.     hi2c->Mode      = HAL_I2C_MODE_MEM;
  3218.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  3219.  
  3220.     /* Prepare transfer parameters */
  3221.     hi2c->pBuffPtr    = pData;
  3222.     hi2c->XferCount   = Size;
  3223.     hi2c->XferSize    = hi2c->XferCount;
  3224.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3225.  
  3226.     if (hi2c->XferSize > 0U)
  3227.     {
  3228.       /* Set the I2C DMA transfer complete callback */
  3229.       hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  3230.  
  3231.       /* Set the DMA error callback */
  3232.       hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  3233.  
  3234.       /* Set the unused DMA callbacks to NULL */
  3235.       hi2c->hdmarx->XferHalfCpltCallback = NULL;
  3236.       hi2c->hdmarx->XferAbortCallback = NULL;
  3237.  
  3238.       /* Enable the DMA channel */
  3239.       dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  3240.  
  3241.       if (dmaxferstatus == HAL_OK)
  3242.       {
  3243.         /* Send Slave Address and Memory Address */
  3244.         if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  3245.         {
  3246.           return HAL_ERROR;
  3247.         }
  3248.  
  3249.         if (hi2c->XferSize == 1U)
  3250.         {
  3251.           /* Disable Acknowledge */
  3252.           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3253.         }
  3254.         else
  3255.         {
  3256.           /* Enable Last DMA bit */
  3257.           SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
  3258.         }
  3259.  
  3260.         /* Clear ADDR flag */
  3261.         __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3262.  
  3263.         /* Process Unlocked */
  3264.         __HAL_UNLOCK(hi2c);
  3265.  
  3266.         /* Note : The I2C interrupts must be enabled after unlocking current process
  3267.         to avoid the risk of I2C interrupt handle execution before current
  3268.         process unlock */
  3269.         /* Enable ERR interrupt */
  3270.         __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  3271.  
  3272.         /* Enable DMA Request */
  3273.         hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  3274.       }
  3275.       else
  3276.       {
  3277.         /* Update I2C state */
  3278.         hi2c->State     = HAL_I2C_STATE_READY;
  3279.         hi2c->Mode      = HAL_I2C_MODE_NONE;
  3280.  
  3281.         /* Update I2C error code */
  3282.         hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  3283.  
  3284.         /* Process Unlocked */
  3285.         __HAL_UNLOCK(hi2c);
  3286.  
  3287.         return HAL_ERROR;
  3288.       }
  3289.     }
  3290.     else
  3291.     {
  3292.       /* Send Slave Address and Memory Address */
  3293.       if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  3294.       {
  3295.         return HAL_ERROR;
  3296.       }
  3297.  
  3298.       /* Clear ADDR flag */
  3299.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3300.  
  3301.       /* Generate Stop */
  3302.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  3303.  
  3304.       hi2c->State = HAL_I2C_STATE_READY;
  3305.  
  3306.       /* Process Unlocked */
  3307.       __HAL_UNLOCK(hi2c);
  3308.     }
  3309.  
  3310.     return HAL_OK;
  3311.   }
  3312.   else
  3313.   {
  3314.     return HAL_BUSY;
  3315.   }
  3316. }
  3317.  
  3318. /**
  3319.   * @brief  Checks if target device is ready for communication.
  3320.   * @note   This function is used with Memory devices
  3321.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3322.   *                the configuration information for the specified I2C.
  3323.   * @param  DevAddress Target device address: The device 7 bits address value
  3324.   *         in datasheet must be shifted to the left before calling the interface
  3325.   * @param  Trials Number of trials
  3326.   * @param  Timeout Timeout duration
  3327.   * @retval HAL status
  3328.   */
  3329. HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
  3330. {
  3331.   /* Get tick */
  3332.   uint32_t tickstart = HAL_GetTick();
  3333.   uint32_t I2C_Trials = 1U;
  3334.   FlagStatus tmp1;
  3335.   FlagStatus tmp2;
  3336.  
  3337.   if (hi2c->State == HAL_I2C_STATE_READY)
  3338.   {
  3339.     /* Wait until BUSY flag is reset */
  3340.     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  3341.     {
  3342.       return HAL_BUSY;
  3343.     }
  3344.  
  3345.     /* Process Locked */
  3346.     __HAL_LOCK(hi2c);
  3347.  
  3348.     /* Check if the I2C is already enabled */
  3349.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  3350.     {
  3351.       /* Enable I2C peripheral */
  3352.       __HAL_I2C_ENABLE(hi2c);
  3353.     }
  3354.  
  3355.     /* Disable Pos */
  3356.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  3357.  
  3358.     hi2c->State = HAL_I2C_STATE_BUSY;
  3359.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  3360.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3361.  
  3362.     do
  3363.     {
  3364.       /* Generate Start */
  3365.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  3366.  
  3367.       /* Wait until SB flag is set */
  3368.       if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK)
  3369.       {
  3370.         return HAL_ERROR;
  3371.       }
  3372.  
  3373.       /* Send slave address */
  3374.       hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  3375.  
  3376.       /* Wait until ADDR or AF flag are set */
  3377.       /* Get tick */
  3378.       tickstart = HAL_GetTick();
  3379.  
  3380.       tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
  3381.       tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
  3382.       while ((hi2c->State != HAL_I2C_STATE_TIMEOUT) && (tmp1 == RESET) && (tmp2 == RESET))
  3383.       {
  3384.         if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
  3385.         {
  3386.           hi2c->State = HAL_I2C_STATE_TIMEOUT;
  3387.         }
  3388.         tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
  3389.         tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
  3390.       }
  3391.  
  3392.       hi2c->State = HAL_I2C_STATE_READY;
  3393.  
  3394.       /* Check if the ADDR flag has been set */
  3395.       if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
  3396.       {
  3397.         /* Generate Stop */
  3398.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  3399.  
  3400.         /* Clear ADDR Flag */
  3401.         __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3402.  
  3403.         /* Wait until BUSY flag is reset */
  3404.         if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  3405.         {
  3406.           return HAL_ERROR;
  3407.         }
  3408.  
  3409.         hi2c->State = HAL_I2C_STATE_READY;
  3410.  
  3411.         /* Process Unlocked */
  3412.         __HAL_UNLOCK(hi2c);
  3413.  
  3414.         return HAL_OK;
  3415.       }
  3416.       else
  3417.       {
  3418.         /* Generate Stop */
  3419.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  3420.  
  3421.         /* Clear AF Flag */
  3422.         __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3423.  
  3424.         /* Wait until BUSY flag is reset */
  3425.         if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  3426.         {
  3427.           return HAL_ERROR;
  3428.         }
  3429.       }
  3430.  
  3431.       /* Increment Trials */
  3432.       I2C_Trials++;
  3433.     }
  3434.     while (I2C_Trials < Trials);
  3435.  
  3436.     hi2c->State = HAL_I2C_STATE_READY;
  3437.  
  3438.     /* Process Unlocked */
  3439.     __HAL_UNLOCK(hi2c);
  3440.  
  3441.     return HAL_ERROR;
  3442.   }
  3443.   else
  3444.   {
  3445.     return HAL_BUSY;
  3446.   }
  3447. }
  3448.  
  3449. /**
  3450.   * @brief  Sequential transmit in master I2C mode an amount of data in non-blocking mode with Interrupt.
  3451.   * @note   This interface allow to manage repeated start condition when a direction change during transfer
  3452.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3453.   *         the configuration information for the specified I2C.
  3454.   * @param  DevAddress Target device address: The device 7 bits address value
  3455.   *         in datasheet must be shifted to the left before calling the interface
  3456.   * @param  pData Pointer to data buffer
  3457.   * @param  Size Amount of data to be sent
  3458.   * @param  XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  3459.   * @retval HAL status
  3460.   */
  3461. HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  3462. {
  3463.   __IO uint32_t Prev_State = 0x00U;
  3464.   __IO uint32_t count      = 0x00U;
  3465.  
  3466.   /* Check the parameters */
  3467.   assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  3468.  
  3469.   if (hi2c->State == HAL_I2C_STATE_READY)
  3470.   {
  3471.     /* Check Busy Flag only if FIRST call of Master interface */
  3472.     if ((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  3473.     {
  3474.       /* Wait until BUSY flag is reset */
  3475.       count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  3476.       do
  3477.       {
  3478.         count--;
  3479.         if (count == 0U)
  3480.         {
  3481.           hi2c->PreviousState       = I2C_STATE_NONE;
  3482.           hi2c->State               = HAL_I2C_STATE_READY;
  3483.           hi2c->Mode                = HAL_I2C_MODE_NONE;
  3484.           hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  3485.  
  3486.           /* Process Unlocked */
  3487.           __HAL_UNLOCK(hi2c);
  3488.  
  3489.           return HAL_ERROR;
  3490.         }
  3491.       }
  3492.       while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  3493.     }
  3494.  
  3495.     /* Process Locked */
  3496.     __HAL_LOCK(hi2c);
  3497.  
  3498.     /* Check if the I2C is already enabled */
  3499.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  3500.     {
  3501.       /* Enable I2C peripheral */
  3502.       __HAL_I2C_ENABLE(hi2c);
  3503.     }
  3504.  
  3505.     /* Disable Pos */
  3506.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  3507.  
  3508.     hi2c->State     = HAL_I2C_STATE_BUSY_TX;
  3509.     hi2c->Mode      = HAL_I2C_MODE_MASTER;
  3510.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  3511.  
  3512.     /* Prepare transfer parameters */
  3513.     hi2c->pBuffPtr    = pData;
  3514.     hi2c->XferCount   = Size;
  3515.     hi2c->XferSize    = hi2c->XferCount;
  3516.     hi2c->XferOptions = XferOptions;
  3517.     hi2c->Devaddress  = DevAddress;
  3518.  
  3519.     Prev_State = hi2c->PreviousState;
  3520.  
  3521.     /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
  3522.     /* Mean Previous state is same as current state */
  3523.     if ((Prev_State != I2C_STATE_MASTER_BUSY_TX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
  3524.     {
  3525.       /* Generate Start */
  3526.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  3527.     }
  3528.  
  3529.     /* Process Unlocked */
  3530.     __HAL_UNLOCK(hi2c);
  3531.  
  3532.     /* Note : The I2C interrupts must be enabled after unlocking current process
  3533.     to avoid the risk of I2C interrupt handle execution before current
  3534.     process unlock */
  3535.  
  3536.     /* Enable EVT, BUF and ERR interrupt */
  3537.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3538.  
  3539.     return HAL_OK;
  3540.   }
  3541.   else
  3542.   {
  3543.     return HAL_BUSY;
  3544.   }
  3545. }
  3546.  
  3547. /**
  3548.   * @brief  Sequential transmit in master I2C mode an amount of data in non-blocking mode with DMA.
  3549.   * @note   This interface allow to manage repeated start condition when a direction change during transfer
  3550.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3551.   *         the configuration information for the specified I2C.
  3552.   * @param  DevAddress Target device address: The device 7 bits address value
  3553.   *         in datasheet must be shifted to the left before calling the interface
  3554.   * @param  pData Pointer to data buffer
  3555.   * @param  Size Amount of data to be sent
  3556.   * @param  XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  3557.   * @retval HAL status
  3558.   */
  3559. HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  3560. {
  3561.   __IO uint32_t Prev_State = 0x00U;
  3562.   __IO uint32_t count      = 0x00U;
  3563.   HAL_StatusTypeDef dmaxferstatus;
  3564.  
  3565.   /* Check the parameters */
  3566.   assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  3567.  
  3568.   if (hi2c->State == HAL_I2C_STATE_READY)
  3569.   {
  3570.     /* Check Busy Flag only if FIRST call of Master interface */
  3571.     if ((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  3572.     {
  3573.       /* Wait until BUSY flag is reset */
  3574.       count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  3575.       do
  3576.       {
  3577.         count--;
  3578.         if (count == 0U)
  3579.         {
  3580.           hi2c->PreviousState       = I2C_STATE_NONE;
  3581.           hi2c->State               = HAL_I2C_STATE_READY;
  3582.           hi2c->Mode                = HAL_I2C_MODE_NONE;
  3583.           hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  3584.  
  3585.           /* Process Unlocked */
  3586.           __HAL_UNLOCK(hi2c);
  3587.  
  3588.           return HAL_ERROR;
  3589.         }
  3590.       }
  3591.       while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  3592.     }
  3593.  
  3594.     /* Process Locked */
  3595.     __HAL_LOCK(hi2c);
  3596.  
  3597.     /* Check if the I2C is already enabled */
  3598.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  3599.     {
  3600.       /* Enable I2C peripheral */
  3601.       __HAL_I2C_ENABLE(hi2c);
  3602.     }
  3603.  
  3604.     /* Disable Pos */
  3605.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  3606.  
  3607.     hi2c->State     = HAL_I2C_STATE_BUSY_TX;
  3608.     hi2c->Mode      = HAL_I2C_MODE_MASTER;
  3609.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  3610.  
  3611.     /* Prepare transfer parameters */
  3612.     hi2c->pBuffPtr    = pData;
  3613.     hi2c->XferCount   = Size;
  3614.     hi2c->XferSize    = hi2c->XferCount;
  3615.     hi2c->XferOptions = XferOptions;
  3616.     hi2c->Devaddress  = DevAddress;
  3617.  
  3618.     Prev_State = hi2c->PreviousState;
  3619.  
  3620.     if (hi2c->XferSize > 0U)
  3621.     {
  3622.       /* Set the I2C DMA transfer complete callback */
  3623.       hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  3624.  
  3625.       /* Set the DMA error callback */
  3626.       hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  3627.  
  3628.       /* Set the unused DMA callbacks to NULL */
  3629.       hi2c->hdmatx->XferHalfCpltCallback = NULL;
  3630.       hi2c->hdmatx->XferAbortCallback = NULL;
  3631.  
  3632.       /* Enable the DMA channel */
  3633.       dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  3634.  
  3635.       if (dmaxferstatus == HAL_OK)
  3636.       {
  3637.         /* Enable Acknowledge */
  3638.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3639.  
  3640.         /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
  3641.         /* Mean Previous state is same as current state */
  3642.         if ((Prev_State != I2C_STATE_MASTER_BUSY_TX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
  3643.         {
  3644.           /* Generate Start */
  3645.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  3646.         }
  3647.  
  3648.         /* Process Unlocked */
  3649.         __HAL_UNLOCK(hi2c);
  3650.  
  3651.         /* Note : The I2C interrupts must be enabled after unlocking current process
  3652.         to avoid the risk of I2C interrupt handle execution before current
  3653.         process unlock */
  3654.  
  3655.         /* If XferOptions is not associated to a new frame, mean no start bit is request, enable directly the DMA request */
  3656.         /* In other cases, DMA request is enabled after Slave address treatment in IRQHandler */
  3657.         if ((XferOptions == I2C_NEXT_FRAME) || (XferOptions == I2C_LAST_FRAME) || (XferOptions == I2C_LAST_FRAME_NO_STOP))
  3658.         {
  3659.           /* Enable DMA Request */
  3660.           SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  3661.         }
  3662.  
  3663.         /* Enable EVT and ERR interrupt */
  3664.         __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  3665.       }
  3666.       else
  3667.       {
  3668.         /* Update I2C state */
  3669.         hi2c->State     = HAL_I2C_STATE_READY;
  3670.         hi2c->Mode      = HAL_I2C_MODE_NONE;
  3671.  
  3672.         /* Update I2C error code */
  3673.         hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  3674.  
  3675.         /* Process Unlocked */
  3676.         __HAL_UNLOCK(hi2c);
  3677.  
  3678.         return HAL_ERROR;
  3679.       }
  3680.     }
  3681.     else
  3682.     {
  3683.       /* Enable Acknowledge */
  3684.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3685.  
  3686.       /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
  3687.       /* Mean Previous state is same as current state */
  3688.       if ((Prev_State != I2C_STATE_MASTER_BUSY_TX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
  3689.       {
  3690.         /* Generate Start */
  3691.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  3692.       }
  3693.  
  3694.       /* Process Unlocked */
  3695.       __HAL_UNLOCK(hi2c);
  3696.  
  3697.       /* Note : The I2C interrupts must be enabled after unlocking current process
  3698.       to avoid the risk of I2C interrupt handle execution before current
  3699.       process unlock */
  3700.  
  3701.       /* Enable EVT, BUF and ERR interrupt */
  3702.       __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3703.     }
  3704.  
  3705.     return HAL_OK;
  3706.   }
  3707.   else
  3708.   {
  3709.     return HAL_BUSY;
  3710.   }
  3711. }
  3712.  
  3713. /**
  3714.   * @brief  Sequential receive in master I2C mode an amount of data in non-blocking mode with Interrupt
  3715.   * @note   This interface allow to manage repeated start condition when a direction change during transfer
  3716.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3717.   *         the configuration information for the specified I2C.
  3718.   * @param  DevAddress Target device address: The device 7 bits address value
  3719.   *         in datasheet must be shifted to the left before calling the interface
  3720.   * @param  pData Pointer to data buffer
  3721.   * @param  Size Amount of data to be sent
  3722.   * @param  XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  3723.   * @retval HAL status
  3724.   */
  3725. HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  3726. {
  3727.   __IO uint32_t Prev_State = 0x00U;
  3728.   __IO uint32_t count = 0U;
  3729.   uint32_t enableIT = (I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3730.  
  3731.   /* Check the parameters */
  3732.   assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  3733.  
  3734.   if (hi2c->State == HAL_I2C_STATE_READY)
  3735.   {
  3736.     /* Check Busy Flag only if FIRST call of Master interface */
  3737.     if ((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  3738.     {
  3739.       /* Wait until BUSY flag is reset */
  3740.       count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  3741.       do
  3742.       {
  3743.         count--;
  3744.         if (count == 0U)
  3745.         {
  3746.           hi2c->PreviousState       = I2C_STATE_NONE;
  3747.           hi2c->State               = HAL_I2C_STATE_READY;
  3748.           hi2c->Mode                = HAL_I2C_MODE_NONE;
  3749.           hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  3750.  
  3751.           /* Process Unlocked */
  3752.           __HAL_UNLOCK(hi2c);
  3753.  
  3754.           return HAL_ERROR;
  3755.         }
  3756.       }
  3757.       while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  3758.     }
  3759.  
  3760.     /* Process Locked */
  3761.     __HAL_LOCK(hi2c);
  3762.  
  3763.     /* Check if the I2C is already enabled */
  3764.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  3765.     {
  3766.       /* Enable I2C peripheral */
  3767.       __HAL_I2C_ENABLE(hi2c);
  3768.     }
  3769.  
  3770.     /* Disable Pos */
  3771.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  3772.  
  3773.     hi2c->State     = HAL_I2C_STATE_BUSY_RX;
  3774.     hi2c->Mode      = HAL_I2C_MODE_MASTER;
  3775.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  3776.  
  3777.     /* Prepare transfer parameters */
  3778.     hi2c->pBuffPtr    = pData;
  3779.     hi2c->XferCount   = Size;
  3780.     hi2c->XferSize    = hi2c->XferCount;
  3781.     hi2c->XferOptions = XferOptions;
  3782.     hi2c->Devaddress  = DevAddress;
  3783.  
  3784.     Prev_State = hi2c->PreviousState;
  3785.  
  3786.     if ((hi2c->XferCount == 2U) && ((XferOptions == I2C_LAST_FRAME) || (XferOptions == I2C_LAST_FRAME_NO_STOP)))
  3787.     {
  3788.       if (Prev_State == I2C_STATE_MASTER_BUSY_RX)
  3789.       {
  3790.         /* Disable Acknowledge */
  3791.         CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3792.  
  3793.         /* Enable Pos */
  3794.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  3795.  
  3796.         /* Remove Enabling of IT_BUF, mean RXNE treatment, treat the 2 bytes through BTF */
  3797.         enableIT &= ~I2C_IT_BUF;
  3798.       }
  3799.       else
  3800.       {
  3801.         /* Enable Acknowledge */
  3802.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3803.       }
  3804.     }
  3805.     else
  3806.     {
  3807.       /* Enable Acknowledge */
  3808.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3809.     }
  3810.  
  3811.     /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
  3812.     /* Mean Previous state is same as current state */
  3813.     if ((Prev_State != I2C_STATE_MASTER_BUSY_RX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
  3814.     {
  3815.       /* Generate Start */
  3816.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  3817.     }
  3818.  
  3819.     /* Process Unlocked */
  3820.     __HAL_UNLOCK(hi2c);
  3821.  
  3822.     /* Note : The I2C interrupts must be enabled after unlocking current process
  3823.     to avoid the risk of I2C interrupt handle execution before current
  3824.     process unlock */
  3825.  
  3826.     /* Enable interrupts */
  3827.     __HAL_I2C_ENABLE_IT(hi2c, enableIT);
  3828.  
  3829.     return HAL_OK;
  3830.   }
  3831.   else
  3832.   {
  3833.     return HAL_BUSY;
  3834.   }
  3835. }
  3836.  
  3837. /**
  3838.   * @brief  Sequential receive in master mode an amount of data in non-blocking mode with DMA
  3839.   * @note   This interface allow to manage repeated start condition when a direction change during transfer
  3840.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3841.   *         the configuration information for the specified I2C.
  3842.   * @param  DevAddress Target device address: The device 7 bits address value
  3843.   *         in datasheet must be shifted to the left before calling the interface
  3844.   * @param  pData Pointer to data buffer
  3845.   * @param  Size Amount of data to be sent
  3846.   * @param  XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  3847.   * @retval HAL status
  3848.   */
  3849. HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  3850. {
  3851.   __IO uint32_t Prev_State = 0x00U;
  3852.   __IO uint32_t count = 0U;
  3853.   uint32_t enableIT = (I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3854.   HAL_StatusTypeDef dmaxferstatus;
  3855.  
  3856.   /* Check the parameters */
  3857.   assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  3858.  
  3859.   if (hi2c->State == HAL_I2C_STATE_READY)
  3860.   {
  3861.     /* Check Busy Flag only if FIRST call of Master interface */
  3862.     if ((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  3863.     {
  3864.       /* Wait until BUSY flag is reset */
  3865.       count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  3866.       do
  3867.       {
  3868.         count--;
  3869.         if (count == 0U)
  3870.         {
  3871.           hi2c->PreviousState       = I2C_STATE_NONE;
  3872.           hi2c->State               = HAL_I2C_STATE_READY;
  3873.           hi2c->Mode                = HAL_I2C_MODE_NONE;
  3874.           hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  3875.  
  3876.           /* Process Unlocked */
  3877.           __HAL_UNLOCK(hi2c);
  3878.  
  3879.           return HAL_ERROR;
  3880.         }
  3881.       }
  3882.       while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  3883.     }
  3884.  
  3885.     /* Process Locked */
  3886.     __HAL_LOCK(hi2c);
  3887.  
  3888.     /* Check if the I2C is already enabled */
  3889.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  3890.     {
  3891.       /* Enable I2C peripheral */
  3892.       __HAL_I2C_ENABLE(hi2c);
  3893.     }
  3894.  
  3895.     /* Disable Pos */
  3896.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  3897.  
  3898.     /* Clear Last DMA bit */
  3899.     CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
  3900.  
  3901.     hi2c->State     = HAL_I2C_STATE_BUSY_RX;
  3902.     hi2c->Mode      = HAL_I2C_MODE_MASTER;
  3903.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  3904.  
  3905.     /* Prepare transfer parameters */
  3906.     hi2c->pBuffPtr    = pData;
  3907.     hi2c->XferCount   = Size;
  3908.     hi2c->XferSize    = hi2c->XferCount;
  3909.     hi2c->XferOptions = XferOptions;
  3910.     hi2c->Devaddress  = DevAddress;
  3911.  
  3912.     Prev_State = hi2c->PreviousState;
  3913.  
  3914.     if (hi2c->XferSize > 0U)
  3915.     {
  3916.       if ((hi2c->XferCount == 2U) && ((XferOptions == I2C_LAST_FRAME) || (XferOptions == I2C_LAST_FRAME_NO_STOP)))
  3917.       {
  3918.         if (Prev_State == I2C_STATE_MASTER_BUSY_RX)
  3919.         {
  3920.           /* Disable Acknowledge */
  3921.           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3922.  
  3923.           /* Enable Pos */
  3924.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  3925.  
  3926.           /* Enable Last DMA bit */
  3927.           SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
  3928.         }
  3929.         else
  3930.         {
  3931.           /* Enable Acknowledge */
  3932.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3933.         }
  3934.       }
  3935.       else
  3936.       {
  3937.         /* Enable Acknowledge */
  3938.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3939.  
  3940.         if ((XferOptions == I2C_LAST_FRAME) || (XferOptions == I2C_OTHER_AND_LAST_FRAME) || (XferOptions == I2C_LAST_FRAME_NO_STOP))
  3941.         {
  3942.           /* Enable Last DMA bit */
  3943.           SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
  3944.         }
  3945.       }
  3946.  
  3947.       /* Set the I2C DMA transfer complete callback */
  3948.       hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  3949.  
  3950.       /* Set the DMA error callback */
  3951.       hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  3952.  
  3953.       /* Set the unused DMA callbacks to NULL */
  3954.       hi2c->hdmarx->XferHalfCpltCallback = NULL;
  3955.       hi2c->hdmarx->XferAbortCallback = NULL;
  3956.  
  3957.       /* Enable the DMA channel */
  3958.       dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  3959.  
  3960.       if (dmaxferstatus == HAL_OK)
  3961.       {
  3962.         /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
  3963.         /* Mean Previous state is same as current state */
  3964.         if ((Prev_State != I2C_STATE_MASTER_BUSY_RX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
  3965.         {
  3966.           /* Generate Start */
  3967.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  3968.  
  3969.           /* Update interrupt for only EVT and ERR */
  3970.           enableIT = (I2C_IT_EVT | I2C_IT_ERR);
  3971.         }
  3972.         else
  3973.         {
  3974.           /* Update interrupt for only ERR */
  3975.           enableIT = I2C_IT_ERR;
  3976.         }
  3977.  
  3978.         /* Process Unlocked */
  3979.         __HAL_UNLOCK(hi2c);
  3980.  
  3981.         /* Note : The I2C interrupts must be enabled after unlocking current process
  3982.         to avoid the risk of I2C interrupt handle execution before current
  3983.         process unlock */
  3984.  
  3985.         /* If XferOptions is not associated to a new frame, mean no start bit is request, enable directly the DMA request */
  3986.         /* In other cases, DMA request is enabled after Slave address treatment in IRQHandler */
  3987.         if ((XferOptions == I2C_NEXT_FRAME) || (XferOptions == I2C_LAST_FRAME) || (XferOptions == I2C_LAST_FRAME_NO_STOP))
  3988.         {
  3989.           /* Enable DMA Request */
  3990.           SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  3991.         }
  3992.  
  3993.         /* Enable EVT and ERR interrupt */
  3994.         __HAL_I2C_ENABLE_IT(hi2c, enableIT);
  3995.       }
  3996.       else
  3997.       {
  3998.         /* Update I2C state */
  3999.         hi2c->State     = HAL_I2C_STATE_READY;
  4000.         hi2c->Mode      = HAL_I2C_MODE_NONE;
  4001.  
  4002.         /* Update I2C error code */
  4003.         hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  4004.  
  4005.         /* Process Unlocked */
  4006.         __HAL_UNLOCK(hi2c);
  4007.  
  4008.         return HAL_ERROR;
  4009.       }
  4010.     }
  4011.     else
  4012.     {
  4013.       /* Enable Acknowledge */
  4014.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  4015.  
  4016.       /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
  4017.       /* Mean Previous state is same as current state */
  4018.       if ((Prev_State != I2C_STATE_MASTER_BUSY_RX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
  4019.       {
  4020.         /* Generate Start */
  4021.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  4022.       }
  4023.  
  4024.       /* Process Unlocked */
  4025.       __HAL_UNLOCK(hi2c);
  4026.  
  4027.       /* Note : The I2C interrupts must be enabled after unlocking current process
  4028.       to avoid the risk of I2C interrupt handle execution before current
  4029.       process unlock */
  4030.  
  4031.       /* Enable interrupts */
  4032.       __HAL_I2C_ENABLE_IT(hi2c, enableIT);
  4033.     }
  4034.     return HAL_OK;
  4035.   }
  4036.   else
  4037.   {
  4038.     return HAL_BUSY;
  4039.   }
  4040. }
  4041.  
  4042. /**
  4043.   * @brief  Sequential transmit in slave mode an amount of data in non-blocking mode with Interrupt
  4044.   * @note   This interface allow to manage repeated start condition when a direction change during transfer
  4045.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4046.   *         the configuration information for the specified I2C.
  4047.   * @param  pData Pointer to data buffer
  4048.   * @param  Size Amount of data to be sent
  4049.   * @param  XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  4050.   * @retval HAL status
  4051.   */
  4052. HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  4053. {
  4054.   /* Check the parameters */
  4055.   assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  4056.  
  4057.   if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
  4058.   {
  4059.     if ((pData == NULL) || (Size == 0U))
  4060.     {
  4061.       return  HAL_ERROR;
  4062.     }
  4063.  
  4064.     /* Process Locked */
  4065.     __HAL_LOCK(hi2c);
  4066.  
  4067.     /* Check if the I2C is already enabled */
  4068.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  4069.     {
  4070.       /* Enable I2C peripheral */
  4071.       __HAL_I2C_ENABLE(hi2c);
  4072.     }
  4073.  
  4074.     /* Disable Pos */
  4075.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  4076.  
  4077.     hi2c->State     = HAL_I2C_STATE_BUSY_TX_LISTEN;
  4078.     hi2c->Mode      = HAL_I2C_MODE_SLAVE;
  4079.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  4080.  
  4081.     /* Prepare transfer parameters */
  4082.     hi2c->pBuffPtr    = pData;
  4083.     hi2c->XferCount   = Size;
  4084.     hi2c->XferSize    = hi2c->XferCount;
  4085.     hi2c->XferOptions = XferOptions;
  4086.  
  4087.     /* Clear ADDR flag */
  4088.     __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4089.  
  4090.     /* Process Unlocked */
  4091.     __HAL_UNLOCK(hi2c);
  4092.  
  4093.     /* Note : The I2C interrupts must be enabled after unlocking current process
  4094.               to avoid the risk of I2C interrupt handle execution before current
  4095.               process unlock */
  4096.  
  4097.     /* Enable EVT, BUF and ERR interrupt */
  4098.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  4099.  
  4100.     return HAL_OK;
  4101.   }
  4102.   else
  4103.   {
  4104.     return HAL_BUSY;
  4105.   }
  4106. }
  4107.  
  4108. /**
  4109.   * @brief  Sequential transmit in slave mode an amount of data in non-blocking mode with DMA
  4110.   * @note   This interface allow to manage repeated start condition when a direction change during transfer
  4111.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4112.   *         the configuration information for the specified I2C.
  4113.   * @param  pData Pointer to data buffer
  4114.   * @param  Size Amount of data to be sent
  4115.   * @param  XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  4116.   * @retval HAL status
  4117.   */
  4118. HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  4119. {
  4120.   HAL_StatusTypeDef dmaxferstatus;
  4121.  
  4122.   /* Check the parameters */
  4123.   assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  4124.  
  4125.   if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
  4126.   {
  4127.     if ((pData == NULL) || (Size == 0U))
  4128.     {
  4129.       return  HAL_ERROR;
  4130.     }
  4131.  
  4132.     /* Process Locked */
  4133.     __HAL_LOCK(hi2c);
  4134.  
  4135.     /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
  4136.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  4137.  
  4138.     /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */
  4139.     /* and then toggle the HAL slave RX state to TX state */
  4140.     if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)
  4141.     {
  4142.       if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  4143.       {
  4144.         /* Abort DMA Xfer if any */
  4145.         if (hi2c->hdmarx != NULL)
  4146.         {
  4147.           CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  4148.  
  4149.           /* Set the I2C DMA Abort callback :
  4150.            will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  4151.           hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
  4152.  
  4153.           /* Abort DMA RX */
  4154.           if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
  4155.           {
  4156.             /* Call Directly XferAbortCallback function in case of error */
  4157.             hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
  4158.           }
  4159.         }
  4160.       }
  4161.     }
  4162.     else if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)
  4163.     {
  4164.       if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  4165.       {
  4166.         CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  4167.  
  4168.         /* Abort DMA Xfer if any */
  4169.         if (hi2c->hdmatx != NULL)
  4170.         {
  4171.           /* Set the I2C DMA Abort callback :
  4172.            will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  4173.           hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
  4174.  
  4175.           /* Abort DMA TX */
  4176.           if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
  4177.           {
  4178.             /* Call Directly XferAbortCallback function in case of error */
  4179.             hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
  4180.           }
  4181.         }
  4182.       }
  4183.     }
  4184.     else
  4185.     {
  4186.       /* Nothing to do */
  4187.     }
  4188.  
  4189.     /* Check if the I2C is already enabled */
  4190.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  4191.     {
  4192.       /* Enable I2C peripheral */
  4193.       __HAL_I2C_ENABLE(hi2c);
  4194.     }
  4195.  
  4196.     /* Disable Pos */
  4197.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  4198.  
  4199.     hi2c->State     = HAL_I2C_STATE_BUSY_TX_LISTEN;
  4200.     hi2c->Mode      = HAL_I2C_MODE_SLAVE;
  4201.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  4202.  
  4203.     /* Prepare transfer parameters */
  4204.     hi2c->pBuffPtr    = pData;
  4205.     hi2c->XferCount   = Size;
  4206.     hi2c->XferSize    = hi2c->XferCount;
  4207.     hi2c->XferOptions = XferOptions;
  4208.  
  4209.     /* Set the I2C DMA transfer complete callback */
  4210.     hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  4211.  
  4212.     /* Set the DMA error callback */
  4213.     hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  4214.  
  4215.     /* Set the unused DMA callbacks to NULL */
  4216.     hi2c->hdmatx->XferHalfCpltCallback = NULL;
  4217.     hi2c->hdmatx->XferAbortCallback = NULL;
  4218.  
  4219.     /* Enable the DMA channel */
  4220.     dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  4221.  
  4222.     if (dmaxferstatus == HAL_OK)
  4223.     {
  4224.       /* Enable Address Acknowledge */
  4225.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  4226.  
  4227.       /* Clear ADDR flag */
  4228.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4229.  
  4230.       /* Process Unlocked */
  4231.       __HAL_UNLOCK(hi2c);
  4232.  
  4233.       /* Note : The I2C interrupts must be enabled after unlocking current process
  4234.       to avoid the risk of I2C interrupt handle execution before current
  4235.       process unlock */
  4236.       /* Enable EVT and ERR interrupt */
  4237.       __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  4238.  
  4239.       /* Enable DMA Request */
  4240.       hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  4241.  
  4242.       return HAL_OK;
  4243.     }
  4244.     else
  4245.     {
  4246.       /* Update I2C state */
  4247.       hi2c->State     = HAL_I2C_STATE_READY;
  4248.       hi2c->Mode      = HAL_I2C_MODE_NONE;
  4249.  
  4250.       /* Update I2C error code */
  4251.       hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  4252.  
  4253.       /* Process Unlocked */
  4254.       __HAL_UNLOCK(hi2c);
  4255.  
  4256.       return HAL_ERROR;
  4257.     }
  4258.   }
  4259.   else
  4260.   {
  4261.     return HAL_BUSY;
  4262.   }
  4263. }
  4264.  
  4265. /**
  4266.   * @brief  Sequential receive in slave mode an amount of data in non-blocking mode with Interrupt
  4267.   * @note   This interface allow to manage repeated start condition when a direction change during transfer
  4268.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4269.   *         the configuration information for the specified I2C.
  4270.   * @param  pData Pointer to data buffer
  4271.   * @param  Size Amount of data to be sent
  4272.   * @param  XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  4273.   * @retval HAL status
  4274.   */
  4275. HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  4276. {
  4277.   /* Check the parameters */
  4278.   assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  4279.  
  4280.   if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
  4281.   {
  4282.     if ((pData == NULL) || (Size == 0U))
  4283.     {
  4284.       return  HAL_ERROR;
  4285.     }
  4286.  
  4287.     /* Process Locked */
  4288.     __HAL_LOCK(hi2c);
  4289.  
  4290.     /* Check if the I2C is already enabled */
  4291.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  4292.     {
  4293.       /* Enable I2C peripheral */
  4294.       __HAL_I2C_ENABLE(hi2c);
  4295.     }
  4296.  
  4297.     /* Disable Pos */
  4298.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  4299.  
  4300.     hi2c->State     = HAL_I2C_STATE_BUSY_RX_LISTEN;
  4301.     hi2c->Mode      = HAL_I2C_MODE_SLAVE;
  4302.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  4303.  
  4304.     /* Prepare transfer parameters */
  4305.     hi2c->pBuffPtr    = pData;
  4306.     hi2c->XferCount   = Size;
  4307.     hi2c->XferSize    = hi2c->XferCount;
  4308.     hi2c->XferOptions = XferOptions;
  4309.  
  4310.     /* Clear ADDR flag */
  4311.     __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4312.  
  4313.     /* Process Unlocked */
  4314.     __HAL_UNLOCK(hi2c);
  4315.  
  4316.     /* Note : The I2C interrupts must be enabled after unlocking current process
  4317.               to avoid the risk of I2C interrupt handle execution before current
  4318.               process unlock */
  4319.  
  4320.     /* Enable EVT, BUF and ERR interrupt */
  4321.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  4322.  
  4323.     return HAL_OK;
  4324.   }
  4325.   else
  4326.   {
  4327.     return HAL_BUSY;
  4328.   }
  4329. }
  4330.  
  4331. /**
  4332.   * @brief  Sequential receive in slave mode an amount of data in non-blocking mode with DMA
  4333.   * @note   This interface allow to manage repeated start condition when a direction change during transfer
  4334.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4335.   *         the configuration information for the specified I2C.
  4336.   * @param  pData Pointer to data buffer
  4337.   * @param  Size Amount of data to be sent
  4338.   * @param  XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  4339.   * @retval HAL status
  4340.   */
  4341. HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  4342. {
  4343.   HAL_StatusTypeDef dmaxferstatus;
  4344.  
  4345.   /* Check the parameters */
  4346.   assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  4347.  
  4348.   if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
  4349.   {
  4350.     if ((pData == NULL) || (Size == 0U))
  4351.     {
  4352.       return  HAL_ERROR;
  4353.     }
  4354.  
  4355.     /* Process Locked */
  4356.     __HAL_LOCK(hi2c);
  4357.  
  4358.     /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
  4359.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  4360.  
  4361.     /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */
  4362.     /* and then toggle the HAL slave RX state to TX state */
  4363.     if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)
  4364.     {
  4365.       if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  4366.       {
  4367.         /* Abort DMA Xfer if any */
  4368.         if (hi2c->hdmarx != NULL)
  4369.         {
  4370.           CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  4371.  
  4372.           /* Set the I2C DMA Abort callback :
  4373.            will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  4374.           hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
  4375.  
  4376.           /* Abort DMA RX */
  4377.           if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
  4378.           {
  4379.             /* Call Directly XferAbortCallback function in case of error */
  4380.             hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
  4381.           }
  4382.         }
  4383.       }
  4384.     }
  4385.     else if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)
  4386.     {
  4387.       if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  4388.       {
  4389.         CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  4390.  
  4391.         /* Abort DMA Xfer if any */
  4392.         if (hi2c->hdmatx != NULL)
  4393.         {
  4394.           /* Set the I2C DMA Abort callback :
  4395.            will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  4396.           hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
  4397.  
  4398.           /* Abort DMA TX */
  4399.           if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
  4400.           {
  4401.             /* Call Directly XferAbortCallback function in case of error */
  4402.             hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
  4403.           }
  4404.         }
  4405.       }
  4406.     }
  4407.     else
  4408.     {
  4409.       /* Nothing to do */
  4410.     }
  4411.  
  4412.     /* Check if the I2C is already enabled */
  4413.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  4414.     {
  4415.       /* Enable I2C peripheral */
  4416.       __HAL_I2C_ENABLE(hi2c);
  4417.     }
  4418.  
  4419.     /* Disable Pos */
  4420.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  4421.  
  4422.     hi2c->State     = HAL_I2C_STATE_BUSY_RX_LISTEN;
  4423.     hi2c->Mode      = HAL_I2C_MODE_SLAVE;
  4424.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  4425.  
  4426.     /* Prepare transfer parameters */
  4427.     hi2c->pBuffPtr    = pData;
  4428.     hi2c->XferCount   = Size;
  4429.     hi2c->XferSize    = hi2c->XferCount;
  4430.     hi2c->XferOptions = XferOptions;
  4431.  
  4432.     /* Set the I2C DMA transfer complete callback */
  4433.     hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  4434.  
  4435.     /* Set the DMA error callback */
  4436.     hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  4437.  
  4438.     /* Set the unused DMA callbacks to NULL */
  4439.     hi2c->hdmarx->XferHalfCpltCallback = NULL;
  4440.     hi2c->hdmarx->XferAbortCallback = NULL;
  4441.  
  4442.     /* Enable the DMA channel */
  4443.     dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  4444.  
  4445.     if (dmaxferstatus == HAL_OK)
  4446.     {
  4447.       /* Enable Address Acknowledge */
  4448.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  4449.  
  4450.       /* Clear ADDR flag */
  4451.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4452.  
  4453.       /* Process Unlocked */
  4454.       __HAL_UNLOCK(hi2c);
  4455.  
  4456.       /* Enable DMA Request */
  4457.       SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  4458.  
  4459.       /* Note : The I2C interrupts must be enabled after unlocking current process
  4460.       to avoid the risk of I2C interrupt handle execution before current
  4461.       process unlock */
  4462.       /* Enable EVT and ERR interrupt */
  4463.       __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  4464.  
  4465.       return HAL_OK;
  4466.     }
  4467.     else
  4468.     {
  4469.       /* Update I2C state */
  4470.       hi2c->State     = HAL_I2C_STATE_READY;
  4471.       hi2c->Mode      = HAL_I2C_MODE_NONE;
  4472.  
  4473.       /* Update I2C error code */
  4474.       hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  4475.  
  4476.       /* Process Unlocked */
  4477.       __HAL_UNLOCK(hi2c);
  4478.  
  4479.       return HAL_ERROR;
  4480.     }
  4481.   }
  4482.   else
  4483.   {
  4484.     return HAL_BUSY;
  4485.   }
  4486. }
  4487.  
  4488. /**
  4489.   * @brief  Enable the Address listen mode with Interrupt.
  4490.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4491.   *                the configuration information for the specified I2C.
  4492.   * @retval HAL status
  4493.   */
  4494. HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
  4495. {
  4496.   if (hi2c->State == HAL_I2C_STATE_READY)
  4497.   {
  4498.     hi2c->State = HAL_I2C_STATE_LISTEN;
  4499.  
  4500.     /* Check if the I2C is already enabled */
  4501.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  4502.     {
  4503.       /* Enable I2C peripheral */
  4504.       __HAL_I2C_ENABLE(hi2c);
  4505.     }
  4506.  
  4507.     /* Enable Address Acknowledge */
  4508.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  4509.  
  4510.     /* Enable EVT and ERR interrupt */
  4511.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  4512.  
  4513.     return HAL_OK;
  4514.   }
  4515.   else
  4516.   {
  4517.     return HAL_BUSY;
  4518.   }
  4519. }
  4520.  
  4521. /**
  4522.   * @brief  Disable the Address listen mode with Interrupt.
  4523.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4524.   *                the configuration information for the specified I2C.
  4525.   * @retval HAL status
  4526.   */
  4527. HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
  4528. {
  4529.   /* Declaration of tmp to prevent undefined behavior of volatile usage */
  4530.   uint32_t tmp;
  4531.  
  4532.   /* Disable Address listen mode only if a transfer is not ongoing */
  4533.   if (hi2c->State == HAL_I2C_STATE_LISTEN)
  4534.   {
  4535.     tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
  4536.     hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
  4537.     hi2c->State = HAL_I2C_STATE_READY;
  4538.     hi2c->Mode = HAL_I2C_MODE_NONE;
  4539.  
  4540.     /* Disable Address Acknowledge */
  4541.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  4542.  
  4543.     /* Disable EVT and ERR interrupt */
  4544.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  4545.  
  4546.     return HAL_OK;
  4547.   }
  4548.   else
  4549.   {
  4550.     return HAL_BUSY;
  4551.   }
  4552. }
  4553.  
  4554. /**
  4555.   * @brief  Abort a master I2C IT or DMA process communication with Interrupt.
  4556.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4557.   *         the configuration information for the specified I2C.
  4558.   * @param  DevAddress Target device address: The device 7 bits address value
  4559.   *         in datasheet must be shifted to the left before calling the interface
  4560.   * @retval HAL status
  4561.   */
  4562. HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
  4563. {
  4564.   /* Prevent unused argument(s) compilation warning */
  4565.   UNUSED(DevAddress);
  4566.  
  4567.   /* Abort Master transfer during Receive or Transmit process    */
  4568.   if (hi2c->Mode == HAL_I2C_MODE_MASTER)
  4569.   {
  4570.     /* Process Locked */
  4571.     __HAL_LOCK(hi2c);
  4572.  
  4573.     hi2c->PreviousState = I2C_STATE_NONE;
  4574.     hi2c->State = HAL_I2C_STATE_ABORT;
  4575.  
  4576.     /* Disable Acknowledge */
  4577.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  4578.  
  4579.     /* Generate Stop */
  4580.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  4581.  
  4582.     hi2c->XferCount = 0U;
  4583.  
  4584.     /* Disable EVT, BUF and ERR interrupt */
  4585.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  4586.  
  4587.     /* Process Unlocked */
  4588.     __HAL_UNLOCK(hi2c);
  4589.  
  4590.     /* Call the corresponding callback to inform upper layer of End of Transfer */
  4591.     I2C_ITError(hi2c);
  4592.  
  4593.     return HAL_OK;
  4594.   }
  4595.   else
  4596.   {
  4597.     /* Wrong usage of abort function */
  4598.     /* This function should be used only in case of abort monitored by master device */
  4599.     return HAL_ERROR;
  4600.   }
  4601. }
  4602.  
  4603. /**
  4604.   * @}
  4605.   */
  4606.  
  4607. /** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
  4608.  * @{
  4609.  */
  4610.  
  4611. /**
  4612.   * @brief  This function handles I2C event interrupt request.
  4613.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4614.   *                the configuration information for the specified I2C.
  4615.   * @retval None
  4616.   */
  4617. void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
  4618. {
  4619.   uint32_t sr1itflags;
  4620.   uint32_t sr2itflags               = 0U;
  4621.   uint32_t itsources                = READ_REG(hi2c->Instance->CR2);
  4622.   uint32_t CurrentXferOptions       = hi2c->XferOptions;
  4623.   HAL_I2C_ModeTypeDef CurrentMode   = hi2c->Mode;
  4624.   HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  4625.  
  4626.   /* Master or Memory mode selected */
  4627.   if ((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM))
  4628.   {
  4629.     sr2itflags   = READ_REG(hi2c->Instance->SR2);
  4630.     sr1itflags   = READ_REG(hi2c->Instance->SR1);
  4631.  
  4632.     /* Exit IRQ event until Start Bit detected in case of Other frame requested */
  4633.     if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_SB) == RESET) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(CurrentXferOptions) == 1U))
  4634.     {
  4635.       return;
  4636.     }
  4637.  
  4638.     /* SB Set ----------------------------------------------------------------*/
  4639.     if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_SB) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  4640.     {
  4641.       /* Convert OTHER_xxx XferOptions if any */
  4642.       I2C_ConvertOtherXferOptions(hi2c);
  4643.  
  4644.       I2C_Master_SB(hi2c);
  4645.     }
  4646.     /* ADD10 Set -------------------------------------------------------------*/
  4647.     else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ADD10) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  4648.     {
  4649.       I2C_Master_ADD10(hi2c);
  4650.     }
  4651.     /* ADDR Set --------------------------------------------------------------*/
  4652.     else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ADDR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  4653.     {
  4654.       I2C_Master_ADDR(hi2c);
  4655.     }
  4656.     /* I2C in mode Transmitter -----------------------------------------------*/
  4657.     else if (I2C_CHECK_FLAG(sr2itflags, I2C_FLAG_TRA) != RESET)
  4658.     {
  4659.       /* Do not check buffer and BTF flag if a Xfer DMA is on going */
  4660.       if (READ_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN) != I2C_CR2_DMAEN)
  4661.       {
  4662.         /* TXE set and BTF reset -----------------------------------------------*/
  4663.         if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_TXE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET))
  4664.         {
  4665.           I2C_MasterTransmit_TXE(hi2c);
  4666.         }
  4667.         /* BTF set -------------------------------------------------------------*/
  4668.         else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  4669.         {
  4670.           I2C_MasterTransmit_BTF(hi2c);
  4671.         }
  4672.         else
  4673.         {
  4674.           /* Do nothing */
  4675.         }
  4676.       }
  4677.     }
  4678.     /* I2C in mode Receiver --------------------------------------------------*/
  4679.     else
  4680.     {
  4681.       /* Do not check buffer and BTF flag if a Xfer DMA is on going */
  4682.       if (READ_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN) != I2C_CR2_DMAEN)
  4683.       {
  4684.         /* RXNE set and BTF reset -----------------------------------------------*/
  4685.         if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_RXNE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET))
  4686.         {
  4687.           I2C_MasterReceive_RXNE(hi2c);
  4688.         }
  4689.         /* BTF set -------------------------------------------------------------*/
  4690.         else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  4691.         {
  4692.           I2C_MasterReceive_BTF(hi2c);
  4693.         }
  4694.         else
  4695.         {
  4696.           /* Do nothing */
  4697.         }
  4698.       }
  4699.     }
  4700.   }
  4701.   /* Slave mode selected */
  4702.   else
  4703.   {
  4704.     /* If an error is detected, read only SR1 register to prevent */
  4705.     /* a clear of ADDR flags by reading SR2 after reading SR1 in Error treatment */
  4706.     if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  4707.     {
  4708.       sr1itflags   = READ_REG(hi2c->Instance->SR1);
  4709.     }
  4710.     else
  4711.     {
  4712.       sr2itflags   = READ_REG(hi2c->Instance->SR2);
  4713.       sr1itflags   = READ_REG(hi2c->Instance->SR1);
  4714.     }
  4715.  
  4716.     /* ADDR set --------------------------------------------------------------*/
  4717.     if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ADDR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  4718.     {
  4719.       /* Now time to read SR2, this will clear ADDR flag automatically */
  4720.       if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  4721.       {
  4722.         sr2itflags   = READ_REG(hi2c->Instance->SR2);
  4723.       }
  4724.       I2C_Slave_ADDR(hi2c, sr2itflags);
  4725.     }
  4726.     /* STOPF set --------------------------------------------------------------*/
  4727.     else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  4728.     {
  4729.       I2C_Slave_STOPF(hi2c);
  4730.     }
  4731.     /* I2C in mode Transmitter -----------------------------------------------*/
  4732.     else if ((CurrentState == HAL_I2C_STATE_BUSY_TX) || (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
  4733.     {
  4734.       /* TXE set and BTF reset -----------------------------------------------*/
  4735.       if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_TXE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET))
  4736.       {
  4737.         I2C_SlaveTransmit_TXE(hi2c);
  4738.       }
  4739.       /* BTF set -------------------------------------------------------------*/
  4740.       else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  4741.       {
  4742.         I2C_SlaveTransmit_BTF(hi2c);
  4743.       }
  4744.       else
  4745.       {
  4746.         /* Do nothing */
  4747.       }
  4748.     }
  4749.     /* I2C in mode Receiver --------------------------------------------------*/
  4750.     else
  4751.     {
  4752.       /* RXNE set and BTF reset ----------------------------------------------*/
  4753.       if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_RXNE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET))
  4754.       {
  4755.         I2C_SlaveReceive_RXNE(hi2c);
  4756.       }
  4757.       /* BTF set -------------------------------------------------------------*/
  4758.       else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  4759.       {
  4760.         I2C_SlaveReceive_BTF(hi2c);
  4761.       }
  4762.       else
  4763.       {
  4764.         /* Do nothing */
  4765.       }
  4766.     }
  4767.   }
  4768. }
  4769.  
  4770. /**
  4771.   * @brief  This function handles I2C error interrupt request.
  4772.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4773.   *                the configuration information for the specified I2C.
  4774.   * @retval None
  4775.   */
  4776. void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
  4777. {
  4778.   HAL_I2C_ModeTypeDef tmp1;
  4779.   uint32_t tmp2;
  4780.   HAL_I2C_StateTypeDef tmp3;
  4781.   uint32_t tmp4;
  4782.   uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
  4783.   uint32_t itsources  = READ_REG(hi2c->Instance->CR2);
  4784.   uint32_t error      = HAL_I2C_ERROR_NONE;
  4785.  
  4786.   /* I2C Bus error interrupt occurred ----------------------------------------*/
  4787.   if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BERR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
  4788.   {
  4789.     error |= HAL_I2C_ERROR_BERR;
  4790.  
  4791.     /* Clear BERR flag */
  4792.     __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
  4793.  
  4794.     /* Workaround: Start cannot be generated after a misplaced Stop */
  4795.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_SWRST);
  4796.   }
  4797.  
  4798.   /* I2C Arbitration Lost error interrupt occurred ---------------------------*/
  4799.   if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ARLO) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
  4800.   {
  4801.     error |= HAL_I2C_ERROR_ARLO;
  4802.  
  4803.     /* Clear ARLO flag */
  4804.     __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
  4805.   }
  4806.  
  4807.   /* I2C Acknowledge failure error interrupt occurred ------------------------*/
  4808.   if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
  4809.   {
  4810.     tmp1 = hi2c->Mode;
  4811.     tmp2 = hi2c->XferCount;
  4812.     tmp3 = hi2c->State;
  4813.     tmp4 = hi2c->PreviousState;
  4814.     if ((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0U) && \
  4815.         ((tmp3 == HAL_I2C_STATE_BUSY_TX) || (tmp3 == HAL_I2C_STATE_BUSY_TX_LISTEN) || \
  4816.          ((tmp3 == HAL_I2C_STATE_LISTEN) && (tmp4 == I2C_STATE_SLAVE_BUSY_TX))))
  4817.     {
  4818.       I2C_Slave_AF(hi2c);
  4819.     }
  4820.     else
  4821.     {
  4822.       /* Clear AF flag */
  4823.       __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  4824.  
  4825.       error |= HAL_I2C_ERROR_AF;
  4826.  
  4827.       /* Do not generate a STOP in case of Slave receive non acknowledge during transfer (mean not at the end of transfer) */
  4828.       if (hi2c->Mode == HAL_I2C_MODE_MASTER)
  4829.       {
  4830.         /* Generate Stop */
  4831.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  4832.       }
  4833.     }
  4834.   }
  4835.  
  4836.   /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
  4837.   if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_OVR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
  4838.   {
  4839.     error |= HAL_I2C_ERROR_OVR;
  4840.     /* Clear OVR flag */
  4841.     __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
  4842.   }
  4843.  
  4844.   /* Call the Error Callback in case of Error detected -----------------------*/
  4845.   if (error != HAL_I2C_ERROR_NONE)
  4846.   {
  4847.     hi2c->ErrorCode |= error;
  4848.     I2C_ITError(hi2c);
  4849.   }
  4850. }
  4851.  
  4852. /**
  4853.   * @brief  Master Tx Transfer completed callback.
  4854.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4855.   *                the configuration information for the specified I2C.
  4856.   * @retval None
  4857.   */
  4858. __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
  4859. {
  4860.   /* Prevent unused argument(s) compilation warning */
  4861.   UNUSED(hi2c);
  4862.  
  4863.   /* NOTE : This function should not be modified, when the callback is needed,
  4864.             the HAL_I2C_MasterTxCpltCallback could be implemented in the user file
  4865.    */
  4866. }
  4867.  
  4868. /**
  4869.   * @brief  Master Rx Transfer completed callback.
  4870.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4871.   *                the configuration information for the specified I2C.
  4872.   * @retval None
  4873.   */
  4874. __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
  4875. {
  4876.   /* Prevent unused argument(s) compilation warning */
  4877.   UNUSED(hi2c);
  4878.  
  4879.   /* NOTE : This function should not be modified, when the callback is needed,
  4880.             the HAL_I2C_MasterRxCpltCallback could be implemented in the user file
  4881.    */
  4882. }
  4883.  
  4884. /** @brief  Slave Tx Transfer completed callback.
  4885.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4886.   *                the configuration information for the specified I2C.
  4887.   * @retval None
  4888.   */
  4889. __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
  4890. {
  4891.   /* Prevent unused argument(s) compilation warning */
  4892.   UNUSED(hi2c);
  4893.  
  4894.   /* NOTE : This function should not be modified, when the callback is needed,
  4895.             the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file
  4896.    */
  4897. }
  4898.  
  4899. /**
  4900.   * @brief  Slave Rx Transfer completed callback.
  4901.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4902.   *                the configuration information for the specified I2C.
  4903.   * @retval None
  4904.   */
  4905. __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
  4906. {
  4907.   /* Prevent unused argument(s) compilation warning */
  4908.   UNUSED(hi2c);
  4909.  
  4910.   /* NOTE : This function should not be modified, when the callback is needed,
  4911.             the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file
  4912.    */
  4913. }
  4914.  
  4915. /**
  4916.   * @brief  Slave Address Match callback.
  4917.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4918.   *                the configuration information for the specified I2C.
  4919.   * @param  TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XferDirection_definition
  4920.   * @param  AddrMatchCode Address Match Code
  4921.   * @retval None
  4922.   */
  4923. __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
  4924. {
  4925.   /* Prevent unused argument(s) compilation warning */
  4926.   UNUSED(hi2c);
  4927.   UNUSED(TransferDirection);
  4928.   UNUSED(AddrMatchCode);
  4929.  
  4930.   /* NOTE : This function should not be modified, when the callback is needed,
  4931.             the HAL_I2C_AddrCallback() could be implemented in the user file
  4932.    */
  4933. }
  4934.  
  4935. /**
  4936.   * @brief  Listen Complete callback.
  4937.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4938.   *                the configuration information for the specified I2C.
  4939.   * @retval None
  4940.   */
  4941. __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
  4942. {
  4943.   /* Prevent unused argument(s) compilation warning */
  4944.   UNUSED(hi2c);
  4945.  
  4946.   /* NOTE : This function should not be modified, when the callback is needed,
  4947.             the HAL_I2C_ListenCpltCallback() could be implemented in the user file
  4948.   */
  4949. }
  4950.  
  4951. /**
  4952.   * @brief  Memory Tx Transfer completed callback.
  4953.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4954.   *                the configuration information for the specified I2C.
  4955.   * @retval None
  4956.   */
  4957. __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
  4958. {
  4959.   /* Prevent unused argument(s) compilation warning */
  4960.   UNUSED(hi2c);
  4961.  
  4962.   /* NOTE : This function should not be modified, when the callback is needed,
  4963.             the HAL_I2C_MemTxCpltCallback could be implemented in the user file
  4964.    */
  4965. }
  4966.  
  4967. /**
  4968.   * @brief  Memory Rx Transfer completed callback.
  4969.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4970.   *                the configuration information for the specified I2C.
  4971.   * @retval None
  4972.   */
  4973. __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
  4974. {
  4975.   /* Prevent unused argument(s) compilation warning */
  4976.   UNUSED(hi2c);
  4977.  
  4978.   /* NOTE : This function should not be modified, when the callback is needed,
  4979.             the HAL_I2C_MemRxCpltCallback could be implemented in the user file
  4980.    */
  4981. }
  4982.  
  4983. /**
  4984.   * @brief  I2C error callback.
  4985.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4986.   *                the configuration information for the specified I2C.
  4987.   * @retval None
  4988.   */
  4989. __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
  4990. {
  4991.   /* Prevent unused argument(s) compilation warning */
  4992.   UNUSED(hi2c);
  4993.  
  4994.   /* NOTE : This function should not be modified, when the callback is needed,
  4995.             the HAL_I2C_ErrorCallback could be implemented in the user file
  4996.    */
  4997. }
  4998.  
  4999. /**
  5000.   * @brief  I2C abort callback.
  5001.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5002.   *                the configuration information for the specified I2C.
  5003.   * @retval None
  5004.   */
  5005. __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
  5006. {
  5007.   /* Prevent unused argument(s) compilation warning */
  5008.   UNUSED(hi2c);
  5009.  
  5010.   /* NOTE : This function should not be modified, when the callback is needed,
  5011.             the HAL_I2C_AbortCpltCallback could be implemented in the user file
  5012.    */
  5013. }
  5014.  
  5015. /**
  5016.   * @}
  5017.   */
  5018.  
  5019. /** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
  5020.  *  @brief   Peripheral State, Mode and Error functions
  5021.   *
  5022. @verbatim
  5023.  ===============================================================================
  5024.             ##### Peripheral State, Mode and Error functions #####
  5025.  ===============================================================================
  5026.     [..]
  5027.     This subsection permit to get in run-time the status of the peripheral
  5028.     and the data flow.
  5029.  
  5030. @endverbatim
  5031.   * @{
  5032.   */
  5033.  
  5034. /**
  5035.   * @brief  Return the I2C handle state.
  5036.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5037.   *                the configuration information for the specified I2C.
  5038.   * @retval HAL state
  5039.   */
  5040. HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
  5041. {
  5042.   /* Return I2C handle state */
  5043.   return hi2c->State;
  5044. }
  5045.  
  5046. /**
  5047.   * @brief  Returns the I2C Master, Slave, Memory or no mode.
  5048.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5049.   *         the configuration information for I2C module
  5050.   * @retval HAL mode
  5051.   */
  5052. HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
  5053. {
  5054.   return hi2c->Mode;
  5055. }
  5056.  
  5057. /**
  5058.   * @brief  Return the I2C error code.
  5059.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5060.   *              the configuration information for the specified I2C.
  5061.   * @retval I2C Error Code
  5062.   */
  5063. uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
  5064. {
  5065.   return hi2c->ErrorCode;
  5066. }
  5067.  
  5068. /**
  5069.   * @}
  5070.   */
  5071.  
  5072. /**
  5073.   * @}
  5074.   */
  5075.  
  5076. /** @addtogroup I2C_Private_Functions
  5077.   * @{
  5078.   */
  5079.  
  5080. /**
  5081.   * @brief  Handle TXE flag for Master
  5082.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5083.   *         the configuration information for I2C module
  5084.   * @retval None
  5085.   */
  5086. static void I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
  5087. {
  5088.   /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  5089.   HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  5090.   HAL_I2C_ModeTypeDef CurrentMode   = hi2c->Mode;
  5091.   uint32_t CurrentXferOptions       = hi2c->XferOptions;
  5092.  
  5093.   if ((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
  5094.   {
  5095.     /* Call TxCpltCallback() directly if no stop mode is set */
  5096.     if ((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  5097.     {
  5098.       __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  5099.  
  5100.       hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
  5101.       hi2c->Mode = HAL_I2C_MODE_NONE;
  5102.       hi2c->State = HAL_I2C_STATE_READY;
  5103.  
  5104. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5105.       hi2c->MasterTxCpltCallback(hi2c);
  5106. #else
  5107.       HAL_I2C_MasterTxCpltCallback(hi2c);
  5108. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5109.     }
  5110.     else /* Generate Stop condition then Call TxCpltCallback() */
  5111.     {
  5112.       /* Disable EVT, BUF and ERR interrupt */
  5113.       __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  5114.  
  5115.       /* Generate Stop */
  5116.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  5117.  
  5118.       hi2c->PreviousState = I2C_STATE_NONE;
  5119.       hi2c->State = HAL_I2C_STATE_READY;
  5120.  
  5121.       if (hi2c->Mode == HAL_I2C_MODE_MEM)
  5122.       {
  5123.         hi2c->Mode = HAL_I2C_MODE_NONE;
  5124. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5125.         hi2c->MemTxCpltCallback(hi2c);
  5126. #else
  5127.         HAL_I2C_MemTxCpltCallback(hi2c);
  5128. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5129.       }
  5130.       else
  5131.       {
  5132.         hi2c->Mode = HAL_I2C_MODE_NONE;
  5133. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5134.         hi2c->MasterTxCpltCallback(hi2c);
  5135. #else
  5136.         HAL_I2C_MasterTxCpltCallback(hi2c);
  5137. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5138.       }
  5139.     }
  5140.   }
  5141.   else if ((CurrentState == HAL_I2C_STATE_BUSY_TX) || \
  5142.            ((CurrentMode == HAL_I2C_MODE_MEM) && (CurrentState == HAL_I2C_STATE_BUSY_RX)))
  5143.   {
  5144.     if (hi2c->XferCount == 0U)
  5145.     {
  5146.       /* Disable BUF interrupt */
  5147.       __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  5148.     }
  5149.     else
  5150.     {
  5151.       if (hi2c->Mode == HAL_I2C_MODE_MEM)
  5152.       {
  5153.         if (hi2c->EventCount == 0U)
  5154.         {
  5155.           /* If Memory address size is 8Bit */
  5156.           if (hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
  5157.           {
  5158.             /* Send Memory Address */
  5159.             hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
  5160.  
  5161.             hi2c->EventCount += 2U;
  5162.           }
  5163.           /* If Memory address size is 16Bit */
  5164.           else
  5165.           {
  5166.             /* Send MSB of Memory Address */
  5167.             hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
  5168.  
  5169.             hi2c->EventCount++;
  5170.           }
  5171.         }
  5172.         else if (hi2c->EventCount == 1U)
  5173.         {
  5174.           /* Send LSB of Memory Address */
  5175.           hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
  5176.  
  5177.           hi2c->EventCount++;
  5178.         }
  5179.         else if (hi2c->EventCount == 2U)
  5180.         {
  5181.           if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
  5182.           {
  5183.             /* Generate Restart */
  5184.             hi2c->Instance->CR1 |= I2C_CR1_START;
  5185.           }
  5186.           else if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
  5187.           {
  5188.             /* Write data to DR */
  5189.             hi2c->Instance->DR = *hi2c->pBuffPtr;
  5190.  
  5191.             /* Increment Buffer pointer */
  5192.             hi2c->pBuffPtr++;
  5193.  
  5194.             /* Update counter */
  5195.             hi2c->XferCount--;
  5196.           }
  5197.           else
  5198.           {
  5199.             /* Do nothing */
  5200.           }
  5201.         }
  5202.         else
  5203.         {
  5204.           /* Do nothing */
  5205.         }
  5206.       }
  5207.       else
  5208.       {
  5209.         /* Write data to DR */
  5210.         hi2c->Instance->DR = *hi2c->pBuffPtr;
  5211.  
  5212.         /* Increment Buffer pointer */
  5213.         hi2c->pBuffPtr++;
  5214.  
  5215.         /* Update counter */
  5216.         hi2c->XferCount--;
  5217.       }
  5218.     }
  5219.   }
  5220.   else
  5221.   {
  5222.     /* Do nothing */
  5223.   }
  5224. }
  5225.  
  5226. /**
  5227.   * @brief  Handle BTF flag for Master transmitter
  5228.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5229.   *         the configuration information for I2C module
  5230.   * @retval None
  5231.   */
  5232. static void I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
  5233. {
  5234.   /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  5235.   uint32_t CurrentXferOptions = hi2c->XferOptions;
  5236.  
  5237.   if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
  5238.   {
  5239.     if (hi2c->XferCount != 0U)
  5240.     {
  5241.       /* Write data to DR */
  5242.       hi2c->Instance->DR = *hi2c->pBuffPtr;
  5243.  
  5244.       /* Increment Buffer pointer */
  5245.       hi2c->pBuffPtr++;
  5246.  
  5247.       /* Update counter */
  5248.       hi2c->XferCount--;
  5249.     }
  5250.     else
  5251.     {
  5252.       /* Call TxCpltCallback() directly if no stop mode is set */
  5253.       if ((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  5254.       {
  5255.         __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  5256.  
  5257.         hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
  5258.         hi2c->Mode = HAL_I2C_MODE_NONE;
  5259.         hi2c->State = HAL_I2C_STATE_READY;
  5260.  
  5261. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5262.         hi2c->MasterTxCpltCallback(hi2c);
  5263. #else
  5264.         HAL_I2C_MasterTxCpltCallback(hi2c);
  5265. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5266.       }
  5267.       else /* Generate Stop condition then Call TxCpltCallback() */
  5268.       {
  5269.         /* Disable EVT, BUF and ERR interrupt */
  5270.         __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  5271.  
  5272.         /* Generate Stop */
  5273.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  5274.  
  5275.         hi2c->PreviousState = I2C_STATE_NONE;
  5276.         hi2c->State = HAL_I2C_STATE_READY;
  5277.  
  5278.         if (hi2c->Mode == HAL_I2C_MODE_MEM)
  5279.         {
  5280.           hi2c->Mode = HAL_I2C_MODE_NONE;
  5281. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5282.           hi2c->MemTxCpltCallback(hi2c);
  5283. #else
  5284.           HAL_I2C_MemTxCpltCallback(hi2c);
  5285. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5286.         }
  5287.         else
  5288.         {
  5289.           hi2c->Mode = HAL_I2C_MODE_NONE;
  5290.  
  5291. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5292.           hi2c->MasterTxCpltCallback(hi2c);
  5293. #else
  5294.           HAL_I2C_MasterTxCpltCallback(hi2c);
  5295. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5296.         }
  5297.       }
  5298.     }
  5299.   }
  5300. }
  5301.  
  5302. /**
  5303.   * @brief  Handle RXNE flag for Master
  5304.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5305.   *         the configuration information for I2C module
  5306.   * @retval None
  5307.   */
  5308. static void I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
  5309. {
  5310.   if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
  5311.   {
  5312.     uint32_t tmp;
  5313.  
  5314.     tmp = hi2c->XferCount;
  5315.     if (tmp > 3U)
  5316.     {
  5317.       /* Read data from DR */
  5318.       *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  5319.  
  5320.       /* Increment Buffer pointer */
  5321.       hi2c->pBuffPtr++;
  5322.  
  5323.       /* Update counter */
  5324.       hi2c->XferCount--;
  5325.  
  5326.       if (hi2c->XferCount == (uint16_t)3)
  5327.       {
  5328.         /* Disable BUF interrupt, this help to treat correctly the last 4 bytes
  5329.         on BTF subroutine */
  5330.         /* Disable BUF interrupt */
  5331.         __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  5332.       }
  5333.     }
  5334.     else if ((hi2c->XferOptions != I2C_FIRST_AND_NEXT_FRAME) && ((tmp == 1U) || (tmp == 0U)))
  5335.     {
  5336.       /* Disable Acknowledge */
  5337.       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5338.  
  5339.       /* Disable EVT, BUF and ERR interrupt */
  5340.       __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  5341.  
  5342.       /* Read data from DR */
  5343.       *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  5344.  
  5345.       /* Increment Buffer pointer */
  5346.       hi2c->pBuffPtr++;
  5347.  
  5348.       /* Update counter */
  5349.       hi2c->XferCount--;
  5350.  
  5351.       hi2c->State = HAL_I2C_STATE_READY;
  5352.  
  5353.       if (hi2c->Mode == HAL_I2C_MODE_MEM)
  5354.       {
  5355.         hi2c->Mode = HAL_I2C_MODE_NONE;
  5356.         hi2c->PreviousState = I2C_STATE_NONE;
  5357.  
  5358. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5359.         hi2c->MemRxCpltCallback(hi2c);
  5360. #else
  5361.         HAL_I2C_MemRxCpltCallback(hi2c);
  5362. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5363.       }
  5364.       else
  5365.       {
  5366.         hi2c->Mode = HAL_I2C_MODE_NONE;
  5367.         hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
  5368.  
  5369. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5370.         hi2c->MasterRxCpltCallback(hi2c);
  5371. #else
  5372.         HAL_I2C_MasterRxCpltCallback(hi2c);
  5373. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5374.       }
  5375.     }
  5376.     else
  5377.     {
  5378.       /* Do nothing */
  5379.     }
  5380.   }
  5381. }
  5382.  
  5383. /**
  5384.   * @brief  Handle BTF flag for Master receiver
  5385.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5386.   *         the configuration information for I2C module
  5387.   * @retval None
  5388.   */
  5389. static void I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
  5390. {
  5391.   /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  5392.   uint32_t CurrentXferOptions = hi2c->XferOptions;
  5393.  
  5394.   if (hi2c->XferCount == 4U)
  5395.   {
  5396.     /* Disable BUF interrupt, this help to treat correctly the last 2 bytes
  5397.        on BTF subroutine if there is a reception delay between N-1 and N byte */
  5398.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  5399.  
  5400.     /* Read data from DR */
  5401.     *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  5402.  
  5403.     /* Increment Buffer pointer */
  5404.     hi2c->pBuffPtr++;
  5405.  
  5406.     /* Update counter */
  5407.     hi2c->XferCount--;
  5408.   }
  5409.   else if (hi2c->XferCount == 3U)
  5410.   {
  5411.     /* Disable BUF interrupt, this help to treat correctly the last 2 bytes
  5412.        on BTF subroutine if there is a reception delay between N-1 and N byte */
  5413.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  5414.  
  5415.     if ((CurrentXferOptions != I2C_NEXT_FRAME) && (CurrentXferOptions != I2C_FIRST_AND_NEXT_FRAME))
  5416.     {
  5417.       /* Disable Acknowledge */
  5418.       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5419.     }
  5420.  
  5421.     /* Read data from DR */
  5422.     *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  5423.  
  5424.     /* Increment Buffer pointer */
  5425.     hi2c->pBuffPtr++;
  5426.  
  5427.     /* Update counter */
  5428.     hi2c->XferCount--;
  5429.   }
  5430.   else if (hi2c->XferCount == 2U)
  5431.   {
  5432.     /* Prepare next transfer or stop current transfer */
  5433.     if ((CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME_NO_STOP))
  5434.     {
  5435.       /* Disable Acknowledge */
  5436.       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5437.     }
  5438.     else if ((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_AND_NEXT_FRAME))
  5439.     {
  5440.       /* Enable Acknowledge */
  5441.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5442.     }
  5443.     else if (CurrentXferOptions != I2C_LAST_FRAME_NO_STOP)
  5444.     {
  5445.       /* Generate Stop */
  5446.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  5447.     }
  5448.     else
  5449.     {
  5450.       /* Do nothing */
  5451.     }
  5452.  
  5453.     /* Read data from DR */
  5454.     *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  5455.  
  5456.     /* Increment Buffer pointer */
  5457.     hi2c->pBuffPtr++;
  5458.  
  5459.     /* Update counter */
  5460.     hi2c->XferCount--;
  5461.  
  5462.     /* Read data from DR */
  5463.     *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  5464.  
  5465.     /* Increment Buffer pointer */
  5466.     hi2c->pBuffPtr++;
  5467.  
  5468.     /* Update counter */
  5469.     hi2c->XferCount--;
  5470.  
  5471.     /* Disable EVT and ERR interrupt */
  5472.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  5473.  
  5474.     hi2c->State = HAL_I2C_STATE_READY;
  5475.     if (hi2c->Mode == HAL_I2C_MODE_MEM)
  5476.     {
  5477.       hi2c->Mode = HAL_I2C_MODE_NONE;
  5478.       hi2c->PreviousState = I2C_STATE_NONE;
  5479. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5480.       hi2c->MemRxCpltCallback(hi2c);
  5481. #else
  5482.       HAL_I2C_MemRxCpltCallback(hi2c);
  5483. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5484.     }
  5485.     else
  5486.     {
  5487.       hi2c->Mode = HAL_I2C_MODE_NONE;
  5488.       hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
  5489. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5490.       hi2c->MasterRxCpltCallback(hi2c);
  5491. #else
  5492.       HAL_I2C_MasterRxCpltCallback(hi2c);
  5493. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5494.     }
  5495.   }
  5496.   else
  5497.   {
  5498.     /* Read data from DR */
  5499.     *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  5500.  
  5501.     /* Increment Buffer pointer */
  5502.     hi2c->pBuffPtr++;
  5503.  
  5504.     /* Update counter */
  5505.     hi2c->XferCount--;
  5506.   }
  5507. }
  5508.  
  5509. /**
  5510.   * @brief  Handle SB flag for Master
  5511.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5512.   *         the configuration information for I2C module
  5513.   * @retval None
  5514.   */
  5515. static void I2C_Master_SB(I2C_HandleTypeDef *hi2c)
  5516. {
  5517.   if (hi2c->Mode == HAL_I2C_MODE_MEM)
  5518.   {
  5519.     if (hi2c->EventCount == 0U)
  5520.     {
  5521.       /* Send slave address */
  5522.       hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
  5523.     }
  5524.     else
  5525.     {
  5526.       hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
  5527.     }
  5528.   }
  5529.   else
  5530.   {
  5531.     if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  5532.     {
  5533.       /* Send slave 7 Bits address */
  5534.       if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
  5535.       {
  5536.         hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
  5537.       }
  5538.       else
  5539.       {
  5540.         hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
  5541.       }
  5542.  
  5543.       if ((hi2c->hdmatx != NULL) || (hi2c->hdmarx != NULL))
  5544.       {
  5545.         if ((hi2c->hdmatx->XferCpltCallback != NULL) || (hi2c->hdmarx->XferCpltCallback != NULL))
  5546.         {
  5547.           /* Enable DMA Request */
  5548.           SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  5549.         }
  5550.       }
  5551.     }
  5552.     else
  5553.     {
  5554.       if (hi2c->EventCount == 0U)
  5555.       {
  5556.         /* Send header of slave address */
  5557.         hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(hi2c->Devaddress);
  5558.       }
  5559.       else if (hi2c->EventCount == 1U)
  5560.       {
  5561.         /* Send header of slave address */
  5562.         hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress);
  5563.       }
  5564.       else
  5565.       {
  5566.         /* Do nothing */
  5567.       }
  5568.     }
  5569.   }
  5570. }
  5571.  
  5572. /**
  5573.   * @brief  Handle ADD10 flag for Master
  5574.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5575.   *         the configuration information for I2C module
  5576.   * @retval None
  5577.   */
  5578. static void I2C_Master_ADD10(I2C_HandleTypeDef *hi2c)
  5579. {
  5580.   /* Send slave address */
  5581.   hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress);
  5582.  
  5583.   if ((hi2c->hdmatx != NULL) || (hi2c->hdmarx != NULL))
  5584.   {
  5585.     if ((hi2c->hdmatx->XferCpltCallback != NULL) || (hi2c->hdmarx->XferCpltCallback != NULL))
  5586.     {
  5587.       /* Enable DMA Request */
  5588.       SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  5589.     }
  5590.   }
  5591. }
  5592.  
  5593. /**
  5594.   * @brief  Handle ADDR flag for Master
  5595.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5596.   *         the configuration information for I2C module
  5597.   * @retval None
  5598.   */
  5599. static void I2C_Master_ADDR(I2C_HandleTypeDef *hi2c)
  5600. {
  5601.   /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  5602.   HAL_I2C_ModeTypeDef CurrentMode       = hi2c->Mode;
  5603.   uint32_t CurrentXferOptions           = hi2c->XferOptions;
  5604.   uint32_t Prev_State                   = hi2c->PreviousState;
  5605.  
  5606.   if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
  5607.   {
  5608.     if ((hi2c->EventCount == 0U) && (CurrentMode == HAL_I2C_MODE_MEM))
  5609.     {
  5610.       /* Clear ADDR flag */
  5611.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5612.     }
  5613.     else if ((hi2c->EventCount == 0U) && (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT))
  5614.     {
  5615.       /* Clear ADDR flag */
  5616.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5617.  
  5618.       /* Generate Restart */
  5619.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  5620.  
  5621.       hi2c->EventCount++;
  5622.     }
  5623.     else
  5624.     {
  5625.       if (hi2c->XferCount == 0U)
  5626.       {
  5627.         /* Clear ADDR flag */
  5628.         __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5629.  
  5630.         /* Generate Stop */
  5631.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  5632.       }
  5633.       else if (hi2c->XferCount == 1U)
  5634.       {
  5635.         if (CurrentXferOptions == I2C_NO_OPTION_FRAME)
  5636.         {
  5637.           /* Disable Acknowledge */
  5638.           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5639.  
  5640.           if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  5641.           {
  5642.             /* Disable Acknowledge */
  5643.             CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5644.  
  5645.             /* Clear ADDR flag */
  5646.             __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5647.           }
  5648.           else
  5649.           {
  5650.             /* Clear ADDR flag */
  5651.             __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5652.  
  5653.             /* Generate Stop */
  5654.             SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  5655.           }
  5656.         }
  5657.         /* Prepare next transfer or stop current transfer */
  5658.         else if ((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) \
  5659.                  && ((Prev_State != I2C_STATE_MASTER_BUSY_RX) || (CurrentXferOptions == I2C_FIRST_FRAME)))
  5660.         {
  5661.           if ((CurrentXferOptions != I2C_NEXT_FRAME) && (CurrentXferOptions != I2C_FIRST_AND_NEXT_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME_NO_STOP))
  5662.           {
  5663.             /* Disable Acknowledge */
  5664.             CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5665.           }
  5666.           else
  5667.           {
  5668.             /* Enable Acknowledge */
  5669.             SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5670.           }
  5671.  
  5672.           /* Clear ADDR flag */
  5673.           __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5674.         }
  5675.         else
  5676.         {
  5677.           /* Disable Acknowledge */
  5678.           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5679.  
  5680.           /* Clear ADDR flag */
  5681.           __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5682.  
  5683.           /* Generate Stop */
  5684.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  5685.         }
  5686.       }
  5687.       else if (hi2c->XferCount == 2U)
  5688.       {
  5689.         if ((CurrentXferOptions != I2C_NEXT_FRAME) && (CurrentXferOptions != I2C_FIRST_AND_NEXT_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME_NO_STOP))
  5690.         {
  5691.           /* Enable Pos */
  5692.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  5693.  
  5694.           /* Clear ADDR flag */
  5695.           __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5696.  
  5697.           /* Disable Acknowledge */
  5698.           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5699.         }
  5700.         else
  5701.         {
  5702.           /* Enable Acknowledge */
  5703.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5704.  
  5705.           /* Clear ADDR flag */
  5706.           __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5707.         }
  5708.  
  5709.         if (((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) && ((CurrentXferOptions == I2C_NO_OPTION_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME_NO_STOP) || (CurrentXferOptions == I2C_LAST_FRAME)))
  5710.         {
  5711.           /* Enable Last DMA bit */
  5712.           SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
  5713.         }
  5714.       }
  5715.       else
  5716.       {
  5717.         /* Enable Acknowledge */
  5718.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5719.  
  5720.         if (((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) && ((CurrentXferOptions == I2C_NO_OPTION_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME_NO_STOP) || (CurrentXferOptions == I2C_LAST_FRAME)))
  5721.         {
  5722.           /* Enable Last DMA bit */
  5723.           SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
  5724.         }
  5725.  
  5726.         /* Clear ADDR flag */
  5727.         __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5728.       }
  5729.  
  5730.       /* Reset Event counter  */
  5731.       hi2c->EventCount = 0U;
  5732.     }
  5733.   }
  5734.   else
  5735.   {
  5736.     /* Clear ADDR flag */
  5737.     __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5738.   }
  5739. }
  5740.  
  5741. /**
  5742.   * @brief  Handle TXE flag for Slave
  5743.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5744.   *         the configuration information for I2C module
  5745.   * @retval None
  5746.   */
  5747. static void I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
  5748. {
  5749.   /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  5750.   HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  5751.  
  5752.   if (hi2c->XferCount != 0U)
  5753.   {
  5754.     /* Write data to DR */
  5755.     hi2c->Instance->DR = *hi2c->pBuffPtr;
  5756.  
  5757.     /* Increment Buffer pointer */
  5758.     hi2c->pBuffPtr++;
  5759.  
  5760.     /* Update counter */
  5761.     hi2c->XferCount--;
  5762.  
  5763.     if ((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
  5764.     {
  5765.       /* Last Byte is received, disable Interrupt */
  5766.       __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  5767.  
  5768.       /* Set state at HAL_I2C_STATE_LISTEN */
  5769.       hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
  5770.       hi2c->State = HAL_I2C_STATE_LISTEN;
  5771.  
  5772.       /* Call the corresponding callback to inform upper layer of End of Transfer */
  5773. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5774.       hi2c->SlaveTxCpltCallback(hi2c);
  5775. #else
  5776.       HAL_I2C_SlaveTxCpltCallback(hi2c);
  5777. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5778.     }
  5779.   }
  5780. }
  5781.  
  5782. /**
  5783.   * @brief  Handle BTF flag for Slave transmitter
  5784.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5785.   *         the configuration information for I2C module
  5786.   * @retval None
  5787.   */
  5788. static void I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
  5789. {
  5790.   if (hi2c->XferCount != 0U)
  5791.   {
  5792.     /* Write data to DR */
  5793.     hi2c->Instance->DR = *hi2c->pBuffPtr;
  5794.  
  5795.     /* Increment Buffer pointer */
  5796.     hi2c->pBuffPtr++;
  5797.  
  5798.     /* Update counter */
  5799.     hi2c->XferCount--;
  5800.   }
  5801. }
  5802.  
  5803. /**
  5804.   * @brief  Handle RXNE flag for Slave
  5805.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5806.   *         the configuration information for I2C module
  5807.   * @retval None
  5808.   */
  5809. static void I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
  5810. {
  5811.   /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  5812.   HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  5813.  
  5814.   if (hi2c->XferCount != 0U)
  5815.   {
  5816.     /* Read data from DR */
  5817.     *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  5818.  
  5819.     /* Increment Buffer pointer */
  5820.     hi2c->pBuffPtr++;
  5821.  
  5822.     /* Update counter */
  5823.     hi2c->XferCount--;
  5824.  
  5825.     if ((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
  5826.     {
  5827.       /* Last Byte is received, disable Interrupt */
  5828.       __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  5829.  
  5830.       /* Set state at HAL_I2C_STATE_LISTEN */
  5831.       hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
  5832.       hi2c->State = HAL_I2C_STATE_LISTEN;
  5833.  
  5834.       /* Call the corresponding callback to inform upper layer of End of Transfer */
  5835. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5836.       hi2c->SlaveRxCpltCallback(hi2c);
  5837. #else
  5838.       HAL_I2C_SlaveRxCpltCallback(hi2c);
  5839. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5840.     }
  5841.   }
  5842. }
  5843.  
  5844. /**
  5845.   * @brief  Handle BTF flag for Slave receiver
  5846.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5847.   *         the configuration information for I2C module
  5848.   * @retval None
  5849.   */
  5850. static void I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
  5851. {
  5852.   if (hi2c->XferCount != 0U)
  5853.   {
  5854.     /* Read data from DR */
  5855.     *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  5856.  
  5857.     /* Increment Buffer pointer */
  5858.     hi2c->pBuffPtr++;
  5859.  
  5860.     /* Update counter */
  5861.     hi2c->XferCount--;
  5862.   }
  5863. }
  5864.  
  5865. /**
  5866.   * @brief  Handle ADD flag for Slave
  5867.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5868.   *         the configuration information for I2C module
  5869.   * @param  IT2Flags Interrupt2 flags to handle.
  5870.   * @retval None
  5871.   */
  5872. static void I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c, uint32_t IT2Flags)
  5873. {
  5874.   uint8_t TransferDirection = I2C_DIRECTION_RECEIVE;
  5875.   uint16_t SlaveAddrCode;
  5876.  
  5877.   if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
  5878.   {
  5879.     /* Disable BUF interrupt, BUF enabling is manage through slave specific interface */
  5880.     __HAL_I2C_DISABLE_IT(hi2c, (I2C_IT_BUF));
  5881.  
  5882.     /* Transfer Direction requested by Master */
  5883.     if (I2C_CHECK_FLAG(IT2Flags, I2C_FLAG_TRA) == RESET)
  5884.     {
  5885.       TransferDirection = I2C_DIRECTION_TRANSMIT;
  5886.     }
  5887.  
  5888.     if (I2C_CHECK_FLAG(IT2Flags, I2C_FLAG_DUALF) == RESET)
  5889.     {
  5890.       SlaveAddrCode = (uint16_t)hi2c->Init.OwnAddress1;
  5891.     }
  5892.     else
  5893.     {
  5894.       SlaveAddrCode = (uint16_t)hi2c->Init.OwnAddress2;
  5895.     }
  5896.  
  5897.     /* Process Unlocked */
  5898.     __HAL_UNLOCK(hi2c);
  5899.  
  5900.     /* Call Slave Addr callback */
  5901. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5902.     hi2c->AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
  5903. #else
  5904.     HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
  5905. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5906.   }
  5907.   else
  5908.   {
  5909.     /* Clear ADDR flag */
  5910.     __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
  5911.  
  5912.     /* Process Unlocked */
  5913.     __HAL_UNLOCK(hi2c);
  5914.   }
  5915. }
  5916.  
  5917. /**
  5918.   * @brief  Handle STOPF flag for Slave
  5919.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5920.   *         the configuration information for I2C module
  5921.   * @retval None
  5922.   */
  5923. static void I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
  5924. {
  5925.   /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  5926.   HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  5927.  
  5928.   /* Disable EVT, BUF and ERR interrupt */
  5929.   __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  5930.  
  5931.   /* Clear STOPF flag */
  5932.   __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  5933.  
  5934.   /* Disable Acknowledge */
  5935.   CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5936.  
  5937.   /* If a DMA is ongoing, Update handle size context */
  5938.   if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  5939.   {
  5940.     if ((CurrentState == HAL_I2C_STATE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
  5941.     {
  5942.       hi2c->XferCount = (uint16_t)(__HAL_DMA_GET_COUNTER(hi2c->hdmarx));
  5943.  
  5944.       if (hi2c->XferCount != 0U)
  5945.       {
  5946.         /* Set ErrorCode corresponding to a Non-Acknowledge */
  5947.         hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  5948.       }
  5949.  
  5950.       /* Disable, stop the current DMA */
  5951.       CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  5952.  
  5953.       /* Abort DMA Xfer if any */
  5954.       if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY)
  5955.       {
  5956.         /* Set the I2C DMA Abort callback :
  5957.         will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  5958.         hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
  5959.  
  5960.         /* Abort DMA RX */
  5961.         if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
  5962.         {
  5963.           /* Call Directly XferAbortCallback function in case of error */
  5964.           hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
  5965.         }
  5966.       }
  5967.     }
  5968.     else
  5969.     {
  5970.       hi2c->XferCount = (uint16_t)(__HAL_DMA_GET_COUNTER(hi2c->hdmatx));
  5971.  
  5972.       if (hi2c->XferCount != 0U)
  5973.       {
  5974.         /* Set ErrorCode corresponding to a Non-Acknowledge */
  5975.         hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  5976.       }
  5977.  
  5978.       /* Disable, stop the current DMA */
  5979.       CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  5980.  
  5981.       /* Abort DMA Xfer if any */
  5982.       if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY)
  5983.       {
  5984.         /* Set the I2C DMA Abort callback :
  5985.         will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  5986.         hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
  5987.  
  5988.         /* Abort DMA TX */
  5989.         if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
  5990.         {
  5991.           /* Call Directly XferAbortCallback function in case of error */
  5992.           hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
  5993.         }
  5994.       }
  5995.     }
  5996.   }
  5997.  
  5998.   /* All data are not transferred, so set error code accordingly */
  5999.   if (hi2c->XferCount != 0U)
  6000.   {
  6001.     /* Store Last receive data if any */
  6002.     if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  6003.     {
  6004.       /* Read data from DR */
  6005.       *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  6006.  
  6007.       /* Increment Buffer pointer */
  6008.       hi2c->pBuffPtr++;
  6009.  
  6010.       /* Update counter */
  6011.       hi2c->XferCount--;
  6012.     }
  6013.  
  6014.     /* Store Last receive data if any */
  6015.     if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  6016.     {
  6017.       /* Read data from DR */
  6018.       *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  6019.  
  6020.       /* Increment Buffer pointer */
  6021.       hi2c->pBuffPtr++;
  6022.  
  6023.       /* Update counter */
  6024.       hi2c->XferCount--;
  6025.     }
  6026.  
  6027.     if (hi2c->XferCount != 0U)
  6028.     {
  6029.       /* Set ErrorCode corresponding to a Non-Acknowledge */
  6030.       hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  6031.     }
  6032.   }
  6033.  
  6034.   if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  6035.   {
  6036.     /* Call the corresponding callback to inform upper layer of End of Transfer */
  6037.     I2C_ITError(hi2c);
  6038.   }
  6039.   else
  6040.   {
  6041.     if (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN)
  6042.     {
  6043.       /* Set state at HAL_I2C_STATE_LISTEN */
  6044.       hi2c->PreviousState = I2C_STATE_NONE;
  6045.       hi2c->State = HAL_I2C_STATE_LISTEN;
  6046.  
  6047.       /* Call the corresponding callback to inform upper layer of End of Transfer */
  6048. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6049.       hi2c->SlaveRxCpltCallback(hi2c);
  6050. #else
  6051.       HAL_I2C_SlaveRxCpltCallback(hi2c);
  6052. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6053.     }
  6054.  
  6055.     if (hi2c->State == HAL_I2C_STATE_LISTEN)
  6056.     {
  6057.       hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  6058.       hi2c->PreviousState = I2C_STATE_NONE;
  6059.       hi2c->State = HAL_I2C_STATE_READY;
  6060.       hi2c->Mode = HAL_I2C_MODE_NONE;
  6061.  
  6062.       /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  6063. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6064.       hi2c->ListenCpltCallback(hi2c);
  6065. #else
  6066.       HAL_I2C_ListenCpltCallback(hi2c);
  6067. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6068.     }
  6069.     else
  6070.     {
  6071.       if ((hi2c->PreviousState  == I2C_STATE_SLAVE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX))
  6072.       {
  6073.         hi2c->PreviousState = I2C_STATE_NONE;
  6074.         hi2c->State = HAL_I2C_STATE_READY;
  6075.         hi2c->Mode = HAL_I2C_MODE_NONE;
  6076.  
  6077. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6078.         hi2c->SlaveRxCpltCallback(hi2c);
  6079. #else
  6080.         HAL_I2C_SlaveRxCpltCallback(hi2c);
  6081. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6082.       }
  6083.     }
  6084.   }
  6085. }
  6086.  
  6087. /**
  6088.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  6089.   *         the configuration information for I2C module
  6090.   * @retval None
  6091.   */
  6092. static void I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
  6093. {
  6094.   /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  6095.   HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  6096.   uint32_t CurrentXferOptions       = hi2c->XferOptions;
  6097.  
  6098.   if (((CurrentXferOptions ==  I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME)) && \
  6099.       (CurrentState == HAL_I2C_STATE_LISTEN))
  6100.   {
  6101.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  6102.  
  6103.     /* Disable EVT, BUF and ERR interrupt */
  6104.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  6105.  
  6106.     /* Clear AF flag */
  6107.     __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  6108.  
  6109.     /* Disable Acknowledge */
  6110.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  6111.  
  6112.     hi2c->PreviousState = I2C_STATE_NONE;
  6113.     hi2c->State         = HAL_I2C_STATE_READY;
  6114.     hi2c->Mode          = HAL_I2C_MODE_NONE;
  6115.  
  6116.     /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  6117. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6118.     hi2c->ListenCpltCallback(hi2c);
  6119. #else
  6120.     HAL_I2C_ListenCpltCallback(hi2c);
  6121. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6122.   }
  6123.   else if (CurrentState == HAL_I2C_STATE_BUSY_TX)
  6124.   {
  6125.     hi2c->XferOptions   = I2C_NO_OPTION_FRAME;
  6126.     hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
  6127.     hi2c->State         = HAL_I2C_STATE_READY;
  6128.     hi2c->Mode          = HAL_I2C_MODE_NONE;
  6129.  
  6130.     /* Disable EVT, BUF and ERR interrupt */
  6131.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  6132.  
  6133.     /* Clear AF flag */
  6134.     __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  6135.  
  6136.     /* Disable Acknowledge */
  6137.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  6138.  
  6139. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6140.     hi2c->SlaveTxCpltCallback(hi2c);
  6141. #else
  6142.     HAL_I2C_SlaveTxCpltCallback(hi2c);
  6143. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6144.   }
  6145.   else
  6146.   {
  6147.     /* Clear AF flag only */
  6148.     /* State Listen, but XferOptions == FIRST or NEXT */
  6149.     __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  6150.   }
  6151. }
  6152.  
  6153. /**
  6154.   * @brief  I2C interrupts error process
  6155.   * @param  hi2c I2C handle.
  6156.   * @retval None
  6157.   */
  6158. static void I2C_ITError(I2C_HandleTypeDef *hi2c)
  6159. {
  6160.   /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  6161.   HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  6162.  
  6163.   if ((hi2c->Mode == HAL_I2C_MODE_MASTER) && (CurrentState == HAL_I2C_STATE_BUSY_RX))
  6164.   {
  6165.     /* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
  6166.     hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  6167.   }
  6168.  
  6169.   if (((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
  6170.   {
  6171.     /* keep HAL_I2C_STATE_LISTEN */
  6172.     hi2c->PreviousState = I2C_STATE_NONE;
  6173.     hi2c->State = HAL_I2C_STATE_LISTEN;
  6174.   }
  6175.   else
  6176.   {
  6177.     /* If state is an abort treatment on going, don't change state */
  6178.     /* This change will be do later */
  6179.     if ((READ_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN) != I2C_CR2_DMAEN) && (CurrentState != HAL_I2C_STATE_ABORT))
  6180.     {
  6181.       hi2c->State = HAL_I2C_STATE_READY;
  6182.     }
  6183.     hi2c->PreviousState = I2C_STATE_NONE;
  6184.     hi2c->Mode = HAL_I2C_MODE_NONE;
  6185.   }
  6186.  
  6187.   /* Abort DMA transfer */
  6188.   if (READ_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  6189.   {
  6190.     hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
  6191.  
  6192.     if (hi2c->hdmatx->State != HAL_DMA_STATE_READY)
  6193.     {
  6194.       /* Set the DMA Abort callback :
  6195.       will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  6196.       hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
  6197.  
  6198.       if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
  6199.       {
  6200.         /* Disable I2C peripheral to prevent dummy data in buffer */
  6201.         __HAL_I2C_DISABLE(hi2c);
  6202.  
  6203.         hi2c->State = HAL_I2C_STATE_READY;
  6204.  
  6205.         /* Call Directly XferAbortCallback function in case of error */
  6206.         hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
  6207.       }
  6208.     }
  6209.     else
  6210.     {
  6211.       /* Set the DMA Abort callback :
  6212.       will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  6213.       hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
  6214.  
  6215.       if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
  6216.       {
  6217.         /* Store Last receive data if any */
  6218.         if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  6219.         {
  6220.           /* Read data from DR */
  6221.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  6222.  
  6223.           /* Increment Buffer pointer */
  6224.           hi2c->pBuffPtr++;
  6225.         }
  6226.  
  6227.         /* Disable I2C peripheral to prevent dummy data in buffer */
  6228.         __HAL_I2C_DISABLE(hi2c);
  6229.  
  6230.         hi2c->State = HAL_I2C_STATE_READY;
  6231.  
  6232.         /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
  6233.         hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
  6234.       }
  6235.     }
  6236.   }
  6237.   else if (hi2c->State == HAL_I2C_STATE_ABORT)
  6238.   {
  6239.     hi2c->State = HAL_I2C_STATE_READY;
  6240.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  6241.  
  6242.     /* Store Last receive data if any */
  6243.     if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  6244.     {
  6245.       /* Read data from DR */
  6246.       *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  6247.  
  6248.       /* Increment Buffer pointer */
  6249.       hi2c->pBuffPtr++;
  6250.     }
  6251.  
  6252.     /* Disable I2C peripheral to prevent dummy data in buffer */
  6253.     __HAL_I2C_DISABLE(hi2c);
  6254.  
  6255.     /* Call the corresponding callback to inform upper layer of End of Transfer */
  6256. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6257.     hi2c->AbortCpltCallback(hi2c);
  6258. #else
  6259.     HAL_I2C_AbortCpltCallback(hi2c);
  6260. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6261.   }
  6262.   else
  6263.   {
  6264.     /* Store Last receive data if any */
  6265.     if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  6266.     {
  6267.       /* Read data from DR */
  6268.       *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  6269.  
  6270.       /* Increment Buffer pointer */
  6271.       hi2c->pBuffPtr++;
  6272.     }
  6273.  
  6274.     /* Call user error callback */
  6275. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6276.     hi2c->ErrorCallback(hi2c);
  6277. #else
  6278.     HAL_I2C_ErrorCallback(hi2c);
  6279. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6280.   }
  6281.   /* STOP Flag is not set after a NACK reception */
  6282.   /* So may inform upper layer that listen phase is stopped */
  6283.   /* during NACK error treatment */
  6284.   CurrentState = hi2c->State;
  6285.   if (((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF) && (CurrentState == HAL_I2C_STATE_LISTEN))
  6286.   {
  6287.     /* Disable EVT, BUF and ERR interrupt */
  6288.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  6289.  
  6290.     hi2c->XferOptions   = I2C_NO_OPTION_FRAME;
  6291.     hi2c->PreviousState = I2C_STATE_NONE;
  6292.     hi2c->State         = HAL_I2C_STATE_READY;
  6293.     hi2c->Mode          = HAL_I2C_MODE_NONE;
  6294.  
  6295.     /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  6296. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6297.     hi2c->ListenCpltCallback(hi2c);
  6298. #else
  6299.     HAL_I2C_ListenCpltCallback(hi2c);
  6300. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6301.   }
  6302. }
  6303.  
  6304. /**
  6305.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  6306.   *         the configuration information for I2C module
  6307.   * @param  DevAddress Target device address: The device 7 bits address value
  6308.   *         in datasheet must be shifted to the left before calling the interface
  6309.   * @param  Timeout Timeout duration
  6310.   * @param  Tickstart Tick start value
  6311.   * @retval HAL status
  6312.   */
  6313. static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
  6314. {
  6315.   /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  6316.   uint32_t CurrentXferOptions = hi2c->XferOptions;
  6317.  
  6318.   /* Generate Start condition if first transfer */
  6319.   if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  6320.   {
  6321.     /* Generate Start */
  6322.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  6323.   }
  6324.   else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
  6325.   {
  6326.     /* Generate ReStart */
  6327.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  6328.   }
  6329.   else
  6330.   {
  6331.     /* Do nothing */
  6332.   }
  6333.  
  6334.   /* Wait until SB flag is set */
  6335.   if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  6336.   {
  6337.     return HAL_ERROR;
  6338.   }
  6339.  
  6340.   if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  6341.   {
  6342.     /* Send slave address */
  6343.     hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  6344.   }
  6345.   else
  6346.   {
  6347.     /* Send header of slave address */
  6348.     hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
  6349.  
  6350.     /* Wait until ADD10 flag is set */
  6351.     if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
  6352.     {
  6353.       return HAL_ERROR;
  6354.     }
  6355.  
  6356.     /* Send slave address */
  6357.     hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
  6358.   }
  6359.  
  6360.   /* Wait until ADDR flag is set */
  6361.   if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  6362.   {
  6363.     return HAL_ERROR;
  6364.   }
  6365.  
  6366.   return HAL_OK;
  6367. }
  6368.  
  6369. /**
  6370.   * @brief  Master sends target device address for read request.
  6371.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  6372.   *         the configuration information for I2C module
  6373.   * @param  DevAddress Target device address: The device 7 bits address value
  6374.   *         in datasheet must be shifted to the left before calling the interface
  6375.   * @param  Timeout Timeout duration
  6376.   * @param  Tickstart Tick start value
  6377.   * @retval HAL status
  6378.   */
  6379. static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
  6380. {
  6381.   /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  6382.   uint32_t CurrentXferOptions = hi2c->XferOptions;
  6383.  
  6384.   /* Enable Acknowledge */
  6385.   SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  6386.  
  6387.   /* Generate Start condition if first transfer */
  6388.   if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME)  || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  6389.   {
  6390.     /* Generate Start */
  6391.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  6392.   }
  6393.   else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
  6394.   {
  6395.     /* Generate ReStart */
  6396.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  6397.   }
  6398.   else
  6399.   {
  6400.     /* Do nothing */
  6401.   }
  6402.  
  6403.   /* Wait until SB flag is set */
  6404.   if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  6405.   {
  6406.     return HAL_ERROR;
  6407.   }
  6408.  
  6409.   if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  6410.   {
  6411.     /* Send slave address */
  6412.     hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  6413.   }
  6414.   else
  6415.   {
  6416.     /* Send header of slave address */
  6417.     hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
  6418.  
  6419.     /* Wait until ADD10 flag is set */
  6420.     if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
  6421.     {
  6422.       return HAL_ERROR;
  6423.     }
  6424.  
  6425.     /* Send slave address */
  6426.     hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
  6427.  
  6428.     /* Wait until ADDR flag is set */
  6429.     if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  6430.     {
  6431.       return HAL_ERROR;
  6432.     }
  6433.  
  6434.     /* Clear ADDR flag */
  6435.     __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  6436.  
  6437.     /* Generate Restart */
  6438.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  6439.  
  6440.     /* Wait until SB flag is set */
  6441.     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  6442.     {
  6443.       return HAL_ERROR;
  6444.     }
  6445.  
  6446.     /* Send header of slave address */
  6447.     hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
  6448.   }
  6449.  
  6450.   /* Wait until ADDR flag is set */
  6451.   if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  6452.   {
  6453.     return HAL_ERROR;
  6454.   }
  6455.  
  6456.   return HAL_OK;
  6457. }
  6458.  
  6459. /**
  6460.   * @brief  Master sends target device address followed by internal memory address for write request.
  6461.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  6462.   *         the configuration information for I2C module
  6463.   * @param  DevAddress Target device address: The device 7 bits address value
  6464.   *         in datasheet must be shifted to the left before calling the interface
  6465.   * @param  MemAddress Internal memory address
  6466.   * @param  MemAddSize Size of internal memory address
  6467.   * @param  Timeout Timeout duration
  6468.   * @param  Tickstart Tick start value
  6469.   * @retval HAL status
  6470.   */
  6471. static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
  6472. {
  6473.   /* Generate Start */
  6474.   SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  6475.  
  6476.   /* Wait until SB flag is set */
  6477.   if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  6478.   {
  6479.     return HAL_ERROR;
  6480.   }
  6481.  
  6482.   /* Send slave address */
  6483.   hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  6484.  
  6485.   /* Wait until ADDR flag is set */
  6486.   if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  6487.   {
  6488.     return HAL_ERROR;
  6489.   }
  6490.  
  6491.   /* Clear ADDR flag */
  6492.   __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  6493.  
  6494.   /* Wait until TXE flag is set */
  6495.   if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  6496.   {
  6497.     if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  6498.     {
  6499.       /* Generate Stop */
  6500.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  6501.     }
  6502.     return HAL_ERROR;
  6503.   }
  6504.  
  6505.   /* If Memory address size is 8Bit */
  6506.   if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
  6507.   {
  6508.     /* Send Memory Address */
  6509.     hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  6510.   }
  6511.   /* If Memory address size is 16Bit */
  6512.   else
  6513.   {
  6514.     /* Send MSB of Memory Address */
  6515.     hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  6516.  
  6517.     /* Wait until TXE flag is set */
  6518.     if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  6519.     {
  6520.       if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  6521.       {
  6522.         /* Generate Stop */
  6523.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  6524.       }
  6525.       return HAL_ERROR;
  6526.     }
  6527.  
  6528.     /* Send LSB of Memory Address */
  6529.     hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  6530.   }
  6531.  
  6532.   return HAL_OK;
  6533. }
  6534.  
  6535. /**
  6536.   * @brief  Master sends target device address followed by internal memory address for read request.
  6537.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  6538.   *         the configuration information for I2C module
  6539.   * @param  DevAddress Target device address: The device 7 bits address value
  6540.   *         in datasheet must be shifted to the left before calling the interface
  6541.   * @param  MemAddress Internal memory address
  6542.   * @param  MemAddSize Size of internal memory address
  6543.   * @param  Timeout Timeout duration
  6544.   * @param  Tickstart Tick start value
  6545.   * @retval HAL status
  6546.   */
  6547. static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
  6548. {
  6549.   /* Enable Acknowledge */
  6550.   SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  6551.  
  6552.   /* Generate Start */
  6553.   SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  6554.  
  6555.   /* Wait until SB flag is set */
  6556.   if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  6557.   {
  6558.     return HAL_ERROR;
  6559.   }
  6560.  
  6561.   /* Send slave address */
  6562.   hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  6563.  
  6564.   /* Wait until ADDR flag is set */
  6565.   if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  6566.   {
  6567.     return HAL_ERROR;
  6568.   }
  6569.  
  6570.   /* Clear ADDR flag */
  6571.   __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  6572.  
  6573.   /* Wait until TXE flag is set */
  6574.   if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  6575.   {
  6576.     if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  6577.     {
  6578.       /* Generate Stop */
  6579.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  6580.     }
  6581.     return HAL_ERROR;
  6582.   }
  6583.  
  6584.   /* If Memory address size is 8Bit */
  6585.   if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
  6586.   {
  6587.     /* Send Memory Address */
  6588.     hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  6589.   }
  6590.   /* If Memory address size is 16Bit */
  6591.   else
  6592.   {
  6593.     /* Send MSB of Memory Address */
  6594.     hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  6595.  
  6596.     /* Wait until TXE flag is set */
  6597.     if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  6598.     {
  6599.       if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  6600.       {
  6601.         /* Generate Stop */
  6602.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  6603.       }
  6604.       return HAL_ERROR;
  6605.     }
  6606.  
  6607.     /* Send LSB of Memory Address */
  6608.     hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  6609.   }
  6610.  
  6611.   /* Wait until TXE flag is set */
  6612.   if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  6613.   {
  6614.     if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  6615.     {
  6616.       /* Generate Stop */
  6617.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  6618.     }
  6619.     return HAL_ERROR;
  6620.   }
  6621.  
  6622.   /* Generate Restart */
  6623.   SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  6624.  
  6625.   /* Wait until SB flag is set */
  6626.   if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  6627.   {
  6628.     return HAL_ERROR;
  6629.   }
  6630.  
  6631.   /* Send slave address */
  6632.   hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  6633.  
  6634.   /* Wait until ADDR flag is set */
  6635.   if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  6636.   {
  6637.     return HAL_ERROR;
  6638.   }
  6639.  
  6640.   return HAL_OK;
  6641. }
  6642.  
  6643. /**
  6644.   * @brief  DMA I2C process complete callback.
  6645.   * @param  hdma DMA handle
  6646.   * @retval None
  6647.   */
  6648. static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma)
  6649. {
  6650.   I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
  6651.  
  6652.   /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  6653.   HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  6654.   HAL_I2C_ModeTypeDef CurrentMode   = hi2c->Mode;
  6655.   uint32_t CurrentXferOptions       = hi2c->XferOptions;
  6656.  
  6657.   /* Disable EVT and ERR interrupt */
  6658.   __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  6659.  
  6660.   /* Clear Complete callback */
  6661.   hi2c->hdmatx->XferCpltCallback = NULL;
  6662.   hi2c->hdmarx->XferCpltCallback = NULL;
  6663.  
  6664.   if ((((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_BUSY_TX) == (uint32_t)HAL_I2C_STATE_BUSY_TX) || ((((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_BUSY_RX) == (uint32_t)HAL_I2C_STATE_BUSY_RX) && (CurrentMode == HAL_I2C_MODE_SLAVE)))
  6665.   {
  6666.     /* Disable DMA Request */
  6667.     CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  6668.  
  6669.     hi2c->XferCount = 0U;
  6670.  
  6671.     if (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN)
  6672.     {
  6673.       /* Set state at HAL_I2C_STATE_LISTEN */
  6674.       hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
  6675.       hi2c->State = HAL_I2C_STATE_LISTEN;
  6676.  
  6677.       /* Call the corresponding callback to inform upper layer of End of Transfer */
  6678. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6679.       hi2c->SlaveTxCpltCallback(hi2c);
  6680. #else
  6681.       HAL_I2C_SlaveTxCpltCallback(hi2c);
  6682. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6683.     }
  6684.     else if (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN)
  6685.     {
  6686.       /* Set state at HAL_I2C_STATE_LISTEN */
  6687.       hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
  6688.       hi2c->State = HAL_I2C_STATE_LISTEN;
  6689.  
  6690.       /* Call the corresponding callback to inform upper layer of End of Transfer */
  6691. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6692.       hi2c->SlaveRxCpltCallback(hi2c);
  6693. #else
  6694.       HAL_I2C_SlaveRxCpltCallback(hi2c);
  6695. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6696.     }
  6697.     else
  6698.     {
  6699.       /* Do nothing */
  6700.     }
  6701.  
  6702.     /* Enable EVT and ERR interrupt to treat end of transfer in IRQ handler */
  6703.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  6704.   }
  6705.   /* Check current Mode, in case of treatment DMA handler have been preempted by a prior interrupt */
  6706.   else if (hi2c->Mode != HAL_I2C_MODE_NONE)
  6707.   {
  6708.     if (hi2c->XferCount == (uint16_t)1)
  6709.     {
  6710.       /* Disable Acknowledge */
  6711.       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  6712.     }
  6713.  
  6714.     /* Disable EVT and ERR interrupt */
  6715.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  6716.  
  6717.     /* Prepare next transfer or stop current transfer */
  6718.     if ((CurrentXferOptions == I2C_NO_OPTION_FRAME) || (CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_OTHER_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME))
  6719.     {
  6720.       /* Generate Stop */
  6721.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  6722.     }
  6723.  
  6724.     /* Disable Last DMA */
  6725.     CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
  6726.  
  6727.     /* Disable DMA Request */
  6728.     CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  6729.  
  6730.     hi2c->XferCount = 0U;
  6731.  
  6732.     /* Check if Errors has been detected during transfer */
  6733.     if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  6734.     {
  6735. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6736.       hi2c->ErrorCallback(hi2c);
  6737. #else
  6738.       HAL_I2C_ErrorCallback(hi2c);
  6739. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6740.     }
  6741.     else
  6742.     {
  6743.       hi2c->State = HAL_I2C_STATE_READY;
  6744.  
  6745.       if (hi2c->Mode == HAL_I2C_MODE_MEM)
  6746.       {
  6747.         hi2c->Mode = HAL_I2C_MODE_NONE;
  6748.         hi2c->PreviousState = I2C_STATE_NONE;
  6749.  
  6750. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6751.         hi2c->MemRxCpltCallback(hi2c);
  6752. #else
  6753.         HAL_I2C_MemRxCpltCallback(hi2c);
  6754. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6755.       }
  6756.       else
  6757.       {
  6758.         hi2c->Mode = HAL_I2C_MODE_NONE;
  6759.         hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
  6760.  
  6761. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6762.         hi2c->MasterRxCpltCallback(hi2c);
  6763. #else
  6764.         HAL_I2C_MasterRxCpltCallback(hi2c);
  6765. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6766.       }
  6767.     }
  6768.   }
  6769.   else
  6770.   {
  6771.     /* Do nothing */
  6772.   }
  6773. }
  6774.  
  6775. /**
  6776.   * @brief  DMA I2C communication error callback.
  6777.   * @param  hdma DMA handle
  6778.   * @retval None
  6779.   */
  6780. static void I2C_DMAError(DMA_HandleTypeDef *hdma)
  6781. {
  6782.   I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
  6783.  
  6784.   /* Clear Complete callback */
  6785.   hi2c->hdmatx->XferCpltCallback = NULL;
  6786.   hi2c->hdmarx->XferCpltCallback = NULL;
  6787.  
  6788.   /* Disable Acknowledge */
  6789.   CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  6790.  
  6791.   hi2c->XferCount       = 0U;
  6792.   hi2c->State           = HAL_I2C_STATE_READY;
  6793.   hi2c->Mode            = HAL_I2C_MODE_NONE;
  6794.   hi2c->ErrorCode       |= HAL_I2C_ERROR_DMA;
  6795.  
  6796. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6797.   hi2c->ErrorCallback(hi2c);
  6798. #else
  6799.   HAL_I2C_ErrorCallback(hi2c);
  6800. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6801. }
  6802.  
  6803. /**
  6804.   * @brief DMA I2C communication abort callback
  6805.   *        (To be called at end of DMA Abort procedure).
  6806.   * @param hdma DMA handle.
  6807.   * @retval None
  6808.   */
  6809. static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
  6810. {
  6811.   I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
  6812.  
  6813.   /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  6814.   HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  6815.  
  6816.   /* Clear Complete callback */
  6817.   hi2c->hdmatx->XferCpltCallback = NULL;
  6818.   hi2c->hdmarx->XferCpltCallback = NULL;
  6819.  
  6820.   /* Disable Acknowledge */
  6821.   CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  6822.  
  6823.   hi2c->XferCount = 0U;
  6824.  
  6825.   /* Reset XferAbortCallback */
  6826.   hi2c->hdmatx->XferAbortCallback = NULL;
  6827.   hi2c->hdmarx->XferAbortCallback = NULL;
  6828.  
  6829.   /* Disable I2C peripheral to prevent dummy data in buffer */
  6830.   __HAL_I2C_DISABLE(hi2c);
  6831.  
  6832.   /* Check if come from abort from user */
  6833.   if (hi2c->State == HAL_I2C_STATE_ABORT)
  6834.   {
  6835.     hi2c->State         = HAL_I2C_STATE_READY;
  6836.     hi2c->Mode          = HAL_I2C_MODE_NONE;
  6837.     hi2c->ErrorCode     = HAL_I2C_ERROR_NONE;
  6838.  
  6839.     /* Call the corresponding callback to inform upper layer of End of Transfer */
  6840. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6841.     hi2c->AbortCpltCallback(hi2c);
  6842. #else
  6843.     HAL_I2C_AbortCpltCallback(hi2c);
  6844. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6845.   }
  6846.   else
  6847.   {
  6848.     if (((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
  6849.     {
  6850.       /* Renable I2C peripheral */
  6851.       __HAL_I2C_ENABLE(hi2c);
  6852.  
  6853.       /* Enable Acknowledge */
  6854.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  6855.  
  6856.       /* keep HAL_I2C_STATE_LISTEN */
  6857.       hi2c->PreviousState = I2C_STATE_NONE;
  6858.       hi2c->State = HAL_I2C_STATE_LISTEN;
  6859.     }
  6860.     else
  6861.     {
  6862.       hi2c->State = HAL_I2C_STATE_READY;
  6863.       hi2c->Mode = HAL_I2C_MODE_NONE;
  6864.     }
  6865.  
  6866.     /* Call the corresponding callback to inform upper layer of End of Transfer */
  6867. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6868.     hi2c->ErrorCallback(hi2c);
  6869. #else
  6870.     HAL_I2C_ErrorCallback(hi2c);
  6871. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6872.   }
  6873. }
  6874.  
  6875. /**
  6876.   * @brief  This function handles I2C Communication Timeout.
  6877.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  6878.   *         the configuration information for I2C module
  6879.   * @param  Flag specifies the I2C flag to check.
  6880.   * @param  Status The new Flag status (SET or RESET).
  6881.   * @param  Timeout Timeout duration
  6882.   * @param  Tickstart Tick start value
  6883.   * @retval HAL status
  6884.   */
  6885. static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
  6886. {
  6887.   /* Wait until flag is set */
  6888.   while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
  6889.   {
  6890.     /* Check for the Timeout */
  6891.     if (Timeout != HAL_MAX_DELAY)
  6892.     {
  6893.       if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
  6894.       {
  6895.         hi2c->PreviousState     = I2C_STATE_NONE;
  6896.         hi2c->State             = HAL_I2C_STATE_READY;
  6897.         hi2c->Mode              = HAL_I2C_MODE_NONE;
  6898.         hi2c->ErrorCode         |= HAL_I2C_ERROR_TIMEOUT;
  6899.  
  6900.         /* Process Unlocked */
  6901.         __HAL_UNLOCK(hi2c);
  6902.  
  6903.         return HAL_ERROR;
  6904.       }
  6905.     }
  6906.   }
  6907.   return HAL_OK;
  6908. }
  6909.  
  6910. /**
  6911.   * @brief  This function handles I2C Communication Timeout for Master addressing phase.
  6912.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  6913.   *         the configuration information for I2C module
  6914.   * @param  Flag specifies the I2C flag to check.
  6915.   * @param  Timeout Timeout duration
  6916.   * @param  Tickstart Tick start value
  6917.   * @retval HAL status
  6918.   */
  6919. static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
  6920. {
  6921.   while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
  6922.   {
  6923.     if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  6924.     {
  6925.       /* Generate Stop */
  6926.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  6927.  
  6928.       /* Clear AF Flag */
  6929.       __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  6930.  
  6931.       hi2c->PreviousState       = I2C_STATE_NONE;
  6932.       hi2c->State               = HAL_I2C_STATE_READY;
  6933.       hi2c->Mode                = HAL_I2C_MODE_NONE;
  6934.       hi2c->ErrorCode           |= HAL_I2C_ERROR_AF;
  6935.  
  6936.       /* Process Unlocked */
  6937.       __HAL_UNLOCK(hi2c);
  6938.  
  6939.       return HAL_ERROR;
  6940.     }
  6941.  
  6942.     /* Check for the Timeout */
  6943.     if (Timeout != HAL_MAX_DELAY)
  6944.     {
  6945.       if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
  6946.       {
  6947.         hi2c->PreviousState       = I2C_STATE_NONE;
  6948.         hi2c->State               = HAL_I2C_STATE_READY;
  6949.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  6950.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  6951.  
  6952.         /* Process Unlocked */
  6953.         __HAL_UNLOCK(hi2c);
  6954.  
  6955.         return HAL_ERROR;
  6956.       }
  6957.     }
  6958.   }
  6959.   return HAL_OK;
  6960. }
  6961.  
  6962. /**
  6963.   * @brief  This function handles I2C Communication Timeout for specific usage of TXE flag.
  6964.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  6965.   *                the configuration information for the specified I2C.
  6966.   * @param  Timeout Timeout duration
  6967.   * @param  Tickstart Tick start value
  6968.   * @retval HAL status
  6969.   */
  6970. static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  6971. {
  6972.   while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
  6973.   {
  6974.     /* Check if a NACK is detected */
  6975.     if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  6976.     {
  6977.       return HAL_ERROR;
  6978.     }
  6979.  
  6980.     /* Check for the Timeout */
  6981.     if (Timeout != HAL_MAX_DELAY)
  6982.     {
  6983.       if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
  6984.       {
  6985.         hi2c->PreviousState       = I2C_STATE_NONE;
  6986.         hi2c->State               = HAL_I2C_STATE_READY;
  6987.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  6988.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  6989.  
  6990.         /* Process Unlocked */
  6991.         __HAL_UNLOCK(hi2c);
  6992.  
  6993.         return HAL_ERROR;
  6994.       }
  6995.     }
  6996.   }
  6997.   return HAL_OK;
  6998. }
  6999.  
  7000. /**
  7001.   * @brief  This function handles I2C Communication Timeout for specific usage of BTF flag.
  7002.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  7003.   *                the configuration information for the specified I2C.
  7004.   * @param  Timeout Timeout duration
  7005.   * @param  Tickstart Tick start value
  7006.   * @retval HAL status
  7007.   */
  7008. static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  7009. {
  7010.   while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
  7011.   {
  7012.     /* Check if a NACK is detected */
  7013.     if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  7014.     {
  7015.       return HAL_ERROR;
  7016.     }
  7017.  
  7018.     /* Check for the Timeout */
  7019.     if (Timeout != HAL_MAX_DELAY)
  7020.     {
  7021.       if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
  7022.       {
  7023.         hi2c->PreviousState       = I2C_STATE_NONE;
  7024.         hi2c->State               = HAL_I2C_STATE_READY;
  7025.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  7026.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  7027.  
  7028.         /* Process Unlocked */
  7029.         __HAL_UNLOCK(hi2c);
  7030.  
  7031.         return HAL_ERROR;
  7032.       }
  7033.     }
  7034.   }
  7035.   return HAL_OK;
  7036. }
  7037.  
  7038. /**
  7039.   * @brief  This function handles I2C Communication Timeout for specific usage of STOP flag.
  7040.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  7041.   *                the configuration information for the specified I2C.
  7042.   * @param  Timeout Timeout duration
  7043.   * @param  Tickstart Tick start value
  7044.   * @retval HAL status
  7045.   */
  7046. static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  7047. {
  7048.   while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
  7049.   {
  7050.     /* Check if a NACK is detected */
  7051.     if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  7052.     {
  7053.       return HAL_ERROR;
  7054.     }
  7055.  
  7056.     /* Check for the Timeout */
  7057.     if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
  7058.     {
  7059.       hi2c->PreviousState       = I2C_STATE_NONE;
  7060.       hi2c->State               = HAL_I2C_STATE_READY;
  7061.       hi2c->Mode                = HAL_I2C_MODE_NONE;
  7062.       hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  7063.  
  7064.       /* Process Unlocked */
  7065.       __HAL_UNLOCK(hi2c);
  7066.  
  7067.       return HAL_ERROR;
  7068.     }
  7069.   }
  7070.   return HAL_OK;
  7071. }
  7072.  
  7073. /**
  7074.   * @brief  This function handles I2C Communication Timeout for specific usage of RXNE flag.
  7075.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  7076.   *                the configuration information for the specified I2C.
  7077.   * @param  Timeout Timeout duration
  7078.   * @param  Tickstart Tick start value
  7079.   * @retval HAL status
  7080.   */
  7081. static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  7082. {
  7083.  
  7084.   while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
  7085.   {
  7086.     /* Check if a STOPF is detected */
  7087.     if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
  7088.     {
  7089.       /* Clear STOP Flag */
  7090.       __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
  7091.  
  7092.       hi2c->PreviousState       = I2C_STATE_NONE;
  7093.       hi2c->State               = HAL_I2C_STATE_READY;
  7094.       hi2c->Mode                = HAL_I2C_MODE_NONE;
  7095.       hi2c->ErrorCode           |= HAL_I2C_ERROR_NONE;
  7096.  
  7097.       /* Process Unlocked */
  7098.       __HAL_UNLOCK(hi2c);
  7099.  
  7100.       return HAL_ERROR;
  7101.     }
  7102.  
  7103.     /* Check for the Timeout */
  7104.     if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
  7105.     {
  7106.       hi2c->PreviousState       = I2C_STATE_NONE;
  7107.       hi2c->State               = HAL_I2C_STATE_READY;
  7108.       hi2c->Mode                = HAL_I2C_MODE_NONE;
  7109.       hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  7110.  
  7111.       /* Process Unlocked */
  7112.       __HAL_UNLOCK(hi2c);
  7113.  
  7114.       return HAL_ERROR;
  7115.     }
  7116.   }
  7117.   return HAL_OK;
  7118. }
  7119.  
  7120. /**
  7121.   * @brief  This function handles Acknowledge failed detection during an I2C Communication.
  7122.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  7123.   *                the configuration information for the specified I2C.
  7124.   * @retval HAL status
  7125.   */
  7126. static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
  7127. {
  7128.   if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  7129.   {
  7130.     /* Clear NACKF Flag */
  7131.     __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  7132.  
  7133.     hi2c->PreviousState       = I2C_STATE_NONE;
  7134.     hi2c->State               = HAL_I2C_STATE_READY;
  7135.     hi2c->Mode                = HAL_I2C_MODE_NONE;
  7136.     hi2c->ErrorCode           |= HAL_I2C_ERROR_AF;
  7137.  
  7138.     /* Process Unlocked */
  7139.     __HAL_UNLOCK(hi2c);
  7140.  
  7141.     return HAL_ERROR;
  7142.   }
  7143.   return HAL_OK;
  7144. }
  7145.  
  7146. /**
  7147.   * @brief  Convert I2Cx OTHER_xxx XferOptions to functionnal XferOptions.
  7148.   * @param  hi2c I2C handle.
  7149.   * @retval None
  7150.   */
  7151. static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c)
  7152. {
  7153.   /* if user set XferOptions to I2C_OTHER_FRAME            */
  7154.   /* it request implicitly to generate a restart condition */
  7155.   /* set XferOptions to I2C_FIRST_FRAME                    */
  7156.   if (hi2c->XferOptions == I2C_OTHER_FRAME)
  7157.   {
  7158.     hi2c->XferOptions = I2C_FIRST_FRAME;
  7159.   }
  7160.   /* else if user set XferOptions to I2C_OTHER_AND_LAST_FRAME */
  7161.   /* it request implicitly to generate a restart condition    */
  7162.   /* then generate a stop condition at the end of transfer    */
  7163.   /* set XferOptions to I2C_FIRST_AND_LAST_FRAME              */
  7164.   else if (hi2c->XferOptions == I2C_OTHER_AND_LAST_FRAME)
  7165.   {
  7166.     hi2c->XferOptions = I2C_FIRST_AND_LAST_FRAME;
  7167.   }
  7168.   else
  7169.   {
  7170.     /* Nothing to do */
  7171.   }
  7172. }
  7173.  
  7174. /**
  7175.   * @}
  7176.   */
  7177.  
  7178. #endif /* HAL_I2C_MODULE_ENABLED */
  7179. /**
  7180.   * @}
  7181.   */
  7182.  
  7183. /**
  7184.   * @}
  7185.   */
  7186.  
  7187. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  7188.