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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32f1xx_hal_dac_ex.c
  4.   * @author  MCD Application Team
  5.   * @version V1.0.1
  6.   * @date    31-July-2015
  7.   * @brief   DAC HAL module driver.
  8.   *         This file provides firmware functions to manage the following
  9.   *         functionalities of DAC extension peripheral:
  10.   *           + Extended features functions
  11.   *    
  12.   *
  13.   @verbatim      
  14.   ==============================================================================
  15.                       ##### How to use this driver #####
  16.   ==============================================================================
  17.     [..]          
  18.       (+) When Dual mode is enabled (i.e DAC Channel1 and Channel2 are used simultaneously) :
  19.           Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
  20.           HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in Channel 1 and Channel 2.  
  21.       (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
  22.       (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
  23.    
  24.  @endverbatim    
  25.   ******************************************************************************
  26.   * @attention
  27.   *
  28.   * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  29.   *
  30.   * Redistribution and use in source and binary forms, with or without modification,
  31.   * are permitted provided that the following conditions are met:
  32.   *   1. Redistributions of source code must retain the above copyright notice,
  33.   *      this list of conditions and the following disclaimer.
  34.   *   2. Redistributions in binary form must reproduce the above copyright notice,
  35.   *      this list of conditions and the following disclaimer in the documentation
  36.   *      and/or other materials provided with the distribution.
  37.   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  38.   *      may be used to endorse or promote products derived from this software
  39.   *      without specific prior written permission.
  40.   *
  41.   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  42.   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  43.   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  44.   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  45.   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  46.   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  47.   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  48.   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  49.   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  50.   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  51.   *
  52.   ******************************************************************************
  53.   */
  54.  
  55.  
  56. /* Includes ------------------------------------------------------------------*/
  57. #include "stm32f1xx_hal.h"
  58.  
  59. /** @addtogroup STM32F1xx_HAL_Driver
  60.   * @{
  61.   */
  62.  
  63. /** @defgroup DACEx DACEx
  64.   * @brief DACEx driver module
  65.   * @{
  66.   */
  67.  
  68. #ifdef HAL_DAC_MODULE_ENABLED
  69. #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
  70.  
  71. /* Private typedef -----------------------------------------------------------*/
  72. /* Private define ------------------------------------------------------------*/
  73. /* Private macro -------------------------------------------------------------*/
  74. /* Private variables ---------------------------------------------------------*/
  75. /* Private function prototypes -----------------------------------------------*/
  76. /* Exported functions --------------------------------------------------------*/
  77.  
  78. /** @defgroup DACEx_Exported_Functions DACEx Exported Functions
  79.   * @{
  80.   */
  81.  
  82. /** @defgroup DACEx_Exported_Functions_Group1 Extended features functions
  83.  *  @brief    Extended features functions
  84.  *
  85. @verbatim  
  86.   ==============================================================================
  87.                  ##### Extended features functions #####
  88.   ==============================================================================  
  89.     [..]  This section provides functions allowing to:
  90.       (+) Start conversion.
  91.       (+) Stop conversion.
  92.       (+) Start conversion and enable DMA transfer.
  93.       (+) Stop conversion and disable DMA transfer.
  94.       (+) Get result of conversion.
  95.       (+) Get result of dual mode conversion.
  96.                      
  97. @endverbatim
  98.   * @{
  99.   */
  100.  
  101. /**
  102.   * @brief  Returns the last data output value of the selected DAC channel.
  103.   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
  104.   *         the configuration information for the specified DAC.
  105.   * @retval The selected DAC channel data output value.
  106.   */
  107. uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac)
  108. {
  109.   uint32_t tmp = 0;
  110.  
  111.   tmp |= hdac->Instance->DOR1;
  112.  
  113.   tmp |= hdac->Instance->DOR2 << 16;
  114.  
  115.   /* Returns the DAC channel data output register value */
  116.   return tmp;
  117. }
  118.  
  119. /**
  120.   * @brief  Enables or disables the selected DAC channel wave generation.
  121.   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
  122.   *         the configuration information for the specified DAC.
  123.   * @param  Channel: The selected DAC channel.
  124.   *          This parameter can be one of the following values:
  125.   *            DAC_CHANNEL_1 / DAC_CHANNEL_2
  126.   * @param  Amplitude: Select max triangle amplitude.
  127.   *          This parameter can be one of the following values:
  128.   *            @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
  129.   *            @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
  130.   *            @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7
  131.   *            @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15
  132.   *            @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31
  133.   *            @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63
  134.   *            @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127
  135.   *            @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255
  136.   *            @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511
  137.   *            @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023
  138.   *            @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047
  139.   *            @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095                              
  140.   * @retval HAL status
  141.   */
  142. HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
  143. {  
  144.   /* Check the parameters */
  145.   assert_param(IS_DAC_CHANNEL(Channel));
  146.   assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
  147.  
  148.   /* Process locked */
  149.   __HAL_LOCK(hdac);
  150.  
  151.   /* Change DAC state */
  152.   hdac->State = HAL_DAC_STATE_BUSY;
  153.  
  154.   /* Enable the selected wave generation for the selected DAC channel */
  155.   MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_1 | Amplitude) << Channel);
  156.  
  157.   /* Change DAC state */
  158.   hdac->State = HAL_DAC_STATE_READY;
  159.  
  160.   /* Process unlocked */
  161.   __HAL_UNLOCK(hdac);
  162.  
  163.   /* Return function status */
  164.   return HAL_OK;
  165. }
  166.  
  167. /**
  168.   * @brief  Enables or disables the selected DAC channel wave generation.
  169.   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
  170.   *         the configuration information for the specified DAC.
  171.   * @param  Channel: The selected DAC channel.
  172.   *          This parameter can be one of the following values:
  173.   *            DAC_CHANNEL_1 / DAC_CHANNEL_2
  174.   * @param  Amplitude: Unmask DAC channel LFSR for noise wave generation.
  175.   *          This parameter can be one of the following values:
  176.   *            @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
  177.   *            @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation  
  178.   *            @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation
  179.   *            @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation
  180.   *            @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation
  181.   *            @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation
  182.   *            @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation
  183.   *            @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation
  184.   *            @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation
  185.   *            @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation
  186.   *            @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation
  187.   *            @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation
  188.   * @retval HAL status
  189.   */
  190. HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
  191. {  
  192.   /* Check the parameters */
  193.   assert_param(IS_DAC_CHANNEL(Channel));
  194.   assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
  195.  
  196.   /* Process locked */
  197.   __HAL_LOCK(hdac);
  198.  
  199.   /* Change DAC state */
  200.   hdac->State = HAL_DAC_STATE_BUSY;
  201.  
  202.   /* Enable the selected wave generation for the selected DAC channel */
  203.   MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_0 | Amplitude) << Channel);
  204.  
  205.   /* Change DAC state */
  206.   hdac->State = HAL_DAC_STATE_READY;
  207.  
  208.   /* Process unlocked */
  209.   __HAL_UNLOCK(hdac);
  210.  
  211.   /* Return function status */
  212.   return HAL_OK;
  213. }
  214.  
  215. /**
  216.   * @brief  Set the specified data holding register value for dual DAC channel.
  217.   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
  218.   *               the configuration information for the specified DAC.
  219.   * @param  Alignment: Specifies the data alignment for dual channel DAC.
  220.   *          This parameter can be one of the following values:
  221.   *            DAC_ALIGN_8B_R: 8bit right data alignment selected
  222.   *            DAC_ALIGN_12B_L: 12bit left data alignment selected
  223.   *            DAC_ALIGN_12B_R: 12bit right data alignment selected
  224.   * @param  Data1: Data for DAC Channel2 to be loaded in the selected data holding register.
  225.   * @param  Data2: Data for DAC Channel1 to be loaded in the selected data  holding register.
  226.   * @note   In dual mode, a unique register access is required to write in both
  227.   *          DAC channels at the same time.
  228.   * @retval HAL status
  229.   */
  230. HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2)
  231. {  
  232.   uint32_t data = 0, tmp = 0;
  233.  
  234.   /* Check the parameters */
  235.   assert_param(IS_DAC_ALIGN(Alignment));
  236.   assert_param(IS_DAC_DATA(Data1));
  237.   assert_param(IS_DAC_DATA(Data2));
  238.  
  239.   /* Calculate and set dual DAC data holding register value */
  240.   if (Alignment == DAC_ALIGN_8B_R)
  241.   {
  242.     data = ((uint32_t)Data2 << 8) | Data1;
  243.   }
  244.   else
  245.   {
  246.     data = ((uint32_t)Data2 << 16) | Data1;
  247.   }
  248.  
  249.   tmp = (uint32_t)hdac->Instance;
  250.   tmp += DAC_DHR12RD_ALIGNMENT(Alignment);
  251.  
  252.   /* Set the dual DAC selected data holding register */
  253.   *(__IO uint32_t *)tmp = data;
  254.  
  255.   /* Return function status */
  256.   return HAL_OK;
  257. }
  258.  
  259. /**
  260.   * @brief  Conversion complete callback in non blocking mode for Channel2
  261.   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
  262.   *         the configuration information for the specified DAC.
  263.   * @retval None
  264.   */
  265. __weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac)
  266. {
  267.   /* NOTE : This function Should not be modified, when the callback is needed,
  268.             the HAL_DACEx_ConvCpltCallbackCh2 could be implemented in the user file
  269.    */
  270. }
  271.  
  272. /**
  273.   * @brief  Conversion half DMA transfer callback in non blocking mode for Channel2
  274.   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
  275.   *         the configuration information for the specified DAC.
  276.   * @retval None
  277.   */
  278. __weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac)
  279. {
  280.   /* NOTE : This function Should not be modified, when the callback is needed,
  281.             the HAL_DACEx_ConvHalfCpltCallbackCh2 could be implemented in the user file
  282.    */
  283. }
  284.  
  285. /**
  286.   * @brief  Error DAC callback for Channel2.
  287.   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
  288.   *         the configuration information for the specified DAC.
  289.   * @retval None
  290.   */
  291. __weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
  292. {
  293.   /* NOTE : This function Should not be modified, when the callback is needed,
  294.             the HAL_DACEx_ErrorCallbackCh2 could be implemented in the user file
  295.    */
  296. }
  297.  
  298. #if defined (STM32F100xB) || defined (STM32F100xE)
  299. /**
  300.   * @brief  DMA underrun DAC callback for channel1.
  301.   *         Note: For STM32F100x devices with specific feature: DMA underrun.
  302.   *         On these devices, this function uses the interruption of DMA
  303.   *         underrun.
  304.   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
  305.   *         the configuration information for the specified DAC.
  306.   * @retval None
  307.   */
  308. __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
  309. {
  310.   /* NOTE : This function Should not be modified, when the callback is needed,
  311.             the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
  312.    */
  313. }
  314.  
  315. /**
  316.   * @brief  DMA underrun DAC callback for channel2.
  317.   *         Note: For STM32F100x devices with specific feature: DMA underrun.
  318.   *         On these devices, this function uses the interruption of DMA
  319.   *         underrun.
  320.   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
  321.   *         the configuration information for the specified DAC.
  322.   * @retval None
  323.   */
  324. __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
  325. {
  326.   /* NOTE : This function Should not be modified, when the callback is needed,
  327.             the HAL_DACEx_DMAUnderrunCallbackCh2 could be implemented in the user file
  328.    */
  329. }
  330. #endif /* STM32F100xB) || defined (STM32F100xE) */
  331.  
  332. /**
  333.   * @}
  334.   */
  335.  
  336. #if defined (STM32F100xB) || defined (STM32F100xE)
  337. /**
  338.   * @brief  Enables DAC and starts conversion of channel.
  339.   *         Note: For STM32F100x devices with specific feature: DMA underrun.
  340.   *         On these devices, this function enables the interruption of DMA
  341.   *         underrun.
  342.   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
  343.   *         the configuration information for the specified DAC.
  344.   * @param  Channel: The selected DAC channel.
  345.   *          This parameter can be one of the following values:
  346.   *            @arg DAC_CHANNEL_1: DAC Channel1 selected
  347.   *            @arg DAC_CHANNEL_2: DAC Channel2 selected
  348.   * @param  pData: The destination peripheral Buffer address.
  349.   * @param  Length: The length of data to be transferred from memory to DAC peripheral
  350.   * @param  Alignment: Specifies the data alignment for DAC channel.
  351.   *          This parameter can be one of the following values:
  352.   *            @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
  353.   *            @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
  354.   *            @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
  355.   * @retval HAL status
  356.   */
  357. HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
  358. {
  359.   uint32_t tmpreg = 0;
  360.    
  361.   /* Check the parameters */
  362.   assert_param(IS_DAC_CHANNEL(Channel));
  363.   assert_param(IS_DAC_ALIGN(Alignment));
  364.  
  365.   /* Process locked */
  366.   __HAL_LOCK(hdac);
  367.  
  368.   /* Change DAC state */
  369.   hdac->State = HAL_DAC_STATE_BUSY;
  370.  
  371.   if(Channel == DAC_CHANNEL_1)
  372.   {
  373.     /* Set the DMA transfer complete callback for channel1 */
  374.     hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
  375.  
  376.     /* Set the DMA half transfer complete callback for channel1 */
  377.     hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
  378.  
  379.     /* Set the DMA error callback for channel1 */
  380.     hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
  381.  
  382.     /* Enable the selected DAC channel1 DMA request */
  383.     SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
  384.        
  385.     /* Case of use of channel 1 */
  386.     switch(Alignment)
  387.     {
  388.       case DAC_ALIGN_12B_R:
  389.         /* Get DHR12R1 address */
  390.         tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
  391.         break;
  392.       case DAC_ALIGN_12B_L:
  393.         /* Get DHR12L1 address */
  394.         tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
  395.         break;
  396.       case DAC_ALIGN_8B_R:
  397.         /* Get DHR8R1 address */
  398.         tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
  399.         break;
  400.       default:
  401.         break;
  402.     }
  403.   }
  404.   else
  405.   {
  406.     /* Set the DMA transfer complete callback for channel2 */
  407.     hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
  408.  
  409.     /* Set the DMA half transfer complete callback for channel2 */
  410.     hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
  411.    
  412.     /* Set the DMA error callback for channel2 */
  413.     hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
  414.  
  415.     /* Enable the selected DAC channel2 DMA request */
  416.     SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
  417.  
  418.     /* Case of use of channel 2 */
  419.     switch(Alignment)
  420.     {
  421.       case DAC_ALIGN_12B_R:
  422.         /* Get DHR12R2 address */
  423.         tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
  424.         break;
  425.       case DAC_ALIGN_12B_L:
  426.         /* Get DHR12L2 address */
  427.         tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
  428.         break;
  429.       case DAC_ALIGN_8B_R:
  430.         /* Get DHR8R2 address */
  431.         tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
  432.         break;
  433.       default:
  434.         break;
  435.     }
  436.   }
  437.  
  438.   /* Enable the DMA channel */
  439.   if(Channel == DAC_CHANNEL_1)
  440.   {
  441.     /* Enable the DAC DMA underrun interrupt */
  442.     __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
  443.    
  444.     /* Enable the DMA channel */
  445.     HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
  446.   }
  447.   else
  448.   {
  449.     /* Enable the DAC DMA underrun interrupt */
  450.     __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
  451.    
  452.     /* Enable the DMA channel */
  453.     HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
  454.   }
  455.  
  456.   /* Enable the Peripharal */
  457.   __HAL_DAC_ENABLE(hdac, Channel);
  458.  
  459.   /* Process Unlocked */
  460.   __HAL_UNLOCK(hdac);
  461.  
  462.   /* Return function status */
  463.   return HAL_OK;
  464. }
  465. #endif /* STM32F100xB) || defined (STM32F100xE) */
  466.  
  467. #if defined (STM32F100xB) || defined (STM32F100xE)
  468. /**
  469.   * @brief  Disables DAC and stop conversion of channel.
  470.   *         Note: For STM32F100x devices with specific feature: DMA underrun.
  471.   *         On these devices, this function disables the interruption of DMA
  472.   *         underrun.
  473.   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
  474.   *         the configuration information for the specified DAC.
  475.   * @param  Channel: The selected DAC channel.
  476.   *          This parameter can be one of the following values:
  477.   *            @arg DAC_CHANNEL_1: DAC Channel1 selected
  478.   *            @arg DAC_CHANNEL_2: DAC Channel2 selected  
  479.   * @retval HAL status
  480.   */
  481. HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
  482. {
  483.   HAL_StatusTypeDef status = HAL_OK;
  484.  
  485.   /* Check the parameters */
  486.   assert_param(IS_DAC_CHANNEL(Channel));
  487.  
  488.   /* Disable the selected DAC channel DMA request */
  489.   hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << Channel);
  490.    
  491.   /* Disable the Peripharal */
  492.   __HAL_DAC_DISABLE(hdac, Channel);
  493.  
  494.   /* Disable the DMA Channel */
  495.   /* Channel1 is used */
  496.   if(Channel == DAC_CHANNEL_1)
  497.   {
  498.     /* Disable the DMA channel */
  499.     status = HAL_DMA_Abort(hdac->DMA_Handle1);
  500.    
  501.     /* Disable the DAC DMA underrun interrupt */
  502.     __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
  503.   }
  504.   else /* Channel2 is used for */
  505.   {
  506.     /* Disable the DMA channel */
  507.     status = HAL_DMA_Abort(hdac->DMA_Handle2);
  508.    
  509.     /* Disable the DAC DMA underrun interrupt */
  510.     __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
  511.   }
  512.  
  513.   /* Check if DMA Channel effectively disabled */
  514.   if(status != HAL_OK)
  515.   {
  516.     /* Update ADC state machine to error */
  517.     hdac->State = HAL_DAC_STATE_ERROR;      
  518.   }
  519.   else
  520.   {
  521.     /* Change DAC state */
  522.     hdac->State = HAL_DAC_STATE_READY;
  523.   }
  524.  
  525.   /* Return function status */
  526.   return status;
  527. }
  528. #endif /* STM32F100xB) || defined (STM32F100xE) */
  529.  
  530. #if defined (STM32F100xB) || defined (STM32F100xE)
  531. /**
  532.   * @brief  Handles DAC interrupt request
  533.   *         Note: For STM32F100x devices with specific feature: DMA underrun.
  534.   *         On these devices, this function uses the interruption of DMA
  535.   *         underrun.
  536.   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
  537.   *         the configuration information for the specified DAC.
  538.   * @retval None
  539.   */
  540. void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
  541. {
  542.  
  543.   if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
  544.   {
  545.     /* Check underrun flag of DAC channel 1 */
  546.     if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
  547.     {
  548.       /* Change DAC state to error state */
  549.       hdac->State = HAL_DAC_STATE_ERROR;
  550.      
  551.       /* Set DAC error code to chanel1 DMA underrun error */
  552.       SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1);
  553.      
  554.       /* Clear the underrun flag */
  555.       __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
  556.      
  557.       /* Disable the selected DAC channel1 DMA request */
  558.       CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
  559.      
  560.       /* Error callback */
  561.       HAL_DAC_DMAUnderrunCallbackCh1(hdac);
  562.     }
  563.   }
  564.  
  565.   if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2))
  566.   {
  567.     /* Check underrun flag of DAC channel 2 */
  568.     if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
  569.     {
  570.       /* Change DAC state to error state */
  571.       hdac->State = HAL_DAC_STATE_ERROR;
  572.      
  573.       /* Set DAC error code to channel2 DMA underrun error */
  574.       SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2);
  575.      
  576.       /* Clear the underrun flag */
  577.       __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2);
  578.      
  579.       /* Disable the selected DAC channel1 DMA request */
  580.       CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
  581.      
  582.       /* Error callback */
  583.       HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
  584.     }
  585.   }
  586. }
  587. #endif /* STM32F100xB || STM32F100xE */
  588.  
  589.  
  590. /**
  591.   * @}
  592.   */
  593.  
  594. /** @defgroup DACEx_Private_Functions DACEx Private Functions
  595.   * @{
  596.   */
  597.  
  598. /**
  599.   * @brief  DMA conversion complete callback.
  600.   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  601.   *                the configuration information for the specified DMA module.
  602.   * @retval None
  603.   */
  604. void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)  
  605. {
  606.   DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  607.  
  608.   HAL_DACEx_ConvCpltCallbackCh2(hdac);
  609.  
  610.   hdac->State= HAL_DAC_STATE_READY;
  611. }
  612.  
  613. /**
  614.   * @brief  DMA half transfer complete callback.
  615.   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  616.   *                the configuration information for the specified DMA module.
  617.   * @retval None
  618.   */
  619. void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)  
  620. {
  621.     DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  622.     /* Conversion complete callback */
  623.     HAL_DACEx_ConvHalfCpltCallbackCh2(hdac);
  624. }
  625.  
  626. /**
  627.   * @brief  DMA error callback
  628.   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  629.   *                the configuration information for the specified DMA module.
  630.   * @retval None
  631.   */
  632. void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)  
  633. {
  634.   DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  635.    
  636.   /* Set DAC error code to DMA error */
  637.   hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
  638.    
  639.   HAL_DACEx_ErrorCallbackCh2(hdac);
  640.    
  641.   hdac->State= HAL_DAC_STATE_READY;
  642. }
  643.  
  644. /**
  645.   * @}
  646.   */
  647.  
  648. #endif /* STM32F100xB || STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
  649. #endif /* HAL_DAC_MODULE_ENABLED */
  650.  
  651. /**
  652.   * @}
  653.   */
  654.  
  655. /**
  656.   * @}
  657.   */
  658.  
  659. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  660.