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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32f1xx_ll_dac.h
  4.   * @author  MCD Application Team
  5.   * @brief   Header file of DAC LL module.
  6.   ******************************************************************************
  7.   * @attention
  8.   *
  9.   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  10.   * All rights reserved.</center></h2>
  11.   *
  12.   * This software component is licensed by ST under BSD 3-Clause license,
  13.   * the "License"; You may not use this file except in compliance with the
  14.   * License. You may obtain a copy of the License at:
  15.   *                        opensource.org/licenses/BSD-3-Clause
  16.   *
  17.   ******************************************************************************
  18.   */
  19.  
  20. /* Define to prevent recursive inclusion -------------------------------------*/
  21. #ifndef STM32F1xx_LL_DAC_H
  22. #define STM32F1xx_LL_DAC_H
  23.  
  24. #ifdef __cplusplus
  25. extern "C" {
  26. #endif
  27.  
  28. /* Includes ------------------------------------------------------------------*/
  29. #include "stm32f1xx.h"
  30.  
  31. /** @addtogroup STM32F1xx_LL_Driver
  32.   * @{
  33.   */
  34.  
  35. #if defined(DAC)
  36.  
  37. /** @defgroup DAC_LL DAC
  38.   * @{
  39.   */
  40.  
  41. /* Private types -------------------------------------------------------------*/
  42. /* Private variables ---------------------------------------------------------*/
  43.  
  44. /* Private constants ---------------------------------------------------------*/
  45. /** @defgroup DAC_LL_Private_Constants DAC Private Constants
  46.   * @{
  47.   */
  48.  
  49. /* Internal masks for DAC channels definition */
  50. /* To select into literal LL_DAC_CHANNEL_x the relevant bits for:             */
  51. /* - channel bits position into registers CR, MCR, CCR, SHHR, SHRR            */
  52. /* - channel bits position into register SWTRIG                               */
  53. /* - channel register offset of data holding register DHRx                    */
  54. /* - channel register offset of data output register DORx                     */
  55. #define DAC_CR_CH1_BITOFFSET           0UL   /* Position of channel bits into registers
  56.                                                 CR, MCR, CCR, SHHR, SHRR of channel 1 */
  57. #define DAC_CR_CH2_BITOFFSET           16UL  /* Position of channel bits into registers
  58.                                                 CR, MCR, CCR, SHHR, SHRR of channel 2 */
  59. #define DAC_CR_CHX_BITOFFSET_MASK      (DAC_CR_CH1_BITOFFSET | DAC_CR_CH2_BITOFFSET)
  60.  
  61. #define DAC_SWTR_CH1                   (DAC_SWTRIGR_SWTRIG1) /* Channel bit into register SWTRIGR of channel 1. */
  62. #define DAC_SWTR_CH2                   (DAC_SWTRIGR_SWTRIG2) /* Channel bit into register SWTRIGR of channel 2. */
  63. #define DAC_SWTR_CHX_MASK              (DAC_SWTR_CH1 | DAC_SWTR_CH2)
  64.  
  65. #define DAC_REG_DHR12R1_REGOFFSET      0x00000000UL            /* Register DHR12Rx channel 1 taken as reference */
  66. #define DAC_REG_DHR12L1_REGOFFSET      0x00100000UL            /* Register offset of DHR12Lx channel 1 versus
  67.                                                                   DHR12Rx channel 1 (shifted left of 20 bits)   */
  68. #define DAC_REG_DHR8R1_REGOFFSET       0x02000000UL            /* Register offset of DHR8Rx  channel 1 versus
  69.                                                                   DHR12Rx channel 1 (shifted left of 24 bits)   */
  70.  
  71. #define DAC_REG_DHR12R2_REGOFFSET      0x00030000UL            /* Register offset of DHR12Rx channel 2 versus
  72.                                                                   DHR12Rx channel 1 (shifted left of 16 bits)   */
  73. #define DAC_REG_DHR12L2_REGOFFSET      0x00400000UL            /* Register offset of DHR12Lx channel 2 versus
  74.                                                                   DHR12Rx channel 1 (shifted left of 20 bits)   */
  75. #define DAC_REG_DHR8R2_REGOFFSET       0x05000000UL            /* Register offset of DHR8Rx  channel 2 versus
  76.                                                                   DHR12Rx channel 1 (shifted left of 24 bits)   */
  77.  
  78. #define DAC_REG_DHR12RX_REGOFFSET_MASK 0x000F0000UL
  79. #define DAC_REG_DHR12LX_REGOFFSET_MASK 0x00F00000UL
  80. #define DAC_REG_DHR8RX_REGOFFSET_MASK  0x0F000000UL
  81. #define DAC_REG_DHRX_REGOFFSET_MASK    (DAC_REG_DHR12RX_REGOFFSET_MASK\
  82.                                         | DAC_REG_DHR12LX_REGOFFSET_MASK | DAC_REG_DHR8RX_REGOFFSET_MASK)
  83.  
  84. #define DAC_REG_DOR1_REGOFFSET         0x00000000UL            /* Register DORx channel 1 taken as reference */
  85.  
  86. #define DAC_REG_DOR2_REGOFFSET         0x10000000UL            /* Register offset of DORx channel 1 versus
  87.                                                                   DORx channel 2 (shifted left of 28 bits)   */
  88. #define DAC_REG_DORX_REGOFFSET_MASK    (DAC_REG_DOR1_REGOFFSET | DAC_REG_DOR2_REGOFFSET)
  89.  
  90.  
  91.  
  92. #define DAC_REG_DHR_REGOFFSET_MASK_POSBIT0         0x0000000FUL /* Mask of data hold registers offset (DHR12Rx,
  93.                                                                    DHR12Lx, DHR8Rx, ...) when shifted to position 0 */
  94. #define DAC_REG_DORX_REGOFFSET_MASK_POSBIT0        0x00000001UL /* Mask of DORx registers offset when shifted
  95.                                                                    to position 0                                    */
  96. #define DAC_REG_SHSRX_REGOFFSET_MASK_POSBIT0       0x00000001UL /* Mask of SHSRx registers offset when shifted
  97.                                                                    to position 0                                    */
  98.  
  99. #define DAC_REG_DHR12RX_REGOFFSET_BITOFFSET_POS           16UL  /* Position of bits register offset of DHR12Rx
  100.                                                                    channel 1 or 2 versus DHR12Rx channel 1
  101.                                                                    (shifted left of 16 bits)                   */
  102. #define DAC_REG_DHR12LX_REGOFFSET_BITOFFSET_POS           20UL  /* Position of bits register offset of DHR12Lx
  103.                                                                    channel 1 or 2 versus DHR12Rx channel 1
  104.                                                                    (shifted left of 20 bits)                   */
  105. #define DAC_REG_DHR8RX_REGOFFSET_BITOFFSET_POS            24UL  /* Position of bits register offset of DHR8Rx
  106.                                                                    channel 1 or 2 versus DHR12Rx channel 1
  107.                                                                    (shifted left of 24 bits)                   */
  108. #define DAC_REG_DORX_REGOFFSET_BITOFFSET_POS              28UL  /* Position of bits register offset of DORx
  109.                                                                    channel 1 or 2 versus DORx channel 1
  110.                                                                    (shifted left of 28 bits)                   */
  111.  
  112. /* DAC registers bits positions */
  113. #define DAC_DHR12RD_DACC2DHR_BITOFFSET_POS                DAC_DHR12RD_DACC2DHR_Pos
  114. #define DAC_DHR12LD_DACC2DHR_BITOFFSET_POS                DAC_DHR12LD_DACC2DHR_Pos
  115. #define DAC_DHR8RD_DACC2DHR_BITOFFSET_POS                 DAC_DHR8RD_DACC2DHR_Pos
  116.  
  117. /* Miscellaneous data */
  118. #define DAC_DIGITAL_SCALE_12BITS                  4095UL   /* Full-scale digital value with a resolution of 12
  119.                                                               bits (voltage range determined by analog voltage
  120.                                                               references Vref+ and Vref-, refer to reference manual) */
  121.  
  122. /**
  123.   * @}
  124.   */
  125.  
  126.  
  127. /* Private macros ------------------------------------------------------------*/
  128. /** @defgroup DAC_LL_Private_Macros DAC Private Macros
  129.   * @{
  130.   */
  131.  
  132. /**
  133.   * @brief  Driver macro reserved for internal use: set a pointer to
  134.   *         a register from a register basis from which an offset
  135.   *         is applied.
  136.   * @param  __REG__ Register basis from which the offset is applied.
  137.   * @param  __REG_OFFFSET__ Offset to be applied (unit: number of registers).
  138.   * @retval Pointer to register address
  139.   */
  140. #define __DAC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__)                         \
  141.   ((uint32_t *)((uint32_t) ((uint32_t)(&(__REG__)) + ((__REG_OFFFSET__) << 2UL))))
  142.  
  143. /**
  144.   * @}
  145.   */
  146.  
  147.  
  148. /* Exported types ------------------------------------------------------------*/
  149. #if defined(USE_FULL_LL_DRIVER)
  150. /** @defgroup DAC_LL_ES_INIT DAC Exported Init structure
  151.   * @{
  152.   */
  153.  
  154. /**
  155.   * @brief  Structure definition of some features of DAC instance.
  156.   */
  157. typedef struct
  158. {
  159.   uint32_t TriggerSource;               /*!< Set the conversion trigger source for the selected DAC channel:
  160.                                              internal (SW start) or from external peripheral
  161.                                              (timer event, external interrupt line).
  162.                                              This parameter can be a value of @ref DAC_LL_EC_TRIGGER_SOURCE
  163.  
  164.                                              This feature can be modified afterwards using unitary
  165.                                              function @ref LL_DAC_SetTriggerSource(). */
  166.  
  167.   uint32_t WaveAutoGeneration;          /*!< Set the waveform automatic generation mode for the selected DAC channel.
  168.                                              This parameter can be a value of @ref DAC_LL_EC_WAVE_AUTO_GENERATION_MODE
  169.  
  170.                                              This feature can be modified afterwards using unitary
  171.                                              function @ref LL_DAC_SetWaveAutoGeneration(). */
  172.  
  173.   uint32_t WaveAutoGenerationConfig;    /*!< Set the waveform automatic generation mode for the selected DAC channel.
  174.                                              If waveform automatic generation mode is set to noise, this parameter
  175.                                              can be a value of @ref DAC_LL_EC_WAVE_NOISE_LFSR_UNMASK_BITS
  176.                                              If waveform automatic generation mode is set to triangle,
  177.                                              this parameter can be a value of @ref DAC_LL_EC_WAVE_TRIANGLE_AMPLITUDE
  178.                                              @note If waveform automatic generation mode is disabled,
  179.                                               this parameter is discarded.
  180.  
  181.                                              This feature can be modified afterwards using unitary
  182.                                              function @ref LL_DAC_SetWaveNoiseLFSR(),
  183.                                              @ref LL_DAC_SetWaveTriangleAmplitude()
  184.                                              depending on the wave automatic generation selected. */
  185.  
  186.   uint32_t OutputBuffer;                /*!< Set the output buffer for the selected DAC channel.
  187.                                              This parameter can be a value of @ref DAC_LL_EC_OUTPUT_BUFFER
  188.  
  189.                                              This feature can be modified afterwards using unitary
  190.                                              function @ref LL_DAC_SetOutputBuffer(). */
  191. } LL_DAC_InitTypeDef;
  192.  
  193. /**
  194.   * @}
  195.   */
  196. #endif /* USE_FULL_LL_DRIVER */
  197.  
  198. /* Exported constants --------------------------------------------------------*/
  199. /** @defgroup DAC_LL_Exported_Constants DAC Exported Constants
  200.   * @{
  201.   */
  202.  
  203. /** @defgroup DAC_LL_EC_GET_FLAG DAC flags
  204.   * @brief    Flags defines which can be used with LL_DAC_ReadReg function
  205.   * @{
  206.   */
  207. /* DAC channel 1 flags */
  208. #define LL_DAC_FLAG_DMAUDR1                (DAC_SR_DMAUDR1)   /*!< DAC channel 1 flag DMA underrun */
  209.  
  210. /* DAC channel 2 flags */
  211. #define LL_DAC_FLAG_DMAUDR2                (DAC_SR_DMAUDR2)   /*!< DAC channel 2 flag DMA underrun */
  212.  
  213. /**
  214.   * @}
  215.   */
  216.  
  217. /** @defgroup DAC_LL_EC_IT DAC interruptions
  218.   * @brief    IT defines which can be used with LL_DAC_ReadReg and  LL_DAC_WriteReg functions
  219.   * @{
  220.   */
  221. #define LL_DAC_IT_DMAUDRIE1                (DAC_CR_DMAUDRIE1) /*!< DAC channel 1 interruption DMA underrun */
  222.  
  223. #define LL_DAC_IT_DMAUDRIE2                (DAC_CR_DMAUDRIE2) /*!< DAC channel 2 interruption DMA underrun */
  224.  
  225. /**
  226.   * @}
  227.   */
  228.  
  229. /** @defgroup DAC_LL_EC_CHANNEL DAC channels
  230.   * @{
  231.   */
  232. #define LL_DAC_CHANNEL_1                   (DAC_REG_DOR1_REGOFFSET | DAC_REG_DHR12R1_REGOFFSET | DAC_REG_DHR12L1_REGOFFSET | DAC_REG_DHR8R1_REGOFFSET | DAC_CR_CH1_BITOFFSET | DAC_SWTR_CH1) /*!< DAC channel 1 */
  233.  
  234. #define LL_DAC_CHANNEL_2                   (DAC_REG_DOR2_REGOFFSET | DAC_REG_DHR12R2_REGOFFSET | DAC_REG_DHR12L2_REGOFFSET | DAC_REG_DHR8R2_REGOFFSET | DAC_CR_CH2_BITOFFSET | DAC_SWTR_CH2) /*!< DAC channel 2 */
  235.  
  236. /**
  237.   * @}
  238.   */
  239.  
  240. /** @defgroup DAC_LL_EC_TRIGGER_SOURCE DAC trigger source
  241.   * @{
  242.   */
  243. #define LL_DAC_TRIG_SOFTWARE               (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger internal (SW start) */
  244. #define LL_DAC_TRIG_EXT_TIM3_TRGO          (                                  DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external peripheral: TIM3 TRGO. */
  245. #define LL_DAC_TRIG_EXT_TIM15_TRGO         (                 DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external peripheral: TIM15 TRGO. */
  246. #define LL_DAC_TRIG_EXT_TIM2_TRGO          (DAC_CR_TSEL1_2                                  ) /*!< DAC channel conversion trigger from external peripheral: TIM2 TRGO. */
  247. #define LL_DAC_TRIG_EXT_TIM8_TRGO          (                                  DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external peripheral: TIM8 TRGO. */
  248. #define LL_DAC_TRIG_EXT_TIM4_TRGO          (DAC_CR_TSEL1_2                  | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external peripheral: TIM4 TRGO. */
  249. #define LL_DAC_TRIG_EXT_TIM6_TRGO          0x00000000UL                                       /*!< DAC channel conversion trigger from external peripheral: TIM6 TRGO. */
  250. #define LL_DAC_TRIG_EXT_TIM7_TRGO          (                 DAC_CR_TSEL1_1                 ) /*!< DAC channel conversion trigger from external peripheral: TIM7 TRGO. */
  251. #define LL_DAC_TRIG_EXT_TIM5_TRGO          (                 DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external peripheral: TIM5 TRGO. */
  252. #define LL_DAC_TRIG_EXT_EXTI_LINE9         (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1                 ) /*!< DAC channel conversion trigger from external peripheral: external interrupt line 9. */
  253. /**
  254.   * @}
  255.   */
  256.  
  257. /** @defgroup DAC_LL_EC_WAVE_AUTO_GENERATION_MODE DAC waveform automatic generation mode
  258.   * @{
  259.   */
  260. #define LL_DAC_WAVE_AUTO_GENERATION_NONE     0x00000000UL                    /*!< DAC channel wave auto generation mode disabled. */
  261. #define LL_DAC_WAVE_AUTO_GENERATION_NOISE    (               DAC_CR_WAVE1_0) /*!< DAC channel wave auto generation mode enabled, set generated noise waveform. */
  262. #define LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE (DAC_CR_WAVE1_1               ) /*!< DAC channel wave auto generation mode enabled, set generated triangle waveform. */
  263. /**
  264.   * @}
  265.   */
  266.  
  267. /** @defgroup DAC_LL_EC_WAVE_NOISE_LFSR_UNMASK_BITS DAC wave generation - Noise LFSR unmask bits
  268.   * @{
  269.   */
  270. #define LL_DAC_NOISE_LFSR_UNMASK_BIT0      0x00000000UL                                                        /*!< Noise wave generation, unmask LFSR bit0, for the selected DAC channel */
  271. #define LL_DAC_NOISE_LFSR_UNMASK_BITS1_0   (                                                   DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[1:0], for the selected DAC channel */
  272. #define LL_DAC_NOISE_LFSR_UNMASK_BITS2_0   (                                  DAC_CR_MAMP1_1                 ) /*!< Noise wave generation, unmask LFSR bits[2:0], for the selected DAC channel */
  273. #define LL_DAC_NOISE_LFSR_UNMASK_BITS3_0   (                                  DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[3:0], for the selected DAC channel */
  274. #define LL_DAC_NOISE_LFSR_UNMASK_BITS4_0   (                 DAC_CR_MAMP1_2                                  ) /*!< Noise wave generation, unmask LFSR bits[4:0], for the selected DAC channel */
  275. #define LL_DAC_NOISE_LFSR_UNMASK_BITS5_0   (                 DAC_CR_MAMP1_2                  | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[5:0], for the selected DAC channel */
  276. #define LL_DAC_NOISE_LFSR_UNMASK_BITS6_0   (                 DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1                 ) /*!< Noise wave generation, unmask LFSR bits[6:0], for the selected DAC channel */
  277. #define LL_DAC_NOISE_LFSR_UNMASK_BITS7_0   (                 DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[7:0], for the selected DAC channel */
  278. #define LL_DAC_NOISE_LFSR_UNMASK_BITS8_0   (DAC_CR_MAMP1_3                                                   ) /*!< Noise wave generation, unmask LFSR bits[8:0], for the selected DAC channel */
  279. #define LL_DAC_NOISE_LFSR_UNMASK_BITS9_0   (DAC_CR_MAMP1_3                                   | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[9:0], for the selected DAC channel */
  280. #define LL_DAC_NOISE_LFSR_UNMASK_BITS10_0  (DAC_CR_MAMP1_3                  | DAC_CR_MAMP1_1                 ) /*!< Noise wave generation, unmask LFSR bits[10:0], for the selected DAC channel */
  281. #define LL_DAC_NOISE_LFSR_UNMASK_BITS11_0  (DAC_CR_MAMP1_3                  | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[11:0], for the selected DAC channel */
  282. /**
  283.   * @}
  284.   */
  285.  
  286. /** @defgroup DAC_LL_EC_WAVE_TRIANGLE_AMPLITUDE DAC wave generation - Triangle amplitude
  287.   * @{
  288.   */
  289. #define LL_DAC_TRIANGLE_AMPLITUDE_1        0x00000000UL                                                        /*!< Triangle wave generation, amplitude of 1 LSB of DAC output range, for the selected DAC channel */
  290. #define LL_DAC_TRIANGLE_AMPLITUDE_3        (                                                   DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 3 LSB of DAC output range, for the selected DAC channel */
  291. #define LL_DAC_TRIANGLE_AMPLITUDE_7        (                                  DAC_CR_MAMP1_1                 ) /*!< Triangle wave generation, amplitude of 7 LSB of DAC output range, for the selected DAC channel */
  292. #define LL_DAC_TRIANGLE_AMPLITUDE_15       (                                  DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 15 LSB of DAC output range, for the selected DAC channel */
  293. #define LL_DAC_TRIANGLE_AMPLITUDE_31       (                 DAC_CR_MAMP1_2                                  ) /*!< Triangle wave generation, amplitude of 31 LSB of DAC output range, for the selected DAC channel */
  294. #define LL_DAC_TRIANGLE_AMPLITUDE_63       (                 DAC_CR_MAMP1_2                  | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 63 LSB of DAC output range, for the selected DAC channel */
  295. #define LL_DAC_TRIANGLE_AMPLITUDE_127      (                 DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1                 ) /*!< Triangle wave generation, amplitude of 127 LSB of DAC output range, for the selected DAC channel */
  296. #define LL_DAC_TRIANGLE_AMPLITUDE_255      (                 DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 255 LSB of DAC output range, for the selected DAC channel */
  297. #define LL_DAC_TRIANGLE_AMPLITUDE_511      (DAC_CR_MAMP1_3                                                   ) /*!< Triangle wave generation, amplitude of 512 LSB of DAC output range, for the selected DAC channel */
  298. #define LL_DAC_TRIANGLE_AMPLITUDE_1023     (DAC_CR_MAMP1_3                                   | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 1023 LSB of DAC output range, for the selected DAC channel */
  299. #define LL_DAC_TRIANGLE_AMPLITUDE_2047     (DAC_CR_MAMP1_3                  | DAC_CR_MAMP1_1                 ) /*!< Triangle wave generation, amplitude of 2047 LSB of DAC output range, for the selected DAC channel */
  300. #define LL_DAC_TRIANGLE_AMPLITUDE_4095     (DAC_CR_MAMP1_3                  | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 4095 LSB of DAC output range, for the selected DAC channel */
  301. /**
  302.   * @}
  303.   */
  304.  
  305. /** @defgroup DAC_LL_EC_OUTPUT_BUFFER DAC channel output buffer
  306.   * @{
  307.   */
  308. #define LL_DAC_OUTPUT_BUFFER_ENABLE        0x00000000UL            /*!< The selected DAC channel output is buffered: higher drive current capability, but also higher current consumption */
  309. #define LL_DAC_OUTPUT_BUFFER_DISABLE       (DAC_CR_BOFF1)          /*!< The selected DAC channel output is not buffered: lower drive current capability, but also lower current consumption */
  310. /**
  311.   * @}
  312.   */
  313.  
  314. /** @defgroup DAC_LL_EC_RESOLUTION  DAC channel output resolution
  315.   * @{
  316.   */
  317. #define LL_DAC_RESOLUTION_12B              0x00000000UL            /*!< DAC channel resolution 12 bits */
  318. #define LL_DAC_RESOLUTION_8B               0x00000002UL            /*!< DAC channel resolution 8 bits */
  319. /**
  320.   * @}
  321.   */
  322.  
  323. /** @defgroup DAC_LL_EC_REGISTERS  DAC registers compliant with specific purpose
  324.   * @{
  325.   */
  326. /* List of DAC registers intended to be used (most commonly) with             */
  327. /* DMA transfer.                                                              */
  328. /* Refer to function @ref LL_DAC_DMA_GetRegAddr().                            */
  329. #define LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED  DAC_REG_DHR12RX_REGOFFSET_BITOFFSET_POS /*!< DAC channel data holding register 12 bits right aligned */
  330. #define LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED   DAC_REG_DHR12LX_REGOFFSET_BITOFFSET_POS /*!< DAC channel data holding register 12 bits left aligned */
  331. #define LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED   DAC_REG_DHR8RX_REGOFFSET_BITOFFSET_POS  /*!< DAC channel data holding register 8 bits right aligned */
  332. /**
  333.   * @}
  334.   */
  335.  
  336. /** @defgroup DAC_LL_EC_HW_DELAYS  Definitions of DAC hardware constraints delays
  337.   * @note   Only DAC peripheral HW delays are defined in DAC LL driver driver,
  338.   *         not timeout values.
  339.   *         For details on delays values, refer to descriptions in source code
  340.   *         above each literal definition.
  341.   * @{
  342.   */
  343.  
  344. /* Delay for DAC channel voltage settling time from DAC channel startup       */
  345. /* (transition from disable to enable).                                       */
  346. /* Note: DAC channel startup time depends on board application environment:   */
  347. /*       impedance connected to DAC channel output.                           */
  348. /*       The delay below is specified under conditions:                       */
  349. /*        - voltage maximum transition (lowest to highest value)              */
  350. /*        - until voltage reaches final value +-1LSB                          */
  351. /*        - DAC channel output buffer enabled                                 */
  352. /*        - load impedance of 5kOhm (min), 50pF (max)                         */
  353. /* Literal set to maximum value (refer to device datasheet,                   */
  354. /* parameter "tWAKEUP").                                                      */
  355. /* Unit: us                                                                   */
  356. #define LL_DAC_DELAY_STARTUP_VOLTAGE_SETTLING_US             15UL /*!< Delay for DAC channel voltage settling time from DAC channel startup (transition from disable to enable) */
  357.  
  358. /* Delay for DAC channel voltage settling time.                               */
  359. /* Note: DAC channel startup time depends on board application environment:   */
  360. /*       impedance connected to DAC channel output.                           */
  361. /*       The delay below is specified under conditions:                       */
  362. /*        - voltage maximum transition (lowest to highest value)              */
  363. /*        - until voltage reaches final value +-1LSB                          */
  364. /*        - DAC channel output buffer enabled                                 */
  365. /*        - load impedance of 5kOhm min, 50pF max                             */
  366. /* Literal set to maximum value (refer to device datasheet,                   */
  367. /* parameter "tSETTLING").                                                    */
  368. /* Unit: us                                                                   */
  369. #define LL_DAC_DELAY_VOLTAGE_SETTLING_US                    12UL /*!< Delay for DAC channel voltage settling time */
  370.  
  371. /**
  372.   * @}
  373.   */
  374.  
  375. /**
  376.   * @}
  377.   */
  378.  
  379. /* Exported macro ------------------------------------------------------------*/
  380. /** @defgroup DAC_LL_Exported_Macros DAC Exported Macros
  381.   * @{
  382.   */
  383.  
  384. /** @defgroup DAC_LL_EM_WRITE_READ Common write and read registers macros
  385.   * @{
  386.   */
  387.  
  388. /**
  389.   * @brief  Write a value in DAC register
  390.   * @param  __INSTANCE__ DAC Instance
  391.   * @param  __REG__ Register to be written
  392.   * @param  __VALUE__ Value to be written in the register
  393.   * @retval None
  394.   */
  395. #define LL_DAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
  396.  
  397. /**
  398.   * @brief  Read a value in DAC register
  399.   * @param  __INSTANCE__ DAC Instance
  400.   * @param  __REG__ Register to be read
  401.   * @retval Register value
  402.   */
  403. #define LL_DAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
  404.  
  405. /**
  406.   * @}
  407.   */
  408.  
  409. /** @defgroup DAC_LL_EM_HELPER_MACRO DAC helper macro
  410.   * @{
  411.   */
  412.  
  413. /**
  414.   * @brief  Helper macro to get DAC channel number in decimal format
  415.   *         from literals LL_DAC_CHANNEL_x.
  416.   *         Example:
  417.   *            __LL_DAC_CHANNEL_TO_DECIMAL_NB(LL_DAC_CHANNEL_1)
  418.   *            will return decimal number "1".
  419.   * @note   The input can be a value from functions where a channel
  420.   *         number is returned.
  421.   * @param  __CHANNEL__ This parameter can be one of the following values:
  422.   *         @arg @ref LL_DAC_CHANNEL_1
  423.   *         @arg @ref LL_DAC_CHANNEL_2
  424.   * @retval 1...2
  425.   */
  426. #define __LL_DAC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__)                            \
  427.   ((__CHANNEL__) & DAC_SWTR_CHX_MASK)
  428.  
  429. /**
  430.   * @brief  Helper macro to get DAC channel in literal format LL_DAC_CHANNEL_x
  431.   *         from number in decimal format.
  432.   *         Example:
  433.   *           __LL_DAC_DECIMAL_NB_TO_CHANNEL(1)
  434.   *           will return a data equivalent to "LL_DAC_CHANNEL_1".
  435.   * @note  If the input parameter does not correspond to a DAC channel,
  436.   *        this macro returns value '0'.
  437.   * @param  __DECIMAL_NB__ 1...2
  438.   * @retval Returned value can be one of the following values:
  439.   *         @arg @ref LL_DAC_CHANNEL_1
  440.   *         @arg @ref LL_DAC_CHANNEL_2
  441.   */
  442. #define __LL_DAC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__)\
  443.   (((__DECIMAL_NB__) == 1UL)? (LL_DAC_CHANNEL_1  ):(((__DECIMAL_NB__) == 2UL) ? ( LL_DAC_CHANNEL_2):(0UL)))
  444.  
  445. /**
  446.   * @brief  Helper macro to define the DAC conversion data full-scale digital
  447.   *         value corresponding to the selected DAC resolution.
  448.   * @note   DAC conversion data full-scale corresponds to voltage range
  449.   *         determined by analog voltage references Vref+ and Vref-
  450.   *         (refer to reference manual).
  451.   * @param  __DAC_RESOLUTION__ This parameter can be one of the following values:
  452.   *         @arg @ref LL_DAC_RESOLUTION_12B
  453.   *         @arg @ref LL_DAC_RESOLUTION_8B
  454.   * @retval ADC conversion data equivalent voltage value (unit: mVolt)
  455.   */
  456. #define __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__)                             \
  457.   ((0x00000FFFUL) >> ((__DAC_RESOLUTION__) << 1UL))
  458.  
  459. /**
  460.   * @brief  Helper macro to calculate the DAC conversion data (unit: digital
  461.   *         value) corresponding to a voltage (unit: mVolt).
  462.   * @note   This helper macro is intended to provide input data in voltage
  463.   *         rather than digital value,
  464.   *         to be used with LL DAC functions such as
  465.   *         @ref LL_DAC_ConvertData12RightAligned().
  466.   * @note   Analog reference voltage (Vref+) must be either known from
  467.   *         user board environment or can be calculated using ADC measurement
  468.   *         and ADC helper macro __LL_ADC_CALC_VREFANALOG_VOLTAGE().
  469.   * @param  __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
  470.   * @param  __DAC_VOLTAGE__ Voltage to be generated by DAC channel
  471.   *                         (unit: mVolt).
  472.   * @param  __DAC_RESOLUTION__ This parameter can be one of the following values:
  473.   *         @arg @ref LL_DAC_RESOLUTION_12B
  474.   *         @arg @ref LL_DAC_RESOLUTION_8B
  475.   * @retval DAC conversion data (unit: digital value)
  476.   */
  477. #define __LL_DAC_CALC_VOLTAGE_TO_DATA(__VREFANALOG_VOLTAGE__,\
  478.                                       __DAC_VOLTAGE__,\
  479.                                       __DAC_RESOLUTION__)                      \
  480. ((__DAC_VOLTAGE__) * __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__)              \
  481.  / (__VREFANALOG_VOLTAGE__)                                                  \
  482. )
  483.  
  484. /**
  485.   * @}
  486.   */
  487.  
  488. /**
  489.   * @}
  490.   */
  491.  
  492.  
  493. /* Exported functions --------------------------------------------------------*/
  494. /** @defgroup DAC_LL_Exported_Functions DAC Exported Functions
  495.   * @{
  496.   */
  497. /**
  498.   * @brief  Set the conversion trigger source for the selected DAC channel.
  499.   * @note   For conversion trigger source to be effective, DAC trigger
  500.   *         must be enabled using function @ref LL_DAC_EnableTrigger().
  501.   * @note   To set conversion trigger source, DAC channel must be disabled.
  502.   *         Otherwise, the setting is discarded.
  503.   * @note   Availability of parameters of trigger sources from timer
  504.   *         depends on timers availability on the selected device.
  505.   * @rmtoll CR       TSEL1          LL_DAC_SetTriggerSource\n
  506.   *         CR       TSEL2          LL_DAC_SetTriggerSource
  507.   * @param  DACx DAC instance
  508.   * @param  DAC_Channel This parameter can be one of the following values:
  509.   *         @arg @ref LL_DAC_CHANNEL_1
  510.   *         @arg @ref LL_DAC_CHANNEL_2
  511.   * @param  TriggerSource This parameter can be one of the following values:
  512.   *         @arg @ref LL_DAC_TRIG_SOFTWARE
  513.   *         @arg @ref LL_DAC_TRIG_EXT_TIM2_TRGO
  514.   *         @arg @ref LL_DAC_TRIG_EXT_TIM3_TRGO
  515.   *         @arg @ref LL_DAC_TRIG_EXT_TIM4_TRGO
  516.   *         @arg @ref LL_DAC_TRIG_EXT_TIM5_TRGO  
  517.   *         @arg @ref LL_DAC_TRIG_EXT_TIM6_TRGO
  518.   *         @arg @ref LL_DAC_TRIG_EXT_TIM7_TRGO
  519.   *         @arg @ref LL_DAC_TRIG_EXT_TIM15_TRGO
  520.   *         @arg @ref LL_DAC_TRIG_EXT_EXTI_LINE9
  521.   * @retval None
  522.   */
  523. __STATIC_INLINE void LL_DAC_SetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t TriggerSource)
  524. {
  525.   MODIFY_REG(DACx->CR,
  526.              DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
  527.              TriggerSource << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  528. }
  529.  
  530. /**
  531.   * @brief  Get the conversion trigger source for the selected DAC channel.
  532.   * @note   For conversion trigger source to be effective, DAC trigger
  533.   *         must be enabled using function @ref LL_DAC_EnableTrigger().
  534.   * @note   Availability of parameters of trigger sources from timer
  535.   *         depends on timers availability on the selected device.
  536.   * @rmtoll CR       TSEL1          LL_DAC_GetTriggerSource\n
  537.   *         CR       TSEL2          LL_DAC_GetTriggerSource
  538.   * @param  DACx DAC instance
  539.   * @param  DAC_Channel This parameter can be one of the following values:
  540.   *         @arg @ref LL_DAC_CHANNEL_1
  541.   *         @arg @ref LL_DAC_CHANNEL_2
  542.   * @retval Returned value can be one of the following values:
  543.   *         @arg @ref LL_DAC_TRIG_SOFTWARE
  544.   *         @arg @ref LL_DAC_TRIG_EXT_TIM2_TRGO
  545.   *         @arg @ref LL_DAC_TRIG_EXT_TIM3_TRGO
  546.   *         @arg @ref LL_DAC_TRIG_EXT_TIM4_TRGO
  547.   *         @arg @ref LL_DAC_TRIG_EXT_TIM5_TRGO  
  548.   *         @arg @ref LL_DAC_TRIG_EXT_TIM6_TRGO
  549.   *         @arg @ref LL_DAC_TRIG_EXT_TIM7_TRGO
  550.   *         @arg @ref LL_DAC_TRIG_EXT_TIM15_TRGO
  551.   *         @arg @ref LL_DAC_TRIG_EXT_EXTI_LINE9
  552.   */
  553. __STATIC_INLINE uint32_t LL_DAC_GetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  554. {
  555.   return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
  556.                     >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
  557.                    );
  558. }
  559.  
  560. /**
  561.   * @brief  Set the waveform automatic generation mode
  562.   *         for the selected DAC channel.
  563.   * @rmtoll CR       WAVE1          LL_DAC_SetWaveAutoGeneration\n
  564.   *         CR       WAVE2          LL_DAC_SetWaveAutoGeneration
  565.   * @param  DACx DAC instance
  566.   * @param  DAC_Channel This parameter can be one of the following values:
  567.   *         @arg @ref LL_DAC_CHANNEL_1
  568.   *         @arg @ref LL_DAC_CHANNEL_2
  569.   * @param  WaveAutoGeneration This parameter can be one of the following values:
  570.   *         @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NONE
  571.   *         @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE
  572.   *         @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE
  573.   * @retval None
  574.   */
  575. __STATIC_INLINE void LL_DAC_SetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t WaveAutoGeneration)
  576. {
  577.   MODIFY_REG(DACx->CR,
  578.              DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
  579.              WaveAutoGeneration << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  580. }
  581.  
  582. /**
  583.   * @brief  Get the waveform automatic generation mode
  584.   *         for the selected DAC channel.
  585.   * @rmtoll CR       WAVE1          LL_DAC_GetWaveAutoGeneration\n
  586.   *         CR       WAVE2          LL_DAC_GetWaveAutoGeneration
  587.   * @param  DACx DAC instance
  588.   * @param  DAC_Channel This parameter can be one of the following values:
  589.   *         @arg @ref LL_DAC_CHANNEL_1
  590.   *         @arg @ref LL_DAC_CHANNEL_2
  591.   * @retval Returned value can be one of the following values:
  592.   *         @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NONE
  593.   *         @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE
  594.   *         @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE
  595.   */
  596. __STATIC_INLINE uint32_t LL_DAC_GetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  597. {
  598.   return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
  599.                     >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
  600.                    );
  601. }
  602.  
  603. /**
  604.   * @brief  Set the noise waveform generation for the selected DAC channel:
  605.   *         Noise mode and parameters LFSR (linear feedback shift register).
  606.   * @note   For wave generation to be effective, DAC channel
  607.   *         wave generation mode must be enabled using
  608.   *         function @ref LL_DAC_SetWaveAutoGeneration().
  609.   * @note   This setting can be set when the selected DAC channel is disabled
  610.   *         (otherwise, the setting operation is ignored).
  611.   * @rmtoll CR       MAMP1          LL_DAC_SetWaveNoiseLFSR\n
  612.   *         CR       MAMP2          LL_DAC_SetWaveNoiseLFSR
  613.   * @param  DACx DAC instance
  614.   * @param  DAC_Channel This parameter can be one of the following values:
  615.   *         @arg @ref LL_DAC_CHANNEL_1
  616.   *         @arg @ref LL_DAC_CHANNEL_2
  617.   * @param  NoiseLFSRMask This parameter can be one of the following values:
  618.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0
  619.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0
  620.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0
  621.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0
  622.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0
  623.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0
  624.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0
  625.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0
  626.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0
  627.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0
  628.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0
  629.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0
  630.   * @retval None
  631.   */
  632. __STATIC_INLINE void LL_DAC_SetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t NoiseLFSRMask)
  633. {
  634.   MODIFY_REG(DACx->CR,
  635.              DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
  636.              NoiseLFSRMask << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  637. }
  638.  
  639. /**
  640.   * @brief  Get the noise waveform generation for the selected DAC channel:
  641.   *         Noise mode and parameters LFSR (linear feedback shift register).
  642.   * @rmtoll CR       MAMP1          LL_DAC_GetWaveNoiseLFSR\n
  643.   *         CR       MAMP2          LL_DAC_GetWaveNoiseLFSR
  644.   * @param  DACx DAC instance
  645.   * @param  DAC_Channel This parameter can be one of the following values:
  646.   *         @arg @ref LL_DAC_CHANNEL_1
  647.   *         @arg @ref LL_DAC_CHANNEL_2
  648.   * @retval Returned value can be one of the following values:
  649.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0
  650.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0
  651.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0
  652.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0
  653.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0
  654.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0
  655.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0
  656.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0
  657.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0
  658.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0
  659.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0
  660.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0
  661.   */
  662. __STATIC_INLINE uint32_t LL_DAC_GetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  663. {
  664.   return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
  665.                     >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
  666.                    );
  667. }
  668.  
  669. /**
  670.   * @brief  Set the triangle waveform generation for the selected DAC channel:
  671.   *         triangle mode and amplitude.
  672.   * @note   For wave generation to be effective, DAC channel
  673.   *         wave generation mode must be enabled using
  674.   *         function @ref LL_DAC_SetWaveAutoGeneration().
  675.   * @note   This setting can be set when the selected DAC channel is disabled
  676.   *         (otherwise, the setting operation is ignored).
  677.   * @rmtoll CR       MAMP1          LL_DAC_SetWaveTriangleAmplitude\n
  678.   *         CR       MAMP2          LL_DAC_SetWaveTriangleAmplitude
  679.   * @param  DACx DAC instance
  680.   * @param  DAC_Channel This parameter can be one of the following values:
  681.   *         @arg @ref LL_DAC_CHANNEL_1
  682.   *         @arg @ref LL_DAC_CHANNEL_2
  683.   * @param  TriangleAmplitude This parameter can be one of the following values:
  684.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1
  685.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3
  686.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7
  687.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15
  688.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31
  689.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63
  690.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127
  691.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255
  692.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511
  693.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023
  694.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047
  695.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095
  696.   * @retval None
  697.   */
  698. __STATIC_INLINE void LL_DAC_SetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel,
  699.                                                      uint32_t TriangleAmplitude)
  700. {
  701.   MODIFY_REG(DACx->CR,
  702.              DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
  703.              TriangleAmplitude << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  704. }
  705.  
  706. /**
  707.   * @brief  Get the triangle waveform generation for the selected DAC channel:
  708.   *         triangle mode and amplitude.
  709.   * @rmtoll CR       MAMP1          LL_DAC_GetWaveTriangleAmplitude\n
  710.   *         CR       MAMP2          LL_DAC_GetWaveTriangleAmplitude
  711.   * @param  DACx DAC instance
  712.   * @param  DAC_Channel This parameter can be one of the following values:
  713.   *         @arg @ref LL_DAC_CHANNEL_1
  714.   *         @arg @ref LL_DAC_CHANNEL_2
  715.   * @retval Returned value can be one of the following values:
  716.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1
  717.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3
  718.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7
  719.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15
  720.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31
  721.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63
  722.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127
  723.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255
  724.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511
  725.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023
  726.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047
  727.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095
  728.   */
  729. __STATIC_INLINE uint32_t LL_DAC_GetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  730. {
  731.   return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
  732.                     >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
  733.                    );
  734. }
  735.  
  736. /**
  737.   * @brief  Set the output buffer for the selected DAC channel.
  738.   * @rmtoll CR       BOFF1          LL_DAC_SetOutputBuffer\n
  739.   *         CR       BOFF2          LL_DAC_SetOutputBuffer
  740.   * @param  DACx DAC instance
  741.   * @param  DAC_Channel This parameter can be one of the following values:
  742.   *         @arg @ref LL_DAC_CHANNEL_1
  743.   *         @arg @ref LL_DAC_CHANNEL_2
  744.   * @param  OutputBuffer This parameter can be one of the following values:
  745.   *         @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
  746.   *         @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
  747.   * @retval None
  748.   */
  749. __STATIC_INLINE void LL_DAC_SetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t OutputBuffer)
  750. {
  751.   MODIFY_REG(DACx->CR,
  752.              DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
  753.              OutputBuffer << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  754. }
  755.  
  756. /**
  757.   * @brief  Get the output buffer state for the selected DAC channel.
  758.   * @rmtoll CR       BOFF1          LL_DAC_GetOutputBuffer\n
  759.   *         CR       BOFF2          LL_DAC_GetOutputBuffer
  760.   * @param  DACx DAC instance
  761.   * @param  DAC_Channel This parameter can be one of the following values:
  762.   *         @arg @ref LL_DAC_CHANNEL_1
  763.   *         @arg @ref LL_DAC_CHANNEL_2
  764.   * @retval Returned value can be one of the following values:
  765.   *         @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
  766.   *         @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
  767.   */
  768. __STATIC_INLINE uint32_t LL_DAC_GetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  769. {
  770.   return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
  771.                     >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
  772.                    );
  773. }
  774.  
  775. /**
  776.   * @}
  777.   */
  778.  
  779. /** @defgroup DAC_LL_EF_DMA_Management DMA Management
  780.   * @{
  781.   */
  782.  
  783. /**
  784.   * @brief  Enable DAC DMA transfer request of the selected channel.
  785.   * @note   To configure DMA source address (peripheral address),
  786.   *         use function @ref LL_DAC_DMA_GetRegAddr().
  787.   * @rmtoll CR       DMAEN1         LL_DAC_EnableDMAReq\n
  788.   *         CR       DMAEN2         LL_DAC_EnableDMAReq
  789.   * @param  DACx DAC instance
  790.   * @param  DAC_Channel This parameter can be one of the following values:
  791.   *         @arg @ref LL_DAC_CHANNEL_1
  792.   *         @arg @ref LL_DAC_CHANNEL_2
  793.   * @retval None
  794.   */
  795. __STATIC_INLINE void LL_DAC_EnableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  796. {
  797.   SET_BIT(DACx->CR,
  798.           DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  799. }
  800.  
  801. /**
  802.   * @brief  Disable DAC DMA transfer request of the selected channel.
  803.   * @note   To configure DMA source address (peripheral address),
  804.   *         use function @ref LL_DAC_DMA_GetRegAddr().
  805.   * @rmtoll CR       DMAEN1         LL_DAC_DisableDMAReq\n
  806.   *         CR       DMAEN2         LL_DAC_DisableDMAReq
  807.   * @param  DACx DAC instance
  808.   * @param  DAC_Channel This parameter can be one of the following values:
  809.   *         @arg @ref LL_DAC_CHANNEL_1
  810.   *         @arg @ref LL_DAC_CHANNEL_2
  811.   * @retval None
  812.   */
  813. __STATIC_INLINE void LL_DAC_DisableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  814. {
  815.   CLEAR_BIT(DACx->CR,
  816.             DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  817. }
  818.  
  819. /**
  820.   * @brief  Get DAC DMA transfer request state of the selected channel.
  821.   *         (0: DAC DMA transfer request is disabled, 1: DAC DMA transfer request is enabled)
  822.   * @rmtoll CR       DMAEN1         LL_DAC_IsDMAReqEnabled\n
  823.   *         CR       DMAEN2         LL_DAC_IsDMAReqEnabled
  824.   * @param  DACx DAC instance
  825.   * @param  DAC_Channel This parameter can be one of the following values:
  826.   *         @arg @ref LL_DAC_CHANNEL_1
  827.   *         @arg @ref LL_DAC_CHANNEL_2
  828.   * @retval State of bit (1 or 0).
  829.   */
  830. __STATIC_INLINE uint32_t LL_DAC_IsDMAReqEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  831. {
  832.   return ((READ_BIT(DACx->CR,
  833.                     DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
  834.            == (DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))) ? 1UL : 0UL);
  835. }
  836.  
  837. /**
  838.   * @brief  Function to help to configure DMA transfer to DAC: retrieve the
  839.   *         DAC register address from DAC instance and a list of DAC registers
  840.   *         intended to be used (most commonly) with DMA transfer.
  841.   * @note   These DAC registers are data holding registers:
  842.   *         when DAC conversion is requested, DAC generates a DMA transfer
  843.   *         request to have data available in DAC data holding registers.
  844.   * @note   This macro is intended to be used with LL DMA driver, refer to
  845.   *         function "LL_DMA_ConfigAddresses()".
  846.   *         Example:
  847.   *           LL_DMA_ConfigAddresses(DMA1,
  848.   *                                  LL_DMA_CHANNEL_1,
  849.   *                                  (uint32_t)&< array or variable >,
  850.   *                                  LL_DAC_DMA_GetRegAddr(DAC1, LL_DAC_CHANNEL_1,
  851.   *                                  LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED),
  852.   *                                  LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
  853.   * @rmtoll DHR12R1  DACC1DHR       LL_DAC_DMA_GetRegAddr\n
  854.   *         DHR12L1  DACC1DHR       LL_DAC_DMA_GetRegAddr\n
  855.   *         DHR8R1   DACC1DHR       LL_DAC_DMA_GetRegAddr\n
  856.   *         DHR12R2  DACC2DHR       LL_DAC_DMA_GetRegAddr\n
  857.   *         DHR12L2  DACC2DHR       LL_DAC_DMA_GetRegAddr\n
  858.   *         DHR8R2   DACC2DHR       LL_DAC_DMA_GetRegAddr
  859.   * @param  DACx DAC instance
  860.   * @param  DAC_Channel This parameter can be one of the following values:
  861.   *         @arg @ref LL_DAC_CHANNEL_1
  862.   *         @arg @ref LL_DAC_CHANNEL_2
  863.   * @param  Register This parameter can be one of the following values:
  864.   *         @arg @ref LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED
  865.   *         @arg @ref LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED
  866.   *         @arg @ref LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED
  867.   * @retval DAC register address
  868.   */
  869. __STATIC_INLINE uint32_t LL_DAC_DMA_GetRegAddr(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Register)
  870. {
  871.   /* Retrieve address of register DHR12Rx, DHR12Lx or DHR8Rx depending on     */
  872.   /* DAC channel selected.                                                    */
  873.   return ((uint32_t)(__DAC_PTR_REG_OFFSET((DACx)->DHR12R1, ((DAC_Channel >> (Register & 0x1FUL))
  874.                                                             & DAC_REG_DHR_REGOFFSET_MASK_POSBIT0))));
  875. }
  876. /**
  877.   * @}
  878.   */
  879.  
  880. /** @defgroup DAC_LL_EF_Operation Operation on DAC channels
  881.   * @{
  882.   */
  883.  
  884. /**
  885.   * @brief  Enable DAC selected channel.
  886.   * @rmtoll CR       EN1            LL_DAC_Enable\n
  887.   *         CR       EN2            LL_DAC_Enable
  888.   * @note   After enable from off state, DAC channel requires a delay
  889.   *         for output voltage to reach accuracy +/- 1 LSB.
  890.   *         Refer to device datasheet, parameter "tWAKEUP".
  891.   * @param  DACx DAC instance
  892.   * @param  DAC_Channel This parameter can be one of the following values:
  893.   *         @arg @ref LL_DAC_CHANNEL_1
  894.   *         @arg @ref LL_DAC_CHANNEL_2
  895.   * @retval None
  896.   */
  897. __STATIC_INLINE void LL_DAC_Enable(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  898. {
  899.   SET_BIT(DACx->CR,
  900.           DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  901. }
  902.  
  903. /**
  904.   * @brief  Disable DAC selected channel.
  905.   * @rmtoll CR       EN1            LL_DAC_Disable\n
  906.   *         CR       EN2            LL_DAC_Disable
  907.   * @param  DACx DAC instance
  908.   * @param  DAC_Channel This parameter can be one of the following values:
  909.   *         @arg @ref LL_DAC_CHANNEL_1
  910.   *         @arg @ref LL_DAC_CHANNEL_2
  911.   * @retval None
  912.   */
  913. __STATIC_INLINE void LL_DAC_Disable(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  914. {
  915.   CLEAR_BIT(DACx->CR,
  916.             DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  917. }
  918.  
  919. /**
  920.   * @brief  Get DAC enable state of the selected channel.
  921.   *         (0: DAC channel is disabled, 1: DAC channel is enabled)
  922.   * @rmtoll CR       EN1            LL_DAC_IsEnabled\n
  923.   *         CR       EN2            LL_DAC_IsEnabled
  924.   * @param  DACx DAC instance
  925.   * @param  DAC_Channel This parameter can be one of the following values:
  926.   *         @arg @ref LL_DAC_CHANNEL_1
  927.   *         @arg @ref LL_DAC_CHANNEL_2
  928.   * @retval State of bit (1 or 0).
  929.   */
  930. __STATIC_INLINE uint32_t LL_DAC_IsEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  931. {
  932.   return ((READ_BIT(DACx->CR,
  933.                     DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
  934.            == (DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))) ? 1UL : 0UL);
  935. }
  936.  
  937. /**
  938.   * @brief  Enable DAC trigger of the selected channel.
  939.   * @note   - If DAC trigger is disabled, DAC conversion is performed
  940.   *           automatically once the data holding register is updated,
  941.   *           using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()":
  942.   *           @ref LL_DAC_ConvertData12RightAligned(), ...
  943.   *         - If DAC trigger is enabled, DAC conversion is performed
  944.   *           only when a hardware of software trigger event is occurring.
  945.   *           Select trigger source using
  946.   *           function @ref LL_DAC_SetTriggerSource().
  947.   * @rmtoll CR       TEN1           LL_DAC_EnableTrigger\n
  948.   *         CR       TEN2           LL_DAC_EnableTrigger
  949.   * @param  DACx DAC instance
  950.   * @param  DAC_Channel This parameter can be one of the following values:
  951.   *         @arg @ref LL_DAC_CHANNEL_1
  952.   *         @arg @ref LL_DAC_CHANNEL_2
  953.   * @retval None
  954.   */
  955. __STATIC_INLINE void LL_DAC_EnableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  956. {
  957.   SET_BIT(DACx->CR,
  958.           DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  959. }
  960.  
  961. /**
  962.   * @brief  Disable DAC trigger of the selected channel.
  963.   * @rmtoll CR       TEN1           LL_DAC_DisableTrigger\n
  964.   *         CR       TEN2           LL_DAC_DisableTrigger
  965.   * @param  DACx DAC instance
  966.   * @param  DAC_Channel This parameter can be one of the following values:
  967.   *         @arg @ref LL_DAC_CHANNEL_1
  968.   *         @arg @ref LL_DAC_CHANNEL_2
  969.   * @retval None
  970.   */
  971. __STATIC_INLINE void LL_DAC_DisableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  972. {
  973.   CLEAR_BIT(DACx->CR,
  974.             DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  975. }
  976.  
  977. /**
  978.   * @brief  Get DAC trigger state of the selected channel.
  979.   *         (0: DAC trigger is disabled, 1: DAC trigger is enabled)
  980.   * @rmtoll CR       TEN1           LL_DAC_IsTriggerEnabled\n
  981.   *         CR       TEN2           LL_DAC_IsTriggerEnabled
  982.   * @param  DACx DAC instance
  983.   * @param  DAC_Channel This parameter can be one of the following values:
  984.   *         @arg @ref LL_DAC_CHANNEL_1
  985.   *         @arg @ref LL_DAC_CHANNEL_2
  986.   * @retval State of bit (1 or 0).
  987.   */
  988. __STATIC_INLINE uint32_t LL_DAC_IsTriggerEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  989. {
  990.   return ((READ_BIT(DACx->CR,
  991.                     DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
  992.            == (DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))) ? 1UL : 0UL);
  993. }
  994.  
  995. /**
  996.   * @brief  Trig DAC conversion by software for the selected DAC channel.
  997.   * @note   Preliminarily, DAC trigger must be set to software trigger
  998.   *         using function
  999.   *           @ref LL_DAC_Init()
  1000.   *           @ref LL_DAC_SetTriggerSource()
  1001.   *         with parameter "LL_DAC_TRIGGER_SOFTWARE".
  1002.   *         and DAC trigger must be enabled using
  1003.   *         function @ref LL_DAC_EnableTrigger().
  1004.   * @note   For devices featuring DAC with 2 channels: this function
  1005.   *         can perform a SW start of both DAC channels simultaneously.
  1006.   *         Two channels can be selected as parameter.
  1007.   *         Example: (LL_DAC_CHANNEL_1 | LL_DAC_CHANNEL_2)
  1008.   * @rmtoll SWTRIGR  SWTRIG1        LL_DAC_TrigSWConversion\n
  1009.   *         SWTRIGR  SWTRIG2        LL_DAC_TrigSWConversion
  1010.   * @param  DACx DAC instance
  1011.   * @param  DAC_Channel  This parameter can a combination of the following values:
  1012.   *         @arg @ref LL_DAC_CHANNEL_1
  1013.   *         @arg @ref LL_DAC_CHANNEL_2
  1014.   * @retval None
  1015.   */
  1016. __STATIC_INLINE void LL_DAC_TrigSWConversion(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  1017. {
  1018.   SET_BIT(DACx->SWTRIGR,
  1019.           (DAC_Channel & DAC_SWTR_CHX_MASK));
  1020. }
  1021.  
  1022. /**
  1023.   * @brief  Set the data to be loaded in the data holding register
  1024.   *         in format 12 bits left alignment (LSB aligned on bit 0),
  1025.   *         for the selected DAC channel.
  1026.   * @rmtoll DHR12R1  DACC1DHR       LL_DAC_ConvertData12RightAligned\n
  1027.   *         DHR12R2  DACC2DHR       LL_DAC_ConvertData12RightAligned
  1028.   * @param  DACx DAC instance
  1029.   * @param  DAC_Channel This parameter can be one of the following values:
  1030.   *         @arg @ref LL_DAC_CHANNEL_1
  1031.   *         @arg @ref LL_DAC_CHANNEL_2
  1032.   * @param  Data Value between Min_Data=0x000 and Max_Data=0xFFF
  1033.   * @retval None
  1034.   */
  1035. __STATIC_INLINE void LL_DAC_ConvertData12RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
  1036. {
  1037.   __IO uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, (DAC_Channel >> DAC_REG_DHR12RX_REGOFFSET_BITOFFSET_POS)
  1038.                                              & DAC_REG_DHR_REGOFFSET_MASK_POSBIT0);
  1039.  
  1040.   MODIFY_REG(*preg, DAC_DHR12R1_DACC1DHR, Data);
  1041. }
  1042.  
  1043. /**
  1044.   * @brief  Set the data to be loaded in the data holding register
  1045.   *         in format 12 bits left alignment (MSB aligned on bit 15),
  1046.   *         for the selected DAC channel.
  1047.   * @rmtoll DHR12L1  DACC1DHR       LL_DAC_ConvertData12LeftAligned\n
  1048.   *         DHR12L2  DACC2DHR       LL_DAC_ConvertData12LeftAligned
  1049.   * @param  DACx DAC instance
  1050.   * @param  DAC_Channel This parameter can be one of the following values:
  1051.   *         @arg @ref LL_DAC_CHANNEL_1
  1052.   *         @arg @ref LL_DAC_CHANNEL_2
  1053.   * @param  Data Value between Min_Data=0x000 and Max_Data=0xFFF
  1054.   * @retval None
  1055.   */
  1056. __STATIC_INLINE void LL_DAC_ConvertData12LeftAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
  1057. {
  1058.   __IO uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, (DAC_Channel >> DAC_REG_DHR12LX_REGOFFSET_BITOFFSET_POS)
  1059.                                              & DAC_REG_DHR_REGOFFSET_MASK_POSBIT0);
  1060.  
  1061.   MODIFY_REG(*preg, DAC_DHR12L1_DACC1DHR, Data);
  1062. }
  1063.  
  1064. /**
  1065.   * @brief  Set the data to be loaded in the data holding register
  1066.   *         in format 8 bits left alignment (LSB aligned on bit 0),
  1067.   *         for the selected DAC channel.
  1068.   * @rmtoll DHR8R1   DACC1DHR       LL_DAC_ConvertData8RightAligned\n
  1069.   *         DHR8R2   DACC2DHR       LL_DAC_ConvertData8RightAligned
  1070.   * @param  DACx DAC instance
  1071.   * @param  DAC_Channel This parameter can be one of the following values:
  1072.   *         @arg @ref LL_DAC_CHANNEL_1
  1073.   *         @arg @ref LL_DAC_CHANNEL_2
  1074.   * @param  Data Value between Min_Data=0x00 and Max_Data=0xFF
  1075.   * @retval None
  1076.   */
  1077. __STATIC_INLINE void LL_DAC_ConvertData8RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
  1078. {
  1079.   __IO uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, (DAC_Channel >> DAC_REG_DHR8RX_REGOFFSET_BITOFFSET_POS)
  1080.                                              & DAC_REG_DHR_REGOFFSET_MASK_POSBIT0);
  1081.  
  1082.   MODIFY_REG(*preg, DAC_DHR8R1_DACC1DHR, Data);
  1083. }
  1084.  
  1085.  
  1086. /**
  1087.   * @brief  Set the data to be loaded in the data holding register
  1088.   *         in format 12 bits left alignment (LSB aligned on bit 0),
  1089.   *         for both DAC channels.
  1090.   * @rmtoll DHR12RD  DACC1DHR       LL_DAC_ConvertDualData12RightAligned\n
  1091.   *         DHR12RD  DACC2DHR       LL_DAC_ConvertDualData12RightAligned
  1092.   * @param  DACx DAC instance
  1093.   * @param  DataChannel1 Value between Min_Data=0x000 and Max_Data=0xFFF
  1094.   * @param  DataChannel2 Value between Min_Data=0x000 and Max_Data=0xFFF
  1095.   * @retval None
  1096.   */
  1097. __STATIC_INLINE void LL_DAC_ConvertDualData12RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1,
  1098.                                                           uint32_t DataChannel2)
  1099. {
  1100.   MODIFY_REG(DACx->DHR12RD,
  1101.              (DAC_DHR12RD_DACC2DHR | DAC_DHR12RD_DACC1DHR),
  1102.              ((DataChannel2 << DAC_DHR12RD_DACC2DHR_BITOFFSET_POS) | DataChannel1));
  1103. }
  1104.  
  1105. /**
  1106.   * @brief  Set the data to be loaded in the data holding register
  1107.   *         in format 12 bits left alignment (MSB aligned on bit 15),
  1108.   *         for both DAC channels.
  1109.   * @rmtoll DHR12LD  DACC1DHR       LL_DAC_ConvertDualData12LeftAligned\n
  1110.   *         DHR12LD  DACC2DHR       LL_DAC_ConvertDualData12LeftAligned
  1111.   * @param  DACx DAC instance
  1112.   * @param  DataChannel1 Value between Min_Data=0x000 and Max_Data=0xFFF
  1113.   * @param  DataChannel2 Value between Min_Data=0x000 and Max_Data=0xFFF
  1114.   * @retval None
  1115.   */
  1116. __STATIC_INLINE void LL_DAC_ConvertDualData12LeftAligned(DAC_TypeDef *DACx, uint32_t DataChannel1,
  1117.                                                          uint32_t DataChannel2)
  1118. {
  1119.   /* Note: Data of DAC channel 2 shift value subtracted of 4 because          */
  1120.   /*       data on 16 bits and DAC channel 2 bits field is on the 12 MSB,     */
  1121.   /*       the 4 LSB must be taken into account for the shift value.          */
  1122.   MODIFY_REG(DACx->DHR12LD,
  1123.              (DAC_DHR12LD_DACC2DHR | DAC_DHR12LD_DACC1DHR),
  1124.              ((DataChannel2 << (DAC_DHR12LD_DACC2DHR_BITOFFSET_POS - 4U)) | DataChannel1));
  1125. }
  1126.  
  1127. /**
  1128.   * @brief  Set the data to be loaded in the data holding register
  1129.   *         in format 8 bits left alignment (LSB aligned on bit 0),
  1130.   *         for both DAC channels.
  1131.   * @rmtoll DHR8RD  DACC1DHR       LL_DAC_ConvertDualData8RightAligned\n
  1132.   *         DHR8RD  DACC2DHR       LL_DAC_ConvertDualData8RightAligned
  1133.   * @param  DACx DAC instance
  1134.   * @param  DataChannel1 Value between Min_Data=0x00 and Max_Data=0xFF
  1135.   * @param  DataChannel2 Value between Min_Data=0x00 and Max_Data=0xFF
  1136.   * @retval None
  1137.   */
  1138. __STATIC_INLINE void LL_DAC_ConvertDualData8RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1,
  1139.                                                          uint32_t DataChannel2)
  1140. {
  1141.   MODIFY_REG(DACx->DHR8RD,
  1142.              (DAC_DHR8RD_DACC2DHR | DAC_DHR8RD_DACC1DHR),
  1143.              ((DataChannel2 << DAC_DHR8RD_DACC2DHR_BITOFFSET_POS) | DataChannel1));
  1144. }
  1145.  
  1146.  
  1147. /**
  1148.   * @brief  Retrieve output data currently generated for the selected DAC channel.
  1149.   * @note   Whatever alignment and resolution settings
  1150.   *         (using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()":
  1151.   *         @ref LL_DAC_ConvertData12RightAligned(), ...),
  1152.   *         output data format is 12 bits right aligned (LSB aligned on bit 0).
  1153.   * @rmtoll DOR1     DACC1DOR       LL_DAC_RetrieveOutputData\n
  1154.   *         DOR2     DACC2DOR       LL_DAC_RetrieveOutputData
  1155.   * @param  DACx DAC instance
  1156.   * @param  DAC_Channel This parameter can be one of the following values:
  1157.   *         @arg @ref LL_DAC_CHANNEL_1
  1158.   *         @arg @ref LL_DAC_CHANNEL_2
  1159.   * @retval Value between Min_Data=0x000 and Max_Data=0xFFF
  1160.   */
  1161. __STATIC_INLINE uint32_t LL_DAC_RetrieveOutputData(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  1162. {
  1163.   __IO uint32_t const *preg = __DAC_PTR_REG_OFFSET(DACx->DOR1, (DAC_Channel >> DAC_REG_DORX_REGOFFSET_BITOFFSET_POS)
  1164.                                                    & DAC_REG_DORX_REGOFFSET_MASK_POSBIT0);
  1165.  
  1166.   return (uint16_t) READ_BIT(*preg, DAC_DOR1_DACC1DOR);
  1167. }
  1168.  
  1169. /**
  1170.   * @}
  1171.   */
  1172.  
  1173. /** @defgroup DAC_LL_EF_FLAG_Management FLAG Management
  1174.   * @{
  1175.   */
  1176.  
  1177. #if defined(DAC_SR_DMAUDR1)
  1178. /**
  1179.   * @brief  Get DAC underrun flag for DAC channel 1
  1180.   * @rmtoll SR       DMAUDR1        LL_DAC_IsActiveFlag_DMAUDR1
  1181.   * @param  DACx DAC instance
  1182.   * @retval State of bit (1 or 0).
  1183.   */
  1184. __STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR1(DAC_TypeDef *DACx)
  1185. {
  1186.   return ((READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR1) == (LL_DAC_FLAG_DMAUDR1)) ? 1UL : 0UL);
  1187. }
  1188. #endif /* DAC_SR_DMAUDR1 */
  1189.  
  1190. #if defined(DAC_SR_DMAUDR2)
  1191. /**
  1192.   * @brief  Get DAC underrun flag for DAC channel 2
  1193.   * @rmtoll SR       DMAUDR2        LL_DAC_IsActiveFlag_DMAUDR2
  1194.   * @param  DACx DAC instance
  1195.   * @retval State of bit (1 or 0).
  1196.   */
  1197. __STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR2(DAC_TypeDef *DACx)
  1198. {
  1199.   return ((READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR2) == (LL_DAC_FLAG_DMAUDR2)) ? 1UL : 0UL);
  1200. }
  1201. #endif /* DAC_SR_DMAUDR2 */
  1202.  
  1203. #if defined(DAC_SR_DMAUDR1)
  1204. /**
  1205.   * @brief  Clear DAC underrun flag for DAC channel 1
  1206.   * @rmtoll SR       DMAUDR1        LL_DAC_ClearFlag_DMAUDR1
  1207.   * @param  DACx DAC instance
  1208.   * @retval None
  1209.   */
  1210. __STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR1(DAC_TypeDef *DACx)
  1211. {
  1212.   WRITE_REG(DACx->SR, LL_DAC_FLAG_DMAUDR1);
  1213. }
  1214. #endif /* DAC_SR_DMAUDR1 */
  1215.  
  1216. #if defined(DAC_SR_DMAUDR2)
  1217. /**
  1218.   * @brief  Clear DAC underrun flag for DAC channel 2
  1219.   * @rmtoll SR       DMAUDR2        LL_DAC_ClearFlag_DMAUDR2
  1220.   * @param  DACx DAC instance
  1221.   * @retval None
  1222.   */
  1223. __STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR2(DAC_TypeDef *DACx)
  1224. {
  1225.   WRITE_REG(DACx->SR, LL_DAC_FLAG_DMAUDR2);
  1226. }
  1227. #endif /* DAC_SR_DMAUDR2 */
  1228.  
  1229. /**
  1230.   * @}
  1231.   */
  1232.  
  1233. /** @defgroup DAC_LL_EF_IT_Management IT management
  1234.   * @{
  1235.   */
  1236.  
  1237. #if defined(DAC_CR_DMAUDRIE1)
  1238. /**
  1239.   * @brief  Enable DMA underrun interrupt for DAC channel 1
  1240.   * @rmtoll CR       DMAUDRIE1      LL_DAC_EnableIT_DMAUDR1
  1241.   * @param  DACx DAC instance
  1242.   * @retval None
  1243.   */
  1244. __STATIC_INLINE void LL_DAC_EnableIT_DMAUDR1(DAC_TypeDef *DACx)
  1245. {
  1246.   SET_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1);
  1247. }
  1248. #endif /* DAC_CR_DMAUDRIE1 */
  1249.  
  1250. #if defined(DAC_CR_DMAUDRIE2)
  1251. /**
  1252.   * @brief  Enable DMA underrun interrupt for DAC channel 2
  1253.   * @rmtoll CR       DMAUDRIE2      LL_DAC_EnableIT_DMAUDR2
  1254.   * @param  DACx DAC instance
  1255.   * @retval None
  1256.   */
  1257. __STATIC_INLINE void LL_DAC_EnableIT_DMAUDR2(DAC_TypeDef *DACx)
  1258. {
  1259.   SET_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2);
  1260. }
  1261. #endif /* DAC_CR_DMAUDRIE2 */
  1262.  
  1263. #if defined(DAC_CR_DMAUDRIE1)
  1264. /**
  1265.   * @brief  Disable DMA underrun interrupt for DAC channel 1
  1266.   * @rmtoll CR       DMAUDRIE1      LL_DAC_DisableIT_DMAUDR1
  1267.   * @param  DACx DAC instance
  1268.   * @retval None
  1269.   */
  1270. __STATIC_INLINE void LL_DAC_DisableIT_DMAUDR1(DAC_TypeDef *DACx)
  1271. {
  1272.   CLEAR_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1);
  1273. }
  1274. #endif /* DAC_CR_DMAUDRIE1 */
  1275.  
  1276. #if defined(DAC_CR_DMAUDRIE2)
  1277. /**
  1278.   * @brief  Disable DMA underrun interrupt for DAC channel 2
  1279.   * @rmtoll CR       DMAUDRIE2      LL_DAC_DisableIT_DMAUDR2
  1280.   * @param  DACx DAC instance
  1281.   * @retval None
  1282.   */
  1283. __STATIC_INLINE void LL_DAC_DisableIT_DMAUDR2(DAC_TypeDef *DACx)
  1284. {
  1285.   CLEAR_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2);
  1286. }
  1287. #endif /* DAC_CR_DMAUDRIE2 */
  1288.  
  1289. #if defined(DAC_CR_DMAUDRIE1)
  1290. /**
  1291.   * @brief  Get DMA underrun interrupt for DAC channel 1
  1292.   * @rmtoll CR       DMAUDRIE1      LL_DAC_IsEnabledIT_DMAUDR1
  1293.   * @param  DACx DAC instance
  1294.   * @retval State of bit (1 or 0).
  1295.   */
  1296. __STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR1(DAC_TypeDef *DACx)
  1297. {
  1298.   return ((READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1) == (LL_DAC_IT_DMAUDRIE1)) ? 1UL : 0UL);
  1299. }
  1300. #endif /* DAC_CR_DMAUDRIE1 */
  1301.  
  1302. #if defined(DAC_CR_DMAUDRIE2)
  1303. /**
  1304.   * @brief  Get DMA underrun interrupt for DAC channel 2
  1305.   * @rmtoll CR       DMAUDRIE2      LL_DAC_IsEnabledIT_DMAUDR2
  1306.   * @param  DACx DAC instance
  1307.   * @retval State of bit (1 or 0).
  1308.   */
  1309. __STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR2(DAC_TypeDef *DACx)
  1310. {
  1311.   return ((READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2) == (LL_DAC_IT_DMAUDRIE2)) ? 1UL : 0UL);
  1312. }
  1313. #endif /* DAC_CR_DMAUDRIE2 */
  1314.  
  1315. /**
  1316.   * @}
  1317.   */
  1318.  
  1319. #if defined(USE_FULL_LL_DRIVER)
  1320. /** @defgroup DAC_LL_EF_Init Initialization and de-initialization functions
  1321.   * @{
  1322.   */
  1323.  
  1324. ErrorStatus LL_DAC_DeInit(DAC_TypeDef *DACx);
  1325. ErrorStatus LL_DAC_Init(DAC_TypeDef *DACx, uint32_t DAC_Channel, LL_DAC_InitTypeDef *DAC_InitStruct);
  1326. void        LL_DAC_StructInit(LL_DAC_InitTypeDef *DAC_InitStruct);
  1327.  
  1328. /**
  1329.   * @}
  1330.   */
  1331. #endif /* USE_FULL_LL_DRIVER */
  1332.  
  1333. /**
  1334.   * @}
  1335.   */
  1336.  
  1337. /**
  1338.   * @}
  1339.   */
  1340.  
  1341. #endif /* DAC */
  1342.  
  1343. /**
  1344.   * @}
  1345.   */
  1346.  
  1347. #ifdef __cplusplus
  1348. }
  1349. #endif
  1350.  
  1351. #endif /* STM32F1xx_LL_DAC_H */
  1352.  
  1353. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  1354.