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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32f1xx_ll_dac.h
  4.   * @author  MCD Application Team
  5.   * @brief   Header file of DAC LL module.
  6.   ******************************************************************************
  7.   * @attention
  8.   *
  9.   * Copyright (c) 2016 STMicroelectronics.
  10.   * All rights reserved.
  11.   *
  12.   * This software is licensed under terms that can be found in the LICENSE file
  13.   * in the root directory of this software component.
  14.   * If no LICENSE file comes with this software, it is provided AS-IS.
  15.   *
  16.   ******************************************************************************
  17.   */
  18.  
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef STM32F1xx_LL_DAC_H
  21. #define STM32F1xx_LL_DAC_H
  22.  
  23. #ifdef __cplusplus
  24. extern "C" {
  25. #endif
  26.  
  27. /* Includes ------------------------------------------------------------------*/
  28. #include "stm32f1xx.h"
  29.  
  30. /** @addtogroup STM32F1xx_LL_Driver
  31.   * @{
  32.   */
  33.  
  34. #if defined(DAC)
  35.  
  36. /** @defgroup DAC_LL DAC
  37.   * @{
  38.   */
  39.  
  40. /* Private types -------------------------------------------------------------*/
  41. /* Private variables ---------------------------------------------------------*/
  42.  
  43. /* Private constants ---------------------------------------------------------*/
  44. /** @defgroup DAC_LL_Private_Constants DAC Private Constants
  45.   * @{
  46.   */
  47.  
  48. /* Internal masks for DAC channels definition */
  49. /* To select into literal LL_DAC_CHANNEL_x the relevant bits for:             */
  50. /* - channel bits position into registers CR, MCR, CCR, SHHR, SHRR            */
  51. /* - channel bits position into register SWTRIG                               */
  52. /* - channel register offset of data holding register DHRx                    */
  53. /* - channel register offset of data output register DORx                     */
  54. #define DAC_CR_CH1_BITOFFSET           0UL   /* Position of channel bits into registers
  55.                                                 CR, MCR, CCR, SHHR, SHRR of channel 1 */
  56. #define DAC_CR_CH2_BITOFFSET           16UL  /* Position of channel bits into registers
  57.                                                 CR, MCR, CCR, SHHR, SHRR of channel 2 */
  58. #define DAC_CR_CHX_BITOFFSET_MASK      (DAC_CR_CH1_BITOFFSET | DAC_CR_CH2_BITOFFSET)
  59.  
  60. #define DAC_SWTR_CH1                   (DAC_SWTRIGR_SWTRIG1) /* Channel bit into register SWTRIGR of channel 1. */
  61. #define DAC_SWTR_CH2                   (DAC_SWTRIGR_SWTRIG2) /* Channel bit into register SWTRIGR of channel 2. */
  62. #define DAC_SWTR_CHX_MASK              (DAC_SWTR_CH1 | DAC_SWTR_CH2)
  63.  
  64. #define DAC_REG_DHR12R1_REGOFFSET      0x00000000UL            /* Register DHR12Rx channel 1 taken as reference */
  65. #define DAC_REG_DHR12L1_REGOFFSET      0x00100000UL            /* Register offset of DHR12Lx channel 1 versus
  66.                                                                   DHR12Rx channel 1 (shifted left of 20 bits)   */
  67. #define DAC_REG_DHR8R1_REGOFFSET       0x02000000UL            /* Register offset of DHR8Rx  channel 1 versus
  68.                                                                   DHR12Rx channel 1 (shifted left of 24 bits)   */
  69.  
  70. #define DAC_REG_DHR12R2_REGOFFSET      0x00030000UL            /* Register offset of DHR12Rx channel 2 versus
  71.                                                                   DHR12Rx channel 1 (shifted left of 16 bits)   */
  72. #define DAC_REG_DHR12L2_REGOFFSET      0x00400000UL            /* Register offset of DHR12Lx channel 2 versus
  73.                                                                   DHR12Rx channel 1 (shifted left of 20 bits)   */
  74. #define DAC_REG_DHR8R2_REGOFFSET       0x05000000UL            /* Register offset of DHR8Rx  channel 2 versus
  75.                                                                   DHR12Rx channel 1 (shifted left of 24 bits)   */
  76.  
  77. #define DAC_REG_DHR12RX_REGOFFSET_MASK 0x000F0000UL
  78. #define DAC_REG_DHR12LX_REGOFFSET_MASK 0x00F00000UL
  79. #define DAC_REG_DHR8RX_REGOFFSET_MASK  0x0F000000UL
  80. #define DAC_REG_DHRX_REGOFFSET_MASK    (DAC_REG_DHR12RX_REGOFFSET_MASK\
  81.                                         | DAC_REG_DHR12LX_REGOFFSET_MASK | DAC_REG_DHR8RX_REGOFFSET_MASK)
  82.  
  83. #define DAC_REG_DOR1_REGOFFSET         0x00000000UL            /* Register DORx channel 1 taken as reference */
  84.  
  85. #define DAC_REG_DOR2_REGOFFSET         0x10000000UL            /* Register offset of DORx channel 1 versus
  86.                                                                   DORx channel 2 (shifted left of 28 bits)   */
  87. #define DAC_REG_DORX_REGOFFSET_MASK    (DAC_REG_DOR1_REGOFFSET | DAC_REG_DOR2_REGOFFSET)
  88.  
  89.  
  90.  
  91. #define DAC_REG_DHR_REGOFFSET_MASK_POSBIT0         0x0000000FUL /* Mask of data hold registers offset (DHR12Rx,
  92.                                                                    DHR12Lx, DHR8Rx, ...) when shifted to position 0 */
  93. #define DAC_REG_DORX_REGOFFSET_MASK_POSBIT0        0x00000001UL /* Mask of DORx registers offset when shifted
  94.                                                                    to position 0                                    */
  95. #define DAC_REG_SHSRX_REGOFFSET_MASK_POSBIT0       0x00000001UL /* Mask of SHSRx registers offset when shifted
  96.                                                                    to position 0                                    */
  97.  
  98. #define DAC_REG_DHR12RX_REGOFFSET_BITOFFSET_POS           16UL  /* Position of bits register offset of DHR12Rx
  99.                                                                    channel 1 or 2 versus DHR12Rx channel 1
  100.                                                                    (shifted left of 16 bits)                   */
  101. #define DAC_REG_DHR12LX_REGOFFSET_BITOFFSET_POS           20UL  /* Position of bits register offset of DHR12Lx
  102.                                                                    channel 1 or 2 versus DHR12Rx channel 1
  103.                                                                    (shifted left of 20 bits)                   */
  104. #define DAC_REG_DHR8RX_REGOFFSET_BITOFFSET_POS            24UL  /* Position of bits register offset of DHR8Rx
  105.                                                                    channel 1 or 2 versus DHR12Rx channel 1
  106.                                                                    (shifted left of 24 bits)                   */
  107. #define DAC_REG_DORX_REGOFFSET_BITOFFSET_POS              28UL  /* Position of bits register offset of DORx
  108.                                                                    channel 1 or 2 versus DORx channel 1
  109.                                                                    (shifted left of 28 bits)                   */
  110.  
  111. /* DAC registers bits positions */
  112. #define DAC_DHR12RD_DACC2DHR_BITOFFSET_POS                DAC_DHR12RD_DACC2DHR_Pos
  113. #define DAC_DHR12LD_DACC2DHR_BITOFFSET_POS                DAC_DHR12LD_DACC2DHR_Pos
  114. #define DAC_DHR8RD_DACC2DHR_BITOFFSET_POS                 DAC_DHR8RD_DACC2DHR_Pos
  115.  
  116. /* Miscellaneous data */
  117. #define DAC_DIGITAL_SCALE_12BITS                  4095UL   /* Full-scale digital value with a resolution of 12
  118.                                                               bits (voltage range determined by analog voltage
  119.                                                               references Vref+ and Vref-, refer to reference manual) */
  120.  
  121. /**
  122.   * @}
  123.   */
  124.  
  125.  
  126. /* Private macros ------------------------------------------------------------*/
  127. /** @defgroup DAC_LL_Private_Macros DAC Private Macros
  128.   * @{
  129.   */
  130.  
  131. /**
  132.   * @brief  Driver macro reserved for internal use: set a pointer to
  133.   *         a register from a register basis from which an offset
  134.   *         is applied.
  135.   * @param  __REG__ Register basis from which the offset is applied.
  136.   * @param  __REG_OFFFSET__ Offset to be applied (unit: number of registers).
  137.   * @retval Pointer to register address
  138.   */
  139. #define __DAC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__)                         \
  140.   ((uint32_t *)((uint32_t) ((uint32_t)(&(__REG__)) + ((__REG_OFFFSET__) << 2UL))))
  141.  
  142. /**
  143.   * @}
  144.   */
  145.  
  146.  
  147. /* Exported types ------------------------------------------------------------*/
  148. #if defined(USE_FULL_LL_DRIVER)
  149. /** @defgroup DAC_LL_ES_INIT DAC Exported Init structure
  150.   * @{
  151.   */
  152.  
  153. /**
  154.   * @brief  Structure definition of some features of DAC instance.
  155.   */
  156. typedef struct
  157. {
  158.   uint32_t TriggerSource;               /*!< Set the conversion trigger source for the selected DAC channel:
  159.                                              internal (SW start) or from external peripheral
  160.                                              (timer event, external interrupt line).
  161.                                              This parameter can be a value of @ref DAC_LL_EC_TRIGGER_SOURCE
  162.  
  163.                                              This feature can be modified afterwards using unitary
  164.                                              function @ref LL_DAC_SetTriggerSource(). */
  165.  
  166.   uint32_t WaveAutoGeneration;          /*!< Set the waveform automatic generation mode for the selected DAC channel.
  167.                                              This parameter can be a value of @ref DAC_LL_EC_WAVE_AUTO_GENERATION_MODE
  168.  
  169.                                              This feature can be modified afterwards using unitary
  170.                                              function @ref LL_DAC_SetWaveAutoGeneration(). */
  171.  
  172.   uint32_t WaveAutoGenerationConfig;    /*!< Set the waveform automatic generation mode for the selected DAC channel.
  173.                                              If waveform automatic generation mode is set to noise, this parameter
  174.                                              can be a value of @ref DAC_LL_EC_WAVE_NOISE_LFSR_UNMASK_BITS
  175.                                              If waveform automatic generation mode is set to triangle,
  176.                                              this parameter can be a value of @ref DAC_LL_EC_WAVE_TRIANGLE_AMPLITUDE
  177.                                              @note If waveform automatic generation mode is disabled,
  178.                                               this parameter is discarded.
  179.  
  180.                                              This feature can be modified afterwards using unitary
  181.                                              function @ref LL_DAC_SetWaveNoiseLFSR(),
  182.                                              @ref LL_DAC_SetWaveTriangleAmplitude()
  183.                                              depending on the wave automatic generation selected. */
  184.  
  185.   uint32_t OutputBuffer;                /*!< Set the output buffer for the selected DAC channel.
  186.                                              This parameter can be a value of @ref DAC_LL_EC_OUTPUT_BUFFER
  187.  
  188.                                              This feature can be modified afterwards using unitary
  189.                                              function @ref LL_DAC_SetOutputBuffer(). */
  190. } LL_DAC_InitTypeDef;
  191.  
  192. /**
  193.   * @}
  194.   */
  195. #endif /* USE_FULL_LL_DRIVER */
  196.  
  197. /* Exported constants --------------------------------------------------------*/
  198. /** @defgroup DAC_LL_Exported_Constants DAC Exported Constants
  199.   * @{
  200.   */
  201.  
  202. /** @defgroup DAC_LL_EC_GET_FLAG DAC flags
  203.   * @brief    Flags defines which can be used with LL_DAC_ReadReg function
  204.   * @{
  205.   */
  206. /* DAC channel 1 flags */
  207. #define LL_DAC_FLAG_DMAUDR1                (DAC_SR_DMAUDR1)   /*!< DAC channel 1 flag DMA underrun */
  208.  
  209. /* DAC channel 2 flags */
  210. #define LL_DAC_FLAG_DMAUDR2                (DAC_SR_DMAUDR2)   /*!< DAC channel 2 flag DMA underrun */
  211.  
  212. /**
  213.   * @}
  214.   */
  215.  
  216. /** @defgroup DAC_LL_EC_IT DAC interruptions
  217.   * @brief    IT defines which can be used with LL_DAC_ReadReg and  LL_DAC_WriteReg functions
  218.   * @{
  219.   */
  220. #define LL_DAC_IT_DMAUDRIE1                (DAC_CR_DMAUDRIE1) /*!< DAC channel 1 interruption DMA underrun */
  221.  
  222. #define LL_DAC_IT_DMAUDRIE2                (DAC_CR_DMAUDRIE2) /*!< DAC channel 2 interruption DMA underrun */
  223.  
  224. /**
  225.   * @}
  226.   */
  227.  
  228. /** @defgroup DAC_LL_EC_CHANNEL DAC channels
  229.   * @{
  230.   */
  231. #define LL_DAC_CHANNEL_1                   (DAC_REG_DOR1_REGOFFSET | DAC_REG_DHR12R1_REGOFFSET | DAC_REG_DHR12L1_REGOFFSET | DAC_REG_DHR8R1_REGOFFSET | DAC_CR_CH1_BITOFFSET | DAC_SWTR_CH1) /*!< DAC channel 1 */
  232.  
  233. #define LL_DAC_CHANNEL_2                   (DAC_REG_DOR2_REGOFFSET | DAC_REG_DHR12R2_REGOFFSET | DAC_REG_DHR12L2_REGOFFSET | DAC_REG_DHR8R2_REGOFFSET | DAC_CR_CH2_BITOFFSET | DAC_SWTR_CH2) /*!< DAC channel 2 */
  234.  
  235. /**
  236.   * @}
  237.   */
  238.  
  239. /** @defgroup DAC_LL_EC_TRIGGER_SOURCE DAC trigger source
  240.   * @{
  241.   */
  242. #define LL_DAC_TRIG_SOFTWARE               (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger internal (SW start) */
  243. #define LL_DAC_TRIG_EXT_TIM3_TRGO          (                                  DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external peripheral: TIM3 TRGO. */
  244. #define LL_DAC_TRIG_EXT_TIM15_TRGO         (                 DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external peripheral: TIM15 TRGO. */
  245. #define LL_DAC_TRIG_EXT_TIM2_TRGO          (DAC_CR_TSEL1_2                                  ) /*!< DAC channel conversion trigger from external peripheral: TIM2 TRGO. */
  246. #define LL_DAC_TRIG_EXT_TIM8_TRGO          (                                  DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external peripheral: TIM8 TRGO. */
  247. #define LL_DAC_TRIG_EXT_TIM4_TRGO          (DAC_CR_TSEL1_2                  | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external peripheral: TIM4 TRGO. */
  248. #define LL_DAC_TRIG_EXT_TIM6_TRGO          0x00000000UL                                       /*!< DAC channel conversion trigger from external peripheral: TIM6 TRGO. */
  249. #define LL_DAC_TRIG_EXT_TIM7_TRGO          (                 DAC_CR_TSEL1_1                 ) /*!< DAC channel conversion trigger from external peripheral: TIM7 TRGO. */
  250. #define LL_DAC_TRIG_EXT_TIM5_TRGO          (                 DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external peripheral: TIM5 TRGO. */
  251. #define LL_DAC_TRIG_EXT_EXTI_LINE9         (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1                 ) /*!< DAC channel conversion trigger from external peripheral: external interrupt line 9. */
  252. /**
  253.   * @}
  254.   */
  255.  
  256. /** @defgroup DAC_LL_EC_WAVE_AUTO_GENERATION_MODE DAC waveform automatic generation mode
  257.   * @{
  258.   */
  259. #define LL_DAC_WAVE_AUTO_GENERATION_NONE     0x00000000UL                    /*!< DAC channel wave auto generation mode disabled. */
  260. #define LL_DAC_WAVE_AUTO_GENERATION_NOISE    (               DAC_CR_WAVE1_0) /*!< DAC channel wave auto generation mode enabled, set generated noise waveform. */
  261. #define LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE (DAC_CR_WAVE1_1               ) /*!< DAC channel wave auto generation mode enabled, set generated triangle waveform. */
  262. /**
  263.   * @}
  264.   */
  265.  
  266. /** @defgroup DAC_LL_EC_WAVE_NOISE_LFSR_UNMASK_BITS DAC wave generation - Noise LFSR unmask bits
  267.   * @{
  268.   */
  269. #define LL_DAC_NOISE_LFSR_UNMASK_BIT0      0x00000000UL                                                        /*!< Noise wave generation, unmask LFSR bit0, for the selected DAC channel */
  270. #define LL_DAC_NOISE_LFSR_UNMASK_BITS1_0   (                                                   DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[1:0], for the selected DAC channel */
  271. #define LL_DAC_NOISE_LFSR_UNMASK_BITS2_0   (                                  DAC_CR_MAMP1_1                 ) /*!< Noise wave generation, unmask LFSR bits[2:0], for the selected DAC channel */
  272. #define LL_DAC_NOISE_LFSR_UNMASK_BITS3_0   (                                  DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[3:0], for the selected DAC channel */
  273. #define LL_DAC_NOISE_LFSR_UNMASK_BITS4_0   (                 DAC_CR_MAMP1_2                                  ) /*!< Noise wave generation, unmask LFSR bits[4:0], for the selected DAC channel */
  274. #define LL_DAC_NOISE_LFSR_UNMASK_BITS5_0   (                 DAC_CR_MAMP1_2                  | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[5:0], for the selected DAC channel */
  275. #define LL_DAC_NOISE_LFSR_UNMASK_BITS6_0   (                 DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1                 ) /*!< Noise wave generation, unmask LFSR bits[6:0], for the selected DAC channel */
  276. #define LL_DAC_NOISE_LFSR_UNMASK_BITS7_0   (                 DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[7:0], for the selected DAC channel */
  277. #define LL_DAC_NOISE_LFSR_UNMASK_BITS8_0   (DAC_CR_MAMP1_3                                                   ) /*!< Noise wave generation, unmask LFSR bits[8:0], for the selected DAC channel */
  278. #define LL_DAC_NOISE_LFSR_UNMASK_BITS9_0   (DAC_CR_MAMP1_3                                   | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[9:0], for the selected DAC channel */
  279. #define LL_DAC_NOISE_LFSR_UNMASK_BITS10_0  (DAC_CR_MAMP1_3                  | DAC_CR_MAMP1_1                 ) /*!< Noise wave generation, unmask LFSR bits[10:0], for the selected DAC channel */
  280. #define LL_DAC_NOISE_LFSR_UNMASK_BITS11_0  (DAC_CR_MAMP1_3                  | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[11:0], for the selected DAC channel */
  281. /**
  282.   * @}
  283.   */
  284.  
  285. /** @defgroup DAC_LL_EC_WAVE_TRIANGLE_AMPLITUDE DAC wave generation - Triangle amplitude
  286.   * @{
  287.   */
  288. #define LL_DAC_TRIANGLE_AMPLITUDE_1        0x00000000UL                                                        /*!< Triangle wave generation, amplitude of 1 LSB of DAC output range, for the selected DAC channel */
  289. #define LL_DAC_TRIANGLE_AMPLITUDE_3        (                                                   DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 3 LSB of DAC output range, for the selected DAC channel */
  290. #define LL_DAC_TRIANGLE_AMPLITUDE_7        (                                  DAC_CR_MAMP1_1                 ) /*!< Triangle wave generation, amplitude of 7 LSB of DAC output range, for the selected DAC channel */
  291. #define LL_DAC_TRIANGLE_AMPLITUDE_15       (                                  DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 15 LSB of DAC output range, for the selected DAC channel */
  292. #define LL_DAC_TRIANGLE_AMPLITUDE_31       (                 DAC_CR_MAMP1_2                                  ) /*!< Triangle wave generation, amplitude of 31 LSB of DAC output range, for the selected DAC channel */
  293. #define LL_DAC_TRIANGLE_AMPLITUDE_63       (                 DAC_CR_MAMP1_2                  | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 63 LSB of DAC output range, for the selected DAC channel */
  294. #define LL_DAC_TRIANGLE_AMPLITUDE_127      (                 DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1                 ) /*!< Triangle wave generation, amplitude of 127 LSB of DAC output range, for the selected DAC channel */
  295. #define LL_DAC_TRIANGLE_AMPLITUDE_255      (                 DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 255 LSB of DAC output range, for the selected DAC channel */
  296. #define LL_DAC_TRIANGLE_AMPLITUDE_511      (DAC_CR_MAMP1_3                                                   ) /*!< Triangle wave generation, amplitude of 512 LSB of DAC output range, for the selected DAC channel */
  297. #define LL_DAC_TRIANGLE_AMPLITUDE_1023     (DAC_CR_MAMP1_3                                   | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 1023 LSB of DAC output range, for the selected DAC channel */
  298. #define LL_DAC_TRIANGLE_AMPLITUDE_2047     (DAC_CR_MAMP1_3                  | DAC_CR_MAMP1_1                 ) /*!< Triangle wave generation, amplitude of 2047 LSB of DAC output range, for the selected DAC channel */
  299. #define LL_DAC_TRIANGLE_AMPLITUDE_4095     (DAC_CR_MAMP1_3                  | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 4095 LSB of DAC output range, for the selected DAC channel */
  300. /**
  301.   * @}
  302.   */
  303.  
  304. /** @defgroup DAC_LL_EC_OUTPUT_BUFFER DAC channel output buffer
  305.   * @{
  306.   */
  307. #define LL_DAC_OUTPUT_BUFFER_ENABLE        0x00000000UL            /*!< The selected DAC channel output is buffered: higher drive current capability, but also higher current consumption */
  308. #define LL_DAC_OUTPUT_BUFFER_DISABLE       (DAC_CR_BOFF1)          /*!< The selected DAC channel output is not buffered: lower drive current capability, but also lower current consumption */
  309. /**
  310.   * @}
  311.   */
  312.  
  313. /** @defgroup DAC_LL_EC_RESOLUTION  DAC channel output resolution
  314.   * @{
  315.   */
  316. #define LL_DAC_RESOLUTION_12B              0x00000000UL            /*!< DAC channel resolution 12 bits */
  317. #define LL_DAC_RESOLUTION_8B               0x00000002UL            /*!< DAC channel resolution 8 bits */
  318. /**
  319.   * @}
  320.   */
  321.  
  322. /** @defgroup DAC_LL_EC_REGISTERS  DAC registers compliant with specific purpose
  323.   * @{
  324.   */
  325. /* List of DAC registers intended to be used (most commonly) with             */
  326. /* DMA transfer.                                                              */
  327. /* Refer to function @ref LL_DAC_DMA_GetRegAddr().                            */
  328. #define LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED  DAC_REG_DHR12RX_REGOFFSET_BITOFFSET_POS /*!< DAC channel data holding register 12 bits right aligned */
  329. #define LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED   DAC_REG_DHR12LX_REGOFFSET_BITOFFSET_POS /*!< DAC channel data holding register 12 bits left aligned */
  330. #define LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED   DAC_REG_DHR8RX_REGOFFSET_BITOFFSET_POS  /*!< DAC channel data holding register 8 bits right aligned */
  331. /**
  332.   * @}
  333.   */
  334.  
  335. /** @defgroup DAC_LL_EC_HW_DELAYS  Definitions of DAC hardware constraints delays
  336.   * @note   Only DAC peripheral HW delays are defined in DAC LL driver driver,
  337.   *         not timeout values.
  338.   *         For details on delays values, refer to descriptions in source code
  339.   *         above each literal definition.
  340.   * @{
  341.   */
  342.  
  343. /* Delay for DAC channel voltage settling time from DAC channel startup       */
  344. /* (transition from disable to enable).                                       */
  345. /* Note: DAC channel startup time depends on board application environment:   */
  346. /*       impedance connected to DAC channel output.                           */
  347. /*       The delay below is specified under conditions:                       */
  348. /*        - voltage maximum transition (lowest to highest value)              */
  349. /*        - until voltage reaches final value +-1LSB                          */
  350. /*        - DAC channel output buffer enabled                                 */
  351. /*        - load impedance of 5kOhm (min), 50pF (max)                         */
  352. /* Literal set to maximum value (refer to device datasheet,                   */
  353. /* parameter "tWAKEUP").                                                      */
  354. /* Unit: us                                                                   */
  355. #define LL_DAC_DELAY_STARTUP_VOLTAGE_SETTLING_US             15UL /*!< Delay for DAC channel voltage settling time from DAC channel startup (transition from disable to enable) */
  356.  
  357. /* Delay for DAC channel voltage settling time.                               */
  358. /* Note: DAC channel startup time depends on board application environment:   */
  359. /*       impedance connected to DAC channel output.                           */
  360. /*       The delay below is specified under conditions:                       */
  361. /*        - voltage maximum transition (lowest to highest value)              */
  362. /*        - until voltage reaches final value +-1LSB                          */
  363. /*        - DAC channel output buffer enabled                                 */
  364. /*        - load impedance of 5kOhm min, 50pF max                             */
  365. /* Literal set to maximum value (refer to device datasheet,                   */
  366. /* parameter "tSETTLING").                                                    */
  367. /* Unit: us                                                                   */
  368. #define LL_DAC_DELAY_VOLTAGE_SETTLING_US                    12UL /*!< Delay for DAC channel voltage settling time */
  369.  
  370. /**
  371.   * @}
  372.   */
  373.  
  374. /**
  375.   * @}
  376.   */
  377.  
  378. /* Exported macro ------------------------------------------------------------*/
  379. /** @defgroup DAC_LL_Exported_Macros DAC Exported Macros
  380.   * @{
  381.   */
  382.  
  383. /** @defgroup DAC_LL_EM_WRITE_READ Common write and read registers macros
  384.   * @{
  385.   */
  386.  
  387. /**
  388.   * @brief  Write a value in DAC register
  389.   * @param  __INSTANCE__ DAC Instance
  390.   * @param  __REG__ Register to be written
  391.   * @param  __VALUE__ Value to be written in the register
  392.   * @retval None
  393.   */
  394. #define LL_DAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
  395.  
  396. /**
  397.   * @brief  Read a value in DAC register
  398.   * @param  __INSTANCE__ DAC Instance
  399.   * @param  __REG__ Register to be read
  400.   * @retval Register value
  401.   */
  402. #define LL_DAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
  403.  
  404. /**
  405.   * @}
  406.   */
  407.  
  408. /** @defgroup DAC_LL_EM_HELPER_MACRO DAC helper macro
  409.   * @{
  410.   */
  411.  
  412. /**
  413.   * @brief  Helper macro to get DAC channel number in decimal format
  414.   *         from literals LL_DAC_CHANNEL_x.
  415.   *         Example:
  416.   *            __LL_DAC_CHANNEL_TO_DECIMAL_NB(LL_DAC_CHANNEL_1)
  417.   *            will return decimal number "1".
  418.   * @note   The input can be a value from functions where a channel
  419.   *         number is returned.
  420.   * @param  __CHANNEL__ This parameter can be one of the following values:
  421.   *         @arg @ref LL_DAC_CHANNEL_1
  422.   *         @arg @ref LL_DAC_CHANNEL_2
  423.   * @retval 1...2
  424.   */
  425. #define __LL_DAC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__)                            \
  426.   ((__CHANNEL__) & DAC_SWTR_CHX_MASK)
  427.  
  428. /**
  429.   * @brief  Helper macro to get DAC channel in literal format LL_DAC_CHANNEL_x
  430.   *         from number in decimal format.
  431.   *         Example:
  432.   *           __LL_DAC_DECIMAL_NB_TO_CHANNEL(1)
  433.   *           will return a data equivalent to "LL_DAC_CHANNEL_1".
  434.   * @note  If the input parameter does not correspond to a DAC channel,
  435.   *        this macro returns value '0'.
  436.   * @param  __DECIMAL_NB__ 1...2
  437.   * @retval Returned value can be one of the following values:
  438.   *         @arg @ref LL_DAC_CHANNEL_1
  439.   *         @arg @ref LL_DAC_CHANNEL_2
  440.   */
  441. #define __LL_DAC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__)\
  442.   (((__DECIMAL_NB__) == 1UL)? (LL_DAC_CHANNEL_1  ):(((__DECIMAL_NB__) == 2UL) ? ( LL_DAC_CHANNEL_2):(0UL)))
  443.  
  444. /**
  445.   * @brief  Helper macro to define the DAC conversion data full-scale digital
  446.   *         value corresponding to the selected DAC resolution.
  447.   * @note   DAC conversion data full-scale corresponds to voltage range
  448.   *         determined by analog voltage references Vref+ and Vref-
  449.   *         (refer to reference manual).
  450.   * @param  __DAC_RESOLUTION__ This parameter can be one of the following values:
  451.   *         @arg @ref LL_DAC_RESOLUTION_12B
  452.   *         @arg @ref LL_DAC_RESOLUTION_8B
  453.   * @retval ADC conversion data equivalent voltage value (unit: mVolt)
  454.   */
  455. #define __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__)                             \
  456.   ((0x00000FFFUL) >> ((__DAC_RESOLUTION__) << 1UL))
  457.  
  458. /**
  459.   * @brief  Helper macro to calculate the DAC conversion data (unit: digital
  460.   *         value) corresponding to a voltage (unit: mVolt).
  461.   * @note   This helper macro is intended to provide input data in voltage
  462.   *         rather than digital value,
  463.   *         to be used with LL DAC functions such as
  464.   *         @ref LL_DAC_ConvertData12RightAligned().
  465.   * @note   Analog reference voltage (Vref+) must be either known from
  466.   *         user board environment or can be calculated using ADC measurement
  467.   *         and ADC helper macro __LL_ADC_CALC_VREFANALOG_VOLTAGE().
  468.   * @param  __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
  469.   * @param  __DAC_VOLTAGE__ Voltage to be generated by DAC channel
  470.   *                         (unit: mVolt).
  471.   * @param  __DAC_RESOLUTION__ This parameter can be one of the following values:
  472.   *         @arg @ref LL_DAC_RESOLUTION_12B
  473.   *         @arg @ref LL_DAC_RESOLUTION_8B
  474.   * @retval DAC conversion data (unit: digital value)
  475.   */
  476. #define __LL_DAC_CALC_VOLTAGE_TO_DATA(__VREFANALOG_VOLTAGE__, __DAC_VOLTAGE__, __DAC_RESOLUTION__)   \
  477.   ((__DAC_VOLTAGE__) * __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__)                                      \
  478.    / (__VREFANALOG_VOLTAGE__)                                                                          \
  479.   )
  480.  
  481. /**
  482.   * @}
  483.   */
  484.  
  485. /**
  486.   * @}
  487.   */
  488.  
  489.  
  490. /* Exported functions --------------------------------------------------------*/
  491. /** @defgroup DAC_LL_Exported_Functions DAC Exported Functions
  492.   * @{
  493.   */
  494.  
  495. /**
  496.   * @brief  Set the conversion trigger source for the selected DAC channel.
  497.   * @note   For conversion trigger source to be effective, DAC trigger
  498.   *         must be enabled using function @ref LL_DAC_EnableTrigger().
  499.   * @note   To set conversion trigger source, DAC channel must be disabled.
  500.   *         Otherwise, the setting is discarded.
  501.   * @note   Availability of parameters of trigger sources from timer
  502.   *         depends on timers availability on the selected device.
  503.   * @rmtoll CR       TSEL1          LL_DAC_SetTriggerSource\n
  504.   *         CR       TSEL2          LL_DAC_SetTriggerSource
  505.   * @param  DACx DAC instance
  506.   * @param  DAC_Channel This parameter can be one of the following values:
  507.   *         @arg @ref LL_DAC_CHANNEL_1
  508.   *         @arg @ref LL_DAC_CHANNEL_2
  509.   * @param  TriggerSource This parameter can be one of the following values:
  510.   *         @arg @ref LL_DAC_TRIG_SOFTWARE
  511.   *         @arg @ref LL_DAC_TRIG_EXT_TIM2_TRGO
  512.   *         @arg @ref LL_DAC_TRIG_EXT_TIM3_TRGO
  513.   *         @arg @ref LL_DAC_TRIG_EXT_TIM4_TRGO
  514.   *         @arg @ref LL_DAC_TRIG_EXT_TIM5_TRGO
  515.   *         @arg @ref LL_DAC_TRIG_EXT_TIM6_TRGO
  516.   *         @arg @ref LL_DAC_TRIG_EXT_TIM7_TRGO
  517.   *         @arg @ref LL_DAC_TRIG_EXT_TIM15_TRGO
  518.   *         @arg @ref LL_DAC_TRIG_EXT_EXTI_LINE9
  519.   * @retval None
  520.   */
  521. __STATIC_INLINE void LL_DAC_SetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t TriggerSource)
  522. {
  523.   MODIFY_REG(DACx->CR,
  524.              DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
  525.              TriggerSource << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  526. }
  527.  
  528. /**
  529.   * @brief  Get the conversion trigger source for the selected DAC channel.
  530.   * @note   For conversion trigger source to be effective, DAC trigger
  531.   *         must be enabled using function @ref LL_DAC_EnableTrigger().
  532.   * @note   Availability of parameters of trigger sources from timer
  533.   *         depends on timers availability on the selected device.
  534.   * @rmtoll CR       TSEL1          LL_DAC_GetTriggerSource\n
  535.   *         CR       TSEL2          LL_DAC_GetTriggerSource
  536.   * @param  DACx DAC instance
  537.   * @param  DAC_Channel This parameter can be one of the following values:
  538.   *         @arg @ref LL_DAC_CHANNEL_1
  539.   *         @arg @ref LL_DAC_CHANNEL_2
  540.   * @retval Returned value can be one of the following values:
  541.   *         @arg @ref LL_DAC_TRIG_SOFTWARE
  542.   *         @arg @ref LL_DAC_TRIG_EXT_TIM2_TRGO
  543.   *         @arg @ref LL_DAC_TRIG_EXT_TIM3_TRGO
  544.   *         @arg @ref LL_DAC_TRIG_EXT_TIM4_TRGO
  545.   *         @arg @ref LL_DAC_TRIG_EXT_TIM5_TRGO
  546.   *         @arg @ref LL_DAC_TRIG_EXT_TIM6_TRGO
  547.   *         @arg @ref LL_DAC_TRIG_EXT_TIM7_TRGO
  548.   *         @arg @ref LL_DAC_TRIG_EXT_TIM15_TRGO
  549.   *         @arg @ref LL_DAC_TRIG_EXT_EXTI_LINE9
  550.   */
  551. __STATIC_INLINE uint32_t LL_DAC_GetTriggerSource(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
  552. {
  553.   return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
  554.                     >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
  555.                    );
  556. }
  557.  
  558. /**
  559.   * @brief  Set the waveform automatic generation mode
  560.   *         for the selected DAC channel.
  561.   * @rmtoll CR       WAVE1          LL_DAC_SetWaveAutoGeneration\n
  562.   *         CR       WAVE2          LL_DAC_SetWaveAutoGeneration
  563.   * @param  DACx DAC instance
  564.   * @param  DAC_Channel This parameter can be one of the following values:
  565.   *         @arg @ref LL_DAC_CHANNEL_1
  566.   *         @arg @ref LL_DAC_CHANNEL_2
  567.   * @param  WaveAutoGeneration This parameter can be one of the following values:
  568.   *         @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NONE
  569.   *         @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE
  570.   *         @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE
  571.   * @retval None
  572.   */
  573. __STATIC_INLINE void LL_DAC_SetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t WaveAutoGeneration)
  574. {
  575.   MODIFY_REG(DACx->CR,
  576.              DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
  577.              WaveAutoGeneration << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  578. }
  579.  
  580. /**
  581.   * @brief  Get the waveform automatic generation mode
  582.   *         for the selected DAC channel.
  583.   * @rmtoll CR       WAVE1          LL_DAC_GetWaveAutoGeneration\n
  584.   *         CR       WAVE2          LL_DAC_GetWaveAutoGeneration
  585.   * @param  DACx DAC instance
  586.   * @param  DAC_Channel This parameter can be one of the following values:
  587.   *         @arg @ref LL_DAC_CHANNEL_1
  588.   *         @arg @ref LL_DAC_CHANNEL_2
  589.   * @retval Returned value can be one of the following values:
  590.   *         @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NONE
  591.   *         @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE
  592.   *         @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE
  593.   */
  594. __STATIC_INLINE uint32_t LL_DAC_GetWaveAutoGeneration(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
  595. {
  596.   return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
  597.                     >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
  598.                    );
  599. }
  600.  
  601. /**
  602.   * @brief  Set the noise waveform generation for the selected DAC channel:
  603.   *         Noise mode and parameters LFSR (linear feedback shift register).
  604.   * @note   For wave generation to be effective, DAC channel
  605.   *         wave generation mode must be enabled using
  606.   *         function @ref LL_DAC_SetWaveAutoGeneration().
  607.   * @note   This setting can be set when the selected DAC channel is disabled
  608.   *         (otherwise, the setting operation is ignored).
  609.   * @rmtoll CR       MAMP1          LL_DAC_SetWaveNoiseLFSR\n
  610.   *         CR       MAMP2          LL_DAC_SetWaveNoiseLFSR
  611.   * @param  DACx DAC instance
  612.   * @param  DAC_Channel This parameter can be one of the following values:
  613.   *         @arg @ref LL_DAC_CHANNEL_1
  614.   *         @arg @ref LL_DAC_CHANNEL_2
  615.   * @param  NoiseLFSRMask This parameter can be one of the following values:
  616.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0
  617.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0
  618.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0
  619.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0
  620.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0
  621.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0
  622.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0
  623.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0
  624.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0
  625.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0
  626.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0
  627.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0
  628.   * @retval None
  629.   */
  630. __STATIC_INLINE void LL_DAC_SetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t NoiseLFSRMask)
  631. {
  632.   MODIFY_REG(DACx->CR,
  633.              DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
  634.              NoiseLFSRMask << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  635. }
  636.  
  637. /**
  638.   * @brief  Get the noise waveform generation for the selected DAC channel:
  639.   *         Noise mode and parameters LFSR (linear feedback shift register).
  640.   * @rmtoll CR       MAMP1          LL_DAC_GetWaveNoiseLFSR\n
  641.   *         CR       MAMP2          LL_DAC_GetWaveNoiseLFSR
  642.   * @param  DACx DAC instance
  643.   * @param  DAC_Channel This parameter can be one of the following values:
  644.   *         @arg @ref LL_DAC_CHANNEL_1
  645.   *         @arg @ref LL_DAC_CHANNEL_2
  646.   * @retval Returned value can be one of the following values:
  647.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0
  648.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0
  649.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0
  650.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0
  651.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0
  652.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0
  653.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0
  654.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0
  655.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0
  656.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0
  657.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0
  658.   *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0
  659.   */
  660. __STATIC_INLINE uint32_t LL_DAC_GetWaveNoiseLFSR(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
  661. {
  662.   return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
  663.                     >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
  664.                    );
  665. }
  666.  
  667. /**
  668.   * @brief  Set the triangle waveform generation for the selected DAC channel:
  669.   *         triangle mode and amplitude.
  670.   * @note   For wave generation to be effective, DAC channel
  671.   *         wave generation mode must be enabled using
  672.   *         function @ref LL_DAC_SetWaveAutoGeneration().
  673.   * @note   This setting can be set when the selected DAC channel is disabled
  674.   *         (otherwise, the setting operation is ignored).
  675.   * @rmtoll CR       MAMP1          LL_DAC_SetWaveTriangleAmplitude\n
  676.   *         CR       MAMP2          LL_DAC_SetWaveTriangleAmplitude
  677.   * @param  DACx DAC instance
  678.   * @param  DAC_Channel This parameter can be one of the following values:
  679.   *         @arg @ref LL_DAC_CHANNEL_1
  680.   *         @arg @ref LL_DAC_CHANNEL_2
  681.   * @param  TriangleAmplitude This parameter can be one of the following values:
  682.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1
  683.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3
  684.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7
  685.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15
  686.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31
  687.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63
  688.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127
  689.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255
  690.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511
  691.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023
  692.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047
  693.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095
  694.   * @retval None
  695.   */
  696. __STATIC_INLINE void LL_DAC_SetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel,
  697.                                                      uint32_t TriangleAmplitude)
  698. {
  699.   MODIFY_REG(DACx->CR,
  700.              DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
  701.              TriangleAmplitude << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  702. }
  703.  
  704. /**
  705.   * @brief  Get the triangle waveform generation for the selected DAC channel:
  706.   *         triangle mode and amplitude.
  707.   * @rmtoll CR       MAMP1          LL_DAC_GetWaveTriangleAmplitude\n
  708.   *         CR       MAMP2          LL_DAC_GetWaveTriangleAmplitude
  709.   * @param  DACx DAC instance
  710.   * @param  DAC_Channel This parameter can be one of the following values:
  711.   *         @arg @ref LL_DAC_CHANNEL_1
  712.   *         @arg @ref LL_DAC_CHANNEL_2
  713.   * @retval Returned value can be one of the following values:
  714.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1
  715.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3
  716.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7
  717.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15
  718.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31
  719.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63
  720.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127
  721.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255
  722.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511
  723.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023
  724.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047
  725.   *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095
  726.   */
  727. __STATIC_INLINE uint32_t LL_DAC_GetWaveTriangleAmplitude(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
  728. {
  729.   return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
  730.                     >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
  731.                    );
  732. }
  733.  
  734. /**
  735.   * @brief  Set the output buffer for the selected DAC channel.
  736.   * @rmtoll CR       BOFF1          LL_DAC_SetOutputBuffer\n
  737.   *         CR       BOFF2          LL_DAC_SetOutputBuffer
  738.   * @param  DACx DAC instance
  739.   * @param  DAC_Channel This parameter can be one of the following values:
  740.   *         @arg @ref LL_DAC_CHANNEL_1
  741.   *         @arg @ref LL_DAC_CHANNEL_2
  742.   * @param  OutputBuffer This parameter can be one of the following values:
  743.   *         @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
  744.   *         @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
  745.   * @retval None
  746.   */
  747. __STATIC_INLINE void LL_DAC_SetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t OutputBuffer)
  748. {
  749.   MODIFY_REG(DACx->CR,
  750.              DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
  751.              OutputBuffer << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  752. }
  753.  
  754. /**
  755.   * @brief  Get the output buffer state for the selected DAC channel.
  756.   * @rmtoll CR       BOFF1          LL_DAC_GetOutputBuffer\n
  757.   *         CR       BOFF2          LL_DAC_GetOutputBuffer
  758.   * @param  DACx DAC instance
  759.   * @param  DAC_Channel This parameter can be one of the following values:
  760.   *         @arg @ref LL_DAC_CHANNEL_1
  761.   *         @arg @ref LL_DAC_CHANNEL_2
  762.   * @retval Returned value can be one of the following values:
  763.   *         @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
  764.   *         @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
  765.   */
  766. __STATIC_INLINE uint32_t LL_DAC_GetOutputBuffer(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
  767. {
  768.   return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
  769.                     >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
  770.                    );
  771. }
  772.  
  773. /**
  774.   * @}
  775.   */
  776.  
  777. /** @defgroup DAC_LL_EF_DMA_Management DMA Management
  778.   * @{
  779.   */
  780.  
  781. /**
  782.   * @brief  Enable DAC DMA transfer request of the selected channel.
  783.   * @note   To configure DMA source address (peripheral address),
  784.   *         use function @ref LL_DAC_DMA_GetRegAddr().
  785.   * @rmtoll CR       DMAEN1         LL_DAC_EnableDMAReq\n
  786.   *         CR       DMAEN2         LL_DAC_EnableDMAReq
  787.   * @param  DACx DAC instance
  788.   * @param  DAC_Channel This parameter can be one of the following values:
  789.   *         @arg @ref LL_DAC_CHANNEL_1
  790.   *         @arg @ref LL_DAC_CHANNEL_2
  791.   * @retval None
  792.   */
  793. __STATIC_INLINE void LL_DAC_EnableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  794. {
  795.   SET_BIT(DACx->CR,
  796.           DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  797. }
  798.  
  799. /**
  800.   * @brief  Disable DAC DMA transfer request of the selected channel.
  801.   * @note   To configure DMA source address (peripheral address),
  802.   *         use function @ref LL_DAC_DMA_GetRegAddr().
  803.   * @rmtoll CR       DMAEN1         LL_DAC_DisableDMAReq\n
  804.   *         CR       DMAEN2         LL_DAC_DisableDMAReq
  805.   * @param  DACx DAC instance
  806.   * @param  DAC_Channel This parameter can be one of the following values:
  807.   *         @arg @ref LL_DAC_CHANNEL_1
  808.   *         @arg @ref LL_DAC_CHANNEL_2
  809.   * @retval None
  810.   */
  811. __STATIC_INLINE void LL_DAC_DisableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  812. {
  813.   CLEAR_BIT(DACx->CR,
  814.             DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  815. }
  816.  
  817. /**
  818.   * @brief  Get DAC DMA transfer request state of the selected channel.
  819.   *         (0: DAC DMA transfer request is disabled, 1: DAC DMA transfer request is enabled)
  820.   * @rmtoll CR       DMAEN1         LL_DAC_IsDMAReqEnabled\n
  821.   *         CR       DMAEN2         LL_DAC_IsDMAReqEnabled
  822.   * @param  DACx DAC instance
  823.   * @param  DAC_Channel This parameter can be one of the following values:
  824.   *         @arg @ref LL_DAC_CHANNEL_1
  825.   *         @arg @ref LL_DAC_CHANNEL_2
  826.   * @retval State of bit (1 or 0).
  827.   */
  828. __STATIC_INLINE uint32_t LL_DAC_IsDMAReqEnabled(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
  829. {
  830.   return ((READ_BIT(DACx->CR,
  831.                     DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
  832.            == (DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))) ? 1UL : 0UL);
  833. }
  834.  
  835. /**
  836.   * @brief  Function to help to configure DMA transfer to DAC: retrieve the
  837.   *         DAC register address from DAC instance and a list of DAC registers
  838.   *         intended to be used (most commonly) with DMA transfer.
  839.   * @note   These DAC registers are data holding registers:
  840.   *         when DAC conversion is requested, DAC generates a DMA transfer
  841.   *         request to have data available in DAC data holding registers.
  842.   * @note   This macro is intended to be used with LL DMA driver, refer to
  843.   *         function "LL_DMA_ConfigAddresses()".
  844.   *         Example:
  845.   *           LL_DMA_ConfigAddresses(DMA1,
  846.   *                                  LL_DMA_CHANNEL_1,
  847.   *                                  (uint32_t)&< array or variable >,
  848.   *                                  LL_DAC_DMA_GetRegAddr(DAC1, LL_DAC_CHANNEL_1,
  849.   *                                  LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED),
  850.   *                                  LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
  851.   * @rmtoll DHR12R1  DACC1DHR       LL_DAC_DMA_GetRegAddr\n
  852.   *         DHR12L1  DACC1DHR       LL_DAC_DMA_GetRegAddr\n
  853.   *         DHR8R1   DACC1DHR       LL_DAC_DMA_GetRegAddr\n
  854.   *         DHR12R2  DACC2DHR       LL_DAC_DMA_GetRegAddr\n
  855.   *         DHR12L2  DACC2DHR       LL_DAC_DMA_GetRegAddr\n
  856.   *         DHR8R2   DACC2DHR       LL_DAC_DMA_GetRegAddr
  857.   * @param  DACx DAC instance
  858.   * @param  DAC_Channel This parameter can be one of the following values:
  859.   *         @arg @ref LL_DAC_CHANNEL_1
  860.   *         @arg @ref LL_DAC_CHANNEL_2
  861.   * @param  Register This parameter can be one of the following values:
  862.   *         @arg @ref LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED
  863.   *         @arg @ref LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED
  864.   *         @arg @ref LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED
  865.   * @retval DAC register address
  866.   */
  867. __STATIC_INLINE uint32_t LL_DAC_DMA_GetRegAddr(const DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Register)
  868. {
  869.   /* Retrieve address of register DHR12Rx, DHR12Lx or DHR8Rx depending on     */
  870.   /* DAC channel selected.                                                    */
  871.   return ((uint32_t)(__DAC_PTR_REG_OFFSET((DACx)->DHR12R1, ((DAC_Channel >> (Register & 0x1FUL))
  872.                                                             & DAC_REG_DHR_REGOFFSET_MASK_POSBIT0))));
  873. }
  874. /**
  875.   * @}
  876.   */
  877.  
  878. /** @defgroup DAC_LL_EF_Operation Operation on DAC channels
  879.   * @{
  880.   */
  881.  
  882. /**
  883.   * @brief  Enable DAC selected channel.
  884.   * @rmtoll CR       EN1            LL_DAC_Enable\n
  885.   *         CR       EN2            LL_DAC_Enable
  886.   * @note   After enable from off state, DAC channel requires a delay
  887.   *         for output voltage to reach accuracy +/- 1 LSB.
  888.   *         Refer to device datasheet, parameter "tWAKEUP".
  889.   * @param  DACx DAC instance
  890.   * @param  DAC_Channel This parameter can be one of the following values:
  891.   *         @arg @ref LL_DAC_CHANNEL_1
  892.   *         @arg @ref LL_DAC_CHANNEL_2
  893.   * @retval None
  894.   */
  895. __STATIC_INLINE void LL_DAC_Enable(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  896. {
  897.   SET_BIT(DACx->CR,
  898.           DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  899. }
  900.  
  901. /**
  902.   * @brief  Disable DAC selected channel.
  903.   * @rmtoll CR       EN1            LL_DAC_Disable\n
  904.   *         CR       EN2            LL_DAC_Disable
  905.   * @param  DACx DAC instance
  906.   * @param  DAC_Channel This parameter can be one of the following values:
  907.   *         @arg @ref LL_DAC_CHANNEL_1
  908.   *         @arg @ref LL_DAC_CHANNEL_2
  909.   * @retval None
  910.   */
  911. __STATIC_INLINE void LL_DAC_Disable(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  912. {
  913.   CLEAR_BIT(DACx->CR,
  914.             DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  915. }
  916.  
  917. /**
  918.   * @brief  Get DAC enable state of the selected channel.
  919.   *         (0: DAC channel is disabled, 1: DAC channel is enabled)
  920.   * @rmtoll CR       EN1            LL_DAC_IsEnabled\n
  921.   *         CR       EN2            LL_DAC_IsEnabled
  922.   * @param  DACx DAC instance
  923.   * @param  DAC_Channel This parameter can be one of the following values:
  924.   *         @arg @ref LL_DAC_CHANNEL_1
  925.   *         @arg @ref LL_DAC_CHANNEL_2
  926.   * @retval State of bit (1 or 0).
  927.   */
  928. __STATIC_INLINE uint32_t LL_DAC_IsEnabled(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
  929. {
  930.   return ((READ_BIT(DACx->CR,
  931.                     DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
  932.            == (DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))) ? 1UL : 0UL);
  933. }
  934.  
  935. /**
  936.   * @brief  Enable DAC trigger of the selected channel.
  937.   * @note   - If DAC trigger is disabled, DAC conversion is performed
  938.   *           automatically once the data holding register is updated,
  939.   *           using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()":
  940.   *           @ref LL_DAC_ConvertData12RightAligned(), ...
  941.   *         - If DAC trigger is enabled, DAC conversion is performed
  942.   *           only when a hardware of software trigger event is occurring.
  943.   *           Select trigger source using
  944.   *           function @ref LL_DAC_SetTriggerSource().
  945.   * @rmtoll CR       TEN1           LL_DAC_EnableTrigger\n
  946.   *         CR       TEN2           LL_DAC_EnableTrigger
  947.   * @param  DACx DAC instance
  948.   * @param  DAC_Channel This parameter can be one of the following values:
  949.   *         @arg @ref LL_DAC_CHANNEL_1
  950.   *         @arg @ref LL_DAC_CHANNEL_2
  951.   * @retval None
  952.   */
  953. __STATIC_INLINE void LL_DAC_EnableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  954. {
  955.   SET_BIT(DACx->CR,
  956.           DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  957. }
  958.  
  959. /**
  960.   * @brief  Disable DAC trigger of the selected channel.
  961.   * @rmtoll CR       TEN1           LL_DAC_DisableTrigger\n
  962.   *         CR       TEN2           LL_DAC_DisableTrigger
  963.   * @param  DACx DAC instance
  964.   * @param  DAC_Channel This parameter can be one of the following values:
  965.   *         @arg @ref LL_DAC_CHANNEL_1
  966.   *         @arg @ref LL_DAC_CHANNEL_2
  967.   * @retval None
  968.   */
  969. __STATIC_INLINE void LL_DAC_DisableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  970. {
  971.   CLEAR_BIT(DACx->CR,
  972.             DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
  973. }
  974.  
  975. /**
  976.   * @brief  Get DAC trigger state of the selected channel.
  977.   *         (0: DAC trigger is disabled, 1: DAC trigger is enabled)
  978.   * @rmtoll CR       TEN1           LL_DAC_IsTriggerEnabled\n
  979.   *         CR       TEN2           LL_DAC_IsTriggerEnabled
  980.   * @param  DACx DAC instance
  981.   * @param  DAC_Channel This parameter can be one of the following values:
  982.   *         @arg @ref LL_DAC_CHANNEL_1
  983.   *         @arg @ref LL_DAC_CHANNEL_2
  984.   * @retval State of bit (1 or 0).
  985.   */
  986. __STATIC_INLINE uint32_t LL_DAC_IsTriggerEnabled(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
  987. {
  988.   return ((READ_BIT(DACx->CR,
  989.                     DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
  990.            == (DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))) ? 1UL : 0UL);
  991. }
  992.  
  993. /**
  994.   * @brief  Trig DAC conversion by software for the selected DAC channel.
  995.   * @note   Preliminarily, DAC trigger must be set to software trigger
  996.   *         using function
  997.   *           @ref LL_DAC_Init()
  998.   *           @ref LL_DAC_SetTriggerSource()
  999.   *         with parameter "LL_DAC_TRIGGER_SOFTWARE".
  1000.   *         and DAC trigger must be enabled using
  1001.   *         function @ref LL_DAC_EnableTrigger().
  1002.   * @note   For devices featuring DAC with 2 channels: this function
  1003.   *         can perform a SW start of both DAC channels simultaneously.
  1004.   *         Two channels can be selected as parameter.
  1005.   *         Example: (LL_DAC_CHANNEL_1 | LL_DAC_CHANNEL_2)
  1006.   * @rmtoll SWTRIGR  SWTRIG1        LL_DAC_TrigSWConversion\n
  1007.   *         SWTRIGR  SWTRIG2        LL_DAC_TrigSWConversion
  1008.   * @param  DACx DAC instance
  1009.   * @param  DAC_Channel  This parameter can a combination of the following values:
  1010.   *         @arg @ref LL_DAC_CHANNEL_1
  1011.   *         @arg @ref LL_DAC_CHANNEL_2
  1012.   * @retval None
  1013.   */
  1014. __STATIC_INLINE void LL_DAC_TrigSWConversion(DAC_TypeDef *DACx, uint32_t DAC_Channel)
  1015. {
  1016.   SET_BIT(DACx->SWTRIGR,
  1017.           (DAC_Channel & DAC_SWTR_CHX_MASK));
  1018. }
  1019.  
  1020. /**
  1021.   * @brief  Set the data to be loaded in the data holding register
  1022.   *         in format 12 bits left alignment (LSB aligned on bit 0),
  1023.   *         for the selected DAC channel.
  1024.   * @rmtoll DHR12R1  DACC1DHR       LL_DAC_ConvertData12RightAligned\n
  1025.   *         DHR12R2  DACC2DHR       LL_DAC_ConvertData12RightAligned
  1026.   * @param  DACx DAC instance
  1027.   * @param  DAC_Channel This parameter can be one of the following values:
  1028.   *         @arg @ref LL_DAC_CHANNEL_1
  1029.   *         @arg @ref LL_DAC_CHANNEL_2
  1030.   * @param  Data Value between Min_Data=0x000 and Max_Data=0xFFF
  1031.   * @retval None
  1032.   */
  1033. __STATIC_INLINE void LL_DAC_ConvertData12RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
  1034. {
  1035.   __IO uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, (DAC_Channel >> DAC_REG_DHR12RX_REGOFFSET_BITOFFSET_POS)
  1036.                                              & DAC_REG_DHR_REGOFFSET_MASK_POSBIT0);
  1037.  
  1038.   MODIFY_REG(*preg, DAC_DHR12R1_DACC1DHR, Data);
  1039. }
  1040.  
  1041. /**
  1042.   * @brief  Set the data to be loaded in the data holding register
  1043.   *         in format 12 bits left alignment (MSB aligned on bit 15),
  1044.   *         for the selected DAC channel.
  1045.   * @rmtoll DHR12L1  DACC1DHR       LL_DAC_ConvertData12LeftAligned\n
  1046.   *         DHR12L2  DACC2DHR       LL_DAC_ConvertData12LeftAligned
  1047.   * @param  DACx DAC instance
  1048.   * @param  DAC_Channel This parameter can be one of the following values:
  1049.   *         @arg @ref LL_DAC_CHANNEL_1
  1050.   *         @arg @ref LL_DAC_CHANNEL_2
  1051.   * @param  Data Value between Min_Data=0x000 and Max_Data=0xFFF
  1052.   * @retval None
  1053.   */
  1054. __STATIC_INLINE void LL_DAC_ConvertData12LeftAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
  1055. {
  1056.   __IO uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, (DAC_Channel >> DAC_REG_DHR12LX_REGOFFSET_BITOFFSET_POS)
  1057.                                              & DAC_REG_DHR_REGOFFSET_MASK_POSBIT0);
  1058.  
  1059.   MODIFY_REG(*preg, DAC_DHR12L1_DACC1DHR, Data);
  1060. }
  1061.  
  1062. /**
  1063.   * @brief  Set the data to be loaded in the data holding register
  1064.   *         in format 8 bits left alignment (LSB aligned on bit 0),
  1065.   *         for the selected DAC channel.
  1066.   * @rmtoll DHR8R1   DACC1DHR       LL_DAC_ConvertData8RightAligned\n
  1067.   *         DHR8R2   DACC2DHR       LL_DAC_ConvertData8RightAligned
  1068.   * @param  DACx DAC instance
  1069.   * @param  DAC_Channel This parameter can be one of the following values:
  1070.   *         @arg @ref LL_DAC_CHANNEL_1
  1071.   *         @arg @ref LL_DAC_CHANNEL_2
  1072.   * @param  Data Value between Min_Data=0x00 and Max_Data=0xFF
  1073.   * @retval None
  1074.   */
  1075. __STATIC_INLINE void LL_DAC_ConvertData8RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
  1076. {
  1077.   __IO uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, (DAC_Channel >> DAC_REG_DHR8RX_REGOFFSET_BITOFFSET_POS)
  1078.                                              & DAC_REG_DHR_REGOFFSET_MASK_POSBIT0);
  1079.  
  1080.   MODIFY_REG(*preg, DAC_DHR8R1_DACC1DHR, Data);
  1081. }
  1082.  
  1083.  
  1084. /**
  1085.   * @brief  Set the data to be loaded in the data holding register
  1086.   *         in format 12 bits left alignment (LSB aligned on bit 0),
  1087.   *         for both DAC channels.
  1088.   * @rmtoll DHR12RD  DACC1DHR       LL_DAC_ConvertDualData12RightAligned\n
  1089.   *         DHR12RD  DACC2DHR       LL_DAC_ConvertDualData12RightAligned
  1090.   * @param  DACx DAC instance
  1091.   * @param  DataChannel1 Value between Min_Data=0x000 and Max_Data=0xFFF
  1092.   * @param  DataChannel2 Value between Min_Data=0x000 and Max_Data=0xFFF
  1093.   * @retval None
  1094.   */
  1095. __STATIC_INLINE void LL_DAC_ConvertDualData12RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1,
  1096.                                                           uint32_t DataChannel2)
  1097. {
  1098.   MODIFY_REG(DACx->DHR12RD,
  1099.              (DAC_DHR12RD_DACC2DHR | DAC_DHR12RD_DACC1DHR),
  1100.              ((DataChannel2 << DAC_DHR12RD_DACC2DHR_BITOFFSET_POS) | DataChannel1));
  1101. }
  1102.  
  1103. /**
  1104.   * @brief  Set the data to be loaded in the data holding register
  1105.   *         in format 12 bits left alignment (MSB aligned on bit 15),
  1106.   *         for both DAC channels.
  1107.   * @rmtoll DHR12LD  DACC1DHR       LL_DAC_ConvertDualData12LeftAligned\n
  1108.   *         DHR12LD  DACC2DHR       LL_DAC_ConvertDualData12LeftAligned
  1109.   * @param  DACx DAC instance
  1110.   * @param  DataChannel1 Value between Min_Data=0x000 and Max_Data=0xFFF
  1111.   * @param  DataChannel2 Value between Min_Data=0x000 and Max_Data=0xFFF
  1112.   * @retval None
  1113.   */
  1114. __STATIC_INLINE void LL_DAC_ConvertDualData12LeftAligned(DAC_TypeDef *DACx, uint32_t DataChannel1,
  1115.                                                          uint32_t DataChannel2)
  1116. {
  1117.   /* Note: Data of DAC channel 2 shift value subtracted of 4 because          */
  1118.   /*       data on 16 bits and DAC channel 2 bits field is on the 12 MSB,     */
  1119.   /*       the 4 LSB must be taken into account for the shift value.          */
  1120.   MODIFY_REG(DACx->DHR12LD,
  1121.              (DAC_DHR12LD_DACC2DHR | DAC_DHR12LD_DACC1DHR),
  1122.              ((DataChannel2 << (DAC_DHR12LD_DACC2DHR_BITOFFSET_POS - 4U)) | DataChannel1));
  1123. }
  1124.  
  1125. /**
  1126.   * @brief  Set the data to be loaded in the data holding register
  1127.   *         in format 8 bits left alignment (LSB aligned on bit 0),
  1128.   *         for both DAC channels.
  1129.   * @rmtoll DHR8RD  DACC1DHR       LL_DAC_ConvertDualData8RightAligned\n
  1130.   *         DHR8RD  DACC2DHR       LL_DAC_ConvertDualData8RightAligned
  1131.   * @param  DACx DAC instance
  1132.   * @param  DataChannel1 Value between Min_Data=0x00 and Max_Data=0xFF
  1133.   * @param  DataChannel2 Value between Min_Data=0x00 and Max_Data=0xFF
  1134.   * @retval None
  1135.   */
  1136. __STATIC_INLINE void LL_DAC_ConvertDualData8RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1,
  1137.                                                          uint32_t DataChannel2)
  1138. {
  1139.   MODIFY_REG(DACx->DHR8RD,
  1140.              (DAC_DHR8RD_DACC2DHR | DAC_DHR8RD_DACC1DHR),
  1141.              ((DataChannel2 << DAC_DHR8RD_DACC2DHR_BITOFFSET_POS) | DataChannel1));
  1142. }
  1143.  
  1144.  
  1145. /**
  1146.   * @brief  Retrieve output data currently generated for the selected DAC channel.
  1147.   * @note   Whatever alignment and resolution settings
  1148.   *         (using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()":
  1149.   *         @ref LL_DAC_ConvertData12RightAligned(), ...),
  1150.   *         output data format is 12 bits right aligned (LSB aligned on bit 0).
  1151.   * @rmtoll DOR1     DACC1DOR       LL_DAC_RetrieveOutputData\n
  1152.   *         DOR2     DACC2DOR       LL_DAC_RetrieveOutputData
  1153.   * @param  DACx DAC instance
  1154.   * @param  DAC_Channel This parameter can be one of the following values:
  1155.   *         @arg @ref LL_DAC_CHANNEL_1
  1156.   *         @arg @ref LL_DAC_CHANNEL_2
  1157.   * @retval Value between Min_Data=0x000 and Max_Data=0xFFF
  1158.   */
  1159. __STATIC_INLINE uint32_t LL_DAC_RetrieveOutputData(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
  1160. {
  1161.   __IO uint32_t const *preg = __DAC_PTR_REG_OFFSET(DACx->DOR1, (DAC_Channel >> DAC_REG_DORX_REGOFFSET_BITOFFSET_POS)
  1162.                                                    & DAC_REG_DORX_REGOFFSET_MASK_POSBIT0);
  1163.  
  1164.   return (uint16_t) READ_BIT(*preg, DAC_DOR1_DACC1DOR);
  1165. }
  1166.  
  1167. /**
  1168.   * @}
  1169.   */
  1170.  
  1171. /** @defgroup DAC_LL_EF_FLAG_Management FLAG Management
  1172.   * @{
  1173.   */
  1174.  
  1175. #if defined(DAC_SR_DMAUDR1)
  1176. /**
  1177.   * @brief  Get DAC underrun flag for DAC channel 1
  1178.   * @rmtoll SR       DMAUDR1        LL_DAC_IsActiveFlag_DMAUDR1
  1179.   * @param  DACx DAC instance
  1180.   * @retval State of bit (1 or 0).
  1181.   */
  1182. __STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR1(const DAC_TypeDef *DACx)
  1183. {
  1184.   return ((READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR1) == (LL_DAC_FLAG_DMAUDR1)) ? 1UL : 0UL);
  1185. }
  1186. #endif /* DAC_SR_DMAUDR1 */
  1187.  
  1188. #if defined(DAC_SR_DMAUDR2)
  1189. /**
  1190.   * @brief  Get DAC underrun flag for DAC channel 2
  1191.   * @rmtoll SR       DMAUDR2        LL_DAC_IsActiveFlag_DMAUDR2
  1192.   * @param  DACx DAC instance
  1193.   * @retval State of bit (1 or 0).
  1194.   */
  1195. __STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR2(const DAC_TypeDef *DACx)
  1196. {
  1197.   return ((READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR2) == (LL_DAC_FLAG_DMAUDR2)) ? 1UL : 0UL);
  1198. }
  1199. #endif /* DAC_SR_DMAUDR2 */
  1200.  
  1201. #if defined(DAC_SR_DMAUDR1)
  1202. /**
  1203.   * @brief  Clear DAC underrun flag for DAC channel 1
  1204.   * @rmtoll SR       DMAUDR1        LL_DAC_ClearFlag_DMAUDR1
  1205.   * @param  DACx DAC instance
  1206.   * @retval None
  1207.   */
  1208. __STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR1(DAC_TypeDef *DACx)
  1209. {
  1210.   WRITE_REG(DACx->SR, LL_DAC_FLAG_DMAUDR1);
  1211. }
  1212. #endif /* DAC_SR_DMAUDR1 */
  1213.  
  1214. #if defined(DAC_SR_DMAUDR2)
  1215. /**
  1216.   * @brief  Clear DAC underrun flag for DAC channel 2
  1217.   * @rmtoll SR       DMAUDR2        LL_DAC_ClearFlag_DMAUDR2
  1218.   * @param  DACx DAC instance
  1219.   * @retval None
  1220.   */
  1221. __STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR2(DAC_TypeDef *DACx)
  1222. {
  1223.   WRITE_REG(DACx->SR, LL_DAC_FLAG_DMAUDR2);
  1224. }
  1225. #endif /* DAC_SR_DMAUDR2 */
  1226.  
  1227. /**
  1228.   * @}
  1229.   */
  1230.  
  1231. /** @defgroup DAC_LL_EF_IT_Management IT management
  1232.   * @{
  1233.   */
  1234.  
  1235. #if defined(DAC_CR_DMAUDRIE1)
  1236. /**
  1237.   * @brief  Enable DMA underrun interrupt for DAC channel 1
  1238.   * @rmtoll CR       DMAUDRIE1      LL_DAC_EnableIT_DMAUDR1
  1239.   * @param  DACx DAC instance
  1240.   * @retval None
  1241.   */
  1242. __STATIC_INLINE void LL_DAC_EnableIT_DMAUDR1(DAC_TypeDef *DACx)
  1243. {
  1244.   SET_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1);
  1245. }
  1246. #endif /* DAC_CR_DMAUDRIE1 */
  1247.  
  1248. #if defined(DAC_CR_DMAUDRIE2)
  1249. /**
  1250.   * @brief  Enable DMA underrun interrupt for DAC channel 2
  1251.   * @rmtoll CR       DMAUDRIE2      LL_DAC_EnableIT_DMAUDR2
  1252.   * @param  DACx DAC instance
  1253.   * @retval None
  1254.   */
  1255. __STATIC_INLINE void LL_DAC_EnableIT_DMAUDR2(DAC_TypeDef *DACx)
  1256. {
  1257.   SET_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2);
  1258. }
  1259. #endif /* DAC_CR_DMAUDRIE2 */
  1260.  
  1261. #if defined(DAC_CR_DMAUDRIE1)
  1262. /**
  1263.   * @brief  Disable DMA underrun interrupt for DAC channel 1
  1264.   * @rmtoll CR       DMAUDRIE1      LL_DAC_DisableIT_DMAUDR1
  1265.   * @param  DACx DAC instance
  1266.   * @retval None
  1267.   */
  1268. __STATIC_INLINE void LL_DAC_DisableIT_DMAUDR1(DAC_TypeDef *DACx)
  1269. {
  1270.   CLEAR_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1);
  1271. }
  1272. #endif /* DAC_CR_DMAUDRIE1 */
  1273.  
  1274. #if defined(DAC_CR_DMAUDRIE2)
  1275. /**
  1276.   * @brief  Disable DMA underrun interrupt for DAC channel 2
  1277.   * @rmtoll CR       DMAUDRIE2      LL_DAC_DisableIT_DMAUDR2
  1278.   * @param  DACx DAC instance
  1279.   * @retval None
  1280.   */
  1281. __STATIC_INLINE void LL_DAC_DisableIT_DMAUDR2(DAC_TypeDef *DACx)
  1282. {
  1283.   CLEAR_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2);
  1284. }
  1285. #endif /* DAC_CR_DMAUDRIE2 */
  1286.  
  1287. #if defined(DAC_CR_DMAUDRIE1)
  1288. /**
  1289.   * @brief  Get DMA underrun interrupt for DAC channel 1
  1290.   * @rmtoll CR       DMAUDRIE1      LL_DAC_IsEnabledIT_DMAUDR1
  1291.   * @param  DACx DAC instance
  1292.   * @retval State of bit (1 or 0).
  1293.   */
  1294. __STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR1(const DAC_TypeDef *DACx)
  1295. {
  1296.   return ((READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1) == (LL_DAC_IT_DMAUDRIE1)) ? 1UL : 0UL);
  1297. }
  1298. #endif /* DAC_CR_DMAUDRIE1 */
  1299.  
  1300. #if defined(DAC_CR_DMAUDRIE2)
  1301. /**
  1302.   * @brief  Get DMA underrun interrupt for DAC channel 2
  1303.   * @rmtoll CR       DMAUDRIE2      LL_DAC_IsEnabledIT_DMAUDR2
  1304.   * @param  DACx DAC instance
  1305.   * @retval State of bit (1 or 0).
  1306.   */
  1307. __STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR2(const DAC_TypeDef *DACx)
  1308. {
  1309.   return ((READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2) == (LL_DAC_IT_DMAUDRIE2)) ? 1UL : 0UL);
  1310. }
  1311. #endif /* DAC_CR_DMAUDRIE2 */
  1312.  
  1313. /**
  1314.   * @}
  1315.   */
  1316.  
  1317. #if defined(USE_FULL_LL_DRIVER)
  1318. /** @defgroup DAC_LL_EF_Init Initialization and de-initialization functions
  1319.   * @{
  1320.   */
  1321.  
  1322. ErrorStatus LL_DAC_DeInit(const DAC_TypeDef *DACx);
  1323. ErrorStatus LL_DAC_Init(DAC_TypeDef *DACx, uint32_t DAC_Channel, const LL_DAC_InitTypeDef *DAC_InitStruct);
  1324. void        LL_DAC_StructInit(LL_DAC_InitTypeDef *DAC_InitStruct);
  1325.  
  1326. /**
  1327.   * @}
  1328.   */
  1329. #endif /* USE_FULL_LL_DRIVER */
  1330.  
  1331. /**
  1332.   * @}
  1333.   */
  1334.  
  1335. /**
  1336.   * @}
  1337.   */
  1338.  
  1339. #endif /* DAC */
  1340.  
  1341. /**
  1342.   * @}
  1343.   */
  1344.  
  1345. #ifdef __cplusplus
  1346. }
  1347. #endif
  1348.  
  1349. #endif /* STM32F1xx_LL_DAC_H */
  1350.