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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32f1xx_hal_pcd.h
  4.   * @author  MCD Application Team
  5.   * @brief   Header file of PCD HAL module.
  6.   ******************************************************************************
  7.   * @attention
  8.   *
  9.   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  10.   * All rights reserved.</center></h2>
  11.   *
  12.   * This software component is licensed by ST under BSD 3-Clause license,
  13.   * the "License"; You may not use this file except in compliance with the
  14.   * License. You may obtain a copy of the License at:
  15.   *                        opensource.org/licenses/BSD-3-Clause
  16.   *
  17.   ******************************************************************************
  18.   */
  19.  
  20. /* Define to prevent recursive inclusion -------------------------------------*/
  21. #ifndef STM32F1xx_HAL_PCD_H
  22. #define STM32F1xx_HAL_PCD_H
  23.  
  24. #ifdef __cplusplus
  25. extern "C" {
  26. #endif
  27.  
  28. /* Includes ------------------------------------------------------------------*/
  29. #include "stm32f1xx_ll_usb.h"
  30.  
  31. #if defined (USB) || defined (USB_OTG_FS)
  32.  
  33. /** @addtogroup STM32F1xx_HAL_Driver
  34.   * @{
  35.   */
  36.  
  37. /** @addtogroup PCD
  38.   * @{
  39.   */
  40.  
  41. /* Exported types ------------------------------------------------------------*/
  42. /** @defgroup PCD_Exported_Types PCD Exported Types
  43.   * @{
  44.   */
  45.  
  46. /**
  47.   * @brief  PCD State structure definition
  48.   */
  49. typedef enum
  50. {
  51.   HAL_PCD_STATE_RESET   = 0x00,
  52.   HAL_PCD_STATE_READY   = 0x01,
  53.   HAL_PCD_STATE_ERROR   = 0x02,
  54.   HAL_PCD_STATE_BUSY    = 0x03,
  55.   HAL_PCD_STATE_TIMEOUT = 0x04
  56. } PCD_StateTypeDef;
  57.  
  58. /* Device LPM suspend state */
  59. typedef enum
  60. {
  61.   LPM_L0 = 0x00, /* on */
  62.   LPM_L1 = 0x01, /* LPM L1 sleep */
  63.   LPM_L2 = 0x02, /* suspend */
  64.   LPM_L3 = 0x03, /* off */
  65. } PCD_LPM_StateTypeDef;
  66.  
  67. typedef enum
  68. {
  69.   PCD_LPM_L0_ACTIVE = 0x00, /* on */
  70.   PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
  71. } PCD_LPM_MsgTypeDef;
  72.  
  73. typedef enum
  74. {
  75.   PCD_BCD_ERROR                     = 0xFF,
  76.   PCD_BCD_CONTACT_DETECTION         = 0xFE,
  77.   PCD_BCD_STD_DOWNSTREAM_PORT       = 0xFD,
  78.   PCD_BCD_CHARGING_DOWNSTREAM_PORT  = 0xFC,
  79.   PCD_BCD_DEDICATED_CHARGING_PORT   = 0xFB,
  80.   PCD_BCD_DISCOVERY_COMPLETED       = 0x00,
  81.  
  82. } PCD_BCD_MsgTypeDef;
  83.  
  84. #if defined (USB)
  85.  
  86. #endif /* defined (USB) */
  87. #if defined (USB_OTG_FS)
  88. typedef USB_OTG_GlobalTypeDef  PCD_TypeDef;
  89. typedef USB_OTG_CfgTypeDef     PCD_InitTypeDef;
  90. typedef USB_OTG_EPTypeDef      PCD_EPTypeDef;
  91. #endif /* defined (USB_OTG_FS) */
  92. #if defined (USB)
  93. typedef USB_TypeDef        PCD_TypeDef;
  94. typedef USB_CfgTypeDef     PCD_InitTypeDef;
  95. typedef USB_EPTypeDef      PCD_EPTypeDef;
  96. #endif /* defined (USB) */
  97.  
  98. /**
  99.   * @brief  PCD Handle Structure definition
  100.   */
  101. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  102. typedef struct __PCD_HandleTypeDef
  103. #else
  104. typedef struct
  105. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  106. {
  107.   PCD_TypeDef             *Instance;   /*!< Register base address             */
  108.   PCD_InitTypeDef         Init;        /*!< PCD required parameters           */
  109.   __IO uint8_t            USB_Address; /*!< USB Address                       */
  110. #if defined (USB_OTG_FS)
  111.   PCD_EPTypeDef           IN_ep[16];   /*!< IN endpoint parameters            */
  112.   PCD_EPTypeDef           OUT_ep[16];  /*!< OUT endpoint parameters           */
  113. #endif /* defined (USB_OTG_FS) */
  114. #if defined (USB)
  115.   PCD_EPTypeDef           IN_ep[8];   /*!< IN endpoint parameters             */
  116.   PCD_EPTypeDef           OUT_ep[8];  /*!< OUT endpoint parameters            */
  117. #endif /* defined (USB) */
  118.   HAL_LockTypeDef         Lock;        /*!< PCD peripheral status             */
  119.   __IO PCD_StateTypeDef   State;       /*!< PCD communication state           */
  120.   __IO  uint32_t          ErrorCode;   /*!< PCD Error code                    */
  121.   uint32_t                Setup[12];   /*!< Setup packet buffer               */
  122.   PCD_LPM_StateTypeDef    LPM_State;   /*!< LPM State                         */
  123.   uint32_t                BESL;
  124.  
  125.   void                    *pData;      /*!< Pointer to upper stack Handler */
  126.  
  127. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  128.   void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd);                              /*!< USB OTG PCD SOF callback                */
  129.   void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Setup Stage callback        */
  130.   void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd);                            /*!< USB OTG PCD Reset callback              */
  131.   void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Suspend callback            */
  132.   void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd);                           /*!< USB OTG PCD Resume callback             */
  133.   void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Connect callback            */
  134.   void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Disconnect callback         */
  135.  
  136.   void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);      /*!< USB OTG PCD Data OUT Stage callback     */
  137.   void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);       /*!< USB OTG PCD Data IN Stage callback      */
  138.   void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);  /*!< USB OTG PCD ISO OUT Incomplete callback */
  139.   void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);   /*!< USB OTG PCD ISO IN Incomplete callback  */
  140.  
  141.   void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Msp Init callback           */
  142.   void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd);                        /*!< USB OTG PCD Msp DeInit callback         */
  143. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  144. } PCD_HandleTypeDef;
  145.  
  146. /**
  147.   * @}
  148.   */
  149.  
  150. /* Include PCD HAL Extended module */
  151. #include "stm32f1xx_hal_pcd_ex.h"
  152.  
  153. /* Exported constants --------------------------------------------------------*/
  154. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  155.   * @{
  156.   */
  157.  
  158. /** @defgroup PCD_Speed PCD Speed
  159.   * @{
  160.   */
  161. #define PCD_SPEED_FULL               USBD_FS_SPEED
  162. /**
  163.   * @}
  164.   */
  165.  
  166. /** @defgroup PCD_PHY_Module PCD PHY Module
  167.   * @{
  168.   */
  169. #define PCD_PHY_ULPI                 1U
  170. #define PCD_PHY_EMBEDDED             2U
  171. #define PCD_PHY_UTMI                 3U
  172. /**
  173.   * @}
  174.   */
  175.  
  176. /** @defgroup PCD_Error_Code_definition PCD Error Code definition
  177.   * @brief  PCD Error Code definition
  178.   * @{
  179.   */
  180. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  181. #define  HAL_PCD_ERROR_INVALID_CALLBACK                        (0x00000010U)    /*!< Invalid Callback error  */
  182. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  183.  
  184. /**
  185.   * @}
  186.   */
  187.  
  188. /**
  189.   * @}
  190.   */
  191.  
  192. /* Exported macros -----------------------------------------------------------*/
  193. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  194.   *  @brief macros to handle interrupts and specific clock configurations
  195.   * @{
  196.   */
  197. #if defined (USB_OTG_FS)
  198. #define __HAL_PCD_ENABLE(__HANDLE__)                       (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  199. #define __HAL_PCD_DISABLE(__HANDLE__)                      (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  200.  
  201. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)      ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  202. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)    (((__HANDLE__)->Instance->GINTSTS) &=  (__INTERRUPT__))
  203. #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__)         (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
  204.  
  205.  
  206. #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__)       *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= ~(USB_OTG_PCGCCTL_STOPCLK)
  207.  
  208. #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__)         *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
  209.  
  210. #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__)      ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
  211.  
  212. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT()    EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE
  213. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT()   EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
  214. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG()     EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
  215. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG()   EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
  216.  
  217. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  218.   do { \
  219.     EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
  220.     EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
  221.   } while(0U)
  222. #endif /* defined (USB_OTG_FS) */
  223.  
  224. #if defined (USB)
  225. #define __HAL_PCD_ENABLE(__HANDLE__)                                  (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  226. #define __HAL_PCD_DISABLE(__HANDLE__)                                 (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  227. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)                 ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  228. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)               (((__HANDLE__)->Instance->ISTR) &= (uint16_t)(~(__INTERRUPT__)))
  229.  
  230. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT()                             EXTI->IMR |= USB_WAKEUP_EXTI_LINE
  231. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT()                            EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
  232. #define __HAL_USB_WAKEUP_EXTI_GET_FLAG()                              EXTI->PR & (USB_WAKEUP_EXTI_LINE)
  233. #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG()                            EXTI->PR = USB_WAKEUP_EXTI_LINE
  234.  
  235. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  236.   do { \
  237.     EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  238.     EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
  239.   } while(0U)
  240.  
  241. #endif /* defined (USB) */
  242.  
  243. /**
  244.   * @}
  245.   */
  246.  
  247. /* Exported functions --------------------------------------------------------*/
  248. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  249.   * @{
  250.   */
  251.  
  252. /* Initialization/de-initialization functions  ********************************/
  253. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  254.   * @{
  255.   */
  256. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  257. HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
  258. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  259. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  260.  
  261. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  262. /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
  263.   * @brief  HAL USB OTG PCD Callback ID enumeration definition
  264.   * @{
  265.   */
  266. typedef enum
  267. {
  268.   HAL_PCD_SOF_CB_ID          = 0x01,      /*!< USB PCD SOF callback ID          */
  269.   HAL_PCD_SETUPSTAGE_CB_ID   = 0x02,      /*!< USB PCD Setup Stage callback ID  */
  270.   HAL_PCD_RESET_CB_ID        = 0x03,      /*!< USB PCD Reset callback ID        */
  271.   HAL_PCD_SUSPEND_CB_ID      = 0x04,      /*!< USB PCD Suspend callback ID      */
  272.   HAL_PCD_RESUME_CB_ID       = 0x05,      /*!< USB PCD Resume callback ID       */
  273.   HAL_PCD_CONNECT_CB_ID      = 0x06,      /*!< USB PCD Connect callback ID      */
  274.   HAL_PCD_DISCONNECT_CB_ID   = 0x07,      /*!< USB PCD Disconnect callback ID   */
  275.  
  276.   HAL_PCD_MSPINIT_CB_ID      = 0x08,      /*!< USB PCD MspInit callback ID      */
  277.   HAL_PCD_MSPDEINIT_CB_ID    = 0x09       /*!< USB PCD MspDeInit callback ID    */
  278.  
  279. } HAL_PCD_CallbackIDTypeDef;
  280. /**
  281.   * @}
  282.   */
  283.  
  284. /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
  285.   * @brief  HAL USB OTG PCD Callback pointer definition
  286.   * @{
  287.   */
  288.  
  289. typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd);                                   /*!< pointer to a common USB OTG PCD callback function  */
  290. typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD Data OUT Stage callback     */
  291. typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD Data IN Stage callback      */
  292. typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
  293. typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD ISO IN Incomplete callback  */
  294.  
  295. /**
  296.   * @}
  297.   */
  298.  
  299. HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd,
  300.                                            HAL_PCD_CallbackIDTypeDef CallbackID,
  301.                                            pPCD_CallbackTypeDef pCallback);
  302.  
  303. HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd,
  304.                                              HAL_PCD_CallbackIDTypeDef CallbackID);
  305.  
  306. HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
  307.                                                        pPCD_DataOutStageCallbackTypeDef pCallback);
  308.  
  309. HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
  310.  
  311. HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
  312.                                                       pPCD_DataInStageCallbackTypeDef pCallback);
  313.  
  314. HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
  315.  
  316. HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
  317.                                                        pPCD_IsoOutIncpltCallbackTypeDef pCallback);
  318.  
  319. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
  320.  
  321. HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
  322.                                                       pPCD_IsoInIncpltCallbackTypeDef pCallback);
  323.  
  324. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
  325.  
  326. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  327. /**
  328.   * @}
  329.   */
  330.  
  331. /* I/O operation functions  ***************************************************/
  332. /* Non-Blocking mode: Interrupt */
  333. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
  334.   * @{
  335.   */
  336. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  337. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  338. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  339. void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd);
  340.  
  341. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  342. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  343. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  344. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  345. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  346. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  347. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  348.  
  349. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  350. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  351. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  352. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  353. /**
  354.   * @}
  355.   */
  356.  
  357. /* Peripheral Control functions  **********************************************/
  358. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  359.   * @{
  360.   */
  361. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  362. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  363. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  364. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
  365.                                   uint16_t ep_mps, uint8_t ep_type);
  366.  
  367. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  368. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
  369.                                      uint8_t *pBuf, uint32_t len);
  370.  
  371. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
  372.                                       uint8_t *pBuf, uint32_t len);
  373.  
  374.  
  375. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  376. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  377. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  378. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  379. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  380.  
  381. uint32_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  382. /**
  383.   * @}
  384.   */
  385.  
  386. /* Peripheral State functions  ************************************************/
  387. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  388.   * @{
  389.   */
  390. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  391. /**
  392.   * @}
  393.   */
  394.  
  395. /**
  396.   * @}
  397.   */
  398.  
  399. /* Private constants ---------------------------------------------------------*/
  400. /** @defgroup PCD_Private_Constants PCD Private Constants
  401.   * @{
  402.   */
  403. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  404.   * @{
  405.   */
  406. #if defined (USB_OTG_FS)
  407. #define USB_OTG_FS_WAKEUP_EXTI_LINE                                   (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
  408. #endif /* defined (USB_OTG_FS) */
  409.  
  410. #if defined (USB)
  411. #define USB_WAKEUP_EXTI_LINE                                          (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
  412. #endif /* defined (USB) */
  413.  
  414. /**
  415.   * @}
  416.   */
  417. #if defined (USB)
  418. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  419.   * @{
  420.   */
  421. #define PCD_EP0MPS_64                                                 EP_MPS_64
  422. #define PCD_EP0MPS_32                                                 EP_MPS_32
  423. #define PCD_EP0MPS_16                                                 EP_MPS_16
  424. #define PCD_EP0MPS_08                                                 EP_MPS_8
  425. /**
  426.   * @}
  427.   */
  428.  
  429. /** @defgroup PCD_ENDP PCD ENDP
  430.   * @{
  431.   */
  432. #define PCD_ENDP0                                                     0U
  433. #define PCD_ENDP1                                                     1U
  434. #define PCD_ENDP2                                                     2U
  435. #define PCD_ENDP3                                                     3U
  436. #define PCD_ENDP4                                                     4U
  437. #define PCD_ENDP5                                                     5U
  438. #define PCD_ENDP6                                                     6U
  439. #define PCD_ENDP7                                                     7U
  440. /**
  441.   * @}
  442.   */
  443.  
  444. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  445.   * @{
  446.   */
  447. #define PCD_SNG_BUF                                                   0U
  448. #define PCD_DBL_BUF                                                   1U
  449. /**
  450.   * @}
  451.   */
  452. #endif /* defined (USB) */
  453. /**
  454.   * @}
  455.   */
  456.  
  457. #if defined (USB_OTG_FS)
  458. #ifndef USB_OTG_DOEPINT_OTEPSPR
  459. #define USB_OTG_DOEPINT_OTEPSPR                (0x1UL << 5)      /*!< Status Phase Received interrupt */
  460. #endif
  461.  
  462. #ifndef USB_OTG_DOEPMSK_OTEPSPRM
  463. #define USB_OTG_DOEPMSK_OTEPSPRM               (0x1UL << 5)      /*!< Setup Packet Received interrupt mask */
  464. #endif
  465.  
  466. #ifndef USB_OTG_DOEPINT_NAK
  467. #define USB_OTG_DOEPINT_NAK                    (0x1UL << 13)      /*!< NAK interrupt */
  468. #endif
  469.  
  470. #ifndef USB_OTG_DOEPMSK_NAKM
  471. #define USB_OTG_DOEPMSK_NAKM                   (0x1UL << 13)      /*!< OUT Packet NAK interrupt mask */
  472. #endif
  473.  
  474. #ifndef USB_OTG_DOEPINT_STPKTRX
  475. #define USB_OTG_DOEPINT_STPKTRX                (0x1UL << 15)      /*!< Setup Packet Received interrupt */
  476. #endif
  477.  
  478. #ifndef USB_OTG_DOEPMSK_NYETM
  479. #define USB_OTG_DOEPMSK_NYETM                  (0x1UL << 14)      /*!< Setup Packet Received interrupt mask */
  480. #endif
  481. #endif /* defined (USB_OTG_FS) */
  482.  
  483. /* Private macros ------------------------------------------------------------*/
  484. /** @defgroup PCD_Private_Macros PCD Private Macros
  485.   * @{
  486.   */
  487. #if defined (USB)
  488. /********************  Bit definition for USB_COUNTn_RX register  *************/
  489. #define USB_CNTRX_NBLK_MSK                    (0x1FU << 10)
  490. #define USB_CNTRX_BLSIZE                      (0x1U << 15)
  491.  
  492. /* SetENDPOINT */
  493. #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue)  (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
  494.  
  495. /* GetENDPOINT */
  496. #define PCD_GET_ENDPOINT(USBx, bEpNum)             (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
  497.  
  498. /* ENDPOINT transfer */
  499. #define USB_EP0StartXfer                           USB_EPStartXfer
  500.  
  501. /**
  502.   * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
  503.   * @param  USBx USB peripheral instance register address.
  504.   * @param  bEpNum Endpoint Number.
  505.   * @param  wType Endpoint Type.
  506.   * @retval None
  507.   */
  508. #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
  509.  
  510. /**
  511.   * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
  512.   * @param  USBx USB peripheral instance register address.
  513.   * @param  bEpNum Endpoint Number.
  514.   * @retval Endpoint Type
  515.   */
  516. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  517.  
  518. /**
  519.   * @brief free buffer used from the application realizing it to the line
  520.   *         toggles bit SW_BUF in the double buffered endpoint register
  521.   * @param USBx USB device.
  522.   * @param   bEpNum, bDir
  523.   * @retval None
  524.   */
  525. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) \
  526.   do { \
  527.     if ((bDir) == 0U) \
  528.     { \
  529.       /* OUT double buffered endpoint */ \
  530.       PCD_TX_DTOG((USBx), (bEpNum)); \
  531.     } \
  532.     else if ((bDir) == 1U) \
  533.     { \
  534.       /* IN double buffered endpoint */ \
  535.       PCD_RX_DTOG((USBx), (bEpNum)); \
  536.     } \
  537.   } while(0)
  538.  
  539. /**
  540.   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
  541.   * @param  USBx USB peripheral instance register address.
  542.   * @param  bEpNum Endpoint Number.
  543.   * @param  wState new state
  544.   * @retval None
  545.   */
  546. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \
  547.   do { \
  548.     uint16_t _wRegVal; \
  549.     \
  550.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
  551.     /* toggle first bit ? */ \
  552.     if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
  553.     { \
  554.       _wRegVal ^= USB_EPTX_DTOG1; \
  555.     } \
  556.     /* toggle second bit ?  */ \
  557.     if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
  558.     { \
  559.       _wRegVal ^= USB_EPTX_DTOG2; \
  560.     } \
  561.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  562.   } while(0) /* PCD_SET_EP_TX_STATUS */
  563.  
  564. /**
  565.   * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
  566.   * @param  USBx USB peripheral instance register address.
  567.   * @param  bEpNum Endpoint Number.
  568.   * @param  wState new state
  569.   * @retval None
  570.   */
  571. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \
  572.   do { \
  573.     uint16_t _wRegVal; \
  574.     \
  575.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
  576.     /* toggle first bit ? */ \
  577.     if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
  578.     { \
  579.       _wRegVal ^= USB_EPRX_DTOG1; \
  580.     } \
  581.     /* toggle second bit ? */ \
  582.     if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
  583.     { \
  584.       _wRegVal ^= USB_EPRX_DTOG2; \
  585.     } \
  586.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  587.   } while(0) /* PCD_SET_EP_RX_STATUS */
  588.  
  589. /**
  590.   * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  591.   * @param  USBx USB peripheral instance register address.
  592.   * @param  bEpNum Endpoint Number.
  593.   * @param  wStaterx new state.
  594.   * @param  wStatetx new state.
  595.   * @retval None
  596.   */
  597. #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \
  598.   do { \
  599.     uint16_t _wRegVal; \
  600.     \
  601.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
  602.     /* toggle first bit ? */ \
  603.     if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
  604.     { \
  605.       _wRegVal ^= USB_EPRX_DTOG1; \
  606.     } \
  607.     /* toggle second bit ? */ \
  608.     if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
  609.     { \
  610.       _wRegVal ^= USB_EPRX_DTOG2; \
  611.     } \
  612.     /* toggle first bit ? */ \
  613.     if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
  614.     { \
  615.       _wRegVal ^= USB_EPTX_DTOG1; \
  616.     } \
  617.     /* toggle second bit ?  */ \
  618.     if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
  619.     { \
  620.       _wRegVal ^= USB_EPTX_DTOG2; \
  621.     } \
  622.     \
  623.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  624.   } while(0) /* PCD_SET_EP_TXRX_STATUS */
  625.  
  626. /**
  627.   * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
  628.   *         /STAT_RX[1:0])
  629.   * @param  USBx USB peripheral instance register address.
  630.   * @param  bEpNum Endpoint Number.
  631.   * @retval status
  632.   */
  633. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  634. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  635.  
  636. /**
  637.   * @brief  sets directly the VALID tx/rx-status into the endpoint register
  638.   * @param  USBx USB peripheral instance register address.
  639.   * @param  bEpNum Endpoint Number.
  640.   * @retval None
  641.   */
  642. #define PCD_SET_EP_TX_VALID(USBx, bEpNum)      (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  643. #define PCD_SET_EP_RX_VALID(USBx, bEpNum)      (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  644.  
  645. /**
  646.   * @brief  checks stall condition in an endpoint.
  647.   * @param  USBx USB peripheral instance register address.
  648.   * @param  bEpNum Endpoint Number.
  649.   * @retval TRUE = endpoint in stall condition.
  650.   */
  651. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL)
  652. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL)
  653.  
  654. /**
  655.   * @brief  set & clear EP_KIND bit.
  656.   * @param  USBx USB peripheral instance register address.
  657.   * @param  bEpNum Endpoint Number.
  658.   * @retval None
  659.   */
  660. #define PCD_SET_EP_KIND(USBx, bEpNum) \
  661.   do { \
  662.     uint16_t _wRegVal; \
  663.     \
  664.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  665.     \
  666.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
  667.   } while(0) /* PCD_SET_EP_KIND */
  668.  
  669. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) \
  670.   do { \
  671.     uint16_t _wRegVal; \
  672.     \
  673.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
  674.     \
  675.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  676.   } while(0) /* PCD_CLEAR_EP_KIND */
  677.  
  678. /**
  679.   * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
  680.   * @param  USBx USB peripheral instance register address.
  681.   * @param  bEpNum Endpoint Number.
  682.   * @retval None
  683.   */
  684. #define PCD_SET_OUT_STATUS(USBx, bEpNum)       PCD_SET_EP_KIND((USBx), (bEpNum))
  685. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)     PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  686.  
  687. /**
  688.   * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
  689.   * @param  USBx USB peripheral instance register address.
  690.   * @param  bEpNum Endpoint Number.
  691.   * @retval None
  692.   */
  693. #define PCD_SET_EP_DBUF(USBx, bEpNum)          PCD_SET_EP_KIND((USBx), (bEpNum))
  694. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum)        PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  695.  
  696. /**
  697.   * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
  698.   * @param  USBx USB peripheral instance register address.
  699.   * @param  bEpNum Endpoint Number.
  700.   * @retval None
  701.   */
  702. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \
  703.   do { \
  704.     uint16_t _wRegVal; \
  705.     \
  706.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
  707.     \
  708.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
  709.   } while(0) /* PCD_CLEAR_RX_EP_CTR */
  710.  
  711. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \
  712.   do { \
  713.     uint16_t _wRegVal; \
  714.     \
  715.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
  716.     \
  717.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
  718.   } while(0) /* PCD_CLEAR_TX_EP_CTR */
  719.  
  720. /**
  721.   * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  722.   * @param  USBx USB peripheral instance register address.
  723.   * @param  bEpNum Endpoint Number.
  724.   * @retval None
  725.   */
  726. #define PCD_RX_DTOG(USBx, bEpNum) \
  727.   do { \
  728.     uint16_t _wEPVal; \
  729.     \
  730.     _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  731.     \
  732.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
  733.   } while(0) /* PCD_RX_DTOG */
  734.  
  735. #define PCD_TX_DTOG(USBx, bEpNum) \
  736.   do { \
  737.     uint16_t _wEPVal; \
  738.     \
  739.     _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  740.     \
  741.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
  742.   } while(0) /* PCD_TX_DTOG */
  743. /**
  744.   * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  745.   * @param  USBx USB peripheral instance register address.
  746.   * @param  bEpNum Endpoint Number.
  747.   * @retval None
  748.   */
  749. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \
  750.   do { \
  751.     uint16_t _wRegVal; \
  752.     \
  753.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  754.     \
  755.     if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
  756.     { \
  757.       PCD_RX_DTOG((USBx), (bEpNum)); \
  758.     } \
  759.   } while(0) /* PCD_CLEAR_RX_DTOG */
  760.  
  761. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \
  762.   do { \
  763.     uint16_t _wRegVal; \
  764.     \
  765.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  766.     \
  767.     if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
  768.     { \
  769.       PCD_TX_DTOG((USBx), (bEpNum)); \
  770.     } \
  771.   } while(0) /* PCD_CLEAR_TX_DTOG */
  772.  
  773. /**
  774.   * @brief  Sets address in an endpoint register.
  775.   * @param  USBx USB peripheral instance register address.
  776.   * @param  bEpNum Endpoint Number.
  777.   * @param  bAddr Address.
  778.   * @retval None
  779.   */
  780. #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \
  781.   do { \
  782.     uint16_t _wRegVal; \
  783.     \
  784.     _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
  785.     \
  786.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  787.   } while(0) /* PCD_SET_EP_ADDRESS */
  788.  
  789. /**
  790.   * @brief  Gets address in an endpoint register.
  791.   * @param  USBx USB peripheral instance register address.
  792.   * @param  bEpNum Endpoint Number.
  793.   * @retval None
  794.   */
  795. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  796.  
  797. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  798. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  799.  
  800. /**
  801.   * @brief  sets address of the tx/rx buffer.
  802.   * @param  USBx USB peripheral instance register address.
  803.   * @param  bEpNum Endpoint Number.
  804.   * @param  wAddr address to be set (must be word aligned).
  805.   * @retval None
  806.   */
  807. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \
  808.   do { \
  809.     __IO uint16_t *_wRegVal; \
  810.     uint32_t _wRegBase = (uint32_t)USBx; \
  811.     \
  812.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  813.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
  814.     *_wRegVal = ((wAddr) >> 1) << 1; \
  815.   } while(0) /* PCD_SET_EP_TX_ADDRESS */
  816.  
  817. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \
  818.   do { \
  819.     __IO uint16_t *_wRegVal; \
  820.     uint32_t _wRegBase = (uint32_t)USBx; \
  821.     \
  822.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  823.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
  824.     *_wRegVal = ((wAddr) >> 1) << 1; \
  825.   } while(0) /* PCD_SET_EP_RX_ADDRESS */
  826.  
  827. /**
  828.   * @brief  Gets address of the tx/rx buffer.
  829.   * @param  USBx USB peripheral instance register address.
  830.   * @param  bEpNum Endpoint Number.
  831.   * @retval address of the buffer.
  832.   */
  833. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  834. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  835.  
  836. /**
  837.   * @brief  Sets counter of rx buffer with no. of blocks.
  838.   * @param  pdwReg Register pointer
  839.   * @param  wCount Counter.
  840.   * @param  wNBlocks no. of Blocks.
  841.   * @retval None
  842.   */
  843. #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \
  844.   do { \
  845.     (wNBlocks) = (wCount) >> 5; \
  846.     if (((wCount) & 0x1fU) == 0U) \
  847.     { \
  848.       (wNBlocks)--; \
  849.     } \
  850.     *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
  851.   } while(0) /* PCD_CALC_BLK32 */
  852.  
  853. #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \
  854.   do { \
  855.     (wNBlocks) = (wCount) >> 1; \
  856.     if (((wCount) & 0x1U) != 0U) \
  857.     { \
  858.       (wNBlocks)++; \
  859.     } \
  860.     *(pdwReg) = (uint16_t)((wNBlocks) << 10); \
  861.   } while(0) /* PCD_CALC_BLK2 */
  862.  
  863. #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \
  864.   do { \
  865.     uint32_t wNBlocks; \
  866.     if ((wCount) == 0U) \
  867.     { \
  868.       *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \
  869.       *(pdwReg) |= USB_CNTRX_BLSIZE; \
  870.     } \
  871.     else if((wCount) <= 62U) \
  872.     { \
  873.       PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
  874.     } \
  875.     else \
  876.     { \
  877.       PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
  878.     } \
  879.   } while(0) /* PCD_SET_EP_CNT_RX_REG */
  880.  
  881. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \
  882.   do { \
  883.     uint32_t _wRegBase = (uint32_t)(USBx); \
  884.     __IO uint16_t *pdwReg; \
  885.     \
  886.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  887.     pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  888.     PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
  889.   } while(0)
  890.  
  891. /**
  892.   * @brief  sets counter for the tx/rx buffer.
  893.   * @param  USBx USB peripheral instance register address.
  894.   * @param  bEpNum Endpoint Number.
  895.   * @param  wCount Counter value.
  896.   * @retval None
  897.   */
  898. #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \
  899.   do { \
  900.     uint32_t _wRegBase = (uint32_t)(USBx); \
  901.     __IO uint16_t *_wRegVal; \
  902.     \
  903.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  904.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  905.     *_wRegVal = (uint16_t)(wCount); \
  906.   } while(0)
  907.  
  908. #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \
  909.   do { \
  910.     uint32_t _wRegBase = (uint32_t)(USBx); \
  911.     __IO uint16_t *_wRegVal; \
  912.     \
  913.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  914.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  915.     PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
  916.   } while(0)
  917.  
  918. /**
  919.   * @brief  gets counter of the tx buffer.
  920.   * @param  USBx USB peripheral instance register address.
  921.   * @param  bEpNum Endpoint Number.
  922.   * @retval Counter value
  923.   */
  924. #define PCD_GET_EP_TX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
  925. #define PCD_GET_EP_RX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
  926.  
  927. /**
  928.   * @brief  Sets buffer 0/1 address in a double buffer endpoint.
  929.   * @param  USBx USB peripheral instance register address.
  930.   * @param  bEpNum Endpoint Number.
  931.   * @param  wBuf0Addr buffer 0 address.
  932.   * @retval Counter value
  933.   */
  934. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \
  935.   do { \
  936.     PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
  937.   } while(0) /* PCD_SET_EP_DBUF0_ADDR */
  938.  
  939. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \
  940.   do { \
  941.     PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
  942.   } while(0) /* PCD_SET_EP_DBUF1_ADDR */
  943.  
  944. /**
  945.   * @brief  Sets addresses in a double buffer endpoint.
  946.   * @param  USBx USB peripheral instance register address.
  947.   * @param  bEpNum Endpoint Number.
  948.   * @param  wBuf0Addr: buffer 0 address.
  949.   * @param  wBuf1Addr = buffer 1 address.
  950.   * @retval None
  951.   */
  952. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \
  953.   do { \
  954.     PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
  955.     PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
  956.   } while(0) /* PCD_SET_EP_DBUF_ADDR */
  957.  
  958. /**
  959.   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
  960.   * @param  USBx USB peripheral instance register address.
  961.   * @param  bEpNum Endpoint Number.
  962.   * @retval None
  963.   */
  964. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum)    (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  965. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum)    (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  966.  
  967. /**
  968.   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
  969.   * @param  USBx USB peripheral instance register address.
  970.   * @param  bEpNum Endpoint Number.
  971.   * @param  bDir endpoint dir  EP_DBUF_OUT = OUT
  972.   *         EP_DBUF_IN  = IN
  973.   * @param  wCount: Counter value
  974.   * @retval None
  975.   */
  976. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \
  977.   do { \
  978.     if ((bDir) == 0U) \
  979.       /* OUT endpoint */ \
  980.     { \
  981.       PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
  982.     } \
  983.     else \
  984.     { \
  985.       if ((bDir) == 1U) \
  986.       { \
  987.         /* IN endpoint */ \
  988.         PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
  989.       } \
  990.     } \
  991.   } while(0) /* SetEPDblBuf0Count*/
  992.  
  993. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \
  994.   do { \
  995.     uint32_t _wBase = (uint32_t)(USBx); \
  996.     __IO uint16_t *_wEPRegVal; \
  997.     \
  998.     if ((bDir) == 0U) \
  999.     { \
  1000.       /* OUT endpoint */ \
  1001.       PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
  1002.     } \
  1003.     else \
  1004.     { \
  1005.       if ((bDir) == 1U) \
  1006.       { \
  1007.         /* IN endpoint */ \
  1008.         _wBase += (uint32_t)(USBx)->BTABLE; \
  1009.         _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  1010.         *_wEPRegVal = (uint16_t)(wCount); \
  1011.       } \
  1012.     } \
  1013.   } while(0) /* SetEPDblBuf1Count */
  1014.  
  1015. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \
  1016.   do { \
  1017.     PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  1018.     PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  1019.   } while(0) /* PCD_SET_EP_DBUF_CNT */
  1020.  
  1021. /**
  1022.   * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
  1023.   * @param  USBx USB peripheral instance register address.
  1024.   * @param  bEpNum Endpoint Number.
  1025.   * @retval None
  1026.   */
  1027. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum)     (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  1028. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum)     (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  1029.  
  1030. #endif /* defined (USB) */
  1031.  
  1032. /**
  1033.   * @}
  1034.   */
  1035.  
  1036. /**
  1037.   * @}
  1038.   */
  1039.  
  1040. /**
  1041.   * @}
  1042.   */
  1043. #endif /* defined (USB) || defined (USB_OTG_FS) */
  1044.  
  1045. #ifdef __cplusplus
  1046. }
  1047. #endif
  1048.  
  1049. #endif /* STM32F1xx_HAL_PCD_H */
  1050.  
  1051. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  1052.