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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32f1xx_hal_nand.h
  4.   * @author  MCD Application Team
  5.   * @brief   Header file of NAND HAL module.
  6.   ******************************************************************************
  7.   * @attention
  8.   *
  9.   * Copyright (c) 2016 STMicroelectronics.
  10.   * All rights reserved.
  11.   *
  12.   * This software is licensed under terms that can be found in the LICENSE file
  13.   * in the root directory of this software component.
  14.   * If no LICENSE file comes with this software, it is provided AS-IS.
  15.   *
  16.   ******************************************************************************
  17.   */
  18.  
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef STM32F1xx_HAL_NAND_H
  21. #define STM32F1xx_HAL_NAND_H
  22.  
  23. #ifdef __cplusplus
  24. extern "C" {
  25. #endif
  26.  
  27. #if defined(FSMC_BANK3)
  28.  
  29. /* Includes ------------------------------------------------------------------*/
  30. #include "stm32f1xx_ll_fsmc.h"
  31.  
  32. /** @addtogroup STM32F1xx_HAL_Driver
  33.   * @{
  34.   */
  35.  
  36. /** @addtogroup NAND
  37.   * @{
  38.   */
  39.  
  40. /* Exported typedef ----------------------------------------------------------*/
  41. /* Exported types ------------------------------------------------------------*/
  42. /** @defgroup NAND_Exported_Types NAND Exported Types
  43.   * @{
  44.   */
  45.  
  46. /**
  47.   * @brief  HAL NAND State structures definition
  48.   */
  49. typedef enum
  50. {
  51.   HAL_NAND_STATE_RESET     = 0x00U,  /*!< NAND not yet initialized or disabled */
  52.   HAL_NAND_STATE_READY     = 0x01U,  /*!< NAND initialized and ready for use   */
  53.   HAL_NAND_STATE_BUSY      = 0x02U,  /*!< NAND internal process is ongoing     */
  54.   HAL_NAND_STATE_ERROR     = 0x03U   /*!< NAND error state                     */
  55. } HAL_NAND_StateTypeDef;
  56.  
  57. /**
  58.   * @brief  NAND Memory electronic signature Structure definition
  59.   */
  60. typedef struct
  61. {
  62.   /*<! NAND memory electronic signature maker and device IDs */
  63.  
  64.   uint8_t Maker_Id;
  65.  
  66.   uint8_t Device_Id;
  67.  
  68.   uint8_t Third_Id;
  69.  
  70.   uint8_t Fourth_Id;
  71. } NAND_IDTypeDef;
  72.  
  73. /**
  74.   * @brief  NAND Memory address Structure definition
  75.   */
  76. typedef struct
  77. {
  78.   uint16_t Page;   /*!< NAND memory Page address  */
  79.  
  80.   uint16_t Plane;   /*!< NAND memory Zone address  */
  81.  
  82.   uint16_t Block;  /*!< NAND memory Block address */
  83.  
  84. } NAND_AddressTypeDef;
  85.  
  86. /**
  87.   * @brief  NAND Memory info Structure definition
  88.   */
  89. typedef struct
  90. {
  91.   uint32_t        PageSize;              /*!< NAND memory page (without spare area) size measured in bytes
  92.                                               for 8 bits addressing or words for 16 bits addressing             */
  93.  
  94.   uint32_t        SpareAreaSize;         /*!< NAND memory spare area size measured in bytes
  95.                                               for 8 bits addressing or words for 16 bits addressing             */
  96.  
  97.   uint32_t        BlockSize;             /*!< NAND memory block size measured in number of pages               */
  98.  
  99.   uint32_t        BlockNbr;              /*!< NAND memory number of total blocks                               */
  100.  
  101.   uint32_t        PlaneNbr;              /*!< NAND memory number of planes                                     */
  102.  
  103.   uint32_t        PlaneSize;             /*!< NAND memory zone size measured in number of blocks               */
  104.  
  105.   FunctionalState ExtraCommandEnable;    /*!< NAND extra command needed for Page reading mode. This
  106.                                               parameter is mandatory for some NAND parts after the read
  107.                                               command (NAND_CMD_AREA_TRUE1) and before DATA reading sequence.
  108.                                               This parameter could be ENABLE or DISABLE
  109.                                               Please check the Read Mode sequence in the NAND device datasheet */
  110. } NAND_DeviceConfigTypeDef;
  111.  
  112. /**
  113.   * @brief  NAND handle Structure definition
  114.   */
  115. #if (USE_HAL_NAND_REGISTER_CALLBACKS == 1)
  116. typedef struct __NAND_HandleTypeDef
  117. #else
  118. typedef struct
  119. #endif /* USE_HAL_NAND_REGISTER_CALLBACKS  */
  120. {
  121.   FSMC_NAND_TypeDef               *Instance;  /*!< Register base address                                 */
  122.  
  123.   FSMC_NAND_InitTypeDef           Init;       /*!< NAND device control configuration parameters          */
  124.  
  125.   HAL_LockTypeDef                Lock;       /*!< NAND locking object                                   */
  126.  
  127.   __IO HAL_NAND_StateTypeDef     State;      /*!< NAND device access state                              */
  128.  
  129.   NAND_DeviceConfigTypeDef       Config;     /*!< NAND physical characteristic information structure    */
  130.  
  131. #if (USE_HAL_NAND_REGISTER_CALLBACKS == 1)
  132.   void (* MspInitCallback)(struct __NAND_HandleTypeDef *hnand);               /*!< NAND Msp Init callback              */
  133.   void (* MspDeInitCallback)(struct __NAND_HandleTypeDef *hnand);             /*!< NAND Msp DeInit callback            */
  134.   void (* ItCallback)(struct __NAND_HandleTypeDef *hnand);                    /*!< NAND IT callback                    */
  135. #endif /* USE_HAL_NAND_REGISTER_CALLBACKS */
  136. } NAND_HandleTypeDef;
  137.  
  138. #if (USE_HAL_NAND_REGISTER_CALLBACKS == 1)
  139. /**
  140.   * @brief  HAL NAND Callback ID enumeration definition
  141.   */
  142. typedef enum
  143. {
  144.   HAL_NAND_MSP_INIT_CB_ID       = 0x00U,  /*!< NAND MspInit Callback ID          */
  145.   HAL_NAND_MSP_DEINIT_CB_ID     = 0x01U,  /*!< NAND MspDeInit Callback ID        */
  146.   HAL_NAND_IT_CB_ID             = 0x02U   /*!< NAND IT Callback ID               */
  147. } HAL_NAND_CallbackIDTypeDef;
  148.  
  149. /**
  150.   * @brief  HAL NAND Callback pointer definition
  151.   */
  152. typedef void (*pNAND_CallbackTypeDef)(NAND_HandleTypeDef *hnand);
  153. #endif /* USE_HAL_NAND_REGISTER_CALLBACKS */
  154.  
  155. /**
  156.   * @}
  157.   */
  158.  
  159. /* Exported constants --------------------------------------------------------*/
  160. /* Exported macro ------------------------------------------------------------*/
  161. /** @defgroup NAND_Exported_Macros NAND Exported Macros
  162.   * @{
  163.   */
  164.  
  165. /** @brief Reset NAND handle state
  166.   * @param  __HANDLE__ specifies the NAND handle.
  167.   * @retval None
  168.   */
  169. #if (USE_HAL_NAND_REGISTER_CALLBACKS == 1)
  170. #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__)         do {                                             \
  171.                                                                (__HANDLE__)->State = HAL_NAND_STATE_RESET; \
  172.                                                                (__HANDLE__)->MspInitCallback = NULL;       \
  173.                                                                (__HANDLE__)->MspDeInitCallback = NULL;     \
  174.                                                              } while(0)
  175. #else
  176. #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
  177. #endif /* USE_HAL_NAND_REGISTER_CALLBACKS */
  178.  
  179. /**
  180.   * @}
  181.   */
  182.  
  183. /* Exported functions --------------------------------------------------------*/
  184. /** @addtogroup NAND_Exported_Functions NAND Exported Functions
  185.   * @{
  186.   */
  187.  
  188. /** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
  189.   * @{
  190.   */
  191.  
  192. /* Initialization/de-initialization functions  ********************************/
  193. HAL_StatusTypeDef  HAL_NAND_Init(NAND_HandleTypeDef *hnand, FSMC_NAND_PCC_TimingTypeDef *ComSpace_Timing,
  194.                                  FSMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
  195. HAL_StatusTypeDef  HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
  196.  
  197. HAL_StatusTypeDef  HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig);
  198.  
  199. HAL_StatusTypeDef  HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);
  200.  
  201. void               HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
  202. void               HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
  203. void               HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand);
  204. void               HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
  205.  
  206. /**
  207.   * @}
  208.   */
  209.  
  210. /** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions
  211.   * @{
  212.   */
  213.  
  214. /* IO operation functions  ****************************************************/
  215. HAL_StatusTypeDef  HAL_NAND_Reset(NAND_HandleTypeDef *hnand);
  216.  
  217. HAL_StatusTypeDef  HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
  218.                                          uint8_t *pBuffer, uint32_t NumPageToRead);
  219. HAL_StatusTypeDef  HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
  220.                                           const uint8_t *pBuffer, uint32_t NumPageToWrite);
  221. HAL_StatusTypeDef  HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
  222.                                               uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
  223. HAL_StatusTypeDef  HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
  224.                                                const uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
  225.  
  226. HAL_StatusTypeDef  HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
  227.                                           uint16_t *pBuffer, uint32_t NumPageToRead);
  228. HAL_StatusTypeDef  HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
  229.                                            const uint16_t *pBuffer, uint32_t NumPageToWrite);
  230. HAL_StatusTypeDef  HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
  231.                                                uint16_t *pBuffer, uint32_t NumSpareAreaToRead);
  232. HAL_StatusTypeDef  HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
  233.                                                 const uint16_t *pBuffer, uint32_t NumSpareAreaTowrite);
  234.  
  235. HAL_StatusTypeDef  HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress);
  236.  
  237. uint32_t           HAL_NAND_Address_Inc(const NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
  238.  
  239. #if (USE_HAL_NAND_REGISTER_CALLBACKS == 1)
  240. /* NAND callback registering/unregistering */
  241. HAL_StatusTypeDef  HAL_NAND_RegisterCallback(NAND_HandleTypeDef *hnand, HAL_NAND_CallbackIDTypeDef CallbackId,
  242.                                              pNAND_CallbackTypeDef pCallback);
  243. HAL_StatusTypeDef  HAL_NAND_UnRegisterCallback(NAND_HandleTypeDef *hnand, HAL_NAND_CallbackIDTypeDef CallbackId);
  244. #endif /* USE_HAL_NAND_REGISTER_CALLBACKS */
  245.  
  246. /**
  247.   * @}
  248.   */
  249.  
  250. /** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions
  251.   * @{
  252.   */
  253.  
  254. /* NAND Control functions  ****************************************************/
  255. HAL_StatusTypeDef  HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand);
  256. HAL_StatusTypeDef  HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand);
  257. HAL_StatusTypeDef  HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);
  258.  
  259. /**
  260.   * @}
  261.   */
  262.  
  263. /** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions
  264.   * @{
  265.   */
  266. /* NAND State functions *******************************************************/
  267. HAL_NAND_StateTypeDef HAL_NAND_GetState(const NAND_HandleTypeDef *hnand);
  268. uint32_t              HAL_NAND_Read_Status(const NAND_HandleTypeDef *hnand);
  269. /**
  270.   * @}
  271.   */
  272.  
  273. /**
  274.   * @}
  275.   */
  276.  
  277. /* Private types -------------------------------------------------------------*/
  278. /* Private variables ---------------------------------------------------------*/
  279. /* Private constants ---------------------------------------------------------*/
  280. /** @defgroup NAND_Private_Constants NAND Private Constants
  281.   * @{
  282.   */
  283. #define NAND_DEVICE1               0x70000000UL
  284. #define NAND_DEVICE2               0x80000000UL
  285. #define NAND_WRITE_TIMEOUT         0x01000000UL
  286.  
  287. #define CMD_AREA                   (1UL<<16U)  /* A16 = CLE high */
  288. #define ADDR_AREA                  (1UL<<17U)  /* A17 = ALE high */
  289.  
  290. #define NAND_CMD_AREA_A            ((uint8_t)0x00)
  291. #define NAND_CMD_AREA_B            ((uint8_t)0x01)
  292. #define NAND_CMD_AREA_C            ((uint8_t)0x50)
  293. #define NAND_CMD_AREA_TRUE1        ((uint8_t)0x30)
  294.  
  295. #define NAND_CMD_WRITE0            ((uint8_t)0x80)
  296. #define NAND_CMD_WRITE_TRUE1       ((uint8_t)0x10)
  297. #define NAND_CMD_ERASE0            ((uint8_t)0x60)
  298. #define NAND_CMD_ERASE1            ((uint8_t)0xD0)
  299. #define NAND_CMD_READID            ((uint8_t)0x90)
  300. #define NAND_CMD_STATUS            ((uint8_t)0x70)
  301. #define NAND_CMD_LOCK_STATUS       ((uint8_t)0x7A)
  302. #define NAND_CMD_RESET             ((uint8_t)0xFF)
  303.  
  304. /* NAND memory status */
  305. #define NAND_VALID_ADDRESS         0x00000100UL
  306. #define NAND_INVALID_ADDRESS       0x00000200UL
  307. #define NAND_TIMEOUT_ERROR         0x00000400UL
  308. #define NAND_BUSY                  0x00000000UL
  309. #define NAND_ERROR                 0x00000001UL
  310. #define NAND_READY                 0x00000040UL
  311. /**
  312.   * @}
  313.   */
  314.  
  315. /* Private macros ------------------------------------------------------------*/
  316. /** @defgroup NAND_Private_Macros NAND Private Macros
  317.   * @{
  318.   */
  319.  
  320. /**
  321.   * @brief  NAND memory address computation.
  322.   * @param  __ADDRESS__ NAND memory address.
  323.   * @param  __HANDLE__  NAND handle.
  324.   * @retval NAND Raw address value
  325.   */
  326. #define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) ((__ADDRESS__)->Page + \
  327.                                                  (((__ADDRESS__)->Block + \
  328.                                                    (((__ADDRESS__)->Plane) * \
  329.                                                     ((__HANDLE__)->Config.PlaneSize))) * \
  330.                                                   ((__HANDLE__)->Config.BlockSize)))
  331.  
  332. /**
  333.   * @brief  NAND memory Column address computation.
  334.   * @param  __HANDLE__ NAND handle.
  335.   * @retval NAND Raw address value
  336.   */
  337. #define COLUMN_ADDRESS( __HANDLE__) ((__HANDLE__)->Config.PageSize)
  338.  
  339. /**
  340.   * @brief  NAND memory address cycling.
  341.   * @param  __ADDRESS__ NAND memory address.
  342.   * @retval NAND address cycling value.
  343.   */
  344. #define ADDR_1ST_CYCLE(__ADDRESS__)       (uint8_t)(__ADDRESS__)              /* 1st addressing cycle */
  345. #define ADDR_2ND_CYCLE(__ADDRESS__)       (uint8_t)((__ADDRESS__) >> 8)       /* 2nd addressing cycle */
  346. #define ADDR_3RD_CYCLE(__ADDRESS__)       (uint8_t)((__ADDRESS__) >> 16)      /* 3rd addressing cycle */
  347. #define ADDR_4TH_CYCLE(__ADDRESS__)       (uint8_t)((__ADDRESS__) >> 24)      /* 4th addressing cycle */
  348.  
  349. /**
  350.   * @brief  NAND memory Columns cycling.
  351.   * @param  __ADDRESS__ NAND memory address.
  352.   * @retval NAND Column address cycling value.
  353.   */
  354. #define COLUMN_1ST_CYCLE(__ADDRESS__)       (uint8_t)((__ADDRESS__) & 0xFFU)    /* 1st Column addressing cycle */
  355. #define COLUMN_2ND_CYCLE(__ADDRESS__)       (uint8_t)((__ADDRESS__) >> 8)       /* 2nd Column addressing cycle */
  356.  
  357. /**
  358.   * @}
  359.   */
  360.  
  361. /**
  362.   * @}
  363.   */
  364.  
  365. /**
  366.   * @}
  367.   */
  368.  
  369. /**
  370.   * @}
  371.   */
  372.  
  373. #endif /* FSMC_BANK3 */
  374.  
  375. #ifdef __cplusplus
  376. }
  377. #endif
  378.  
  379. #endif /* STM32F1xx_HAL_NAND_H */
  380.