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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32f1xx_hal_cec.h
  4.   * @author  MCD Application Team
  5.   * @brief   Header file of CEC HAL module.
  6.   ******************************************************************************
  7.   * @attention
  8.   *
  9.   * Copyright (c) 2016 STMicroelectronics.
  10.   * All rights reserved.
  11.   *
  12.   * This software is licensed under terms that can be found in the LICENSE file
  13.   * in the root directory of this software component.
  14.   * If no LICENSE file comes with this software, it is provided AS-IS.
  15.   *
  16.   ******************************************************************************
  17.   */
  18.  
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef __STM32F1xx_HAL_CEC_H
  21. #define __STM32F1xx_HAL_CEC_H
  22.  
  23. #ifdef __cplusplus
  24. extern "C" {
  25. #endif
  26.  
  27. /* Includes ------------------------------------------------------------------*/
  28. #include "stm32f1xx_hal_def.h"
  29.  
  30. #if defined (CEC)
  31.  
  32. /** @addtogroup STM32F1xx_HAL_Driver
  33.   * @{
  34.   */
  35.  
  36. /** @addtogroup CEC
  37.   * @{
  38.   */
  39.  
  40. /* Exported types ------------------------------------------------------------*/
  41. /** @defgroup CEC_Exported_Types CEC Exported Types
  42.   * @{
  43.   */
  44.  
  45. /**
  46.   * @brief CEC Init Structure definition
  47.   */
  48. typedef struct
  49. {
  50.   uint32_t  TimingErrorFree;             /*!< Configures the CEC Bit Timing Error Mode.
  51.                                               This parameter can be a value of CEC_BitTimingErrorMode */
  52.  
  53.   uint32_t  PeriodErrorFree;             /*!< Configures the CEC Bit Period Error Mode.
  54.                                               This parameter can be a value of CEC_BitPeriodErrorMode */
  55.  
  56.   uint16_t  OwnAddress;                  /*!< Own addresses configuration
  57.                                               This parameter can be a value of @ref CEC_OWN_ADDRESS */
  58.  
  59.   uint8_t  *RxBuffer;                    /*!< CEC Rx buffer pointer */
  60. } CEC_InitTypeDef;
  61.  
  62. /**
  63.   * @brief HAL CEC State definition
  64.   * @note  HAL CEC State value is a combination of 2 different substates: gState and RxState
  65.            (see @ref CEC_State_Definition).
  66.   *        - gState contains CEC state information related to global Handle management
  67.   *          and also information related to Tx operations.
  68.   *          gState value coding follow below described bitmap :
  69.   *          b7 (not used)
  70.   *             x  : Should be set to 0
  71.   *          b6  Error information
  72.   *             0  : No Error
  73.   *             1  : Error
  74.   *          b5     CEC peripheral initialization status
  75.   *             0  : Reset (peripheral not initialized)
  76.   *             1  : Init done (peripheral initialized. HAL CEC Init function already called)
  77.   *          b4-b3  (not used)
  78.   *             xx : Should be set to 00
  79.   *          b2     Intrinsic process state
  80.   *             0  : Ready
  81.   *             1  : Busy (peripheral busy with some configuration or internal operations)
  82.   *          b1     (not used)
  83.   *             x  : Should be set to 0
  84.   *          b0     Tx state
  85.   *             0  : Ready (no Tx operation ongoing)
  86.   *             1  : Busy (Tx operation ongoing)
  87.   *        - RxState contains information related to Rx operations.
  88.   *          RxState value coding follow below described bitmap :
  89.   *          b7-b6  (not used)
  90.   *             xx : Should be set to 00
  91.   *          b5     CEC peripheral initialization status
  92.   *             0  : Reset (peripheral not initialized)
  93.   *             1  : Init done (peripheral initialized)
  94.   *          b4-b2  (not used)
  95.   *            xxx : Should be set to 000
  96.   *          b1     Rx state
  97.   *             0  : Ready (no Rx operation ongoing)
  98.   *             1  : Busy (Rx operation ongoing)
  99.   *          b0     (not used)
  100.   *             x  : Should be set to 0.
  101.   */
  102. typedef enum
  103. {
  104.   HAL_CEC_STATE_RESET             = 0x00U,    /*!< Peripheral is not yet Initialized
  105.                                                    Value is allowed for gState and RxState             */
  106.   HAL_CEC_STATE_READY             = 0x20U,    /*!< Peripheral Initialized and ready for use
  107.                                                    Value is allowed for gState and RxState             */
  108.   HAL_CEC_STATE_BUSY              = 0x24U,    /*!< an internal process is ongoing
  109.                                                    Value is allowed for gState only                    */
  110.   HAL_CEC_STATE_BUSY_RX           = 0x22U,    /*!< Data Reception process is ongoing
  111.                                                    Value is allowed for RxState only                   */
  112.   HAL_CEC_STATE_BUSY_TX           = 0x21U,    /*!< Data Transmission process is ongoing
  113.                                                    Value is allowed for gState only                    */
  114.   HAL_CEC_STATE_BUSY_RX_TX        = 0x23U,    /*!< an internal process is ongoing
  115.                                                    Value is allowed for gState only                    */
  116.   HAL_CEC_STATE_ERROR             = 0x60U     /*!< Error Value is allowed for gState only              */
  117. } HAL_CEC_StateTypeDef;
  118.  
  119. /**
  120.   * @brief  CEC handle Structure definition
  121.   */
  122. typedef struct __CEC_HandleTypeDef
  123. {
  124.   CEC_TypeDef             *Instance;      /*!< CEC registers base address */
  125.  
  126.   CEC_InitTypeDef         Init;           /*!< CEC communication parameters */
  127.  
  128.   const uint8_t           *pTxBuffPtr;    /*!< Pointer to CEC Tx transfer Buffer */
  129.  
  130.   uint16_t                TxXferCount;    /*!< CEC Tx Transfer Counter */
  131.  
  132.   uint16_t                RxXferSize;     /*!< CEC Rx Transfer size, 0: header received only */
  133.  
  134.   HAL_LockTypeDef         Lock;           /*!< Locking object */
  135.  
  136.   HAL_CEC_StateTypeDef    gState;         /*!< CEC state information related to global Handle management
  137.                                                and also related to Tx operations.
  138.                                                This parameter can be a value of @ref HAL_CEC_StateTypeDef */
  139.  
  140.   HAL_CEC_StateTypeDef    RxState;        /*!< CEC state information related to Rx operations.
  141.                                                This parameter can be a value of @ref HAL_CEC_StateTypeDef */
  142.  
  143.   uint32_t                ErrorCode;      /*!< For errors handling purposes, copy of ISR register
  144.                                                in case error is reported */
  145.  
  146. #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
  147.   void (* TxCpltCallback)(struct __CEC_HandleTypeDef *hcec); /*!< CEC Tx Transfer completed callback */
  148.   void (* RxCpltCallback)(struct __CEC_HandleTypeDef *hcec,
  149.                           uint32_t RxFrameSize);          /*!< CEC Rx Transfer completed callback    */
  150.   void (* ErrorCallback)(struct __CEC_HandleTypeDef *hcec); /*!< CEC error callback                  */
  151.  
  152.   void (* MspInitCallback)(struct __CEC_HandleTypeDef *hcec);               /*!< CEC Msp Init callback              */
  153.   void (* MspDeInitCallback)(struct __CEC_HandleTypeDef *hcec);             /*!< CEC Msp DeInit callback            */
  154.  
  155. #endif /* (USE_HAL_CEC_REGISTER_CALLBACKS) */
  156. } CEC_HandleTypeDef;
  157.  
  158. #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
  159. /**
  160.   * @brief  HAL CEC Callback ID enumeration definition
  161.   */
  162. typedef enum
  163. {
  164.   HAL_CEC_TX_CPLT_CB_ID      = 0x00U,    /*!< CEC Tx Transfer completed callback ID  */
  165.   HAL_CEC_RX_CPLT_CB_ID      = 0x01U,    /*!< CEC Rx Transfer completed callback ID  */
  166.   HAL_CEC_ERROR_CB_ID        = 0x02U,    /*!< CEC error callback ID                  */
  167.   HAL_CEC_MSPINIT_CB_ID      = 0x03U,    /*!< CEC Msp Init callback ID               */
  168.   HAL_CEC_MSPDEINIT_CB_ID    = 0x04U     /*!< CEC Msp DeInit callback ID             */
  169. } HAL_CEC_CallbackIDTypeDef;
  170.  
  171. /**
  172.   * @brief  HAL CEC Callback pointer definition
  173.   */
  174. typedef  void (*pCEC_CallbackTypeDef)(CEC_HandleTypeDef *hcec);  /*!< pointer to an CEC callback function */
  175. typedef  void (*pCEC_RxCallbackTypeDef)(CEC_HandleTypeDef *hcec,
  176.                                         uint32_t RxFrameSize);  /*!< pointer to an Rx Transfer completed
  177.                                                                      callback function */
  178. #endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
  179. /**
  180.   * @}
  181.   */
  182.  
  183. /* Exported constants --------------------------------------------------------*/
  184. /** @defgroup CEC_Exported_Constants CEC Exported Constants
  185.   * @{
  186.   */
  187.  
  188. /** @defgroup CEC_Error_Code CEC Error Code
  189.   * @{
  190.   */
  191. #define HAL_CEC_ERROR_NONE   0x00000000U    /*!< no error */
  192. #define HAL_CEC_ERROR_BTE    CEC_ESR_BTE    /*!< Bit Timing Error */
  193. #define HAL_CEC_ERROR_BPE    CEC_ESR_BPE    /*!< Bit Period Error */
  194. #define HAL_CEC_ERROR_RBTFE  CEC_ESR_RBTFE  /*!< Rx Block Transfer Finished Error */
  195. #define HAL_CEC_ERROR_SBE    CEC_ESR_SBE    /*!< Start Bit Error */
  196. #define HAL_CEC_ERROR_ACKE   CEC_ESR_ACKE   /*!< Block Acknowledge Error */
  197. #define HAL_CEC_ERROR_LINE   CEC_ESR_LINE   /*!< Line Error */
  198. #define HAL_CEC_ERROR_TBTFE  CEC_ESR_TBTFE  /*!< Tx Block Transfer Finished Error */
  199. #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
  200. #define  HAL_CEC_ERROR_INVALID_CALLBACK ((uint32_t)0x00000080U) /*!< Invalid Callback Error  */
  201. #endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
  202. /**
  203.   * @}
  204.   */
  205.  
  206. /** @defgroup CEC_BitTimingErrorMode Bit Timing Error Mode
  207.   * @{
  208.   */
  209. #define CEC_BIT_TIMING_ERROR_MODE_STANDARD  0x00000000U      /*!< Bit timing error Standard Mode */
  210. #define CEC_BIT_TIMING_ERROR_MODE_ERRORFREE CEC_CFGR_BTEM    /*!< Bit timing error Free Mode */
  211. /**
  212.   * @}
  213.   */
  214.  
  215. /** @defgroup CEC_BitPeriodErrorMode Bit Period Error Mode
  216.   * @{
  217.   */
  218. #define CEC_BIT_PERIOD_ERROR_MODE_STANDARD 0x00000000U      /*!< Bit period error Standard Mode */
  219. #define CEC_BIT_PERIOD_ERROR_MODE_FLEXIBLE CEC_CFGR_BPEM    /*!< Bit period error Flexible Mode */
  220. /**
  221.   * @}
  222.   */
  223.  
  224. /** @defgroup CEC_Initiator_Position   CEC Initiator logical address position in message header
  225.   * @{
  226.   */
  227. #define CEC_INITIATOR_LSB_POS                  4U
  228. /**
  229.   * @}
  230.   */
  231.  
  232. /** @defgroup CEC_OWN_ADDRESS   CEC Own Address
  233.   * @{
  234.   */
  235. #define CEC_OWN_ADDRESS_NONE            CEC_OWN_ADDRESS_0    /* Reset value */
  236. #define CEC_OWN_ADDRESS_0              ((uint16_t)0x0000U)   /* Logical Address 0 */
  237. #define CEC_OWN_ADDRESS_1              ((uint16_t)0x0001U)   /* Logical Address 1 */
  238. #define CEC_OWN_ADDRESS_2              ((uint16_t)0x0002U)   /* Logical Address 2 */
  239. #define CEC_OWN_ADDRESS_3              ((uint16_t)0x0003U)   /* Logical Address 3 */
  240. #define CEC_OWN_ADDRESS_4              ((uint16_t)0x0004U)   /* Logical Address 4 */
  241. #define CEC_OWN_ADDRESS_5              ((uint16_t)0x0005U)   /* Logical Address 5 */
  242. #define CEC_OWN_ADDRESS_6              ((uint16_t)0x0006U)   /* Logical Address 6 */
  243. #define CEC_OWN_ADDRESS_7              ((uint16_t)0x0007U)   /* Logical Address 7 */
  244. #define CEC_OWN_ADDRESS_8              ((uint16_t)0x0008U)   /* Logical Address 8 */
  245. #define CEC_OWN_ADDRESS_9              ((uint16_t)0x0009U)   /* Logical Address 9 */
  246. #define CEC_OWN_ADDRESS_10             ((uint16_t)0x000AU)   /* Logical Address 10 */
  247. #define CEC_OWN_ADDRESS_11             ((uint16_t)0x000BU)   /* Logical Address 11 */
  248. #define CEC_OWN_ADDRESS_12             ((uint16_t)0x000CU)   /* Logical Address 12 */
  249. #define CEC_OWN_ADDRESS_13             ((uint16_t)0x000DU)   /* Logical Address 13 */
  250. #define CEC_OWN_ADDRESS_14             ((uint16_t)0x000EU)   /* Logical Address 14 */
  251. #define CEC_OWN_ADDRESS_15             ((uint16_t)0x000FU)   /* Logical Address 15 */
  252. /**
  253.   * @}
  254.   */
  255.  
  256. /** @defgroup CEC_Interrupts_Definitions  Interrupts definition
  257.   * @{
  258.   */
  259. #define CEC_IT_IE CEC_CFGR_IE
  260. /**
  261.   * @}
  262.   */
  263.  
  264. /** @defgroup CEC_Flags_Definitions  Flags definition
  265.   * @{
  266.   */
  267. #define CEC_FLAG_TSOM  CEC_CSR_TSOM
  268. #define CEC_FLAG_TEOM  CEC_CSR_TEOM
  269. #define CEC_FLAG_TERR  CEC_CSR_TERR
  270. #define CEC_FLAG_TBTRF CEC_CSR_TBTRF
  271. #define CEC_FLAG_RSOM  CEC_CSR_RSOM
  272. #define CEC_FLAG_REOM  CEC_CSR_REOM
  273. #define CEC_FLAG_RERR  CEC_CSR_RERR
  274. #define CEC_FLAG_RBTF  CEC_CSR_RBTF
  275. /**
  276.   * @}
  277.   */
  278.  
  279. /**
  280.   * @}
  281.   */
  282.  
  283. /* Exported macros -----------------------------------------------------------*/
  284. /** @defgroup CEC_Exported_Macros CEC Exported Macros
  285.   * @{
  286.   */
  287.  
  288. /** @brief  Reset CEC handle gstate & RxState
  289.   * @param  __HANDLE__ CEC handle.
  290.   * @retval None
  291.   */
  292. #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
  293. #define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) do{                                                   \
  294.                                                        (__HANDLE__)->gState = HAL_CEC_STATE_RESET;     \
  295.                                                        (__HANDLE__)->RxState = HAL_CEC_STATE_RESET;    \
  296.                                                        (__HANDLE__)->MspInitCallback = NULL;           \
  297.                                                        (__HANDLE__)->MspDeInitCallback = NULL;         \
  298.                                                      } while(0)
  299. #else
  300. #define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) do{                                                   \
  301.                                                        (__HANDLE__)->gState = HAL_CEC_STATE_RESET;     \
  302.                                                        (__HANDLE__)->RxState = HAL_CEC_STATE_RESET;    \
  303.                                                      } while(0)
  304. #endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
  305.  
  306. /** @brief  Checks whether or not the specified CEC interrupt flag is set.
  307.   * @param  __HANDLE__ specifies the CEC Handle.
  308.   * @param  __FLAG__ specifies the flag to check.
  309.   *     @arg CEC_FLAG_TERR: Tx Error
  310.   *     @arg CEC_FLAG_TBTRF:Tx Block Transfer Finished
  311.   *     @arg CEC_FLAG_RERR: Rx Error
  312.   *     @arg CEC_FLAG_RBTF: Rx Block Transfer Finished
  313.   * @retval ITStatus
  314.   */
  315. #define __HAL_CEC_GET_FLAG(__HANDLE__, __FLAG__) READ_BIT((__HANDLE__)->Instance->CSR,(__FLAG__))
  316.  
  317. /** @brief  Clears the CEC's pending flags.
  318.   * @param  __HANDLE__ specifies the CEC Handle.
  319.   * @param  __FLAG__ specifies the flag to clear.
  320.   *   This parameter can be any combination of the following values:
  321.   *     @arg CEC_CSR_TERR: Tx Error
  322.   *     @arg CEC_FLAG_TBTRF: Tx Block Transfer Finished
  323.   *     @arg CEC_CSR_RERR: Rx Error
  324.   *     @arg CEC_CSR_RBTF: Rx Block Transfer Finished
  325.   * @retval none
  326.   */
  327. #define __HAL_CEC_CLEAR_FLAG(__HANDLE__, __FLAG__)                                                                   \
  328.   do {                                                                                       \
  329.     uint32_t tmp = 0x0U;                                                                     \
  330.     tmp = (__HANDLE__)->Instance->CSR & 0x00000002U;                                         \
  331.     (__HANDLE__)->Instance->CSR &= (uint32_t)(((~(uint32_t)(__FLAG__)) & 0xFFFFFFFCU) | tmp);\
  332.   } while(0U)
  333.  
  334. /** @brief  Enables the specified CEC interrupt.
  335.   * @param  __HANDLE__ specifies the CEC Handle.
  336.   * @param  __INTERRUPT__ specifies the CEC interrupt to enable.
  337.   *          This parameter can be one of the following values:
  338.   *            @arg CEC_IT_IE         : Interrupt Enable.
  339.   * @retval none
  340.   */
  341. #define __HAL_CEC_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CFGR, (__INTERRUPT__))
  342.  
  343. /** @brief  Disables the specified CEC interrupt.
  344.   * @param  __HANDLE__ specifies the CEC Handle.
  345.   * @param  __INTERRUPT__ specifies the CEC interrupt to disable.
  346.   *          This parameter can be one of the following values:
  347.   *            @arg CEC_IT_IE         : Interrupt Enable
  348.   * @retval none
  349.   */
  350. #define __HAL_CEC_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, (__INTERRUPT__))
  351.  
  352. /** @brief  Checks whether or not the specified CEC interrupt is enabled.
  353.   * @param  __HANDLE__ specifies the CEC Handle.
  354.   * @param  __INTERRUPT__ specifies the CEC interrupt to check.
  355.   *          This parameter can be one of the following values:
  356.   *            @arg CEC_IT_IE         : Interrupt Enable
  357.   * @retval FlagStatus
  358.   */
  359. #define __HAL_CEC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) READ_BIT((__HANDLE__)->Instance->CFGR, (__INTERRUPT__))
  360.  
  361. /** @brief  Enables the CEC device
  362.   * @param  __HANDLE__ specifies the CEC Handle.
  363.   * @retval none
  364.   */
  365. #define __HAL_CEC_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_PE)
  366.  
  367. /** @brief  Disables the CEC device
  368.   * @param  __HANDLE__ specifies the CEC Handle.
  369.   * @retval none
  370.   */
  371. #define __HAL_CEC_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_PE)
  372.  
  373. /** @brief  Set Transmission Start flag
  374.   * @param  __HANDLE__ specifies the CEC Handle.
  375.   * @retval none
  376.   */
  377. #define __HAL_CEC_FIRST_BYTE_TX_SET(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TSOM)
  378.  
  379. /** @brief  Set Transmission End flag
  380.   * @param  __HANDLE__ specifies the CEC Handle.
  381.   * @retval none
  382.   */
  383. #define __HAL_CEC_LAST_BYTE_TX_SET(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TEOM)
  384.  
  385. /** @brief  Get Transmission Start flag
  386.   * @param  __HANDLE__ specifies the CEC Handle.
  387.   * @retval FlagStatus
  388.   */
  389. #define __HAL_CEC_GET_TRANSMISSION_START_FLAG(__HANDLE__) READ_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TSOM)
  390.  
  391. /** @brief  Get Transmission End flag
  392.   * @param  __HANDLE__ specifies the CEC Handle.
  393.   * @retval FlagStatus
  394.   */
  395. #define __HAL_CEC_GET_TRANSMISSION_END_FLAG(__HANDLE__) READ_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TEOM)
  396.  
  397. /** @brief  Clear OAR register
  398.   * @param  __HANDLE__ specifies the CEC Handle.
  399.   * @retval none
  400.   */
  401. #define __HAL_CEC_CLEAR_OAR(__HANDLE__)   CLEAR_BIT((__HANDLE__)->Instance->OAR, CEC_OAR_OA)
  402.  
  403. /** @brief  Set OAR register
  404.   * @param  __HANDLE__ specifies the CEC Handle.
  405.   * @param  __ADDRESS__ Own Address value.
  406.   * @retval none
  407.   */
  408. #define __HAL_CEC_SET_OAR(__HANDLE__,__ADDRESS__) MODIFY_REG((__HANDLE__)->Instance->OAR, CEC_OAR_OA, (__ADDRESS__));
  409.  
  410. /**
  411.   * @}
  412.   */
  413.  
  414. /* Exported functions --------------------------------------------------------*/
  415. /** @addtogroup CEC_Exported_Functions CEC Exported Functions
  416.   * @{
  417.   */
  418.  
  419. /** @addtogroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions
  420.   *  @brief    Initialization and Configuration functions
  421.   * @{
  422.   */
  423. /* Initialization and de-initialization functions  ****************************/
  424. HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec);
  425. HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec);
  426. HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress);
  427. void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec);
  428. void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec);
  429.  
  430. #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
  431. HAL_StatusTypeDef HAL_CEC_RegisterCallback(CEC_HandleTypeDef *hcec, HAL_CEC_CallbackIDTypeDef CallbackID,
  432.                                            pCEC_CallbackTypeDef pCallback);
  433. HAL_StatusTypeDef HAL_CEC_UnRegisterCallback(CEC_HandleTypeDef *hcec, HAL_CEC_CallbackIDTypeDef CallbackID);
  434.  
  435. HAL_StatusTypeDef HAL_CEC_RegisterRxCpltCallback(CEC_HandleTypeDef *hcec, pCEC_RxCallbackTypeDef pCallback);
  436. HAL_StatusTypeDef HAL_CEC_UnRegisterRxCpltCallback(CEC_HandleTypeDef *hcec);
  437. #endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
  438. /**
  439.   * @}
  440.   */
  441.  
  442. /** @addtogroup CEC_Exported_Functions_Group2 Input and Output operation functions
  443.   *  @brief CEC Transmit/Receive functions
  444.   * @{
  445.   */
  446. /* I/O operation functions  ***************************************************/
  447. HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress,
  448.                                       const uint8_t *pData, uint32_t Size);
  449. uint32_t HAL_CEC_GetLastReceivedFrameSize(const CEC_HandleTypeDef *hcec);
  450. void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t *Rxbuffer);
  451. void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec);
  452. void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec);
  453. void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize);
  454. void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec);
  455. /**
  456.   * @}
  457.   */
  458.  
  459. /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control functions
  460.   *  @brief   CEC control functions
  461.   * @{
  462.   */
  463. /* Peripheral State functions  ************************************************/
  464. HAL_CEC_StateTypeDef HAL_CEC_GetState(const CEC_HandleTypeDef *hcec);
  465. uint32_t HAL_CEC_GetError(const CEC_HandleTypeDef *hcec);
  466. /**
  467.   * @}
  468.   */
  469.  
  470. /**
  471.   * @}
  472.   */
  473.  
  474. /* Private types -------------------------------------------------------------*/
  475. /** @defgroup CEC_Private_Types CEC Private Types
  476.   * @{
  477.   */
  478.  
  479. /**
  480.   * @}
  481.   */
  482.  
  483. /* Private variables ---------------------------------------------------------*/
  484. /** @defgroup CEC_Private_Variables CEC Private Variables
  485.   * @{
  486.   */
  487.  
  488. /**
  489.   * @}
  490.   */
  491.  
  492. /* Private constants ---------------------------------------------------------*/
  493. /** @defgroup CEC_Private_Constants CEC Private Constants
  494.   * @{
  495.   */
  496.  
  497. /**
  498.   * @}
  499.   */
  500.  
  501. /* Private macros ------------------------------------------------------------*/
  502. /** @defgroup CEC_Private_Macros CEC Private Macros
  503.   * @{
  504.   */
  505. #define IS_CEC_BIT_TIMING_ERROR_MODE(MODE) (((MODE) == CEC_BIT_TIMING_ERROR_MODE_STANDARD) || \
  506.                                             ((MODE) == CEC_BIT_TIMING_ERROR_MODE_ERRORFREE))
  507.  
  508. #define IS_CEC_BIT_PERIOD_ERROR_MODE(MODE) (((MODE) == CEC_BIT_PERIOD_ERROR_MODE_STANDARD) || \
  509.                                             ((MODE) == CEC_BIT_PERIOD_ERROR_MODE_FLEXIBLE))
  510.  
  511. /** @brief Check CEC message size.
  512.   *       The message size is the payload size: without counting the header,
  513.   *       it varies from 0 byte (ping operation, one header only, no payload) to
  514.   *       15 bytes (1 opcode and up to 14 operands following the header).
  515.   * @param  __SIZE__ CEC message size.
  516.   * @retval Test result (TRUE or FALSE).
  517.   */
  518. #define IS_CEC_MSGSIZE(__SIZE__) ((__SIZE__) <= 0x10U)
  519.  
  520. /** @brief Check CEC device Own Address Register (OAR) setting.
  521.   * @param  __ADDRESS__ CEC own address.
  522.   * @retval Test result (TRUE or FALSE).
  523.   */
  524. #define IS_CEC_OWN_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0x0000000FU)
  525.  
  526. /** @brief Check CEC initiator or destination logical address setting.
  527.   *        Initiator and destination addresses are coded over 4 bits.
  528.   * @param  __ADDRESS__ CEC initiator or logical address.
  529.   * @retval Test result (TRUE or FALSE).
  530.   */
  531. #define IS_CEC_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0x0000000FU)
  532. /**
  533.   * @}
  534.   */
  535. /* Private functions ---------------------------------------------------------*/
  536. /** @defgroup CEC_Private_Functions CEC Private Functions
  537.   * @{
  538.   */
  539.  
  540. /**
  541.   * @}
  542.   */
  543.  
  544. /**
  545.   * @}
  546.   */
  547.  
  548. /**
  549.   * @}
  550.   */
  551.  
  552. #endif /* CEC */
  553.  
  554. #ifdef __cplusplus
  555. }
  556. #endif
  557.  
  558. #endif /* __STM32F1xx_HAL_CEC_H */
  559.  
  560.