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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32f1xx_hal_cec.h
  4.   * @author  MCD Application Team
  5.   * @version V1.0.4
  6.   * @date    29-April-2016
  7.   * @brief   Header file of CEC HAL module.
  8.   ******************************************************************************
  9.   * @attention
  10.   *
  11.   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  12.   *
  13.   * Redistribution and use in source and binary forms, with or without modification,
  14.   * are permitted provided that the following conditions are met:
  15.   *   1. Redistributions of source code must retain the above copyright notice,
  16.   *      this list of conditions and the following disclaimer.
  17.   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18.   *      this list of conditions and the following disclaimer in the documentation
  19.   *      and/or other materials provided with the distribution.
  20.   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21.   *      may be used to endorse or promote products derived from this software
  22.   *      without specific prior written permission.
  23.   *
  24.   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25.   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26.   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27.   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28.   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29.   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30.   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31.   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32.   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33.   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34.   *
  35.   ******************************************************************************  
  36.   */
  37.  
  38. /* Define to prevent recursive inclusion -------------------------------------*/
  39. #ifndef __STM32F1xx_HAL_CEC_H
  40. #define __STM32F1xx_HAL_CEC_H
  41.  
  42. #ifdef __cplusplus
  43.  extern "C" {
  44. #endif
  45.  
  46. #if defined(STM32F100xB) || defined(STM32F100xE)
  47. /* Includes ------------------------------------------------------------------*/
  48. #include "stm32f1xx_hal_def.h"
  49.  
  50. /** @addtogroup STM32F1xx_HAL_Driver
  51.   * @{
  52.   */
  53.  
  54. /** @addtogroup CEC
  55.   * @{
  56.   */
  57.  
  58. /** @addtogroup CEC_Private_Constants
  59.   * @{
  60.   */
  61. #define IS_CEC_BIT_TIMING_ERROR_MODE(MODE) (((MODE) == CEC_BIT_TIMING_ERROR_MODE_STANDARD) || \
  62.                                         ((MODE) == CEC_BIT_TIMING_ERROR_MODE_ERRORFREE))
  63. #define IS_CEC_BIT_PERIOD_ERROR_MODE(MODE) (((MODE) == CEC_BIT_PERIOD_ERROR_MODE_STANDARD) || \
  64.                                         ((MODE) == CEC_BIT_PERIOD_ERROR_MODE_FLEXIBLE))
  65.  
  66. /** @brief Check CEC device Own Address Register (OAR) setting.
  67.   * @param  __ADDRESS__: CEC own address.              
  68.   * @retval Test result (TRUE or FALSE).
  69.   */
  70. #define IS_CEC_OAR_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0xF)  
  71.  
  72. /** @brief Check CEC initiator or destination logical address setting.
  73.   *        Initiator and destination addresses are coded over 4 bits.
  74.   * @param  __ADDRESS__: CEC initiator or logical address.              
  75.   * @retval Test result (TRUE or FALSE).
  76.   */
  77. #define IS_CEC_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0xF)    
  78.  
  79. /** @brief Check CEC message size.
  80.   *       The message size is the payload size: without counting the header,
  81.   *       it varies from 0 byte (ping operation, one header only, no payload) to
  82.   *       15 bytes (1 opcode and up to 14 operands following the header).
  83.   * @param  __SIZE__: CEC message size.              
  84.   * @retval Test result (TRUE or FALSE).
  85.   */
  86. #define IS_CEC_MSGSIZE(__SIZE__) ((__SIZE__) <= 0xF)  
  87.  
  88. /**
  89.  * @}
  90.  */
  91.  
  92. /* Exported types ------------------------------------------------------------*/
  93. /** @defgroup CEC_Exported_Types CEC Exported Types
  94.   * @{
  95.   */
  96. /**
  97.   * @brief CEC Init Structure definition  
  98.   */
  99. typedef struct
  100. {  
  101.   uint32_t TimingErrorFree; /*!< Configures the CEC Bit Timing Error Mode.
  102.                                  This parameter can be a value of @ref CEC_BitTimingErrorMode */
  103.   uint32_t PeriodErrorFree; /*!< Configures the CEC Bit Period Error Mode.
  104.                                  This parameter can be a value of @ref CEC_BitPeriodErrorMode */
  105.   uint8_t  InitiatorAddress; /*!< Initiator address (source logical address, sent in each header)
  106.                                  This parameter can be a value <= 0xF */
  107. }CEC_InitTypeDef;
  108.  
  109. /**
  110.   * @brief HAL CEC State structures definition  
  111.   */
  112. typedef enum
  113. {
  114.   HAL_CEC_STATE_RESET             = 0x00,    /*!< Peripheral Reset state                              */
  115.   HAL_CEC_STATE_READY             = 0x01,    /*!< Peripheral Initialized and ready for use            */
  116.   HAL_CEC_STATE_BUSY              = 0x02,    /*!< An internal process is ongoing                      */
  117.   HAL_CEC_STATE_BUSY_TX           = 0x03,    /*!< Data Transmission process is ongoing                */
  118.   HAL_CEC_STATE_BUSY_RX           = 0x04,    /*!< Data Reception process is ongoing                   */
  119.   HAL_CEC_STATE_BUSY_TX_RX        = 0x05,    /*!< Data Transmission and Reception process is ongoing  */
  120.   HAL_CEC_STATE_TIMEOUT           = 0x06,    /*!< Timeout state                                       */
  121.   HAL_CEC_STATE_ERROR             = 0x07     /*!< State Error                                         */
  122. }HAL_CEC_StateTypeDef;
  123.  
  124. /**
  125.   * @brief  HAL Error structures definition  
  126.   */
  127. typedef enum
  128. {
  129.   HAL_CEC_ERROR_NONE  = (uint32_t) 0x0, /*!< no error */
  130.   HAL_CEC_ERROR_BTE   = CEC_ESR_BTE,    /*!< Bit Timing Error */
  131.   HAL_CEC_ERROR_BPE   = CEC_ESR_BPE,    /*!< Bit Period Error */
  132.   HAL_CEC_ERROR_RBTFE = CEC_ESR_RBTFE,  /*!< Rx Block Transfer Finished Error */
  133.   HAL_CEC_ERROR_SBE   = CEC_ESR_SBE,    /*!< Start Bit Error */
  134.   HAL_CEC_ERROR_ACKE  = CEC_ESR_ACKE,   /*!< Block Acknowledge Error */
  135.   HAL_CEC_ERROR_LINE  = CEC_ESR_LINE,   /*!< Line Error */
  136.   HAL_CEC_ERROR_TBTFE = CEC_ESR_TBTFE,  /*!< Tx Block Transfer Finished Error */
  137. }HAL_CEC_ErrorTypeDef;
  138.  
  139. /**
  140.   * @brief  CEC handle Structure definition  
  141.   */  
  142. typedef struct
  143. {
  144.   CEC_TypeDef             *Instance;      /*!< CEC registers base address */
  145.  
  146.   CEC_InitTypeDef         Init;           /*!< CEC communication parameters */
  147.  
  148.   uint8_t                 *pTxBuffPtr;    /*!< Pointer to CEC Tx transfer Buffer */
  149.  
  150.   uint16_t                TxXferCount;    /*!< CEC Tx Transfer Counter */
  151.  
  152.   uint8_t                 *pRxBuffPtr;    /*!< Pointer to CEC Rx transfer Buffer */
  153.  
  154.   uint16_t                RxXferSize;     /*!< CEC Rx Transfer size, 0: header received only */
  155.  
  156.   uint32_t                ErrorCode;      /*!< For errors handling purposes, copy of ESR register in case error is reported */
  157.  
  158.   HAL_LockTypeDef         Lock;           /*!< Locking object */
  159.  
  160.   HAL_CEC_StateTypeDef    State;          /*!< CEC communication state */
  161.    
  162. }CEC_HandleTypeDef;
  163.  
  164. /**
  165.  * @}
  166.  */
  167.  
  168. /* Exported constants --------------------------------------------------------*/
  169. /** @defgroup CEC_Exported_Constants CEC Exported Constants
  170.   * @{
  171.   */
  172.  
  173. /** @defgroup CEC_BitTimingErrorMode Bit Timing Error Mode
  174.   * @{
  175.   */
  176. #define CEC_BIT_TIMING_ERROR_MODE_STANDARD  ((uint32_t)0x00) /*!< Bit timing error Standard Mode */
  177. #define CEC_BIT_TIMING_ERROR_MODE_ERRORFREE CEC_CFGR_BTEM    /*!< Bit timing error Free Mode */
  178. /**
  179.   * @}
  180.   */
  181.  
  182. /** @defgroup CEC_BitPeriodErrorMode Bit Period Error Mode
  183.   * @{
  184.   */
  185. #define CEC_BIT_PERIOD_ERROR_MODE_STANDARD ((uint32_t)0x00) /*!< Bit period error Standard Mode */
  186. #define CEC_BIT_PERIOD_ERROR_MODE_FLEXIBLE CEC_CFGR_BPEM    /*!< Bit period error Flexible Mode */
  187. /**
  188.   * @}
  189.   */
  190.  
  191. /** @defgroup CEC_Initiator_Position Initiator logical address position in message header    
  192.   * @{
  193.   */
  194. #define CEC_INITIATOR_LSB_POS           ((uint32_t) 4)
  195. /**
  196.   * @}
  197.   */
  198. /** @defgroup CEC_Interrupts_Definitions  Interrupts definition
  199.   * @{
  200.   */
  201. #define CEC_IT_IE CEC_CFGR_IE
  202. /**
  203.   * @}
  204.   */
  205.  
  206. /** @defgroup CEC_Flags_Definitions  Flags definition
  207.   * @{
  208.   */
  209. #define CEC_FLAG_TSOM  CEC_CSR_TSOM
  210. #define CEC_FLAG_TEOM  CEC_CSR_TEOM
  211. #define CEC_FLAG_TERR  CEC_CSR_TERR
  212. #define CEC_FLAG_TBTRF CEC_CSR_TBTRF
  213. #define CEC_FLAG_RSOM  CEC_CSR_RSOM
  214. #define CEC_FLAG_REOM  CEC_CSR_REOM
  215. #define CEC_FLAG_RERR  CEC_CSR_RERR
  216. #define CEC_FLAG_RBTF  CEC_CSR_RBTF
  217. /**
  218.   * @}
  219.   */
  220.  
  221. /**
  222.   * @}
  223.   */  
  224.  
  225. /* Exported macros -----------------------------------------------------------*/
  226. /** @defgroup CEC_Exported_Macros CEC Exported Macros
  227.   * @{
  228.   */
  229.  
  230. /** @brief  Reset CEC handle state
  231.   * @param  __HANDLE__: CEC handle.
  232.   * @retval None
  233.   */
  234. #define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CEC_STATE_RESET)
  235.  
  236. /** @brief  Checks whether or not the specified CEC interrupt flag is set.
  237.   * @param  __HANDLE__: specifies the CEC Handle.
  238.   * @param  __INTERRUPT__: specifies the interrupt to check.
  239.   *     @arg CEC_FLAG_TERR: Tx Error
  240.   *     @arg CEC_FLAG_TBTF: Tx Block Transfer Finished
  241.   *     @arg CEC_FLAG_RERR: Rx Error
  242.   *     @arg CEC_FLAG_RBTF: Rx Block Transfer Finished
  243.   * @retval ITStatus
  244.   */
  245. #define __HAL_CEC_GET_FLAG(__HANDLE__, __INTERRUPT__) READ_BIT((__HANDLE__)->Instance->CSR,(__INTERRUPT__))
  246.  
  247. /** @brief  Clears the CEC's pending flags.
  248.   * @param  __HANDLE__: specifies the CEC Handle.
  249.   * @param  __FLAG__: specifies the flag to clear.
  250.   *   This parameter can be any combination of the following values:
  251.   *     @arg CEC_CSR_TERR: Tx Error
  252.   *     @arg CEC_CSR_TBTF: Tx Block Transfer Finished
  253.   *     @arg CEC_CSR_RERR: Rx Error
  254.   *     @arg CEC_CSR_RBTF: Rx Block Transfer Finished
  255.   * @retval none  
  256.   */
  257. #define __HAL_CEC_CLEAR_FLAG(__HANDLE__, __FLAG__)                                                                  \
  258.                           do {                                                                                      \
  259.                             uint32_t tmp = 0x0;                                                                     \
  260.                             tmp = (__HANDLE__)->Instance->CSR & 0x2;                                                \
  261.                             (__HANDLE__)->Instance->CSR &= (uint32_t)(((~(uint32_t)(__FLAG__)) & 0xFFFFFFFC) | tmp);\
  262.                           } while(0)
  263.                      
  264. /** @brief  Enables the specified CEC interrupt.
  265.   * @param  __HANDLE__: specifies the CEC Handle.
  266.   * @param  __INTERRUPT__: The CEC interrupt to enable.
  267.   *          This parameter can be:
  268.   *            @arg CEC_IT_IE         : Interrupt Enable                
  269.   * @retval none
  270.   */
  271. #define __HAL_CEC_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CFGR, (__INTERRUPT__))
  272.  
  273. /** @brief  Disables the specified CEC interrupt.
  274.   * @param  __HANDLE__: specifies the CEC Handle.
  275.   * @param  __INTERRUPT__: The CEC interrupt to enable.
  276.   *          This parameter can be:
  277.   *            @arg CEC_IT_IE         : Interrupt Enable                        
  278.   * @retval none
  279.   */  
  280. #define __HAL_CEC_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, (__INTERRUPT__))
  281.  
  282. /** @brief  Checks whether or not the specified CEC interrupt is enabled.
  283.   * @param  __HANDLE__: specifies the CEC Handle.
  284.   * @param  __INTERRUPT__: The CEC interrupt to enable.
  285.   *          This parameter can be:
  286.   *            @arg CEC_IT_IE         : Interrupt Enable                        
  287.   * @retval FlagStatus  
  288.   */
  289. #define __HAL_CEC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) READ_BIT((__HANDLE__)->Instance->CFGR, (__INTERRUPT__))
  290.  
  291. /** @brief  Enables the CEC device
  292.   * @param  __HANDLE__: specifies the CEC Handle.              
  293.   * @retval none
  294.   */
  295. #define __HAL_CEC_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_PE)
  296.  
  297. /** @brief  Disables the CEC device
  298.   * @param  __HANDLE__: specifies the CEC Handle.              
  299.   * @retval none
  300.   */
  301. #define __HAL_CEC_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_PE)
  302.  
  303. /** @brief  Set Transmission Start flag
  304.   * @param  __HANDLE__: specifies the CEC Handle.              
  305.   * @retval none
  306.   */
  307. #define __HAL_CEC_FIRST_BYTE_TX_SET(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TSOM)
  308.  
  309. /** @brief  Set Transmission End flag
  310.   * @param  __HANDLE__: specifies the CEC Handle.              
  311.   * @retval none  
  312.   */
  313. #define __HAL_CEC_LAST_BYTE_TX_SET(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TEOM)
  314.  
  315. /** @brief  Get Transmission Start flag
  316.   * @param  __HANDLE__: specifies the CEC Handle.              
  317.   * @retval FlagStatus
  318.   */
  319. #define __HAL_CEC_GET_TRANSMISSION_START_FLAG(__HANDLE__) READ_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TSOM)
  320.  
  321. /** @brief  Get Transmission End flag
  322.   * @param  __HANDLE__: specifies the CEC Handle.              
  323.   * @retval FlagStatus
  324.   */
  325. #define __HAL_CEC_GET_TRANSMISSION_END_FLAG(__HANDLE__) READ_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TEOM)
  326.  
  327. /** @brief  Clear OAR register
  328.   * @param  __HANDLE__: specifies the CEC Handle.              
  329.   * @retval none
  330.   */
  331. #define __HAL_CEC_CLEAR_OAR(__HANDLE__)   CLEAR_BIT((__HANDLE__)->Instance->OAR, CEC_OAR_OA)
  332.  
  333. /** @brief  Set OAR register
  334.   * @param  __HANDLE__: specifies the CEC Handle.
  335.   * @param  __ADDRESS__: Own Address value.
  336.   * @retval none
  337.   */
  338. #define __HAL_CEC_SET_OAR(__HANDLE__,__ADDRESS__) MODIFY_REG((__HANDLE__)->Instance->OAR, CEC_OAR_OA, (__ADDRESS__));
  339.  
  340. /**
  341.   * @}
  342.   */                      
  343.  
  344. /* Exported functions --------------------------------------------------------*/
  345. /** @addtogroup CEC_Exported_Functions CEC Exported Functions
  346.   * @{
  347.   */
  348.  
  349. /** @addtogroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions
  350.   *  @brief    Initialization and Configuration functions
  351.   * @{
  352.   */
  353. /* Initialization and de-initialization functions  ****************************/
  354. HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec);
  355. HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec);
  356. void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec);
  357. void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec);
  358. /**
  359.   * @}
  360.   */
  361.  
  362. /** @addtogroup CEC_Exported_Functions_Group2 Input and Output operation functions
  363.   *  @brief CEC Transmit/Receive functions
  364.   * @{
  365.   */
  366. /* IO operation functions *****************************************************/
  367. HAL_StatusTypeDef HAL_CEC_Transmit(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size, uint32_t Timeout);
  368. HAL_StatusTypeDef HAL_CEC_Receive(CEC_HandleTypeDef *hcec, uint8_t *pData, uint32_t Timeout);
  369. HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size);
  370. HAL_StatusTypeDef HAL_CEC_Receive_IT(CEC_HandleTypeDef *hcec, uint8_t *pData);
  371. uint32_t HAL_CEC_GetReceivedFrameSize(CEC_HandleTypeDef *hcec);
  372. void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec);
  373. void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec);
  374. void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec);
  375. void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec);
  376. /**
  377.   * @}
  378.   */
  379.  
  380. /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control functions
  381.   *  @brief   CEC control functions
  382.   * @{
  383.   */
  384. /* Peripheral State and Error functions ***************************************/
  385. HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec);
  386. uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec);
  387. /**
  388.   * @}
  389.   */
  390.  
  391. /**
  392.   * @}
  393.   */
  394.  
  395. /**
  396.   * @}
  397.   */
  398.  
  399. /**
  400.   * @}
  401.   */
  402.  
  403. #endif /* defined(STM32F100xB) || defined(STM32F100xE) */
  404.  
  405. #ifdef __cplusplus
  406. }
  407. #endif
  408.  
  409. #endif /* __STM32F1xx_HAL_CEC_H */
  410.  
  411. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  412.