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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32f1xx_hal_cec.h
  4.   * @author  MCD Application Team
  5.   * @brief   Header file of CEC HAL module.
  6.   ******************************************************************************
  7.   * @attention
  8.   *
  9.   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  10.   * All rights reserved.</center></h2>
  11.   *
  12.   * This software component is licensed by ST under BSD 3-Clause license,
  13.   * the "License"; You may not use this file except in compliance with the
  14.   * License. You may obtain a copy of the License at:
  15.   *                        opensource.org/licenses/BSD-3-Clause
  16.   *
  17.   ******************************************************************************  
  18.   */
  19.  
  20. /* Define to prevent recursive inclusion -------------------------------------*/
  21. #ifndef __STM32F1xx_HAL_CEC_H
  22. #define __STM32F1xx_HAL_CEC_H
  23.  
  24. #ifdef __cplusplus
  25.  extern "C" {
  26. #endif
  27.  
  28. /* Includes ------------------------------------------------------------------*/
  29. #include "stm32f1xx_hal_def.h"
  30.  
  31. #if defined (CEC)
  32.  
  33. /** @addtogroup STM32F1xx_HAL_Driver
  34.   * @{
  35.   */
  36.  
  37. /** @addtogroup CEC
  38.   * @{
  39.   */
  40.  
  41. /* Exported types ------------------------------------------------------------*/
  42. /** @defgroup CEC_Exported_Types CEC Exported Types
  43.   * @{
  44.   */
  45. /**
  46.   * @brief CEC Init Structure definition  
  47.   */
  48. typedef struct
  49. {
  50.   uint32_t TimingErrorFree; /*!< Configures the CEC Bit Timing Error Mode.
  51.                                  This parameter can be a value of @ref CEC_BitTimingErrorMode */
  52.   uint32_t PeriodErrorFree; /*!< Configures the CEC Bit Period Error Mode.
  53.                                  This parameter can be a value of @ref CEC_BitPeriodErrorMode */
  54.   uint16_t  OwnAddress;     /*!< Own addresses configuration
  55.                                  This parameter can be a value of @ref CEC_OWN_ADDRESS */
  56.   uint8_t  *RxBuffer;       /*!< CEC Rx buffer pointeur */
  57. }CEC_InitTypeDef;
  58.  
  59. /**
  60.   * @brief HAL CEC State structures definition
  61.   * @note  HAL CEC State value is a combination of 2 different substates: gState and RxState.
  62.   *        - gState contains CEC state information related to global Handle management
  63.   *          and also information related to Tx operations.
  64.   *          gState value coding follow below described bitmap :
  65.   *          b7 (not used)
  66.   *             x  : Should be set to 0
  67.   *          b6  Error information
  68.   *             0  : No Error
  69.   *             1  : Error
  70.   *          b5     IP initilisation status
  71.   *             0  : Reset (IP not initialized)
  72.   *             1  : Init done (IP initialized. HAL CEC Init function already called)
  73.   *          b4-b3  (not used)
  74.   *             xx : Should be set to 00
  75.   *          b2     Intrinsic process state
  76.   *             0  : Ready
  77.   *             1  : Busy (IP busy with some configuration or internal operations)
  78.   *          b1     (not used)
  79.   *             x  : Should be set to 0
  80.   *          b0     Tx state
  81.   *             0  : Ready (no Tx operation ongoing)
  82.   *             1  : Busy (Tx operation ongoing)
  83.   *        - RxState contains information related to Rx operations.
  84.   *          RxState value coding follow below described bitmap :
  85.   *          b7-b6  (not used)
  86.   *             xx : Should be set to 00
  87.   *          b5     IP initilisation status
  88.   *             0  : Reset (IP not initialized)
  89.   *             1  : Init done (IP initialized)
  90.   *          b4-b2  (not used)
  91.   *            xxx : Should be set to 000
  92.   *          b1     Rx state
  93.   *             0  : Ready (no Rx operation ongoing)
  94.   *             1  : Busy (Rx operation ongoing)
  95.   *          b0     (not used)
  96.   *             x  : Should be set to 0.  
  97.   */
  98. typedef enum
  99. {
  100.   HAL_CEC_STATE_RESET             = 0x00U,    /*!< Peripheral is not yet Initialized
  101.                                                    Value is allowed for gState and RxState             */
  102.   HAL_CEC_STATE_READY             = 0x20U,    /*!< Peripheral Initialized and ready for use
  103.                                                    Value is allowed for gState and RxState             */
  104.   HAL_CEC_STATE_BUSY              = 0x24U,    /*!< an internal process is ongoing
  105.                                                    Value is allowed for gState only                    */
  106.   HAL_CEC_STATE_BUSY_RX           = 0x22U,    /*!< Data Reception process is ongoing
  107.                                                    Value is allowed for RxState only                   */
  108.   HAL_CEC_STATE_BUSY_TX           = 0x21U,    /*!< Data Transmission process is ongoing
  109.                                                    Value is allowed for gState only                    */
  110.   HAL_CEC_STATE_BUSY_RX_TX        = 0x23U,    /*!< an internal process is ongoing
  111.                                                    Value is allowed for gState only                    */
  112.   HAL_CEC_STATE_ERROR             = 0x60U     /*!< Error Value is allowed for gState only              */
  113. }HAL_CEC_StateTypeDef;
  114.  
  115. /**
  116.   * @brief  CEC handle Structure definition  
  117.   */  
  118. typedef struct __CEC_HandleTypeDef
  119. {
  120.   CEC_TypeDef             *Instance;      /*!< CEC registers base address */
  121.  
  122.   CEC_InitTypeDef         Init;           /*!< CEC communication parameters */
  123.  
  124.   uint8_t                 *pTxBuffPtr;    /*!< Pointer to CEC Tx transfer Buffer */
  125.  
  126.   uint16_t                TxXferCount;    /*!< CEC Tx Transfer Counter */
  127.  
  128.   uint16_t                RxXferSize;     /*!< CEC Rx Transfer size, 0: header received only */
  129.  
  130.   HAL_LockTypeDef         Lock;           /*!< Locking object */
  131.  
  132.   HAL_CEC_StateTypeDef    gState;         /*!< CEC state information related to global Handle management
  133.                                                and also related to Tx operations.
  134.                                                This parameter can be a value of @ref HAL_CEC_StateTypeDef */
  135.  
  136.   HAL_CEC_StateTypeDef    RxState;        /*!< CEC state information related to Rx operations.
  137.                                                This parameter can be a value of @ref HAL_CEC_StateTypeDef */
  138.  
  139.   uint32_t                ErrorCode;      /*!< For errors handling purposes, copy of ISR register
  140.                                                in case error is reported */  
  141.  
  142. #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
  143.   void  (* TxCpltCallback) ( struct __CEC_HandleTypeDef * hcec);                            /*!< CEC Tx Transfer completed callback */
  144.   void  (* RxCpltCallback) ( struct __CEC_HandleTypeDef * hcec, uint32_t RxFrameSize);      /*!< CEC Rx Transfer completed callback */
  145.   void  (* ErrorCallback)  ( struct __CEC_HandleTypeDef * hcec);                            /*!< CEC error callback */
  146.  
  147.   void  (* MspInitCallback)        ( struct __CEC_HandleTypeDef * hcec);    /*!< CEC Msp Init callback              */
  148.   void  (* MspDeInitCallback)      ( struct __CEC_HandleTypeDef * hcec);    /*!< CEC Msp DeInit callback            */
  149.  
  150. #endif /* (USE_HAL_CEC_REGISTER_CALLBACKS) */                                                                                      
  151. }CEC_HandleTypeDef;
  152.  
  153. #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
  154. /**
  155.   * @brief  HAL CEC Callback ID enumeration definition
  156.   */
  157. typedef enum
  158. {
  159.   HAL_CEC_TX_CPLT_CB_ID      = 0x00U,    /*!< CEC Tx Transfer completed callback ID  */
  160.   HAL_CEC_RX_CPLT_CB_ID      = 0x01U,    /*!< CEC Rx Transfer completed callback ID  */
  161.   HAL_CEC_ERROR_CB_ID        = 0x02U,    /*!< CEC error callback  ID                 */
  162.   HAL_CEC_MSPINIT_CB_ID      = 0x03U,    /*!< CEC Msp Init callback ID               */
  163.   HAL_CEC_MSPDEINIT_CB_ID    = 0x04U     /*!< CEC Msp DeInit callback ID             */
  164. }HAL_CEC_CallbackIDTypeDef;
  165.  
  166. /**
  167.   * @brief  HAL CEC Callback pointer definition
  168.   */
  169. typedef  void (*pCEC_CallbackTypeDef)(CEC_HandleTypeDef * hcec); /*!< pointer to an CEC callback function */
  170. typedef  void (*pCEC_RxCallbackTypeDef)(CEC_HandleTypeDef * hcec, uint32_t RxFrameSize); /*!< pointer to an Rx Transfer completed callback function */
  171. #endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
  172. /**
  173.   * @}
  174.   */
  175.  
  176. /* Exported constants --------------------------------------------------------*/
  177. /** @defgroup CEC_Exported_Constants CEC Exported Constants
  178.   * @{
  179.   */
  180.  
  181. /** @defgroup CEC_Error_Code CEC Error Code
  182.   * @{
  183.   */
  184. #define HAL_CEC_ERROR_NONE   0x00000000U    /*!< no error */
  185. #define HAL_CEC_ERROR_BTE    CEC_ESR_BTE    /*!< Bit Timing Error */
  186. #define HAL_CEC_ERROR_BPE    CEC_ESR_BPE    /*!< Bit Period Error */
  187. #define HAL_CEC_ERROR_RBTFE  CEC_ESR_RBTFE  /*!< Rx Block Transfer Finished Error */
  188. #define HAL_CEC_ERROR_SBE    CEC_ESR_SBE    /*!< Start Bit Error */
  189. #define HAL_CEC_ERROR_ACKE   CEC_ESR_ACKE   /*!< Block Acknowledge Error */
  190. #define HAL_CEC_ERROR_LINE   CEC_ESR_LINE   /*!< Line Error */
  191. #define HAL_CEC_ERROR_TBTFE  CEC_ESR_TBTFE  /*!< Tx Block Transfer Finished Error */
  192. #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
  193. #define  HAL_CEC_ERROR_INVALID_CALLBACK ((uint32_t)0x00000080U) /*!< Invalid Callback Error  */
  194. #endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
  195. /**
  196.   * @}
  197.   */
  198.  
  199. /** @defgroup CEC_BitTimingErrorMode Bit Timing Error Mode
  200.   * @{
  201.   */
  202. #define CEC_BIT_TIMING_ERROR_MODE_STANDARD  0x00000000U      /*!< Bit timing error Standard Mode */
  203. #define CEC_BIT_TIMING_ERROR_MODE_ERRORFREE CEC_CFGR_BTEM    /*!< Bit timing error Free Mode */
  204. /**
  205.   * @}
  206.   */
  207.  
  208. /** @defgroup CEC_BitPeriodErrorMode Bit Period Error Mode
  209.   * @{
  210.   */
  211. #define CEC_BIT_PERIOD_ERROR_MODE_STANDARD 0x00000000U      /*!< Bit period error Standard Mode */
  212. #define CEC_BIT_PERIOD_ERROR_MODE_FLEXIBLE CEC_CFGR_BPEM    /*!< Bit period error Flexible Mode */
  213. /**
  214.   * @}
  215.   */
  216.  
  217. /** @defgroup CEC_Initiator_Position   CEC Initiator logical address position in message header    
  218.   * @{
  219.   */
  220. #define CEC_INITIATOR_LSB_POS                  4U
  221. /**
  222.   * @}
  223.   */
  224.  
  225. /** @defgroup CEC_OWN_ADDRESS   CEC Own Address    
  226.   * @{
  227.   */
  228. #define CEC_OWN_ADDRESS_NONE            CEC_OWN_ADDRESS_0    /* Reset value */
  229. #define CEC_OWN_ADDRESS_0              ((uint16_t)0x0000U)   /* Logical Address 0 */
  230. #define CEC_OWN_ADDRESS_1              ((uint16_t)0x0001U)   /* Logical Address 1 */
  231. #define CEC_OWN_ADDRESS_2              ((uint16_t)0x0002U)   /* Logical Address 2 */
  232. #define CEC_OWN_ADDRESS_3              ((uint16_t)0x0003U)   /* Logical Address 3 */
  233. #define CEC_OWN_ADDRESS_4              ((uint16_t)0x0004U)   /* Logical Address 4 */
  234. #define CEC_OWN_ADDRESS_5              ((uint16_t)0x0005U)   /* Logical Address 5 */
  235. #define CEC_OWN_ADDRESS_6              ((uint16_t)0x0006U)   /* Logical Address 6 */
  236. #define CEC_OWN_ADDRESS_7              ((uint16_t)0x0007U)   /* Logical Address 7 */
  237. #define CEC_OWN_ADDRESS_8              ((uint16_t)0x0008U)   /* Logical Address 8 */
  238. #define CEC_OWN_ADDRESS_9              ((uint16_t)0x0009U)   /* Logical Address 9 */
  239. #define CEC_OWN_ADDRESS_10             ((uint16_t)0x000AU)   /* Logical Address 10 */
  240. #define CEC_OWN_ADDRESS_11             ((uint16_t)0x000BU)   /* Logical Address 11 */
  241. #define CEC_OWN_ADDRESS_12             ((uint16_t)0x000CU)   /* Logical Address 12 */
  242. #define CEC_OWN_ADDRESS_13             ((uint16_t)0x000DU)   /* Logical Address 13 */
  243. #define CEC_OWN_ADDRESS_14             ((uint16_t)0x000EU)   /* Logical Address 14 */
  244. #define CEC_OWN_ADDRESS_15             ((uint16_t)0x000FU)   /* Logical Address 15 */
  245. /**
  246.   * @}
  247.   */
  248.  
  249. /** @defgroup CEC_Interrupts_Definitions  Interrupts definition
  250.   * @{
  251.   */
  252. #define CEC_IT_IE CEC_CFGR_IE
  253. /**
  254.   * @}
  255.   */
  256.  
  257. /** @defgroup CEC_Flags_Definitions  Flags definition
  258.   * @{
  259.   */
  260. #define CEC_FLAG_TSOM  CEC_CSR_TSOM
  261. #define CEC_FLAG_TEOM  CEC_CSR_TEOM
  262. #define CEC_FLAG_TERR  CEC_CSR_TERR
  263. #define CEC_FLAG_TBTRF CEC_CSR_TBTRF
  264. #define CEC_FLAG_RSOM  CEC_CSR_RSOM
  265. #define CEC_FLAG_REOM  CEC_CSR_REOM
  266. #define CEC_FLAG_RERR  CEC_CSR_RERR
  267. #define CEC_FLAG_RBTF  CEC_CSR_RBTF
  268. /**
  269.   * @}
  270.   */
  271.  
  272. /**
  273.   * @}
  274.   */  
  275.  
  276. /* Exported macros -----------------------------------------------------------*/
  277. /** @defgroup CEC_Exported_Macros CEC Exported Macros
  278.   * @{
  279.   */
  280.  
  281. /** @brief  Reset CEC handle gstate & RxState
  282.   * @param  __HANDLE__: CEC handle.
  283.   * @retval None
  284.   */
  285. #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
  286. #define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) do{                                                   \
  287.                                                        (__HANDLE__)->gState = HAL_CEC_STATE_RESET;     \
  288.                                                        (__HANDLE__)->RxState = HAL_CEC_STATE_RESET;    \
  289.                                                        (__HANDLE__)->MspInitCallback = NULL;           \
  290.                                                        (__HANDLE__)->MspDeInitCallback = NULL;         \
  291.                                                      } while(0)
  292. #else  
  293. #define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) do{                                                   \
  294.                                                        (__HANDLE__)->gState = HAL_CEC_STATE_RESET;     \
  295.                                                        (__HANDLE__)->RxState = HAL_CEC_STATE_RESET;    \
  296.                                                      } while(0)
  297. #endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
  298.  
  299. /** @brief  Checks whether or not the specified CEC interrupt flag is set.
  300.   * @param  __HANDLE__: specifies the CEC Handle.
  301.   * @param  __FLAG__: specifies the flag to check.
  302.   *     @arg CEC_FLAG_TERR: Tx Error
  303.   *     @arg CEC_FLAG_TBTRF:Tx Block Transfer Finished
  304.   *     @arg CEC_FLAG_RERR: Rx Error
  305.   *     @arg CEC_FLAG_RBTF: Rx Block Transfer Finished
  306.   * @retval ITStatus
  307.   */
  308. #define __HAL_CEC_GET_FLAG(__HANDLE__, __FLAG__) READ_BIT((__HANDLE__)->Instance->CSR,(__FLAG__))
  309.  
  310. /** @brief  Clears the CEC's pending flags.
  311.   * @param  __HANDLE__: specifies the CEC Handle.
  312.   * @param  __FLAG__: specifies the flag to clear.
  313.   *   This parameter can be any combination of the following values:
  314.   *     @arg CEC_CSR_TERR: Tx Error
  315.   *     @arg CEC_FLAG_TBTRF: Tx Block Transfer Finished
  316.   *     @arg CEC_CSR_RERR: Rx Error
  317.   *     @arg CEC_CSR_RBTF: Rx Block Transfer Finished
  318.   * @retval none  
  319.   */
  320. #define __HAL_CEC_CLEAR_FLAG(__HANDLE__, __FLAG__)                                                                   \
  321.                           do {                                                                                       \
  322.                             uint32_t tmp = 0x0U;                                                                     \
  323.                             tmp = (__HANDLE__)->Instance->CSR & 0x00000002U;                                         \
  324.                             (__HANDLE__)->Instance->CSR &= (uint32_t)(((~(uint32_t)(__FLAG__)) & 0xFFFFFFFCU) | tmp);\
  325.                           } while(0U)
  326.  
  327. /** @brief  Enables the specified CEC interrupt.
  328.   * @param  __HANDLE__: specifies the CEC Handle.
  329.   * @param  __INTERRUPT__: specifies the CEC interrupt to enable.
  330.   *          This parameter can be:
  331.   *            @arg CEC_IT_IE         : Interrupt Enable.
  332.   * @retval none
  333.   */
  334. #define __HAL_CEC_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CFGR, (__INTERRUPT__))
  335.  
  336. /** @brief  Disables the specified CEC interrupt.
  337.   * @param  __HANDLE__: specifies the CEC Handle.
  338.   * @param  __INTERRUPT__: specifies the CEC interrupt to disable.
  339.   *          This parameter can be:
  340.   *            @arg CEC_IT_IE         : Interrupt Enable
  341.   * @retval none
  342.   */  
  343. #define __HAL_CEC_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, (__INTERRUPT__))
  344.  
  345. /** @brief  Checks whether or not the specified CEC interrupt is enabled.
  346.   * @param  __HANDLE__: specifies the CEC Handle.
  347.   * @param  __INTERRUPT__: specifies the CEC interrupt to check.
  348.   *          This parameter can be:
  349.   *            @arg CEC_IT_IE         : Interrupt Enable
  350.   * @retval FlagStatus  
  351.   */
  352. #define __HAL_CEC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) READ_BIT((__HANDLE__)->Instance->CFGR, (__INTERRUPT__))
  353.  
  354. /** @brief  Enables the CEC device
  355.   * @param  __HANDLE__: specifies the CEC Handle.              
  356.   * @retval none
  357.   */
  358. #define __HAL_CEC_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_PE)
  359.  
  360. /** @brief  Disables the CEC device
  361.   * @param  __HANDLE__: specifies the CEC Handle.              
  362.   * @retval none
  363.   */
  364. #define __HAL_CEC_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_PE)
  365.  
  366. /** @brief  Set Transmission Start flag
  367.   * @param  __HANDLE__: specifies the CEC Handle.              
  368.   * @retval none
  369.   */
  370. #define __HAL_CEC_FIRST_BYTE_TX_SET(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TSOM)
  371.  
  372. /** @brief  Set Transmission End flag
  373.   * @param  __HANDLE__: specifies the CEC Handle.              
  374.   * @retval none
  375.   */
  376. #define __HAL_CEC_LAST_BYTE_TX_SET(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TEOM)
  377.  
  378. /** @brief  Get Transmission Start flag
  379.   * @param  __HANDLE__: specifies the CEC Handle.              
  380.   * @retval FlagStatus
  381.   */
  382. #define __HAL_CEC_GET_TRANSMISSION_START_FLAG(__HANDLE__) READ_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TSOM)
  383.  
  384. /** @brief  Get Transmission End flag
  385.   * @param  __HANDLE__: specifies the CEC Handle.              
  386.   * @retval FlagStatus
  387.   */
  388. #define __HAL_CEC_GET_TRANSMISSION_END_FLAG(__HANDLE__) READ_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TEOM)
  389.  
  390. /** @brief  Clear OAR register
  391.   * @param  __HANDLE__: specifies the CEC Handle.              
  392.   * @retval none
  393.   */
  394. #define __HAL_CEC_CLEAR_OAR(__HANDLE__)   CLEAR_BIT((__HANDLE__)->Instance->OAR, CEC_OAR_OA)
  395.  
  396. /** @brief  Set OAR register
  397.   * @param  __HANDLE__: specifies the CEC Handle.
  398.   * @param  __ADDRESS__: Own Address value.
  399.   * @retval none
  400.   */
  401. #define __HAL_CEC_SET_OAR(__HANDLE__,__ADDRESS__) MODIFY_REG((__HANDLE__)->Instance->OAR, CEC_OAR_OA, (__ADDRESS__));
  402.  
  403. /**
  404.   * @}
  405.   */
  406.  
  407. /* Exported functions --------------------------------------------------------*/
  408. /** @addtogroup CEC_Exported_Functions CEC Exported Functions
  409.   * @{
  410.   */
  411.  
  412. /** @addtogroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions
  413.   *  @brief    Initialization and Configuration functions
  414.   * @{
  415.   */
  416. /* Initialization and de-initialization functions  ****************************/
  417. HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec);
  418. HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec);
  419. HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress);
  420. void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec);
  421. void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec);
  422. #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
  423. HAL_StatusTypeDef HAL_CEC_RegisterCallback(CEC_HandleTypeDef *hcec, HAL_CEC_CallbackIDTypeDef CallbackID, pCEC_CallbackTypeDef pCallback);
  424. HAL_StatusTypeDef HAL_CEC_UnRegisterCallback(CEC_HandleTypeDef *hcec, HAL_CEC_CallbackIDTypeDef CallbackID);
  425.  
  426. HAL_StatusTypeDef HAL_CEC_RegisterRxCpltCallback(CEC_HandleTypeDef *hcec, pCEC_RxCallbackTypeDef pCallback);
  427. HAL_StatusTypeDef HAL_CEC_UnRegisterRxCpltCallback(CEC_HandleTypeDef *hcec);
  428. #endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
  429. /**
  430.   * @}
  431.   */
  432.  
  433. /** @addtogroup CEC_Exported_Functions_Group2 Input and Output operation functions
  434.   *  @brief CEC Transmit/Receive functions
  435.   * @{
  436.   */
  437. /* I/O operation functions  ***************************************************/
  438. HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress,uint8_t DestinationAddress, uint8_t *pData, uint32_t Size);
  439. uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec);
  440. void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t* Rxbuffer);
  441. void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec);
  442. void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec);
  443. void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize);
  444. void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec);
  445. /**
  446.   * @}
  447.   */
  448.  
  449. /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control functions
  450.   *  @brief   CEC control functions
  451.   * @{
  452.   */
  453. /* Peripheral State and Error functions ***************************************/
  454. HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec);
  455. uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec);
  456. /**
  457.   * @}
  458.   */
  459.  
  460. /**
  461.   * @}
  462.   */
  463.  
  464. /* Private types -------------------------------------------------------------*/
  465. /** @defgroup CEC_Private_Types CEC Private Types
  466.   * @{
  467.   */
  468.  
  469. /**
  470.   * @}
  471.   */
  472.  
  473. /* Private variables ---------------------------------------------------------*/
  474. /** @defgroup CEC_Private_Variables CEC Private Variables
  475.   * @{
  476.   */
  477.  
  478. /**
  479.   * @}
  480.   */
  481.  
  482. /* Private constants ---------------------------------------------------------*/
  483. /** @defgroup CEC_Private_Constants CEC Private Constants
  484.   * @{
  485.   */
  486.  
  487. /**
  488.   * @}
  489.   */
  490.  
  491. /* Private macros ------------------------------------------------------------*/
  492. /** @defgroup CEC_Private_Macros CEC Private Macros
  493.   * @{
  494.   */
  495. #define IS_CEC_BIT_TIMING_ERROR_MODE(MODE) (((MODE) == CEC_BIT_TIMING_ERROR_MODE_STANDARD) || \
  496.                                             ((MODE) == CEC_BIT_TIMING_ERROR_MODE_ERRORFREE))
  497.  
  498. #define IS_CEC_BIT_PERIOD_ERROR_MODE(MODE) (((MODE) == CEC_BIT_PERIOD_ERROR_MODE_STANDARD) || \
  499.                                             ((MODE) == CEC_BIT_PERIOD_ERROR_MODE_FLEXIBLE))
  500.  
  501. /** @brief Check CEC message size.
  502.   *       The message size is the payload size: without counting the header,
  503.   *       it varies from 0 byte (ping operation, one header only, no payload) to
  504.   *       15 bytes (1 opcode and up to 14 operands following the header).
  505.   * @param  __SIZE__: CEC message size.              
  506.   * @retval Test result (TRUE or FALSE).
  507.   */
  508. #define IS_CEC_MSGSIZE(__SIZE__) ((__SIZE__) <= 0x10U)
  509. /** @brief Check CEC device Own Address Register (OAR) setting.
  510.   * @param  __ADDRESS__: CEC own address.              
  511.   * @retval Test result (TRUE or FALSE).
  512.   */
  513. #define IS_CEC_OWN_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0x0000000FU)
  514.  
  515. /** @brief Check CEC initiator or destination logical address setting.
  516.   *        Initiator and destination addresses are coded over 4 bits.
  517.   * @param  __ADDRESS__: CEC initiator or logical address.              
  518.   * @retval Test result (TRUE or FALSE).
  519.   */
  520. #define IS_CEC_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0x0000000FU)
  521.  
  522.  
  523.  
  524. /**
  525.   * @}
  526.   */
  527. /* Private functions ---------------------------------------------------------*/
  528. /** @defgroup CEC_Private_Functions CEC Private Functions
  529.   * @{
  530.   */
  531.  
  532. /**
  533.   * @}
  534.   */
  535.  
  536. /**
  537.   * @}
  538.   */
  539.  
  540. /**
  541.   * @}
  542.   */
  543.  
  544. #endif /* CEC */
  545.  
  546. #ifdef __cplusplus
  547. }
  548. #endif
  549.  
  550. #endif /* __STM32F1xx_HAL_CEC_H */
  551.  
  552. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  553.