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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32f1xx_hal_can_legacy.h
  4.   * @author  MCD Application Team
  5.   * @brief   Header file of CAN HAL module.
  6.   ******************************************************************************
  7.   * @attention
  8.   *
  9.   * Copyright (c) 2016 STMicroelectronics.
  10.   * All rights reserved.
  11.   *
  12.   * This software is licensed under terms that can be found in the LICENSE file
  13.   * in the root directory of this software component.
  14.   * If no LICENSE file comes with this software, it is provided AS-IS.
  15.   *
  16.   ******************************************************************************
  17.   */
  18.  
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef __STM32F1xx_HAL_CAN_LEGACY_H
  21. #define __STM32F1xx_HAL_CAN_LEGACY_H
  22.  
  23. #ifdef __cplusplus
  24.  extern "C" {
  25. #endif
  26.      
  27. #if defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || \
  28.     defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC)
  29.  
  30. /* Includes ------------------------------------------------------------------*/
  31. #include "stm32f1xx_hal_def.h"
  32.  
  33. /** @addtogroup STM32F1xx_HAL_Driver
  34.   * @{
  35.   */
  36.  
  37. /** @addtogroup CAN
  38.   * @{
  39.   */
  40.  
  41. /* Exported types ------------------------------------------------------------*/
  42. /** @defgroup CAN_Exported_Types CAN Exported Types
  43.   * @{
  44.   */
  45.  
  46. /**
  47.   * @brief  HAL State structures definition
  48.   */
  49. typedef enum
  50. {
  51.   HAL_CAN_STATE_RESET             = 0x00U,  /*!< CAN not yet initialized or disabled */
  52.   HAL_CAN_STATE_READY             = 0x01U,  /*!< CAN initialized and ready for use   */
  53.   HAL_CAN_STATE_BUSY              = 0x02U,  /*!< CAN process is ongoing              */
  54.   HAL_CAN_STATE_BUSY_TX           = 0x12U,  /*!< CAN process is ongoing              */
  55.   HAL_CAN_STATE_BUSY_RX0          = 0x22U,  /*!< CAN process is ongoing              */
  56.   HAL_CAN_STATE_BUSY_RX1          = 0x32U,  /*!< CAN process is ongoing              */
  57.   HAL_CAN_STATE_BUSY_TX_RX0       = 0x42U,  /*!< CAN process is ongoing              */
  58.   HAL_CAN_STATE_BUSY_TX_RX1       = 0x52U,  /*!< CAN process is ongoing              */
  59.   HAL_CAN_STATE_BUSY_RX0_RX1      = 0x62U,  /*!< CAN process is ongoing              */
  60.   HAL_CAN_STATE_BUSY_TX_RX0_RX1   = 0x72U,  /*!< CAN process is ongoing              */
  61.   HAL_CAN_STATE_TIMEOUT           = 0x03U,  /*!< CAN in Timeout state                */
  62.   HAL_CAN_STATE_ERROR             = 0x04U   /*!< CAN error state                     */
  63.  
  64. }HAL_CAN_StateTypeDef;
  65.  
  66. /**
  67.   * @brief  CAN init structure definition
  68.   */
  69. typedef struct
  70. {
  71.   uint32_t Prescaler;  /*!< Specifies the length of a time quantum.
  72.                             This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */
  73.  
  74.   uint32_t Mode;       /*!< Specifies the CAN operating mode.
  75.                             This parameter can be a value of @ref CAN_operating_mode */
  76.  
  77.   uint32_t SJW;        /*!< Specifies the maximum number of time quanta
  78.                             the CAN hardware is allowed to lengthen or
  79.                             shorten a bit to perform resynchronization.
  80.                             This parameter can be a value of @ref CAN_synchronisation_jump_width */
  81.  
  82.   uint32_t BS1;        /*!< Specifies the number of time quanta in Bit Segment 1.
  83.                             This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
  84.  
  85.   uint32_t BS2;        /*!< Specifies the number of time quanta in Bit Segment 2.
  86.                             This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
  87.  
  88.   uint32_t TTCM;       /*!< Enable or disable the time triggered communication mode.
  89.                             This parameter can be set to ENABLE or DISABLE. */
  90.  
  91.   uint32_t ABOM;       /*!< Enable or disable the automatic bus-off management.
  92.                             This parameter can be set to ENABLE or DISABLE */
  93.  
  94.   uint32_t AWUM;       /*!< Enable or disable the automatic wake-up mode.
  95.                             This parameter can be set to ENABLE or DISABLE */
  96.  
  97.   uint32_t NART;       /*!< Enable or disable the non-automatic retransmission mode.
  98.                             This parameter can be set to ENABLE or DISABLE */
  99.  
  100.   uint32_t RFLM;       /*!< Enable or disable the receive FIFO Locked mode.
  101.                             This parameter can be set to ENABLE or DISABLE */
  102.  
  103.   uint32_t TXFP;       /*!< Enable or disable the transmit FIFO priority.
  104.                             This parameter can be set to ENABLE or DISABLE */
  105. }CAN_InitTypeDef;
  106.  
  107. /**
  108.   * @brief  CAN Tx message structure definition  
  109.   */
  110. typedef struct
  111. {
  112.   uint32_t StdId;    /*!< Specifies the standard identifier.
  113.                           This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
  114.  
  115.   uint32_t ExtId;    /*!< Specifies the extended identifier.
  116.                           This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
  117.  
  118.   uint32_t IDE;      /*!< Specifies the type of identifier for the message that will be transmitted.
  119.                           This parameter can be a value of @ref CAN_Identifier_Type */
  120.  
  121.   uint32_t RTR;      /*!< Specifies the type of frame for the message that will be transmitted.
  122.                           This parameter can be a value of @ref CAN_remote_transmission_request */
  123.  
  124.   uint32_t DLC;      /*!< Specifies the length of the frame that will be transmitted.
  125.                           This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
  126.  
  127.   uint8_t Data[8];   /*!< Contains the data to be transmitted.
  128.                           This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
  129.  
  130. }CanTxMsgTypeDef;
  131.  
  132. /**
  133.   * @brief  CAN Rx message structure definition
  134.   */
  135. typedef struct
  136. {
  137.   uint32_t StdId;       /*!< Specifies the standard identifier.
  138.                              This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
  139.  
  140.   uint32_t ExtId;       /*!< Specifies the extended identifier.
  141.                              This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
  142.  
  143.   uint32_t IDE;         /*!< Specifies the type of identifier for the message that will be received.
  144.                              This parameter can be a value of @ref CAN_Identifier_Type */
  145.  
  146.   uint32_t RTR;         /*!< Specifies the type of frame for the received message.
  147.                              This parameter can be a value of @ref CAN_remote_transmission_request */
  148.  
  149.   uint32_t DLC;         /*!< Specifies the length of the frame that will be received.
  150.                              This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
  151.  
  152.   uint8_t Data[8];      /*!< Contains the data to be received.
  153.                              This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
  154.  
  155.   uint32_t FMI;         /*!< Specifies the index of the filter the message stored in the mailbox passes through.
  156.                              This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
  157.  
  158.   uint32_t FIFONumber;  /*!< Specifies the receive FIFO number.
  159.                              This parameter can be CAN_FIFO0 or CAN_FIFO1 */
  160.  
  161. }CanRxMsgTypeDef;
  162.  
  163. /**
  164.   * @brief  CAN handle Structure definition
  165.   */
  166. typedef struct
  167. {
  168.   CAN_TypeDef                 *Instance;  /*!< Register base address          */
  169.  
  170.   CAN_InitTypeDef             Init;       /*!< CAN required parameters        */
  171.  
  172.   CanTxMsgTypeDef*            pTxMsg;     /*!< Pointer to transmit structure  */
  173.  
  174.   CanRxMsgTypeDef*            pRxMsg;     /*!< Pointer to reception structure for RX FIFO0 msg */
  175.  
  176.   CanRxMsgTypeDef*            pRx1Msg;    /*!< Pointer to reception structure for RX FIFO1 msg */
  177.  
  178.   __IO HAL_CAN_StateTypeDef   State;      /*!< CAN communication state        */
  179.  
  180.   HAL_LockTypeDef             Lock;       /*!< CAN locking object             */
  181.  
  182.   __IO uint32_t               ErrorCode;  /*!< CAN Error code                 */
  183.  
  184. }CAN_HandleTypeDef;
  185.  
  186. /**
  187.   * @}
  188.   */
  189.  
  190. /* Exported constants --------------------------------------------------------*/
  191. /** @defgroup CAN_Exported_Constants CAN Exported Constants
  192.   * @{
  193.   */
  194.  
  195. /** @defgroup CAN_Error_Code CAN Error Code
  196.   * @{
  197.   */
  198. #define   HAL_CAN_ERROR_NONE      0x00000000U    /*!< No error             */
  199. #define   HAL_CAN_ERROR_EWG       0x00000001U    /*!< EWG error            */
  200. #define   HAL_CAN_ERROR_EPV       0x00000002U    /*!< EPV error            */
  201. #define   HAL_CAN_ERROR_BOF       0x00000004U    /*!< BOF error            */
  202. #define   HAL_CAN_ERROR_STF       0x00000008U    /*!< Stuff error          */
  203. #define   HAL_CAN_ERROR_FOR       0x00000010U    /*!< Form error           */
  204. #define   HAL_CAN_ERROR_ACK       0x00000020U    /*!< Acknowledgment error */
  205. #define   HAL_CAN_ERROR_BR        0x00000040U    /*!< Bit recessive        */
  206. #define   HAL_CAN_ERROR_BD        0x00000080U    /*!< LEC dominant         */
  207. #define   HAL_CAN_ERROR_CRC       0x00000100U    /*!< LEC transfer error   */
  208. #define   HAL_CAN_ERROR_FOV0      0x00000200U    /*!< FIFO0 overrun error  */
  209. #define   HAL_CAN_ERROR_FOV1      0x00000400U    /*!< FIFO1 overrun error  */
  210. #define   HAL_CAN_ERROR_TXFAIL    0x00000800U    /*!< Transmit failure     */
  211. /**
  212.   * @}
  213.   */
  214.  
  215. /** @defgroup CAN_InitStatus CAN initialization Status
  216.   * @{
  217.   */
  218. #define CAN_INITSTATUS_FAILED       0x00000000U  /*!< CAN initialization failed */
  219. #define CAN_INITSTATUS_SUCCESS      0x00000001U  /*!< CAN initialization OK */
  220. /**
  221.   * @}
  222.   */
  223.  
  224. /** @defgroup CAN_operating_mode CAN Operating Mode
  225.   * @{
  226.   */
  227. #define CAN_MODE_NORMAL             0x00000000U                                /*!< Normal mode   */
  228. #define CAN_MODE_LOOPBACK           ((uint32_t)CAN_BTR_LBKM)                   /*!< Loopback mode */
  229. #define CAN_MODE_SILENT             ((uint32_t)CAN_BTR_SILM)                   /*!< Silent mode   */
  230. #define CAN_MODE_SILENT_LOOPBACK    ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM))  /*!< Loopback combined with silent mode */
  231. /**
  232.   * @}
  233.   */
  234.  
  235. /** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width
  236.   * @{
  237.   */
  238. #define CAN_SJW_1TQ                 0x00000000U                /*!< 1 time quantum */
  239. #define CAN_SJW_2TQ                 ((uint32_t)CAN_BTR_SJW_0)  /*!< 2 time quantum */
  240. #define CAN_SJW_3TQ                 ((uint32_t)CAN_BTR_SJW_1)  /*!< 3 time quantum */
  241. #define CAN_SJW_4TQ                 ((uint32_t)CAN_BTR_SJW)    /*!< 4 time quantum */
  242. /**
  243.   * @}
  244.   */
  245.  
  246. /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1
  247.   * @{
  248.   */
  249. #define CAN_BS1_1TQ                 0x00000000U                                                  /*!< 1 time quantum  */
  250. #define CAN_BS1_2TQ                 ((uint32_t)CAN_BTR_TS1_0)                                    /*!< 2 time quantum  */
  251. #define CAN_BS1_3TQ                 ((uint32_t)CAN_BTR_TS1_1)                                    /*!< 3 time quantum  */
  252. #define CAN_BS1_4TQ                 ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0))                  /*!< 4 time quantum  */
  253. #define CAN_BS1_5TQ                 ((uint32_t)CAN_BTR_TS1_2)                                    /*!< 5 time quantum  */
  254. #define CAN_BS1_6TQ                 ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0))                  /*!< 6 time quantum  */
  255. #define CAN_BS1_7TQ                 ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1))                  /*!< 7 time quantum  */
  256. #define CAN_BS1_8TQ                 ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0))  /*!< 8 time quantum  */
  257. #define CAN_BS1_9TQ                 ((uint32_t)CAN_BTR_TS1_3)                                    /*!< 9 time quantum  */
  258. #define CAN_BS1_10TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0))                  /*!< 10 time quantum */
  259. #define CAN_BS1_11TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1))                  /*!< 11 time quantum */
  260. #define CAN_BS1_12TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0))  /*!< 12 time quantum */
  261. #define CAN_BS1_13TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2))                  /*!< 13 time quantum */
  262. #define CAN_BS1_14TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0))  /*!< 14 time quantum */
  263. #define CAN_BS1_15TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1))  /*!< 15 time quantum */
  264. #define CAN_BS1_16TQ                ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
  265. /**
  266.   * @}
  267.   */
  268.  
  269. /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in bit segment 2
  270.   * @{
  271.   */
  272. #define CAN_BS2_1TQ                 0x00000000U                                  /*!< 1 time quantum */
  273. #define CAN_BS2_2TQ                 ((uint32_t)CAN_BTR_TS2_0)                    /*!< 2 time quantum */
  274. #define CAN_BS2_3TQ                 ((uint32_t)CAN_BTR_TS2_1)                    /*!< 3 time quantum */
  275. #define CAN_BS2_4TQ                 ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0))  /*!< 4 time quantum */
  276. #define CAN_BS2_5TQ                 ((uint32_t)CAN_BTR_TS2_2)                    /*!< 5 time quantum */
  277. #define CAN_BS2_6TQ                 ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0))  /*!< 6 time quantum */
  278. #define CAN_BS2_7TQ                 ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1))  /*!< 7 time quantum */
  279. #define CAN_BS2_8TQ                 ((uint32_t)CAN_BTR_TS2)                      /*!< 8 time quantum */
  280. /**
  281.   * @}
  282.   */
  283.  
  284. /** @defgroup CAN_filter_mode  CAN Filter Mode
  285.   * @{
  286.   */
  287. #define CAN_FILTERMODE_IDMASK       ((uint8_t)0x00)  /*!< Identifier mask mode */
  288. #define CAN_FILTERMODE_IDLIST       ((uint8_t)0x01)  /*!< Identifier list mode */
  289. /**
  290.   * @}
  291.   */
  292.  
  293. /** @defgroup CAN_filter_scale CAN Filter Scale
  294.   * @{
  295.   */
  296. #define CAN_FILTERSCALE_16BIT       ((uint8_t)0x00)  /*!< Two 16-bit filters */
  297. #define CAN_FILTERSCALE_32BIT       ((uint8_t)0x01)  /*!< One 32-bit filter  */
  298. /**
  299.   * @}
  300.   */
  301.  
  302. /** @defgroup CAN_filter_FIFO CAN Filter FIFO
  303.   * @{
  304.   */
  305. #define CAN_FILTER_FIFO0             ((uint8_t)0x00)  /*!< Filter FIFO 0 assignment for filter x */
  306. #define CAN_FILTER_FIFO1             ((uint8_t)0x01)  /*!< Filter FIFO 1 assignment for filter x */
  307. /**
  308.   * @}
  309.   */
  310.  
  311. /** @defgroup CAN_Identifier_Type CAN Identifier Type
  312.   * @{
  313.   */
  314. #define CAN_ID_STD                  0x00000000U  /*!< Standard Id */
  315. #define CAN_ID_EXT                  0x00000004U  /*!< Extended Id */
  316. /**
  317.   * @}
  318.   */
  319.  
  320. /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
  321.   * @{
  322.   */
  323. #define CAN_RTR_DATA                0x00000000U  /*!< Data frame */
  324. #define CAN_RTR_REMOTE              0x00000002U  /*!< Remote frame */
  325. /**
  326.   * @}
  327.   */
  328.  
  329. /** @defgroup CAN_transmit_constants CAN Transmit Constants
  330.   * @{
  331.   */
  332. #define CAN_TXSTATUS_NOMAILBOX      ((uint8_t)0x04)  /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */
  333. /**
  334.   * @}
  335.   */
  336.  
  337. /** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number
  338.   * @{
  339.   */
  340. #define CAN_FIFO0                   ((uint8_t)0x00)  /*!< CAN FIFO 0 used to receive */
  341. #define CAN_FIFO1                   ((uint8_t)0x01)  /*!< CAN FIFO 1 used to receive */
  342. /**
  343.   * @}
  344.   */
  345.  
  346. /** @defgroup CAN_flags CAN Flags
  347.   * @{
  348.   */
  349. /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
  350.    and CAN_ClearFlag() functions. */
  351. /* If the flag is 0x1XXXXXXX, it means that it can only be used with
  352.    CAN_GetFlagStatus() function.  */
  353.  
  354. /* Transmit Flags */
  355. #define CAN_FLAG_RQCP0             ((uint32_t)((TSR_REGISTER_INDEX << 8U) | CAN_TSR_RQCP0_BIT_POSITION))  /*!< Request MailBox0 flag         */
  356. #define CAN_FLAG_RQCP1             ((uint32_t)((TSR_REGISTER_INDEX << 8U) | CAN_TSR_RQCP1_BIT_POSITION))  /*!< Request MailBox1 flag         */
  357. #define CAN_FLAG_RQCP2             ((uint32_t)((TSR_REGISTER_INDEX << 8U) | CAN_TSR_RQCP2_BIT_POSITION))  /*!< Request MailBox2 flag         */
  358. #define CAN_FLAG_TXOK0             ((uint32_t)((TSR_REGISTER_INDEX << 8U) | CAN_TSR_TXOK0_BIT_POSITION))  /*!< Transmission OK MailBox0 flag */
  359. #define CAN_FLAG_TXOK1             ((uint32_t)((TSR_REGISTER_INDEX << 8U) | CAN_TSR_TXOK1_BIT_POSITION))  /*!< Transmission OK MailBox1 flag */
  360. #define CAN_FLAG_TXOK2             ((uint32_t)((TSR_REGISTER_INDEX << 8U) | CAN_TSR_TXOK2_BIT_POSITION))  /*!< Transmission OK MailBox2 flag */
  361. #define CAN_FLAG_TME0              ((uint32_t)((TSR_REGISTER_INDEX << 8U) | CAN_TSR_TME0_BIT_POSITION))   /*!< Transmit mailbox 0 empty flag */
  362. #define CAN_FLAG_TME1              ((uint32_t)((TSR_REGISTER_INDEX << 8U) | CAN_TSR_TME1_BIT_POSITION))   /*!< Transmit mailbox 0 empty flag */
  363. #define CAN_FLAG_TME2              ((uint32_t)((TSR_REGISTER_INDEX << 8U) | CAN_TSR_TME2_BIT_POSITION))   /*!< Transmit mailbox 0 empty flag */
  364.  
  365. /* Receive Flags */
  366. #define CAN_FLAG_FF0               ((uint32_t)((RF0R_REGISTER_INDEX << 8U) | CAN_RF0R_FF0_BIT_POSITION))  /*!< FIFO 0 Full flag    */
  367. #define CAN_FLAG_FOV0              ((uint32_t)((RF0R_REGISTER_INDEX << 8U) | CAN_RF0R_FOV0_BIT_POSITION)) /*!< FIFO 0 Overrun flag */
  368.  
  369. #define CAN_FLAG_FF1               ((uint32_t)((RF1R_REGISTER_INDEX << 8U) | CAN_RF1R_FF1_BIT_POSITION))  /*!< FIFO 1 Full flag    */
  370. #define CAN_FLAG_FOV1              ((uint32_t)((RF1R_REGISTER_INDEX << 8U) | CAN_RF1R_FOV1_BIT_POSITION)) /*!< FIFO 1 Overrun flag */
  371.  
  372. /* Operating Mode Flags */
  373. #define CAN_FLAG_WKU               ((uint32_t)((MSR_REGISTER_INDEX << 8U) | CAN_MSR_WKU_BIT_POSITION))    /*!< Wake up flag           */
  374. #define CAN_FLAG_SLAK              ((uint32_t)((MSR_REGISTER_INDEX << 8U) | CAN_MSR_SLAK_BIT_POSITION))   /*!< Sleep acknowledge flag */
  375. #define CAN_FLAG_SLAKI             ((uint32_t)((MSR_REGISTER_INDEX << 8U) | CAN_MSR_SLAKI_BIT_POSITION))  /*!< Sleep acknowledge flag */
  376.  
  377. /* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible.
  378.          In this case the SLAK bit can be polled.*/
  379.  
  380. /* Error Flags */
  381. #define CAN_FLAG_EWG               ((uint32_t)((ESR_REGISTER_INDEX << 8U) | CAN_ESR_EWG_BIT_POSITION))    /*!< Error warning flag   */
  382. #define CAN_FLAG_EPV               ((uint32_t)((ESR_REGISTER_INDEX << 8U) | CAN_ESR_EPV_BIT_POSITION))    /*!< Error passive flag   */
  383. #define CAN_FLAG_BOF               ((uint32_t)((ESR_REGISTER_INDEX << 8U) | CAN_ESR_BOF_BIT_POSITION))    /*!< Bus-Off flag         */
  384.  
  385. /**
  386.   * @}
  387.   */
  388.  
  389. /** @defgroup CAN_Interrupts CAN Interrupts
  390.   * @{
  391.   */
  392. #define CAN_IT_TME                  ((uint32_t)CAN_IER_TMEIE)   /*!< Transmit mailbox empty interrupt */
  393.  
  394. /* Receive Interrupts */
  395. #define CAN_IT_FMP0                 ((uint32_t)CAN_IER_FMPIE0)  /*!< FIFO 0 message pending interrupt */
  396. #define CAN_IT_FF0                  ((uint32_t)CAN_IER_FFIE0)   /*!< FIFO 0 full interrupt            */
  397. #define CAN_IT_FOV0                 ((uint32_t)CAN_IER_FOVIE0)  /*!< FIFO 0 overrun interrupt         */
  398. #define CAN_IT_FMP1                 ((uint32_t)CAN_IER_FMPIE1)  /*!< FIFO 1 message pending interrupt */
  399. #define CAN_IT_FF1                  ((uint32_t)CAN_IER_FFIE1)   /*!< FIFO 1 full interrupt            */
  400. #define CAN_IT_FOV1                 ((uint32_t)CAN_IER_FOVIE1)  /*!< FIFO 1 overrun interrupt         */
  401.  
  402. /* Operating Mode Interrupts */
  403. #define CAN_IT_WKU                  ((uint32_t)CAN_IER_WKUIE)  /*!< Wake-up interrupt           */
  404. #define CAN_IT_SLK                  ((uint32_t)CAN_IER_SLKIE)  /*!< Sleep acknowledge interrupt */
  405.  
  406. /* Error Interrupts */
  407. #define CAN_IT_EWG                  ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt   */
  408. #define CAN_IT_EPV                  ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt   */
  409. #define CAN_IT_BOF                  ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt         */
  410. #define CAN_IT_LEC                  ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */
  411. #define CAN_IT_ERR                  ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt           */
  412. /**
  413.   * @}
  414.   */
  415.  
  416. /**
  417.   * @}
  418.   */
  419.  
  420. /** @defgroup CAN_Private_Constants CAN Private Constants
  421.   * @{
  422.   */
  423.  
  424. /* CAN intermediate shift values used for CAN flags */
  425. #define TSR_REGISTER_INDEX      0x5U
  426. #define RF0R_REGISTER_INDEX     0x2U
  427. #define RF1R_REGISTER_INDEX     0x4U
  428. #define MSR_REGISTER_INDEX      0x1U
  429. #define ESR_REGISTER_INDEX      0x3U
  430.  
  431. /* CAN flags bits position into their respective register (TSR, RF0R, RF1R or MSR registers) */
  432. /* Transmit Flags */
  433. #define CAN_TSR_RQCP0_BIT_POSITION     0x00000000U
  434. #define CAN_TSR_RQCP1_BIT_POSITION     0x00000008U
  435. #define CAN_TSR_RQCP2_BIT_POSITION     0x00000010U
  436. #define CAN_TSR_TXOK0_BIT_POSITION     0x00000001U
  437. #define CAN_TSR_TXOK1_BIT_POSITION     0x00000009U
  438. #define CAN_TSR_TXOK2_BIT_POSITION     0x00000011U
  439. #define CAN_TSR_TME0_BIT_POSITION      0x0000001AU
  440. #define CAN_TSR_TME1_BIT_POSITION      0x0000001BU
  441. #define CAN_TSR_TME2_BIT_POSITION      0x0000001CU
  442.  
  443. /* Receive Flags */
  444. #define CAN_RF0R_FF0_BIT_POSITION      0x00000003U
  445. #define CAN_RF0R_FOV0_BIT_POSITION     0x00000004U
  446.  
  447. #define CAN_RF1R_FF1_BIT_POSITION      0x00000003U
  448. #define CAN_RF1R_FOV1_BIT_POSITION     0x00000004U
  449.  
  450. /* Operating Mode Flags */
  451. #define CAN_MSR_WKU_BIT_POSITION       0x00000003U
  452. #define CAN_MSR_SLAK_BIT_POSITION      0x00000001U
  453. #define CAN_MSR_SLAKI_BIT_POSITION     0x00000004U
  454.  
  455. /* Error Flags */
  456. #define CAN_ESR_EWG_BIT_POSITION       0x00000000U
  457. #define CAN_ESR_EPV_BIT_POSITION       0x00000001U
  458. #define CAN_ESR_BOF_BIT_POSITION       0x00000002U
  459.  
  460. /* Mask used by macro to get/clear CAN flags*/
  461. #define CAN_FLAG_MASK                  0x000000FFU
  462.  
  463. /* Mailboxes definition */
  464. #define CAN_TXMAILBOX_0   ((uint8_t)0x00)
  465. #define CAN_TXMAILBOX_1   ((uint8_t)0x01)
  466. #define CAN_TXMAILBOX_2   ((uint8_t)0x02)
  467. /**
  468.   * @}
  469.   */
  470.  
  471. /* Exported macros -----------------------------------------------------------*/
  472. /** @defgroup CAN_Exported_Macros CAN Exported Macros
  473.   * @{
  474.   */
  475.  
  476. /** @brief  Reset CAN handle state
  477.   * @param  __HANDLE__: CAN handle.
  478.   * @retval None
  479.   */
  480. #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
  481.  
  482. /**
  483.   * @brief  Enable the specified CAN interrupts
  484.   * @param  __HANDLE__: CAN handle.
  485.   * @param  __INTERRUPT__: CAN Interrupt.
  486.   *         This parameter can be one of the following values:
  487.   *            @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
  488.   *            @arg CAN_IT_FMP0: FIFO 0 message pending interrupt
  489.   *            @arg CAN_IT_FF0 : FIFO 0 full interrupt
  490.   *            @arg CAN_IT_FOV0: FIFO 0 overrun interrupt
  491.   *            @arg CAN_IT_FMP1: FIFO 1 message pending interrupt
  492.   *            @arg CAN_IT_FF1 : FIFO 1 full interrupt
  493.   *            @arg CAN_IT_FOV1: FIFO 1 overrun interrupt
  494.   *            @arg CAN_IT_WKU : Wake-up interrupt
  495.   *            @arg CAN_IT_SLK : Sleep acknowledge interrupt
  496.   *            @arg CAN_IT_EWG : Error warning interrupt
  497.   *            @arg CAN_IT_EPV : Error passive interrupt
  498.   *            @arg CAN_IT_BOF : Bus-off interrupt
  499.   *            @arg CAN_IT_LEC : Last error code interrupt
  500.   *            @arg CAN_IT_ERR : Error Interrupt
  501.   * @retval None.
  502.   */
  503. #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
  504.  
  505. /**
  506.   * @brief  Disable the specified CAN interrupts
  507.   * @param  __HANDLE__: CAN handle.
  508.   * @param  __INTERRUPT__: CAN Interrupt.
  509.   *         This parameter can be one of the following values:
  510.   *            @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
  511.   *            @arg CAN_IT_FMP0: FIFO 0 message pending interrupt
  512.   *            @arg CAN_IT_FF0 : FIFO 0 full interrupt
  513.   *            @arg CAN_IT_FOV0: FIFO 0 overrun interrupt
  514.   *            @arg CAN_IT_FMP1: FIFO 1 message pending interrupt
  515.   *            @arg CAN_IT_FF1 : FIFO 1 full interrupt
  516.   *            @arg CAN_IT_FOV1: FIFO 1 overrun interrupt
  517.   *            @arg CAN_IT_WKU : Wake-up interrupt
  518.   *            @arg CAN_IT_SLK : Sleep acknowledge interrupt
  519.   *            @arg CAN_IT_EWG : Error warning interrupt
  520.   *            @arg CAN_IT_EPV : Error passive interrupt
  521.   *            @arg CAN_IT_BOF : Bus-off interrupt
  522.   *            @arg CAN_IT_LEC : Last error code interrupt
  523.   *            @arg CAN_IT_ERR : Error Interrupt
  524.   * @retval None.
  525.   */
  526. #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
  527.  
  528. /**
  529.   * @brief  Return the number of pending received messages.
  530.   * @param  __HANDLE__: CAN handle.
  531.   * @param  __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
  532.   * @retval The number of pending message.
  533.   */
  534. #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
  535. ((uint8_t)((__HANDLE__)->Instance->RF0R & 0x03U)) : ((uint8_t)((__HANDLE__)->Instance->RF1R & 0x03U)))
  536.  
  537. /** @brief  Check whether the specified CAN flag is set or not.
  538.   * @param  __HANDLE__: specifies the CAN Handle.
  539.   * @param  __FLAG__: specifies the flag to check.
  540.   *         This parameter can be one of the following values:
  541.   *            @arg CAN_TSR_RQCP0: Request MailBox0 Flag
  542.   *            @arg CAN_TSR_RQCP1: Request MailBox1 Flag
  543.   *            @arg CAN_TSR_RQCP2: Request MailBox2 Flag
  544.   *            @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
  545.   *            @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
  546.   *            @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
  547.   *            @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
  548.   *            @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
  549.   *            @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
  550.   *            @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
  551.   *            @arg CAN_FLAG_FF0: FIFO 0 Full Flag
  552.   *            @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
  553.   *            @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
  554.   *            @arg CAN_FLAG_FF1: FIFO 1 Full Flag
  555.   *            @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
  556.   *            @arg CAN_FLAG_WKU: Wake up Flag
  557.   *            @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
  558.   *            @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
  559.   *            @arg CAN_FLAG_EWG: Error Warning Flag
  560.   *            @arg CAN_FLAG_EPV: Error Passive Flag
  561.   *            @arg CAN_FLAG_BOF: Bus-Off Flag
  562.   * @retval The new state of __FLAG__ (TRUE or FALSE).
  563.   */
  564. #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
  565. ((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
  566.  (((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
  567.  (((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
  568.  (((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
  569.  ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))))
  570.  
  571. /** @brief  Clear the specified CAN pending flag.
  572.   * @param  __HANDLE__: specifies the CAN Handle.
  573.   * @param  __FLAG__: specifies the flag to check.
  574.   *         This parameter can be one of the following values:
  575.   *            @arg CAN_TSR_RQCP0: Request MailBox0 Flag
  576.   *            @arg CAN_TSR_RQCP1: Request MailBox1 Flag
  577.   *            @arg CAN_TSR_RQCP2: Request MailBox2 Flag
  578.   *            @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
  579.   *            @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
  580.   *            @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
  581.   *            @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
  582.   *            @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
  583.   *            @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
  584.   *            @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
  585.   *            @arg CAN_FLAG_FF0: FIFO 0 Full Flag
  586.   *            @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
  587.   *            @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
  588.   *            @arg CAN_FLAG_FF1: FIFO 1 Full Flag
  589.   *            @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
  590.   *            @arg CAN_FLAG_WKU: Wake up Flag
  591.   *            @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
  592.   * @retval The new state of __FLAG__ (TRUE or FALSE).
  593.   */
  594. #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
  595. ((((__FLAG__) >> 8U) == TSR_REGISTER_INDEX) ? (((__HANDLE__)->Instance->TSR)  = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
  596.  (((__FLAG__) >> 8U) == RF0R_REGISTER_INDEX)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
  597.  (((__FLAG__) >> 8U) == RF1R_REGISTER_INDEX)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
  598.  (((__FLAG__) >> 8U) == MSR_REGISTER_INDEX) ? (((__HANDLE__)->Instance->MSR)  = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U)
  599.  
  600. /** @brief  Check if the specified CAN interrupt source is enabled or disabled.
  601.   * @param  __HANDLE__: specifies the CAN Handle.
  602.   * @param  __INTERRUPT__: specifies the CAN interrupt source to check.
  603.   *         This parameter can be one of the following values:
  604.   *            @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
  605.   *            @arg CAN_IT_FMP0: FIFO 0 message pending interrupt
  606.   *            @arg CAN_IT_FF0 : FIFO 0 full interrupt
  607.   *            @arg CAN_IT_FOV0: FIFO 0 overrun interrupt
  608.   *            @arg CAN_IT_FMP1: FIFO 1 message pending interrupt
  609.   *            @arg CAN_IT_FF1 : FIFO 1 full interrupt
  610.   *            @arg CAN_IT_FOV1: FIFO 1 overrun interrupt
  611.   *            @arg CAN_IT_WKU : Wake-up interrupt
  612.   *            @arg CAN_IT_SLK : Sleep acknowledge interrupt
  613.   *            @arg CAN_IT_EWG : Error warning interrupt
  614.   *            @arg CAN_IT_EPV : Error passive interrupt
  615.   *            @arg CAN_IT_BOF : Bus-off interrupt
  616.   *            @arg CAN_IT_LEC : Last error code interrupt
  617.   *            @arg CAN_IT_ERR : Error Interrupt
  618.   * @retval The new state of __IT__ (TRUE or FALSE).
  619.   */
  620. #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
  621.  
  622. /**
  623.   * @brief  Check the transmission status of a CAN Frame.
  624.   * @param  __HANDLE__: specifies the CAN Handle.
  625.   * @param  __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
  626.   * @retval The new status of transmission  (TRUE or FALSE).
  627.   */
  628. #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\
  629. (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TME0)) :\
  630.  ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TME1)) :\
  631.  ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TME2)))
  632.  
  633. /**
  634.   * @brief  Release the specified receive FIFO.
  635.   * @param  __HANDLE__: CAN handle.
  636.   * @param  __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
  637.   * @retval None.
  638.   */
  639. #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
  640. ((__HANDLE__)->Instance->RF0R = CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R = CAN_RF1R_RFOM1))
  641.  
  642. /**
  643.   * @brief  Cancel a transmit request.
  644.   * @param  __HANDLE__: specifies the CAN Handle.
  645.   * @param  __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
  646.   * @retval None.
  647.   */
  648. #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
  649. (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ0) :\
  650.  ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ1) :\
  651.  ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ2))
  652.  
  653. /**
  654.   * @brief  Enable or disables the DBG Freeze for CAN.
  655.   * @param  __HANDLE__: specifies the CAN Handle.
  656.   * @param  __NEWSTATE__: new state of the CAN peripheral.
  657.   *         This parameter can be: ENABLE (CAN reception/transmission is frozen
  658.   *         during debug. Reception FIFOs can still be accessed/controlled normally)
  659.   *         or DISABLE (CAN is working during debug).
  660.   * @retval None
  661.   */
  662. #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \
  663. ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF))
  664.  
  665. /**
  666.   * @}
  667.   */
  668.  
  669. /* Include CAN HAL Extension module */
  670. #include "stm32f1xx_hal_can_ex_legacy.h"
  671.  
  672. /* Exported functions --------------------------------------------------------*/
  673. /** @addtogroup CAN_Exported_Functions
  674.   * @{
  675.   */
  676.  
  677. /** @addtogroup CAN_Exported_Functions_Group1
  678.   * @brief    Initialization and Configuration functions
  679.   * @{
  680.   */
  681. /* Initialization and de-initialization functions *****************************/
  682. HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan);
  683. HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
  684. HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan);
  685. void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
  686. void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
  687. /**
  688.   * @}
  689.   */
  690.  
  691. /** @addtogroup CAN_Exported_Functions_Group2
  692.   * @brief    I/O operation functions
  693.   * @{
  694.   */
  695. /* I/O operation functions *****************************************************/
  696. HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
  697. HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan);
  698. HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
  699. HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
  700. HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan);
  701. HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
  702. void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
  703. void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
  704. void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
  705. void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
  706. /**
  707.   * @}
  708.   */
  709.  
  710. /** @addtogroup CAN_Exported_Functions_Group3
  711.   * @brief   CAN Peripheral State functions
  712.   * @{
  713.   */
  714. /* Peripheral State and Error functions ***************************************/
  715. uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
  716. HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
  717. /**
  718.   * @}
  719.   */
  720.  
  721. /**
  722.   * @}
  723.   */
  724.  
  725. /* Private macros --------------------------------------------------------*/
  726. /** @defgroup CAN_Private_Macros   CAN Private Macros
  727.   * @{
  728.   */
  729.  
  730. #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
  731.                            ((MODE) == CAN_MODE_LOOPBACK)|| \
  732.                            ((MODE) == CAN_MODE_SILENT) || \
  733.                            ((MODE) == CAN_MODE_SILENT_LOOPBACK))
  734. #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \
  735.                          ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
  736. #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
  737. #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
  738. #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U))
  739.  
  740. #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
  741.                                   ((MODE) == CAN_FILTERMODE_IDLIST))
  742. #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
  743.                                     ((SCALE) == CAN_FILTERSCALE_32BIT))
  744. #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
  745.                                   ((FIFO) == CAN_FILTER_FIFO1))
  746. #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28U)
  747.  
  748. #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
  749. #define IS_CAN_STDID(STDID)   ((STDID) <= 0x00007FFU)
  750. #define IS_CAN_EXTID(EXTID)   ((EXTID) <= 0x1FFFFFFFU)
  751. #define IS_CAN_DLC(DLC)       ((DLC) <= ((uint8_t)0x08))
  752.  
  753. #define IS_CAN_IDTYPE(IDTYPE)  (((IDTYPE) == CAN_ID_STD) || \
  754.                                 ((IDTYPE) == CAN_ID_EXT))
  755. #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
  756. #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
  757.  
  758. /**
  759.   * @}
  760.   */
  761.  
  762. /**
  763.   * @}
  764.   */
  765.  
  766. /**
  767.   * @}
  768.   */
  769.  
  770. #endif /* STM32F103x6) || STM32F103xB || STM32F103xE || STM32F103xG) || STM32F105xC || STM32F107xC */
  771.  
  772. #ifdef __cplusplus
  773. }
  774. #endif
  775.  
  776. #endif /* __STM32F1xx_HAL_CAN_LEGACY_H */
  777.