Subversion Repositories LedShow

Rev

Go to most recent revision | Blame | Compare with Previous | Last modification | View Log | Download | RSS feed

  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32_hal_legacy.h
  4.   * @author  MCD Application Team
  5.   * @version V1.1.1
  6.   * @date    12-May-2017
  7.   * @brief   This file contains aliases definition for the STM32Cube HAL constants
  8.   *          macros and functions maintained for legacy purpose.
  9.   ******************************************************************************
  10.   * @attention
  11.   *
  12.   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  13.   *
  14.   * Redistribution and use in source and binary forms, with or without modification,
  15.   * are permitted provided that the following conditions are met:
  16.   *   1. Redistributions of source code must retain the above copyright notice,
  17.   *      this list of conditions and the following disclaimer.
  18.   *   2. Redistributions in binary form must reproduce the above copyright notice,
  19.   *      this list of conditions and the following disclaimer in the documentation
  20.   *      and/or other materials provided with the distribution.
  21.   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  22.   *      may be used to endorse or promote products derived from this software
  23.   *      without specific prior written permission.
  24.   *
  25.   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  26.   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  27.   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  28.   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  29.   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  30.   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  31.   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  32.   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  33.   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  34.   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35.   *
  36.   ******************************************************************************
  37.   */
  38.  
  39. /* Define to prevent recursive inclusion -------------------------------------*/
  40. #ifndef __STM32_HAL_LEGACY
  41. #define __STM32_HAL_LEGACY
  42.  
  43. #ifdef __cplusplus
  44.  extern "C" {
  45. #endif
  46.  
  47. /* Includes ------------------------------------------------------------------*/
  48. /* Exported types ------------------------------------------------------------*/
  49. /* Exported constants --------------------------------------------------------*/
  50.  
  51. /** @defgroup HAL_AES_Aliased_Defines HAL CRYP Aliased Defines maintained for legacy purpose
  52.   * @{
  53.   */
  54. #define AES_FLAG_RDERR                  CRYP_FLAG_RDERR
  55. #define AES_FLAG_WRERR                  CRYP_FLAG_WRERR
  56. #define AES_CLEARFLAG_CCF               CRYP_CLEARFLAG_CCF
  57. #define AES_CLEARFLAG_RDERR             CRYP_CLEARFLAG_RDERR
  58. #define AES_CLEARFLAG_WRERR             CRYP_CLEARFLAG_WRERR
  59.  
  60. /**
  61.   * @}
  62.   */
  63.  
  64. /** @defgroup HAL_ADC_Aliased_Defines HAL ADC Aliased Defines maintained for legacy purpose
  65.   * @{
  66.   */
  67. #define ADC_RESOLUTION12b               ADC_RESOLUTION_12B
  68. #define ADC_RESOLUTION10b               ADC_RESOLUTION_10B
  69. #define ADC_RESOLUTION8b                ADC_RESOLUTION_8B
  70. #define ADC_RESOLUTION6b                ADC_RESOLUTION_6B
  71. #define OVR_DATA_OVERWRITTEN            ADC_OVR_DATA_OVERWRITTEN
  72. #define OVR_DATA_PRESERVED              ADC_OVR_DATA_PRESERVED
  73. #define EOC_SINGLE_CONV                 ADC_EOC_SINGLE_CONV
  74. #define EOC_SEQ_CONV                    ADC_EOC_SEQ_CONV
  75. #define EOC_SINGLE_SEQ_CONV             ADC_EOC_SINGLE_SEQ_CONV
  76. #define REGULAR_GROUP                   ADC_REGULAR_GROUP
  77. #define INJECTED_GROUP                  ADC_INJECTED_GROUP
  78. #define REGULAR_INJECTED_GROUP          ADC_REGULAR_INJECTED_GROUP
  79. #define AWD_EVENT                       ADC_AWD_EVENT
  80. #define AWD1_EVENT                      ADC_AWD1_EVENT
  81. #define AWD2_EVENT                      ADC_AWD2_EVENT
  82. #define AWD3_EVENT                      ADC_AWD3_EVENT
  83. #define OVR_EVENT                       ADC_OVR_EVENT
  84. #define JQOVF_EVENT                     ADC_JQOVF_EVENT
  85. #define ALL_CHANNELS                    ADC_ALL_CHANNELS
  86. #define REGULAR_CHANNELS                ADC_REGULAR_CHANNELS
  87. #define INJECTED_CHANNELS               ADC_INJECTED_CHANNELS
  88. #define SYSCFG_FLAG_SENSOR_ADC          ADC_FLAG_SENSOR
  89. #define SYSCFG_FLAG_VREF_ADC            ADC_FLAG_VREFINT
  90. #define ADC_CLOCKPRESCALER_PCLK_DIV1    ADC_CLOCK_SYNC_PCLK_DIV1
  91. #define ADC_CLOCKPRESCALER_PCLK_DIV2    ADC_CLOCK_SYNC_PCLK_DIV2
  92. #define ADC_CLOCKPRESCALER_PCLK_DIV4    ADC_CLOCK_SYNC_PCLK_DIV4
  93. #define ADC_CLOCKPRESCALER_PCLK_DIV6    ADC_CLOCK_SYNC_PCLK_DIV6
  94. #define ADC_CLOCKPRESCALER_PCLK_DIV8    ADC_CLOCK_SYNC_PCLK_DIV8
  95. #define ADC_EXTERNALTRIG0_T6_TRGO       ADC_EXTERNALTRIGCONV_T6_TRGO
  96. #define ADC_EXTERNALTRIG1_T21_CC2       ADC_EXTERNALTRIGCONV_T21_CC2
  97. #define ADC_EXTERNALTRIG2_T2_TRGO       ADC_EXTERNALTRIGCONV_T2_TRGO
  98. #define ADC_EXTERNALTRIG3_T2_CC4        ADC_EXTERNALTRIGCONV_T2_CC4  
  99. #define ADC_EXTERNALTRIG4_T22_TRGO      ADC_EXTERNALTRIGCONV_T22_TRGO
  100. #define ADC_EXTERNALTRIG7_EXT_IT11      ADC_EXTERNALTRIGCONV_EXT_IT11
  101. #define ADC_CLOCK_ASYNC                 ADC_CLOCK_ASYNC_DIV1
  102. #define ADC_EXTERNALTRIG_EDGE_NONE      ADC_EXTERNALTRIGCONVEDGE_NONE
  103. #define ADC_EXTERNALTRIG_EDGE_RISING    ADC_EXTERNALTRIGCONVEDGE_RISING
  104. #define ADC_EXTERNALTRIG_EDGE_FALLING   ADC_EXTERNALTRIGCONVEDGE_FALLING
  105. #define ADC_EXTERNALTRIG_EDGE_RISINGFALLING ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING
  106. #define ADC_SAMPLETIME_2CYCLE_5         ADC_SAMPLETIME_2CYCLES_5
  107.  
  108. #define HAL_ADC_STATE_BUSY_REG          HAL_ADC_STATE_REG_BUSY
  109. #define HAL_ADC_STATE_BUSY_INJ          HAL_ADC_STATE_INJ_BUSY
  110. #define HAL_ADC_STATE_EOC_REG           HAL_ADC_STATE_REG_EOC
  111. #define HAL_ADC_STATE_EOC_INJ           HAL_ADC_STATE_INJ_EOC
  112. #define HAL_ADC_STATE_ERROR             HAL_ADC_STATE_ERROR_INTERNAL
  113. #define HAL_ADC_STATE_BUSY              HAL_ADC_STATE_BUSY_INTERNAL
  114. #define HAL_ADC_STATE_AWD               HAL_ADC_STATE_AWD1
  115. /**
  116.   * @}
  117.   */
  118.  
  119. /** @defgroup HAL_CEC_Aliased_Defines HAL CEC Aliased Defines maintained for legacy purpose
  120.   * @{
  121.   */
  122.  
  123. #define __HAL_CEC_GET_IT __HAL_CEC_GET_FLAG
  124.  
  125. /**
  126.   * @}
  127.   */  
  128.    
  129. /** @defgroup HAL_COMP_Aliased_Defines HAL COMP Aliased Defines maintained for legacy purpose
  130.   * @{
  131.   */
  132. #define COMP_WINDOWMODE_DISABLED       COMP_WINDOWMODE_DISABLE
  133. #define COMP_WINDOWMODE_ENABLED        COMP_WINDOWMODE_ENABLE
  134. #define COMP_EXTI_LINE_COMP1_EVENT     COMP_EXTI_LINE_COMP1
  135. #define COMP_EXTI_LINE_COMP2_EVENT     COMP_EXTI_LINE_COMP2
  136. #define COMP_EXTI_LINE_COMP3_EVENT     COMP_EXTI_LINE_COMP3
  137. #define COMP_EXTI_LINE_COMP4_EVENT     COMP_EXTI_LINE_COMP4
  138. #define COMP_EXTI_LINE_COMP5_EVENT     COMP_EXTI_LINE_COMP5
  139. #define COMP_EXTI_LINE_COMP6_EVENT     COMP_EXTI_LINE_COMP6
  140. #define COMP_EXTI_LINE_COMP7_EVENT     COMP_EXTI_LINE_COMP7
  141. #define COMP_LPTIMCONNECTION_ENABLED   COMP_LPTIMCONNECTION_IN1_ENABLED    /*!< COMPX output is connected to LPTIM input 1 */
  142. #define COMP_OUTPUT_COMP6TIM2OCREFCLR  COMP_OUTPUT_COMP6_TIM2OCREFCLR
  143. #if defined(STM32F373xC) || defined(STM32F378xx)
  144. #define COMP_OUTPUT_TIM3IC1            COMP_OUTPUT_COMP1_TIM3IC1
  145. #define COMP_OUTPUT_TIM3OCREFCLR       COMP_OUTPUT_COMP1_TIM3OCREFCLR
  146. #endif /* STM32F373xC || STM32F378xx */
  147.  
  148. #if defined(STM32L0) || defined(STM32L4)
  149. #define COMP_WINDOWMODE_ENABLE         COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON
  150.  
  151. #define COMP_NONINVERTINGINPUT_IO1      COMP_INPUT_PLUS_IO1
  152. #define COMP_NONINVERTINGINPUT_IO2      COMP_INPUT_PLUS_IO2
  153. #define COMP_NONINVERTINGINPUT_IO3      COMP_INPUT_PLUS_IO3
  154. #define COMP_NONINVERTINGINPUT_IO4      COMP_INPUT_PLUS_IO4
  155. #define COMP_NONINVERTINGINPUT_IO5      COMP_INPUT_PLUS_IO5
  156. #define COMP_NONINVERTINGINPUT_IO6      COMP_INPUT_PLUS_IO6
  157.  
  158. #define COMP_INVERTINGINPUT_1_4VREFINT  COMP_INPUT_MINUS_1_4VREFINT
  159. #define COMP_INVERTINGINPUT_1_2VREFINT  COMP_INPUT_MINUS_1_2VREFINT
  160. #define COMP_INVERTINGINPUT_3_4VREFINT  COMP_INPUT_MINUS_3_4VREFINT
  161. #define COMP_INVERTINGINPUT_VREFINT     COMP_INPUT_MINUS_VREFINT
  162. #define COMP_INVERTINGINPUT_DAC1_CH1    COMP_INPUT_MINUS_DAC1_CH1
  163. #define COMP_INVERTINGINPUT_DAC1_CH2    COMP_INPUT_MINUS_DAC1_CH2
  164. #define COMP_INVERTINGINPUT_DAC1        COMP_INPUT_MINUS_DAC1_CH1
  165. #define COMP_INVERTINGINPUT_DAC2        COMP_INPUT_MINUS_DAC1_CH2
  166. #define COMP_INVERTINGINPUT_IO1         COMP_INPUT_MINUS_IO1
  167. #if defined(STM32L0)
  168. /* Issue fixed on STM32L0 COMP driver: only 2 dedicated IO (IO1 and IO2),     */
  169. /* IO2 was wrongly assigned to IO shared with DAC and IO3 was corresponding   */
  170. /* to the second dedicated IO (only for COMP2).                               */
  171. #define COMP_INVERTINGINPUT_IO2         COMP_INPUT_MINUS_DAC1_CH2
  172. #define COMP_INVERTINGINPUT_IO3         COMP_INPUT_MINUS_IO2
  173. #else
  174. #define COMP_INVERTINGINPUT_IO2         COMP_INPUT_MINUS_IO2
  175. #define COMP_INVERTINGINPUT_IO3         COMP_INPUT_MINUS_IO3
  176. #endif
  177. #define COMP_INVERTINGINPUT_IO4         COMP_INPUT_MINUS_IO4
  178. #define COMP_INVERTINGINPUT_IO5         COMP_INPUT_MINUS_IO5
  179.  
  180. #define COMP_OUTPUTLEVEL_LOW            COMP_OUTPUT_LEVEL_LOW
  181. #define COMP_OUTPUTLEVEL_HIGH           COMP_OUTPUT_LEVEL_HIGH
  182.  
  183. /* Note: Literal "COMP_FLAG_LOCK" kept for legacy purpose.                    */
  184. /*       To check COMP lock state, use macro "__HAL_COMP_IS_LOCKED()".        */
  185. #if defined(COMP_CSR_LOCK)
  186. #define COMP_FLAG_LOCK                 COMP_CSR_LOCK
  187. #elif defined(COMP_CSR_COMP1LOCK)
  188. #define COMP_FLAG_LOCK                 COMP_CSR_COMP1LOCK
  189. #elif defined(COMP_CSR_COMPxLOCK)
  190. #define COMP_FLAG_LOCK                 COMP_CSR_COMPxLOCK
  191. #endif
  192.  
  193. #if defined(STM32L4)
  194. #define COMP_BLANKINGSRCE_TIM1OC5        COMP_BLANKINGSRC_TIM1_OC5_COMP1
  195. #define COMP_BLANKINGSRCE_TIM2OC3        COMP_BLANKINGSRC_TIM2_OC3_COMP1
  196. #define COMP_BLANKINGSRCE_TIM3OC3        COMP_BLANKINGSRC_TIM3_OC3_COMP1
  197. #define COMP_BLANKINGSRCE_TIM3OC4        COMP_BLANKINGSRC_TIM3_OC4_COMP2
  198. #define COMP_BLANKINGSRCE_TIM8OC5        COMP_BLANKINGSRC_TIM8_OC5_COMP2
  199. #define COMP_BLANKINGSRCE_TIM15OC1       COMP_BLANKINGSRC_TIM15_OC1_COMP2
  200. #define COMP_BLANKINGSRCE_NONE           COMP_BLANKINGSRC_NONE
  201. #endif
  202.  
  203. #if defined(STM32L0)
  204. #define COMP_MODE_HIGHSPEED              COMP_POWERMODE_MEDIUMSPEED
  205. #define COMP_MODE_LOWSPEED               COMP_POWERMODE_ULTRALOWPOWER
  206. #else
  207. #define COMP_MODE_HIGHSPEED              COMP_POWERMODE_HIGHSPEED
  208. #define COMP_MODE_MEDIUMSPEED            COMP_POWERMODE_MEDIUMSPEED
  209. #define COMP_MODE_LOWPOWER               COMP_POWERMODE_LOWPOWER
  210. #define COMP_MODE_ULTRALOWPOWER          COMP_POWERMODE_ULTRALOWPOWER
  211. #endif
  212.  
  213. #endif
  214. /**
  215.   * @}
  216.   */
  217.  
  218. /** @defgroup HAL_CORTEX_Aliased_Defines HAL CORTEX Aliased Defines maintained for legacy purpose
  219.   * @{
  220.   */
  221. #define __HAL_CORTEX_SYSTICKCLK_CONFIG HAL_SYSTICK_CLKSourceConfig
  222. /**
  223.   * @}
  224.   */
  225.  
  226. /** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose
  227.   * @{
  228.   */
  229.  
  230. #define CRC_OUTPUTDATA_INVERSION_DISABLED    CRC_OUTPUTDATA_INVERSION_DISABLE
  231. #define CRC_OUTPUTDATA_INVERSION_ENABLED     CRC_OUTPUTDATA_INVERSION_ENABLE
  232.  
  233. /**
  234.   * @}
  235.   */
  236.  
  237. /** @defgroup HAL_DAC_Aliased_Defines HAL DAC Aliased Defines maintained for legacy purpose
  238.   * @{
  239.   */
  240.  
  241. #define DAC1_CHANNEL_1                                  DAC_CHANNEL_1
  242. #define DAC1_CHANNEL_2                                  DAC_CHANNEL_2
  243. #define DAC2_CHANNEL_1                                  DAC_CHANNEL_1
  244. #define DAC_WAVE_NONE                                   0x00000000U
  245. #define DAC_WAVE_NOISE                                  DAC_CR_WAVE1_0
  246. #define DAC_WAVE_TRIANGLE                               DAC_CR_WAVE1_1
  247. #define DAC_WAVEGENERATION_NONE                         DAC_WAVE_NONE
  248. #define DAC_WAVEGENERATION_NOISE                        DAC_WAVE_NOISE
  249. #define DAC_WAVEGENERATION_TRIANGLE                     DAC_WAVE_TRIANGLE
  250.  
  251. /**
  252.   * @}
  253.   */
  254.  
  255. /** @defgroup HAL_DMA_Aliased_Defines HAL DMA Aliased Defines maintained for legacy purpose
  256.   * @{
  257.   */
  258. #define HAL_REMAPDMA_ADC_DMA_CH2                DMA_REMAP_ADC_DMA_CH2      
  259. #define HAL_REMAPDMA_USART1_TX_DMA_CH4          DMA_REMAP_USART1_TX_DMA_CH4
  260. #define HAL_REMAPDMA_USART1_RX_DMA_CH5          DMA_REMAP_USART1_RX_DMA_CH5  
  261. #define HAL_REMAPDMA_TIM16_DMA_CH4              DMA_REMAP_TIM16_DMA_CH4      
  262. #define HAL_REMAPDMA_TIM17_DMA_CH2              DMA_REMAP_TIM17_DMA_CH2      
  263. #define HAL_REMAPDMA_USART3_DMA_CH32            DMA_REMAP_USART3_DMA_CH32
  264. #define HAL_REMAPDMA_TIM16_DMA_CH6              DMA_REMAP_TIM16_DMA_CH6
  265. #define HAL_REMAPDMA_TIM17_DMA_CH7              DMA_REMAP_TIM17_DMA_CH7      
  266. #define HAL_REMAPDMA_SPI2_DMA_CH67              DMA_REMAP_SPI2_DMA_CH67  
  267. #define HAL_REMAPDMA_USART2_DMA_CH67            DMA_REMAP_USART2_DMA_CH67
  268. #define HAL_REMAPDMA_USART3_DMA_CH32            DMA_REMAP_USART3_DMA_CH32  
  269. #define HAL_REMAPDMA_I2C1_DMA_CH76              DMA_REMAP_I2C1_DMA_CH76  
  270. #define HAL_REMAPDMA_TIM1_DMA_CH6               DMA_REMAP_TIM1_DMA_CH6    
  271. #define HAL_REMAPDMA_TIM2_DMA_CH7               DMA_REMAP_TIM2_DMA_CH7      
  272. #define HAL_REMAPDMA_TIM3_DMA_CH6               DMA_REMAP_TIM3_DMA_CH6    
  273.  
  274. #define IS_HAL_REMAPDMA                          IS_DMA_REMAP  
  275. #define __HAL_REMAPDMA_CHANNEL_ENABLE            __HAL_DMA_REMAP_CHANNEL_ENABLE
  276. #define __HAL_REMAPDMA_CHANNEL_DISABLE           __HAL_DMA_REMAP_CHANNEL_DISABLE
  277.  
  278.  
  279.  
  280. /**
  281.   * @}
  282.   */
  283.  
  284. /** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose
  285.   * @{
  286.   */
  287.  
  288. #define TYPEPROGRAM_BYTE              FLASH_TYPEPROGRAM_BYTE
  289. #define TYPEPROGRAM_HALFWORD          FLASH_TYPEPROGRAM_HALFWORD
  290. #define TYPEPROGRAM_WORD              FLASH_TYPEPROGRAM_WORD
  291. #define TYPEPROGRAM_DOUBLEWORD        FLASH_TYPEPROGRAM_DOUBLEWORD
  292. #define TYPEERASE_SECTORS             FLASH_TYPEERASE_SECTORS
  293. #define TYPEERASE_PAGES               FLASH_TYPEERASE_PAGES
  294. #define TYPEERASE_PAGEERASE           FLASH_TYPEERASE_PAGES
  295. #define TYPEERASE_MASSERASE           FLASH_TYPEERASE_MASSERASE
  296. #define WRPSTATE_DISABLE              OB_WRPSTATE_DISABLE
  297. #define WRPSTATE_ENABLE               OB_WRPSTATE_ENABLE
  298. #define HAL_FLASH_TIMEOUT_VALUE       FLASH_TIMEOUT_VALUE
  299. #define OBEX_PCROP                    OPTIONBYTE_PCROP
  300. #define OBEX_BOOTCONFIG               OPTIONBYTE_BOOTCONFIG
  301. #define PCROPSTATE_DISABLE            OB_PCROP_STATE_DISABLE
  302. #define PCROPSTATE_ENABLE             OB_PCROP_STATE_ENABLE
  303. #define TYPEERASEDATA_BYTE            FLASH_TYPEERASEDATA_BYTE
  304. #define TYPEERASEDATA_HALFWORD        FLASH_TYPEERASEDATA_HALFWORD
  305. #define TYPEERASEDATA_WORD            FLASH_TYPEERASEDATA_WORD
  306. #define TYPEPROGRAMDATA_BYTE          FLASH_TYPEPROGRAMDATA_BYTE
  307. #define TYPEPROGRAMDATA_HALFWORD      FLASH_TYPEPROGRAMDATA_HALFWORD
  308. #define TYPEPROGRAMDATA_WORD          FLASH_TYPEPROGRAMDATA_WORD
  309. #define TYPEPROGRAMDATA_FASTBYTE      FLASH_TYPEPROGRAMDATA_FASTBYTE
  310. #define TYPEPROGRAMDATA_FASTHALFWORD  FLASH_TYPEPROGRAMDATA_FASTHALFWORD
  311. #define TYPEPROGRAMDATA_FASTWORD      FLASH_TYPEPROGRAMDATA_FASTWORD
  312. #define PAGESIZE                      FLASH_PAGE_SIZE
  313. #define TYPEPROGRAM_FASTBYTE          FLASH_TYPEPROGRAM_BYTE
  314. #define TYPEPROGRAM_FASTHALFWORD      FLASH_TYPEPROGRAM_HALFWORD
  315. #define TYPEPROGRAM_FASTWORD          FLASH_TYPEPROGRAM_WORD
  316. #define VOLTAGE_RANGE_1               FLASH_VOLTAGE_RANGE_1
  317. #define VOLTAGE_RANGE_2               FLASH_VOLTAGE_RANGE_2
  318. #define VOLTAGE_RANGE_3               FLASH_VOLTAGE_RANGE_3
  319. #define VOLTAGE_RANGE_4               FLASH_VOLTAGE_RANGE_4
  320. #define TYPEPROGRAM_FAST              FLASH_TYPEPROGRAM_FAST
  321. #define TYPEPROGRAM_FAST_AND_LAST     FLASH_TYPEPROGRAM_FAST_AND_LAST
  322. #define WRPAREA_BANK1_AREAA           OB_WRPAREA_BANK1_AREAA
  323. #define WRPAREA_BANK1_AREAB           OB_WRPAREA_BANK1_AREAB
  324. #define WRPAREA_BANK2_AREAA           OB_WRPAREA_BANK2_AREAA
  325. #define WRPAREA_BANK2_AREAB           OB_WRPAREA_BANK2_AREAB
  326. #define IWDG_STDBY_FREEZE             OB_IWDG_STDBY_FREEZE
  327. #define IWDG_STDBY_ACTIVE             OB_IWDG_STDBY_RUN
  328. #define IWDG_STOP_FREEZE              OB_IWDG_STOP_FREEZE
  329. #define IWDG_STOP_ACTIVE              OB_IWDG_STOP_RUN
  330. #define FLASH_ERROR_NONE              HAL_FLASH_ERROR_NONE
  331. #define FLASH_ERROR_RD                HAL_FLASH_ERROR_RD
  332. #define FLASH_ERROR_PG                HAL_FLASH_ERROR_PROG
  333. #define FLASH_ERROR_PGP               HAL_FLASH_ERROR_PGS
  334. #define FLASH_ERROR_WRP               HAL_FLASH_ERROR_WRP
  335. #define FLASH_ERROR_OPTV              HAL_FLASH_ERROR_OPTV
  336. #define FLASH_ERROR_OPTVUSR           HAL_FLASH_ERROR_OPTVUSR
  337. #define FLASH_ERROR_PROG              HAL_FLASH_ERROR_PROG
  338. #define FLASH_ERROR_OP                HAL_FLASH_ERROR_OPERATION
  339. #define FLASH_ERROR_PGA               HAL_FLASH_ERROR_PGA
  340. #define FLASH_ERROR_SIZE              HAL_FLASH_ERROR_SIZE
  341. #define FLASH_ERROR_SIZ               HAL_FLASH_ERROR_SIZE
  342. #define FLASH_ERROR_PGS               HAL_FLASH_ERROR_PGS
  343. #define FLASH_ERROR_MIS               HAL_FLASH_ERROR_MIS
  344. #define FLASH_ERROR_FAST              HAL_FLASH_ERROR_FAST
  345. #define FLASH_ERROR_FWWERR            HAL_FLASH_ERROR_FWWERR
  346. #define FLASH_ERROR_NOTZERO           HAL_FLASH_ERROR_NOTZERO
  347. #define FLASH_ERROR_OPERATION         HAL_FLASH_ERROR_OPERATION
  348. #define FLASH_ERROR_ERS               HAL_FLASH_ERROR_ERS
  349. #define OB_WDG_SW                     OB_IWDG_SW
  350. #define OB_WDG_HW                     OB_IWDG_HW
  351. #define OB_SDADC12_VDD_MONITOR_SET    OB_SDACD_VDD_MONITOR_SET
  352. #define OB_SDADC12_VDD_MONITOR_RESET  OB_SDACD_VDD_MONITOR_RESET
  353. #define OB_RAM_PARITY_CHECK_SET       OB_SRAM_PARITY_SET
  354. #define OB_RAM_PARITY_CHECK_RESET     OB_SRAM_PARITY_RESET
  355. #define IS_OB_SDADC12_VDD_MONITOR     IS_OB_SDACD_VDD_MONITOR
  356. #define OB_RDP_LEVEL0                 OB_RDP_LEVEL_0
  357. #define OB_RDP_LEVEL1                 OB_RDP_LEVEL_1
  358. #define OB_RDP_LEVEL2                 OB_RDP_LEVEL_2
  359.  
  360. /**
  361.   * @}
  362.   */
  363.  
  364. /** @defgroup HAL_SYSCFG_Aliased_Defines HAL SYSCFG Aliased Defines maintained for legacy purpose
  365.   * @{
  366.   */
  367.  
  368. #define HAL_SYSCFG_FASTMODEPLUS_I2C_PA9    I2C_FASTMODEPLUS_PA9
  369. #define HAL_SYSCFG_FASTMODEPLUS_I2C_PA10   I2C_FASTMODEPLUS_PA10
  370. #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB6    I2C_FASTMODEPLUS_PB6
  371. #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB7    I2C_FASTMODEPLUS_PB7
  372. #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB8    I2C_FASTMODEPLUS_PB8
  373. #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB9    I2C_FASTMODEPLUS_PB9
  374. #define HAL_SYSCFG_FASTMODEPLUS_I2C1       I2C_FASTMODEPLUS_I2C1
  375. #define HAL_SYSCFG_FASTMODEPLUS_I2C2       I2C_FASTMODEPLUS_I2C2
  376. #define HAL_SYSCFG_FASTMODEPLUS_I2C3       I2C_FASTMODEPLUS_I2C3
  377. /**
  378.   * @}
  379.   */
  380.  
  381.  
  382. /** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose
  383.   * @{
  384.   */
  385. #if defined(STM32L4) || defined(STM32F7) || defined(STM32H7)
  386. #define FMC_NAND_PCC_WAIT_FEATURE_DISABLE       FMC_NAND_WAIT_FEATURE_DISABLE
  387. #define FMC_NAND_PCC_WAIT_FEATURE_ENABLE        FMC_NAND_WAIT_FEATURE_ENABLE
  388. #define FMC_NAND_PCC_MEM_BUS_WIDTH_8            FMC_NAND_MEM_BUS_WIDTH_8
  389. #define FMC_NAND_PCC_MEM_BUS_WIDTH_16           FMC_NAND_MEM_BUS_WIDTH_16
  390. #else
  391. #define FMC_NAND_WAIT_FEATURE_DISABLE           FMC_NAND_PCC_WAIT_FEATURE_DISABLE
  392. #define FMC_NAND_WAIT_FEATURE_ENABLE            FMC_NAND_PCC_WAIT_FEATURE_ENABLE
  393. #define FMC_NAND_MEM_BUS_WIDTH_8                FMC_NAND_PCC_MEM_BUS_WIDTH_8
  394. #define FMC_NAND_MEM_BUS_WIDTH_16               FMC_NAND_PCC_MEM_BUS_WIDTH_16
  395. #endif
  396. /**
  397.   * @}
  398.   */
  399.  
  400. /** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose
  401.   * @{
  402.   */
  403.  
  404. #define FSMC_NORSRAM_TYPEDEF                      FSMC_NORSRAM_TypeDef
  405. #define FSMC_NORSRAM_EXTENDED_TYPEDEF             FSMC_NORSRAM_EXTENDED_TypeDef
  406. /**
  407.   * @}
  408.   */
  409.  
  410. /** @defgroup HAL_GPIO_Aliased_Macros HAL GPIO Aliased Macros maintained for legacy purpose
  411.   * @{
  412.   */
  413. #define GET_GPIO_SOURCE                           GPIO_GET_INDEX
  414. #define GET_GPIO_INDEX                            GPIO_GET_INDEX
  415.  
  416. #if defined(STM32F4)
  417. #define GPIO_AF12_SDMMC                           GPIO_AF12_SDIO
  418. #define GPIO_AF12_SDMMC1                          GPIO_AF12_SDIO
  419. #endif
  420.  
  421. #if defined(STM32F7)
  422. #define GPIO_AF12_SDIO                            GPIO_AF12_SDMMC1
  423. #define GPIO_AF12_SDMMC                           GPIO_AF12_SDMMC1
  424. #endif
  425.  
  426. #if defined(STM32L4)
  427. #define GPIO_AF12_SDIO                            GPIO_AF12_SDMMC1
  428. #define GPIO_AF12_SDMMC                           GPIO_AF12_SDMMC1
  429. #endif
  430.  
  431. #define GPIO_AF0_LPTIM                            GPIO_AF0_LPTIM1
  432. #define GPIO_AF1_LPTIM                            GPIO_AF1_LPTIM1
  433. #define GPIO_AF2_LPTIM                            GPIO_AF2_LPTIM1
  434.  
  435. #if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7)
  436. #define  GPIO_SPEED_LOW                           GPIO_SPEED_FREQ_LOW    
  437. #define  GPIO_SPEED_MEDIUM                        GPIO_SPEED_FREQ_MEDIUM    
  438. #define  GPIO_SPEED_FAST                          GPIO_SPEED_FREQ_HIGH    
  439. #define  GPIO_SPEED_HIGH                          GPIO_SPEED_FREQ_VERY_HIGH      
  440. #endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 */
  441.  
  442. #if defined(STM32L1)
  443.  #define  GPIO_SPEED_VERY_LOW    GPIO_SPEED_FREQ_LOW    
  444.  #define  GPIO_SPEED_LOW         GPIO_SPEED_FREQ_MEDIUM    
  445.  #define  GPIO_SPEED_MEDIUM      GPIO_SPEED_FREQ_HIGH    
  446.  #define  GPIO_SPEED_HIGH        GPIO_SPEED_FREQ_VERY_HIGH    
  447. #endif /* STM32L1 */
  448.  
  449. #if defined(STM32F0) || defined(STM32F3) || defined(STM32F1)
  450.  #define  GPIO_SPEED_LOW    GPIO_SPEED_FREQ_LOW
  451.  #define  GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM
  452.  #define  GPIO_SPEED_HIGH   GPIO_SPEED_FREQ_HIGH
  453. #endif /* STM32F0 || STM32F3 || STM32F1 */
  454.  
  455. #define GPIO_AF6_DFSDM                            GPIO_AF6_DFSDM1
  456. /**
  457.   * @}
  458.   */
  459.  
  460. /** @defgroup HAL_JPEG_Aliased_Macros HAL JPEG Aliased Macros maintained for legacy purpose
  461.   * @{
  462.   */
  463.  
  464. #if defined(STM32H7)
  465.  #define __HAL_RCC_JPEG_CLK_ENABLE               __HAL_RCC_JPGDECEN_CLK_ENABLE
  466.  #define __HAL_RCC_JPEG_CLK_DISABLE              __HAL_RCC_JPGDECEN_CLK_DISABLE
  467.  #define __HAL_RCC_JPEG_FORCE_RESET              __HAL_RCC_JPGDECRST_FORCE_RESET
  468.  #define __HAL_RCC_JPEG_RELEASE_RESET            __HAL_RCC_JPGDECRST_RELEASE_RESET
  469.  #define __HAL_RCC_JPEG_CLK_SLEEP_ENABLE         __HAL_RCC_JPGDEC_CLK_SLEEP_ENABLE
  470.  #define __HAL_RCC_JPEG_CLK_SLEEP_DISABLE        __HAL_RCC_JPGDEC_CLK_SLEEP_DISABLE  
  471. #endif /* STM32H7  */
  472.  
  473.  
  474. /**
  475.   * @}
  476.   */
  477.  
  478.  
  479. /** @defgroup HAL_HRTIM_Aliased_Macros HAL HRTIM Aliased Macros maintained for legacy purpose
  480.   * @{
  481.   */
  482. #define HRTIM_TIMDELAYEDPROTECTION_DISABLED           HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DISABLED
  483. #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68  HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_EEV6
  484. #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_EEV68  HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_EEV6
  485. #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV68  HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV6
  486. #define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68     HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6
  487. #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7
  488. #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7
  489. #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79  HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7
  490. #define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79     HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7
  491.    
  492. #define __HAL_HRTIM_SetCounter        __HAL_HRTIM_SETCOUNTER
  493. #define __HAL_HRTIM_GetCounter        __HAL_HRTIM_GETCOUNTER
  494. #define __HAL_HRTIM_SetPeriod         __HAL_HRTIM_SETPERIOD
  495. #define __HAL_HRTIM_GetPeriod         __HAL_HRTIM_GETPERIOD
  496. #define __HAL_HRTIM_SetClockPrescaler __HAL_HRTIM_SETCLOCKPRESCALER
  497. #define __HAL_HRTIM_GetClockPrescaler __HAL_HRTIM_GETCLOCKPRESCALER
  498. #define __HAL_HRTIM_SetCompare        __HAL_HRTIM_SETCOMPARE
  499. #define __HAL_HRTIM_GetCompare        __HAL_HRTIM_GETCOMPARE
  500. /**
  501.   * @}
  502.   */
  503.  
  504. /** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose
  505.   * @{
  506.   */
  507. #define I2C_DUALADDRESS_DISABLED                I2C_DUALADDRESS_DISABLE
  508. #define I2C_DUALADDRESS_ENABLED                 I2C_DUALADDRESS_ENABLE
  509. #define I2C_GENERALCALL_DISABLED                I2C_GENERALCALL_DISABLE
  510. #define I2C_GENERALCALL_ENABLED                 I2C_GENERALCALL_ENABLE
  511. #define I2C_NOSTRETCH_DISABLED                  I2C_NOSTRETCH_DISABLE
  512. #define I2C_NOSTRETCH_ENABLED                   I2C_NOSTRETCH_ENABLE
  513. #define I2C_ANALOGFILTER_ENABLED                I2C_ANALOGFILTER_ENABLE
  514. #define I2C_ANALOGFILTER_DISABLED               I2C_ANALOGFILTER_DISABLE
  515. #if defined(STM32F0) || defined(STM32F1) || defined(STM32F3) || defined(STM32G0) || defined(STM32L4) || defined(STM32L1) || defined(STM32F7)
  516. #define HAL_I2C_STATE_MEM_BUSY_TX               HAL_I2C_STATE_BUSY_TX
  517. #define HAL_I2C_STATE_MEM_BUSY_RX               HAL_I2C_STATE_BUSY_RX
  518. #define HAL_I2C_STATE_MASTER_BUSY_TX            HAL_I2C_STATE_BUSY_TX
  519. #define HAL_I2C_STATE_MASTER_BUSY_RX            HAL_I2C_STATE_BUSY_RX
  520. #define HAL_I2C_STATE_SLAVE_BUSY_TX             HAL_I2C_STATE_BUSY_TX
  521. #define HAL_I2C_STATE_SLAVE_BUSY_RX             HAL_I2C_STATE_BUSY_RX
  522. #endif
  523. /**
  524.   * @}
  525.   */
  526.  
  527. /** @defgroup HAL_IRDA_Aliased_Defines HAL IRDA Aliased Defines maintained for legacy purpose
  528.   * @{
  529.   */
  530. #define IRDA_ONE_BIT_SAMPLE_DISABLED            IRDA_ONE_BIT_SAMPLE_DISABLE
  531. #define IRDA_ONE_BIT_SAMPLE_ENABLED             IRDA_ONE_BIT_SAMPLE_ENABLE
  532.  
  533. /**
  534.   * @}
  535.   */
  536.  
  537. /** @defgroup HAL_IWDG_Aliased_Defines HAL IWDG Aliased Defines maintained for legacy purpose
  538.   * @{
  539.   */
  540. #define KR_KEY_RELOAD                   IWDG_KEY_RELOAD
  541. #define KR_KEY_ENABLE                   IWDG_KEY_ENABLE
  542. #define KR_KEY_EWA                      IWDG_KEY_WRITE_ACCESS_ENABLE
  543. #define KR_KEY_DWA                      IWDG_KEY_WRITE_ACCESS_DISABLE
  544. /**
  545.   * @}
  546.   */
  547.  
  548. /** @defgroup HAL_LPTIM_Aliased_Defines HAL LPTIM Aliased Defines maintained for legacy purpose
  549.   * @{
  550.   */
  551.  
  552. #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSISTION LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION
  553. #define LPTIM_CLOCKSAMPLETIME_2TRANSISTIONS     LPTIM_CLOCKSAMPLETIME_2TRANSITIONS
  554. #define LPTIM_CLOCKSAMPLETIME_4TRANSISTIONS     LPTIM_CLOCKSAMPLETIME_4TRANSITIONS
  555. #define LPTIM_CLOCKSAMPLETIME_8TRANSISTIONS     LPTIM_CLOCKSAMPLETIME_8TRANSITIONS
  556.  
  557. #define LPTIM_CLOCKPOLARITY_RISINGEDGE          LPTIM_CLOCKPOLARITY_RISING
  558. #define LPTIM_CLOCKPOLARITY_FALLINGEDGE         LPTIM_CLOCKPOLARITY_FALLING
  559. #define LPTIM_CLOCKPOLARITY_BOTHEDGES           LPTIM_CLOCKPOLARITY_RISING_FALLING
  560.  
  561. #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION  LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION
  562. #define LPTIM_TRIGSAMPLETIME_2TRANSISTIONS      LPTIM_TRIGSAMPLETIME_2TRANSITIONS
  563. #define LPTIM_TRIGSAMPLETIME_4TRANSISTIONS      LPTIM_TRIGSAMPLETIME_4TRANSITIONS
  564. #define LPTIM_TRIGSAMPLETIME_8TRANSISTIONS      LPTIM_TRIGSAMPLETIME_8TRANSITIONS        
  565.  
  566. /* The following 3 definition have also been present in a temporary version of lptim.h */
  567. /* They need to be renamed also to the right name, just in case */
  568. #define LPTIM_TRIGSAMPLETIME_2TRANSITION        LPTIM_TRIGSAMPLETIME_2TRANSITIONS
  569. #define LPTIM_TRIGSAMPLETIME_4TRANSITION        LPTIM_TRIGSAMPLETIME_4TRANSITIONS
  570. #define LPTIM_TRIGSAMPLETIME_8TRANSITION        LPTIM_TRIGSAMPLETIME_8TRANSITIONS
  571.  
  572. /**
  573.   * @}
  574.   */
  575.  
  576. /** @defgroup HAL_NAND_Aliased_Defines HAL NAND Aliased Defines maintained for legacy purpose
  577.   * @{
  578.   */
  579. #define HAL_NAND_Read_Page              HAL_NAND_Read_Page_8b
  580. #define HAL_NAND_Write_Page             HAL_NAND_Write_Page_8b
  581. #define HAL_NAND_Read_SpareArea         HAL_NAND_Read_SpareArea_8b
  582. #define HAL_NAND_Write_SpareArea        HAL_NAND_Write_SpareArea_8b
  583.  
  584. #define NAND_AddressTypedef             NAND_AddressTypeDef
  585.  
  586. #define __ARRAY_ADDRESS                 ARRAY_ADDRESS
  587. #define __ADDR_1st_CYCLE                ADDR_1ST_CYCLE
  588. #define __ADDR_2nd_CYCLE                ADDR_2ND_CYCLE
  589. #define __ADDR_3rd_CYCLE                ADDR_3RD_CYCLE
  590. #define __ADDR_4th_CYCLE                ADDR_4TH_CYCLE
  591. /**
  592.   * @}
  593.   */
  594.    
  595. /** @defgroup HAL_NOR_Aliased_Defines HAL NOR Aliased Defines maintained for legacy purpose
  596.   * @{
  597.   */
  598. #define NOR_StatusTypedef              HAL_NOR_StatusTypeDef
  599. #define NOR_SUCCESS                    HAL_NOR_STATUS_SUCCESS
  600. #define NOR_ONGOING                    HAL_NOR_STATUS_ONGOING
  601. #define NOR_ERROR                      HAL_NOR_STATUS_ERROR
  602. #define NOR_TIMEOUT                    HAL_NOR_STATUS_TIMEOUT
  603.  
  604. #define __NOR_WRITE                    NOR_WRITE
  605. #define __NOR_ADDR_SHIFT               NOR_ADDR_SHIFT
  606. /**
  607.   * @}
  608.   */
  609.  
  610. /** @defgroup HAL_OPAMP_Aliased_Defines HAL OPAMP Aliased Defines maintained for legacy purpose
  611.   * @{
  612.   */
  613.  
  614. #define OPAMP_NONINVERTINGINPUT_VP0           OPAMP_NONINVERTINGINPUT_IO0
  615. #define OPAMP_NONINVERTINGINPUT_VP1           OPAMP_NONINVERTINGINPUT_IO1
  616. #define OPAMP_NONINVERTINGINPUT_VP2           OPAMP_NONINVERTINGINPUT_IO2
  617. #define OPAMP_NONINVERTINGINPUT_VP3           OPAMP_NONINVERTINGINPUT_IO3
  618.                                              
  619. #define OPAMP_SEC_NONINVERTINGINPUT_VP0       OPAMP_SEC_NONINVERTINGINPUT_IO0
  620. #define OPAMP_SEC_NONINVERTINGINPUT_VP1       OPAMP_SEC_NONINVERTINGINPUT_IO1
  621. #define OPAMP_SEC_NONINVERTINGINPUT_VP2       OPAMP_SEC_NONINVERTINGINPUT_IO2
  622. #define OPAMP_SEC_NONINVERTINGINPUT_VP3       OPAMP_SEC_NONINVERTINGINPUT_IO3  
  623.  
  624. #define OPAMP_INVERTINGINPUT_VM0              OPAMP_INVERTINGINPUT_IO0
  625. #define OPAMP_INVERTINGINPUT_VM1              OPAMP_INVERTINGINPUT_IO1
  626.  
  627. #define IOPAMP_INVERTINGINPUT_VM0             OPAMP_INVERTINGINPUT_IO0
  628. #define IOPAMP_INVERTINGINPUT_VM1             OPAMP_INVERTINGINPUT_IO1
  629.  
  630. #define OPAMP_SEC_INVERTINGINPUT_VM0          OPAMP_SEC_INVERTINGINPUT_IO0
  631. #define OPAMP_SEC_INVERTINGINPUT_VM1          OPAMP_SEC_INVERTINGINPUT_IO1    
  632.  
  633. #define OPAMP_INVERTINGINPUT_VINM             OPAMP_SEC_INVERTINGINPUT_IO1
  634.                                                                      
  635. #define OPAMP_PGACONNECT_NO                   OPAMP_PGA_CONNECT_INVERTINGINPUT_NO            
  636. #define OPAMP_PGACONNECT_VM0                  OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0            
  637. #define OPAMP_PGACONNECT_VM1                  OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1          
  638.                                                        
  639. /**
  640.   * @}
  641.   */
  642.  
  643. /** @defgroup HAL_I2S_Aliased_Defines HAL I2S Aliased Defines maintained for legacy purpose
  644.   * @{
  645.   */
  646. #define I2S_STANDARD_PHILLIPS      I2S_STANDARD_PHILIPS
  647. #if defined(STM32F7)
  648.   #define I2S_CLOCK_SYSCLK           I2S_CLOCK_PLL
  649. #endif
  650. /**
  651.   * @}
  652.   */
  653.  
  654. /** @defgroup HAL_PCCARD_Aliased_Defines HAL PCCARD Aliased Defines maintained for legacy purpose
  655.   * @{
  656.   */
  657.  
  658. /* Compact Flash-ATA registers description */
  659. #define CF_DATA                       ATA_DATA                
  660. #define CF_SECTOR_COUNT               ATA_SECTOR_COUNT        
  661. #define CF_SECTOR_NUMBER              ATA_SECTOR_NUMBER      
  662. #define CF_CYLINDER_LOW               ATA_CYLINDER_LOW        
  663. #define CF_CYLINDER_HIGH              ATA_CYLINDER_HIGH      
  664. #define CF_CARD_HEAD                  ATA_CARD_HEAD          
  665. #define CF_STATUS_CMD                 ATA_STATUS_CMD          
  666. #define CF_STATUS_CMD_ALTERNATE       ATA_STATUS_CMD_ALTERNATE
  667. #define CF_COMMON_DATA_AREA           ATA_COMMON_DATA_AREA    
  668.  
  669. /* Compact Flash-ATA commands */
  670. #define CF_READ_SECTOR_CMD            ATA_READ_SECTOR_CMD
  671. #define CF_WRITE_SECTOR_CMD           ATA_WRITE_SECTOR_CMD
  672. #define CF_ERASE_SECTOR_CMD           ATA_ERASE_SECTOR_CMD
  673. #define CF_IDENTIFY_CMD               ATA_IDENTIFY_CMD
  674.  
  675. #define PCCARD_StatusTypedef          HAL_PCCARD_StatusTypeDef
  676. #define PCCARD_SUCCESS                HAL_PCCARD_STATUS_SUCCESS
  677. #define PCCARD_ONGOING                HAL_PCCARD_STATUS_ONGOING
  678. #define PCCARD_ERROR                  HAL_PCCARD_STATUS_ERROR
  679. #define PCCARD_TIMEOUT                HAL_PCCARD_STATUS_TIMEOUT
  680. /**
  681.   * @}
  682.   */
  683.  
  684. /** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose
  685.   * @{
  686.   */
  687.  
  688. #define FORMAT_BIN                  RTC_FORMAT_BIN
  689. #define FORMAT_BCD                  RTC_FORMAT_BCD
  690.  
  691. #define RTC_ALARMSUBSECONDMASK_None     RTC_ALARMSUBSECONDMASK_NONE
  692. #define RTC_TAMPERERASEBACKUP_ENABLED   RTC_TAMPER_ERASE_BACKUP_ENABLE
  693. #define RTC_TAMPERERASEBACKUP_DISABLED  RTC_TAMPER_ERASE_BACKUP_DISABLE
  694. #define RTC_TAMPERMASK_FLAG_DISABLED    RTC_TAMPERMASK_FLAG_DISABLE
  695. #define RTC_TAMPERMASK_FLAG_ENABLED     RTC_TAMPERMASK_FLAG_ENABLE
  696.  
  697. #define RTC_MASKTAMPERFLAG_DISABLED     RTC_TAMPERMASK_FLAG_DISABLE
  698. #define RTC_MASKTAMPERFLAG_ENABLED      RTC_TAMPERMASK_FLAG_ENABLE
  699. #define RTC_TAMPERERASEBACKUP_ENABLED   RTC_TAMPER_ERASE_BACKUP_ENABLE
  700. #define RTC_TAMPERERASEBACKUP_DISABLED  RTC_TAMPER_ERASE_BACKUP_DISABLE
  701. #define RTC_MASKTAMPERFLAG_DISABLED     RTC_TAMPERMASK_FLAG_DISABLE
  702. #define RTC_MASKTAMPERFLAG_ENABLED      RTC_TAMPERMASK_FLAG_ENABLE
  703. #define RTC_TAMPER1_2_INTERRUPT         RTC_ALL_TAMPER_INTERRUPT
  704. #define RTC_TAMPER1_2_3_INTERRUPT       RTC_ALL_TAMPER_INTERRUPT
  705.  
  706. #define RTC_TIMESTAMPPIN_PC13  RTC_TIMESTAMPPIN_DEFAULT
  707. #define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1
  708. #define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1
  709. #define RTC_TIMESTAMPPIN_PC1   RTC_TIMESTAMPPIN_POS2
  710.  
  711. #define RTC_OUTPUT_REMAP_PC13  RTC_OUTPUT_REMAP_NONE
  712. #define RTC_OUTPUT_REMAP_PB14  RTC_OUTPUT_REMAP_POS1
  713. #define RTC_OUTPUT_REMAP_PB2   RTC_OUTPUT_REMAP_POS1
  714.  
  715. #define RTC_TAMPERPIN_PC13 RTC_TAMPERPIN_DEFAULT
  716. #define RTC_TAMPERPIN_PA0  RTC_TAMPERPIN_POS1
  717. #define RTC_TAMPERPIN_PI8  RTC_TAMPERPIN_POS1
  718.  
  719. /**
  720.   * @}
  721.   */
  722.  
  723.  
  724. /** @defgroup HAL_SMARTCARD_Aliased_Defines HAL SMARTCARD Aliased Defines maintained for legacy purpose
  725.   * @{
  726.   */
  727. #define SMARTCARD_NACK_ENABLED                  SMARTCARD_NACK_ENABLE
  728. #define SMARTCARD_NACK_DISABLED                 SMARTCARD_NACK_DISABLE
  729.  
  730. #define SMARTCARD_ONEBIT_SAMPLING_DISABLED      SMARTCARD_ONE_BIT_SAMPLE_DISABLE
  731. #define SMARTCARD_ONEBIT_SAMPLING_ENABLED       SMARTCARD_ONE_BIT_SAMPLE_ENABLE
  732. #define SMARTCARD_ONEBIT_SAMPLING_DISABLE       SMARTCARD_ONE_BIT_SAMPLE_DISABLE
  733. #define SMARTCARD_ONEBIT_SAMPLING_ENABLE        SMARTCARD_ONE_BIT_SAMPLE_ENABLE
  734.  
  735. #define SMARTCARD_TIMEOUT_DISABLED              SMARTCARD_TIMEOUT_DISABLE
  736. #define SMARTCARD_TIMEOUT_ENABLED               SMARTCARD_TIMEOUT_ENABLE
  737.  
  738. #define SMARTCARD_LASTBIT_DISABLED              SMARTCARD_LASTBIT_DISABLE
  739. #define SMARTCARD_LASTBIT_ENABLED               SMARTCARD_LASTBIT_ENABLE
  740. /**
  741.   * @}
  742.   */
  743.  
  744.  
  745. /** @defgroup HAL_SMBUS_Aliased_Defines HAL SMBUS Aliased Defines maintained for legacy purpose
  746.   * @{
  747.   */
  748. #define SMBUS_DUALADDRESS_DISABLED      SMBUS_DUALADDRESS_DISABLE
  749. #define SMBUS_DUALADDRESS_ENABLED       SMBUS_DUALADDRESS_ENABLE
  750. #define SMBUS_GENERALCALL_DISABLED      SMBUS_GENERALCALL_DISABLE
  751. #define SMBUS_GENERALCALL_ENABLED       SMBUS_GENERALCALL_ENABLE
  752. #define SMBUS_NOSTRETCH_DISABLED        SMBUS_NOSTRETCH_DISABLE
  753. #define SMBUS_NOSTRETCH_ENABLED         SMBUS_NOSTRETCH_ENABLE
  754. #define SMBUS_ANALOGFILTER_ENABLED      SMBUS_ANALOGFILTER_ENABLE
  755. #define SMBUS_ANALOGFILTER_DISABLED     SMBUS_ANALOGFILTER_DISABLE
  756. #define SMBUS_PEC_DISABLED              SMBUS_PEC_DISABLE
  757. #define SMBUS_PEC_ENABLED               SMBUS_PEC_ENABLE
  758. #define HAL_SMBUS_STATE_SLAVE_LISTEN    HAL_SMBUS_STATE_LISTEN
  759. /**
  760.   * @}
  761.   */
  762.  
  763. /** @defgroup HAL_SPI_Aliased_Defines HAL SPI Aliased Defines maintained for legacy purpose
  764.   * @{
  765.   */
  766. #define SPI_TIMODE_DISABLED             SPI_TIMODE_DISABLE
  767. #define SPI_TIMODE_ENABLED              SPI_TIMODE_ENABLE
  768.  
  769. #define SPI_CRCCALCULATION_DISABLED     SPI_CRCCALCULATION_DISABLE
  770. #define SPI_CRCCALCULATION_ENABLED      SPI_CRCCALCULATION_ENABLE
  771.  
  772. #define SPI_NSS_PULSE_DISABLED          SPI_NSS_PULSE_DISABLE
  773. #define SPI_NSS_PULSE_ENABLED           SPI_NSS_PULSE_ENABLE
  774.  
  775. /**
  776.   * @}
  777.   */
  778.  
  779. /** @defgroup HAL_TIM_Aliased_Defines HAL TIM Aliased Defines maintained for legacy purpose
  780.   * @{
  781.   */
  782. #define CCER_CCxE_MASK                   TIM_CCER_CCxE_MASK
  783. #define CCER_CCxNE_MASK                  TIM_CCER_CCxNE_MASK
  784.  
  785. #define TIM_DMABase_CR1                  TIM_DMABASE_CR1
  786. #define TIM_DMABase_CR2                  TIM_DMABASE_CR2
  787. #define TIM_DMABase_SMCR                 TIM_DMABASE_SMCR
  788. #define TIM_DMABase_DIER                 TIM_DMABASE_DIER
  789. #define TIM_DMABase_SR                   TIM_DMABASE_SR
  790. #define TIM_DMABase_EGR                  TIM_DMABASE_EGR
  791. #define TIM_DMABase_CCMR1                TIM_DMABASE_CCMR1
  792. #define TIM_DMABase_CCMR2                TIM_DMABASE_CCMR2
  793. #define TIM_DMABase_CCER                 TIM_DMABASE_CCER
  794. #define TIM_DMABase_CNT                  TIM_DMABASE_CNT
  795. #define TIM_DMABase_PSC                  TIM_DMABASE_PSC
  796. #define TIM_DMABase_ARR                  TIM_DMABASE_ARR
  797. #define TIM_DMABase_RCR                  TIM_DMABASE_RCR
  798. #define TIM_DMABase_CCR1                 TIM_DMABASE_CCR1
  799. #define TIM_DMABase_CCR2                 TIM_DMABASE_CCR2
  800. #define TIM_DMABase_CCR3                 TIM_DMABASE_CCR3
  801. #define TIM_DMABase_CCR4                 TIM_DMABASE_CCR4
  802. #define TIM_DMABase_BDTR                 TIM_DMABASE_BDTR
  803. #define TIM_DMABase_DCR                  TIM_DMABASE_DCR
  804. #define TIM_DMABase_DMAR                 TIM_DMABASE_DMAR
  805. #define TIM_DMABase_OR1                  TIM_DMABASE_OR1
  806. #define TIM_DMABase_CCMR3                TIM_DMABASE_CCMR3
  807. #define TIM_DMABase_CCR5                 TIM_DMABASE_CCR5
  808. #define TIM_DMABase_CCR6                 TIM_DMABASE_CCR6
  809. #define TIM_DMABase_OR2                  TIM_DMABASE_OR2
  810. #define TIM_DMABase_OR3                  TIM_DMABASE_OR3
  811. #define TIM_DMABase_OR                   TIM_DMABASE_OR
  812.  
  813. #define TIM_EventSource_Update           TIM_EVENTSOURCE_UPDATE
  814. #define TIM_EventSource_CC1              TIM_EVENTSOURCE_CC1
  815. #define TIM_EventSource_CC2              TIM_EVENTSOURCE_CC2
  816. #define TIM_EventSource_CC3              TIM_EVENTSOURCE_CC3
  817. #define TIM_EventSource_CC4              TIM_EVENTSOURCE_CC4
  818. #define TIM_EventSource_COM              TIM_EVENTSOURCE_COM
  819. #define TIM_EventSource_Trigger          TIM_EVENTSOURCE_TRIGGER
  820. #define TIM_EventSource_Break            TIM_EVENTSOURCE_BREAK
  821. #define TIM_EventSource_Break2           TIM_EVENTSOURCE_BREAK2
  822.  
  823. #define TIM_DMABurstLength_1Transfer     TIM_DMABURSTLENGTH_1TRANSFER
  824. #define TIM_DMABurstLength_2Transfers    TIM_DMABURSTLENGTH_2TRANSFERS
  825. #define TIM_DMABurstLength_3Transfers    TIM_DMABURSTLENGTH_3TRANSFERS
  826. #define TIM_DMABurstLength_4Transfers    TIM_DMABURSTLENGTH_4TRANSFERS
  827. #define TIM_DMABurstLength_5Transfers    TIM_DMABURSTLENGTH_5TRANSFERS
  828. #define TIM_DMABurstLength_6Transfers    TIM_DMABURSTLENGTH_6TRANSFERS
  829. #define TIM_DMABurstLength_7Transfers    TIM_DMABURSTLENGTH_7TRANSFERS
  830. #define TIM_DMABurstLength_8Transfers    TIM_DMABURSTLENGTH_8TRANSFERS
  831. #define TIM_DMABurstLength_9Transfers    TIM_DMABURSTLENGTH_9TRANSFERS
  832. #define TIM_DMABurstLength_10Transfers   TIM_DMABURSTLENGTH_10TRANSFERS
  833. #define TIM_DMABurstLength_11Transfers   TIM_DMABURSTLENGTH_11TRANSFERS
  834. #define TIM_DMABurstLength_12Transfers   TIM_DMABURSTLENGTH_12TRANSFERS
  835. #define TIM_DMABurstLength_13Transfers   TIM_DMABURSTLENGTH_13TRANSFERS
  836. #define TIM_DMABurstLength_14Transfers   TIM_DMABURSTLENGTH_14TRANSFERS
  837. #define TIM_DMABurstLength_15Transfers   TIM_DMABURSTLENGTH_15TRANSFERS
  838. #define TIM_DMABurstLength_16Transfers   TIM_DMABURSTLENGTH_16TRANSFERS
  839. #define TIM_DMABurstLength_17Transfers   TIM_DMABURSTLENGTH_17TRANSFERS
  840. #define TIM_DMABurstLength_18Transfers   TIM_DMABURSTLENGTH_18TRANSFERS
  841.  
  842. /**
  843.   * @}
  844.   */
  845.  
  846. /** @defgroup HAL_TSC_Aliased_Defines HAL TSC Aliased Defines maintained for legacy purpose
  847.   * @{
  848.   */
  849. #define TSC_SYNC_POL_FALL        TSC_SYNC_POLARITY_FALLING
  850. #define TSC_SYNC_POL_RISE_HIGH   TSC_SYNC_POLARITY_RISING
  851. /**
  852.   * @}
  853.   */
  854.  
  855. /** @defgroup HAL_UART_Aliased_Defines HAL UART Aliased Defines maintained for legacy purpose
  856.   * @{
  857.   */
  858. #define UART_ONEBIT_SAMPLING_DISABLED   UART_ONE_BIT_SAMPLE_DISABLE
  859. #define UART_ONEBIT_SAMPLING_ENABLED    UART_ONE_BIT_SAMPLE_ENABLE
  860. #define UART_ONE_BIT_SAMPLE_DISABLED    UART_ONE_BIT_SAMPLE_DISABLE
  861. #define UART_ONE_BIT_SAMPLE_ENABLED     UART_ONE_BIT_SAMPLE_ENABLE
  862.  
  863. #define __HAL_UART_ONEBIT_ENABLE        __HAL_UART_ONE_BIT_SAMPLE_ENABLE
  864. #define __HAL_UART_ONEBIT_DISABLE       __HAL_UART_ONE_BIT_SAMPLE_DISABLE
  865.  
  866. #define __DIV_SAMPLING16                UART_DIV_SAMPLING16
  867. #define __DIVMANT_SAMPLING16            UART_DIVMANT_SAMPLING16
  868. #define __DIVFRAQ_SAMPLING16            UART_DIVFRAQ_SAMPLING16
  869. #define __UART_BRR_SAMPLING16           UART_BRR_SAMPLING16
  870.  
  871. #define __DIV_SAMPLING8                 UART_DIV_SAMPLING8
  872. #define __DIVMANT_SAMPLING8             UART_DIVMANT_SAMPLING8
  873. #define __DIVFRAQ_SAMPLING8             UART_DIVFRAQ_SAMPLING8
  874. #define __UART_BRR_SAMPLING8            UART_BRR_SAMPLING8
  875.  
  876. #define __DIV_LPUART                    UART_DIV_LPUART
  877.  
  878. #define UART_WAKEUPMETHODE_IDLELINE     UART_WAKEUPMETHOD_IDLELINE
  879. #define UART_WAKEUPMETHODE_ADDRESSMARK  UART_WAKEUPMETHOD_ADDRESSMARK
  880.  
  881. /**
  882.   * @}
  883.   */
  884.  
  885.  
  886. /** @defgroup HAL_USART_Aliased_Defines HAL USART Aliased Defines maintained for legacy purpose
  887.   * @{
  888.   */
  889.  
  890. #define USART_CLOCK_DISABLED            USART_CLOCK_DISABLE
  891. #define USART_CLOCK_ENABLED             USART_CLOCK_ENABLE
  892.  
  893. #define USARTNACK_ENABLED               USART_NACK_ENABLE
  894. #define USARTNACK_DISABLED              USART_NACK_DISABLE
  895. /**
  896.   * @}
  897.   */
  898.  
  899. /** @defgroup HAL_WWDG_Aliased_Defines HAL WWDG Aliased Defines maintained for legacy purpose
  900.   * @{
  901.   */
  902. #define CFR_BASE                    WWDG_CFR_BASE
  903.  
  904. /**
  905.   * @}
  906.   */
  907.  
  908. /** @defgroup HAL_CAN_Aliased_Defines HAL CAN Aliased Defines maintained for legacy purpose
  909.   * @{
  910.   */
  911. #define CAN_FilterFIFO0             CAN_FILTER_FIFO0
  912. #define CAN_FilterFIFO1             CAN_FILTER_FIFO1
  913. #define CAN_IT_RQCP0                CAN_IT_TME
  914. #define CAN_IT_RQCP1                CAN_IT_TME
  915. #define CAN_IT_RQCP2                CAN_IT_TME
  916. #define INAK_TIMEOUT                CAN_TIMEOUT_VALUE
  917. #define SLAK_TIMEOUT                CAN_TIMEOUT_VALUE
  918. #define CAN_TXSTATUS_FAILED         ((uint8_t)0x00)
  919. #define CAN_TXSTATUS_OK             ((uint8_t)0x01)
  920. #define CAN_TXSTATUS_PENDING        ((uint8_t)0x02)
  921.  
  922. /**
  923.   * @}
  924.   */
  925.  
  926. /** @defgroup HAL_ETH_Aliased_Defines HAL ETH Aliased Defines maintained for legacy purpose
  927.   * @{
  928.   */
  929.  
  930. #define VLAN_TAG                ETH_VLAN_TAG
  931. #define MIN_ETH_PAYLOAD         ETH_MIN_ETH_PAYLOAD
  932. #define MAX_ETH_PAYLOAD         ETH_MAX_ETH_PAYLOAD
  933. #define JUMBO_FRAME_PAYLOAD     ETH_JUMBO_FRAME_PAYLOAD
  934. #define MACMIIAR_CR_MASK        ETH_MACMIIAR_CR_MASK
  935. #define MACCR_CLEAR_MASK        ETH_MACCR_CLEAR_MASK
  936. #define MACFCR_CLEAR_MASK       ETH_MACFCR_CLEAR_MASK
  937. #define DMAOMR_CLEAR_MASK       ETH_DMAOMR_CLEAR_MASK
  938.  
  939. #define ETH_MMCCR              0x00000100U
  940. #define ETH_MMCRIR             0x00000104U
  941. #define ETH_MMCTIR             0x00000108U
  942. #define ETH_MMCRIMR            0x0000010CU
  943. #define ETH_MMCTIMR            0x00000110U
  944. #define ETH_MMCTGFSCCR         0x0000014CU
  945. #define ETH_MMCTGFMSCCR        0x00000150U
  946. #define ETH_MMCTGFCR           0x00000168U
  947. #define ETH_MMCRFCECR          0x00000194U
  948. #define ETH_MMCRFAECR          0x00000198U
  949. #define ETH_MMCRGUFCR          0x000001C4U
  950.  
  951. #define ETH_MAC_TXFIFO_FULL                             0x02000000U  /* Tx FIFO full */
  952. #define ETH_MAC_TXFIFONOT_EMPTY                         0x01000000U  /* Tx FIFO not empty */
  953. #define ETH_MAC_TXFIFO_WRITE_ACTIVE                     0x00400000U  /* Tx FIFO write active */
  954. #define ETH_MAC_TXFIFO_IDLE                             0x00000000U  /* Tx FIFO read status: Idle */
  955. #define ETH_MAC_TXFIFO_READ                             0x00100000U  /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */
  956. #define ETH_MAC_TXFIFO_WAITING                          0x00200000U  /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */
  957. #define ETH_MAC_TXFIFO_WRITING                          0x00300000U  /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */
  958. #define ETH_MAC_TRANSMISSION_PAUSE                      0x00080000U  /* MAC transmitter in pause */
  959. #define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE            0x00000000U  /* MAC transmit frame controller: Idle */
  960. #define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING         0x00020000U  /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */
  961. #define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF   0x00040000U  /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */
  962. #define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING    0x00060000U  /* MAC transmit frame controller: Transferring input frame for transmission */
  963. #define ETH_MAC_MII_TRANSMIT_ACTIVE           0x00010000U  /* MAC MII transmit engine active */
  964. #define ETH_MAC_RXFIFO_EMPTY                  0x00000000U  /* Rx FIFO fill level: empty */
  965. #define ETH_MAC_RXFIFO_BELOW_THRESHOLD        0x00000100U  /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */
  966. #define ETH_MAC_RXFIFO_ABOVE_THRESHOLD        0x00000200U  /* Rx FIFO fill level: fill-level above flow-control activate threshold */
  967. #define ETH_MAC_RXFIFO_FULL                   0x00000300U  /* Rx FIFO fill level: full */
  968. #define ETH_MAC_READCONTROLLER_IDLE           0x00000000U  /* Rx FIFO read controller IDLE state */
  969. #define ETH_MAC_READCONTROLLER_READING_DATA   0x00000020U  /* Rx FIFO read controller Reading frame data */
  970. #define ETH_MAC_READCONTROLLER_READING_STATUS 0x00000040U  /* Rx FIFO read controller Reading frame status (or time-stamp) */
  971. #define ETH_MAC_READCONTROLLER_FLUSHING       0x00000060U  /* Rx FIFO read controller Flushing the frame data and status */
  972. #define ETH_MAC_RXFIFO_WRITE_ACTIVE           0x00000010U  /* Rx FIFO write controller active */
  973. #define ETH_MAC_SMALL_FIFO_NOTACTIVE          0x00000000U  /* MAC small FIFO read / write controllers not active */
  974. #define ETH_MAC_SMALL_FIFO_READ_ACTIVE        0x00000002U  /* MAC small FIFO read controller active */
  975. #define ETH_MAC_SMALL_FIFO_WRITE_ACTIVE       0x00000004U  /* MAC small FIFO write controller active */
  976. #define ETH_MAC_SMALL_FIFO_RW_ACTIVE          0x00000006U  /* MAC small FIFO read / write controllers active */
  977. #define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE   0x00000001U  /* MAC MII receive protocol engine active */
  978.  
  979. /**
  980.   * @}
  981.   */
  982.  
  983. /** @defgroup HAL_DCMI_Aliased_Defines HAL DCMI Aliased Defines maintained for legacy purpose
  984.   * @{
  985.   */
  986. #define HAL_DCMI_ERROR_OVF      HAL_DCMI_ERROR_OVR
  987. #define DCMI_IT_OVF             DCMI_IT_OVR
  988. #define DCMI_FLAG_OVFRI         DCMI_FLAG_OVRRI
  989. #define DCMI_FLAG_OVFMI         DCMI_FLAG_OVRMI
  990.  
  991. #define HAL_DCMI_ConfigCROP     HAL_DCMI_ConfigCrop
  992. #define HAL_DCMI_EnableCROP     HAL_DCMI_EnableCrop
  993. #define HAL_DCMI_DisableCROP    HAL_DCMI_DisableCrop
  994.  
  995. /**
  996.   * @}
  997.   */  
  998.  
  999. #if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) ||\
  1000.     defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
  1001. /** @defgroup HAL_DMA2D_Aliased_Defines HAL DMA2D Aliased Defines maintained for legacy purpose
  1002.   * @{
  1003.   */
  1004. #define DMA2D_ARGB8888          DMA2D_OUTPUT_ARGB8888
  1005. #define DMA2D_RGB888            DMA2D_OUTPUT_RGB888  
  1006. #define DMA2D_RGB565            DMA2D_OUTPUT_RGB565  
  1007. #define DMA2D_ARGB1555          DMA2D_OUTPUT_ARGB1555
  1008. #define DMA2D_ARGB4444          DMA2D_OUTPUT_ARGB4444
  1009.  
  1010. #define CM_ARGB8888             DMA2D_INPUT_ARGB8888
  1011. #define CM_RGB888               DMA2D_INPUT_RGB888  
  1012. #define CM_RGB565               DMA2D_INPUT_RGB565  
  1013. #define CM_ARGB1555             DMA2D_INPUT_ARGB1555
  1014. #define CM_ARGB4444             DMA2D_INPUT_ARGB4444
  1015. #define CM_L8                   DMA2D_INPUT_L8      
  1016. #define CM_AL44                 DMA2D_INPUT_AL44    
  1017. #define CM_AL88                 DMA2D_INPUT_AL88    
  1018. #define CM_L4                   DMA2D_INPUT_L4      
  1019. #define CM_A8                   DMA2D_INPUT_A8      
  1020. #define CM_A4                   DMA2D_INPUT_A4      
  1021. /**
  1022.   * @}
  1023.   */    
  1024. #endif  /* STM32L4 ||  STM32F7*/
  1025.  
  1026. /** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose
  1027.   * @{
  1028.   */
  1029.  
  1030. /**
  1031.   * @}
  1032.   */
  1033.  
  1034. /* Exported functions --------------------------------------------------------*/
  1035.  
  1036. /** @defgroup HAL_CRYP_Aliased_Functions HAL CRYP Aliased Functions maintained for legacy purpose
  1037.   * @{
  1038.   */
  1039. #define HAL_CRYP_ComputationCpltCallback     HAL_CRYPEx_ComputationCpltCallback
  1040. /**
  1041.   * @}
  1042.   */  
  1043.  
  1044. /** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose
  1045.   * @{
  1046.   */
  1047. #define HAL_HASH_STATETypeDef        HAL_HASH_StateTypeDef
  1048. #define HAL_HASHPhaseTypeDef         HAL_HASH_PhaseTypeDef
  1049. #define HAL_HMAC_MD5_Finish          HAL_HASH_MD5_Finish
  1050. #define HAL_HMAC_SHA1_Finish         HAL_HASH_SHA1_Finish
  1051. #define HAL_HMAC_SHA224_Finish       HAL_HASH_SHA224_Finish
  1052. #define HAL_HMAC_SHA256_Finish       HAL_HASH_SHA256_Finish
  1053.  
  1054. /*HASH Algorithm Selection*/
  1055.  
  1056. #define HASH_AlgoSelection_SHA1      HASH_ALGOSELECTION_SHA1
  1057. #define HASH_AlgoSelection_SHA224    HASH_ALGOSELECTION_SHA224
  1058. #define HASH_AlgoSelection_SHA256    HASH_ALGOSELECTION_SHA256
  1059. #define HASH_AlgoSelection_MD5       HASH_ALGOSELECTION_MD5
  1060.  
  1061. #define HASH_AlgoMode_HASH         HASH_ALGOMODE_HASH
  1062. #define HASH_AlgoMode_HMAC         HASH_ALGOMODE_HMAC
  1063.  
  1064. #define HASH_HMACKeyType_ShortKey  HASH_HMAC_KEYTYPE_SHORTKEY
  1065. #define HASH_HMACKeyType_LongKey   HASH_HMAC_KEYTYPE_LONGKEY
  1066. /**
  1067.   * @}
  1068.   */
  1069.  
  1070. /** @defgroup HAL_Aliased_Functions HAL Generic Aliased Functions maintained for legacy purpose
  1071.   * @{
  1072.   */
  1073. #define HAL_EnableDBGSleepMode HAL_DBGMCU_EnableDBGSleepMode
  1074. #define HAL_DisableDBGSleepMode HAL_DBGMCU_DisableDBGSleepMode
  1075. #define HAL_EnableDBGStopMode HAL_DBGMCU_EnableDBGStopMode
  1076. #define HAL_DisableDBGStopMode HAL_DBGMCU_DisableDBGStopMode
  1077. #define HAL_EnableDBGStandbyMode HAL_DBGMCU_EnableDBGStandbyMode
  1078. #define HAL_DisableDBGStandbyMode HAL_DBGMCU_DisableDBGStandbyMode
  1079. #define HAL_DBG_LowPowerConfig(Periph, cmd) (((cmd)==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph))
  1080. #define HAL_VREFINT_OutputSelect  HAL_SYSCFG_VREFINT_OutputSelect
  1081. #define HAL_Lock_Cmd(cmd) (((cmd)==ENABLE) ? HAL_SYSCFG_Enable_Lock_VREFINT() : HAL_SYSCFG_Disable_Lock_VREFINT())
  1082. #if defined(STM32L0)
  1083. #else
  1084. #define HAL_VREFINT_Cmd(cmd) (((cmd)==ENABLE)? HAL_SYSCFG_EnableVREFINT() : HAL_SYSCFG_DisableVREFINT())
  1085. #endif
  1086. #define HAL_ADC_EnableBuffer_Cmd(cmd)  (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT())
  1087. #define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ?  HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor())
  1088. /**
  1089.   * @}
  1090.   */
  1091.  
  1092. /** @defgroup HAL_FLASH_Aliased_Functions HAL FLASH Aliased Functions maintained for legacy purpose
  1093.   * @{
  1094.   */
  1095. #define FLASH_HalfPageProgram      HAL_FLASHEx_HalfPageProgram
  1096. #define FLASH_EnableRunPowerDown   HAL_FLASHEx_EnableRunPowerDown
  1097. #define FLASH_DisableRunPowerDown  HAL_FLASHEx_DisableRunPowerDown
  1098. #define HAL_DATA_EEPROMEx_Unlock   HAL_FLASHEx_DATAEEPROM_Unlock
  1099. #define HAL_DATA_EEPROMEx_Lock     HAL_FLASHEx_DATAEEPROM_Lock
  1100. #define HAL_DATA_EEPROMEx_Erase    HAL_FLASHEx_DATAEEPROM_Erase
  1101. #define HAL_DATA_EEPROMEx_Program  HAL_FLASHEx_DATAEEPROM_Program
  1102.  
  1103.  /**
  1104.   * @}
  1105.   */
  1106.  
  1107. /** @defgroup HAL_I2C_Aliased_Functions HAL I2C Aliased Functions maintained for legacy purpose
  1108.   * @{
  1109.   */
  1110. #define HAL_I2CEx_AnalogFilter_Config         HAL_I2CEx_ConfigAnalogFilter
  1111. #define HAL_I2CEx_DigitalFilter_Config        HAL_I2CEx_ConfigDigitalFilter
  1112. #define HAL_FMPI2CEx_AnalogFilter_Config      HAL_FMPI2CEx_ConfigAnalogFilter
  1113. #define HAL_FMPI2CEx_DigitalFilter_Config     HAL_FMPI2CEx_ConfigDigitalFilter
  1114.  
  1115. #define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
  1116.  /**
  1117.   * @}
  1118.   */
  1119.  
  1120. /** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose
  1121.   * @{
  1122.   */
  1123. #define HAL_PWR_PVDConfig                             HAL_PWR_ConfigPVD
  1124. #define HAL_PWR_DisableBkUpReg                        HAL_PWREx_DisableBkUpReg
  1125. #define HAL_PWR_DisableFlashPowerDown                 HAL_PWREx_DisableFlashPowerDown
  1126. #define HAL_PWR_DisableVddio2Monitor                  HAL_PWREx_DisableVddio2Monitor
  1127. #define HAL_PWR_EnableBkUpReg                         HAL_PWREx_EnableBkUpReg
  1128. #define HAL_PWR_EnableFlashPowerDown                  HAL_PWREx_EnableFlashPowerDown
  1129. #define HAL_PWR_EnableVddio2Monitor                   HAL_PWREx_EnableVddio2Monitor
  1130. #define HAL_PWR_PVD_PVM_IRQHandler                    HAL_PWREx_PVD_PVM_IRQHandler
  1131. #define HAL_PWR_PVDLevelConfig                        HAL_PWR_ConfigPVD
  1132. #define HAL_PWR_Vddio2Monitor_IRQHandler              HAL_PWREx_Vddio2Monitor_IRQHandler
  1133. #define HAL_PWR_Vddio2MonitorCallback                 HAL_PWREx_Vddio2MonitorCallback
  1134. #define HAL_PWREx_ActivateOverDrive                   HAL_PWREx_EnableOverDrive
  1135. #define HAL_PWREx_DeactivateOverDrive                 HAL_PWREx_DisableOverDrive
  1136. #define HAL_PWREx_DisableSDADCAnalog                  HAL_PWREx_DisableSDADC
  1137. #define HAL_PWREx_EnableSDADCAnalog                   HAL_PWREx_EnableSDADC
  1138. #define HAL_PWREx_PVMConfig                           HAL_PWREx_ConfigPVM
  1139.  
  1140. #define PWR_MODE_NORMAL                               PWR_PVD_MODE_NORMAL
  1141. #define PWR_MODE_IT_RISING                            PWR_PVD_MODE_IT_RISING
  1142. #define PWR_MODE_IT_FALLING                           PWR_PVD_MODE_IT_FALLING
  1143. #define PWR_MODE_IT_RISING_FALLING                    PWR_PVD_MODE_IT_RISING_FALLING
  1144. #define PWR_MODE_EVENT_RISING                         PWR_PVD_MODE_EVENT_RISING
  1145. #define PWR_MODE_EVENT_FALLING                        PWR_PVD_MODE_EVENT_FALLING
  1146. #define PWR_MODE_EVENT_RISING_FALLING                 PWR_PVD_MODE_EVENT_RISING_FALLING
  1147.  
  1148. #define CR_OFFSET_BB                                  PWR_CR_OFFSET_BB
  1149. #define CSR_OFFSET_BB                                 PWR_CSR_OFFSET_BB
  1150.  
  1151. #define DBP_BitNumber                                 DBP_BIT_NUMBER
  1152. #define PVDE_BitNumber                                PVDE_BIT_NUMBER
  1153. #define PMODE_BitNumber                               PMODE_BIT_NUMBER
  1154. #define EWUP_BitNumber                                EWUP_BIT_NUMBER
  1155. #define FPDS_BitNumber                                FPDS_BIT_NUMBER
  1156. #define ODEN_BitNumber                                ODEN_BIT_NUMBER
  1157. #define ODSWEN_BitNumber                              ODSWEN_BIT_NUMBER
  1158. #define MRLVDS_BitNumber                              MRLVDS_BIT_NUMBER
  1159. #define LPLVDS_BitNumber                              LPLVDS_BIT_NUMBER
  1160. #define BRE_BitNumber                                 BRE_BIT_NUMBER
  1161.  
  1162. #define PWR_MODE_EVT                                  PWR_PVD_MODE_NORMAL
  1163.  
  1164.  /**
  1165.   * @}
  1166.   */  
  1167.  
  1168. /** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose
  1169.   * @{
  1170.   */
  1171. #define HAL_SMBUS_Slave_Listen_IT          HAL_SMBUS_EnableListen_IT
  1172. #define HAL_SMBUS_SlaveAddrCallback        HAL_SMBUS_AddrCallback        
  1173. #define HAL_SMBUS_SlaveListenCpltCallback  HAL_SMBUS_ListenCpltCallback  
  1174. /**
  1175.   * @}
  1176.   */
  1177.  
  1178. /** @defgroup HAL_SPI_Aliased_Functions HAL SPI Aliased Functions maintained for legacy purpose
  1179.   * @{
  1180.   */
  1181. #define HAL_SPI_FlushRxFifo                HAL_SPIEx_FlushRxFifo
  1182. /**
  1183.   * @}
  1184.   */  
  1185.  
  1186. /** @defgroup HAL_TIM_Aliased_Functions HAL TIM Aliased Functions maintained for legacy purpose
  1187.   * @{
  1188.   */
  1189. #define HAL_TIM_DMADelayPulseCplt                       TIM_DMADelayPulseCplt
  1190. #define HAL_TIM_DMAError                                TIM_DMAError
  1191. #define HAL_TIM_DMACaptureCplt                          TIM_DMACaptureCplt
  1192. #define HAL_TIMEx_DMACommutationCplt                    TIMEx_DMACommutationCplt
  1193. /**
  1194.   * @}
  1195.   */
  1196.    
  1197. /** @defgroup HAL_UART_Aliased_Functions HAL UART Aliased Functions maintained for legacy purpose
  1198.   * @{
  1199.   */
  1200. #define HAL_UART_WakeupCallback HAL_UARTEx_WakeupCallback
  1201. /**
  1202.   * @}
  1203.   */
  1204.  
  1205. /** @defgroup HAL_LTDC_Aliased_Functions HAL LTDC Aliased Functions maintained for legacy purpose
  1206.   * @{
  1207.   */
  1208. #define HAL_LTDC_LineEvenCallback HAL_LTDC_LineEventCallback
  1209. #define HAL_LTDC_Relaod           HAL_LTDC_Reload
  1210. #define HAL_LTDC_StructInitFromVideoConfig  HAL_LTDCEx_StructInitFromVideoConfig
  1211. #define HAL_LTDC_StructInitFromAdaptedCommandConfig  HAL_LTDCEx_StructInitFromAdaptedCommandConfig
  1212. /**
  1213.   * @}
  1214.   */  
  1215.    
  1216.  
  1217. /** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose
  1218.   * @{
  1219.   */
  1220.  
  1221. /**
  1222.   * @}
  1223.   */
  1224.  
  1225. /* Exported macros ------------------------------------------------------------*/
  1226.  
  1227. /** @defgroup HAL_AES_Aliased_Macros HAL CRYP Aliased Macros maintained for legacy purpose
  1228.   * @{
  1229.   */
  1230. #define AES_IT_CC                      CRYP_IT_CC
  1231. #define AES_IT_ERR                     CRYP_IT_ERR
  1232. #define AES_FLAG_CCF                   CRYP_FLAG_CCF
  1233. /**
  1234.   * @}
  1235.   */  
  1236.  
  1237. /** @defgroup HAL_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose
  1238.   * @{
  1239.   */
  1240. #define __HAL_GET_BOOT_MODE                   __HAL_SYSCFG_GET_BOOT_MODE
  1241. #define __HAL_REMAPMEMORY_FLASH               __HAL_SYSCFG_REMAPMEMORY_FLASH
  1242. #define __HAL_REMAPMEMORY_SYSTEMFLASH         __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH
  1243. #define __HAL_REMAPMEMORY_SRAM                __HAL_SYSCFG_REMAPMEMORY_SRAM
  1244. #define __HAL_REMAPMEMORY_FMC                 __HAL_SYSCFG_REMAPMEMORY_FMC
  1245. #define __HAL_REMAPMEMORY_FMC_SDRAM           __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM
  1246. #define __HAL_REMAPMEMORY_FSMC                __HAL_SYSCFG_REMAPMEMORY_FSMC
  1247. #define __HAL_REMAPMEMORY_QUADSPI             __HAL_SYSCFG_REMAPMEMORY_QUADSPI
  1248. #define __HAL_FMC_BANK                        __HAL_SYSCFG_FMC_BANK
  1249. #define __HAL_GET_FLAG                        __HAL_SYSCFG_GET_FLAG
  1250. #define __HAL_CLEAR_FLAG                      __HAL_SYSCFG_CLEAR_FLAG
  1251. #define __HAL_VREFINT_OUT_ENABLE              __HAL_SYSCFG_VREFINT_OUT_ENABLE
  1252. #define __HAL_VREFINT_OUT_DISABLE             __HAL_SYSCFG_VREFINT_OUT_DISABLE
  1253. #define __HAL_SYSCFG_SRAM2_WRP_ENABLE         __HAL_SYSCFG_SRAM2_WRP_0_31_ENABLE
  1254.  
  1255. #define SYSCFG_FLAG_VREF_READY                SYSCFG_FLAG_VREFINT_READY
  1256. #define SYSCFG_FLAG_RC48                      RCC_FLAG_HSI48
  1257. #define IS_SYSCFG_FASTMODEPLUS_CONFIG         IS_I2C_FASTMODEPLUS
  1258. #define UFB_MODE_BitNumber                    UFB_MODE_BIT_NUMBER
  1259. #define CMP_PD_BitNumber                      CMP_PD_BIT_NUMBER
  1260.  
  1261. /**
  1262.   * @}
  1263.   */
  1264.  
  1265.    
  1266. /** @defgroup HAL_ADC_Aliased_Macros HAL ADC Aliased Macros maintained for legacy purpose
  1267.   * @{
  1268.   */
  1269. #define __ADC_ENABLE                                     __HAL_ADC_ENABLE
  1270. #define __ADC_DISABLE                                    __HAL_ADC_DISABLE
  1271. #define __HAL_ADC_ENABLING_CONDITIONS                    ADC_ENABLING_CONDITIONS
  1272. #define __HAL_ADC_DISABLING_CONDITIONS                   ADC_DISABLING_CONDITIONS
  1273. #define __HAL_ADC_IS_ENABLED                             ADC_IS_ENABLE
  1274. #define __ADC_IS_ENABLED                                 ADC_IS_ENABLE
  1275. #define __HAL_ADC_IS_SOFTWARE_START_REGULAR              ADC_IS_SOFTWARE_START_REGULAR
  1276. #define __HAL_ADC_IS_SOFTWARE_START_INJECTED             ADC_IS_SOFTWARE_START_INJECTED
  1277. #define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED
  1278. #define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR          ADC_IS_CONVERSION_ONGOING_REGULAR
  1279. #define __HAL_ADC_IS_CONVERSION_ONGOING_INJECTED         ADC_IS_CONVERSION_ONGOING_INJECTED
  1280. #define __HAL_ADC_IS_CONVERSION_ONGOING                  ADC_IS_CONVERSION_ONGOING
  1281. #define __HAL_ADC_CLEAR_ERRORCODE                        ADC_CLEAR_ERRORCODE
  1282.  
  1283. #define __HAL_ADC_GET_RESOLUTION                         ADC_GET_RESOLUTION
  1284. #define __HAL_ADC_JSQR_RK                                ADC_JSQR_RK
  1285. #define __HAL_ADC_CFGR_AWD1CH                            ADC_CFGR_AWD1CH_SHIFT
  1286. #define __HAL_ADC_CFGR_AWD23CR                           ADC_CFGR_AWD23CR
  1287. #define __HAL_ADC_CFGR_INJECT_AUTO_CONVERSION            ADC_CFGR_INJECT_AUTO_CONVERSION
  1288. #define __HAL_ADC_CFGR_INJECT_CONTEXT_QUEUE              ADC_CFGR_INJECT_CONTEXT_QUEUE
  1289. #define __HAL_ADC_CFGR_INJECT_DISCCONTINUOUS             ADC_CFGR_INJECT_DISCCONTINUOUS
  1290. #define __HAL_ADC_CFGR_REG_DISCCONTINUOUS                ADC_CFGR_REG_DISCCONTINUOUS
  1291. #define __HAL_ADC_CFGR_DISCONTINUOUS_NUM                 ADC_CFGR_DISCONTINUOUS_NUM
  1292. #define __HAL_ADC_CFGR_AUTOWAIT                          ADC_CFGR_AUTOWAIT
  1293. #define __HAL_ADC_CFGR_CONTINUOUS                        ADC_CFGR_CONTINUOUS
  1294. #define __HAL_ADC_CFGR_OVERRUN                           ADC_CFGR_OVERRUN
  1295. #define __HAL_ADC_CFGR_DMACONTREQ                        ADC_CFGR_DMACONTREQ
  1296. #define __HAL_ADC_CFGR_EXTSEL                            ADC_CFGR_EXTSEL_SET
  1297. #define __HAL_ADC_JSQR_JEXTSEL                           ADC_JSQR_JEXTSEL_SET
  1298. #define __HAL_ADC_OFR_CHANNEL                            ADC_OFR_CHANNEL
  1299. #define __HAL_ADC_DIFSEL_CHANNEL                         ADC_DIFSEL_CHANNEL
  1300. #define __HAL_ADC_CALFACT_DIFF_SET                       ADC_CALFACT_DIFF_SET
  1301. #define __HAL_ADC_CALFACT_DIFF_GET                       ADC_CALFACT_DIFF_GET
  1302. #define __HAL_ADC_TRX_HIGHTHRESHOLD                      ADC_TRX_HIGHTHRESHOLD
  1303.  
  1304. #define __HAL_ADC_OFFSET_SHIFT_RESOLUTION                ADC_OFFSET_SHIFT_RESOLUTION
  1305. #define __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION         ADC_AWD1THRESHOLD_SHIFT_RESOLUTION
  1306. #define __HAL_ADC_AWD23THRESHOLD_SHIFT_RESOLUTION        ADC_AWD23THRESHOLD_SHIFT_RESOLUTION
  1307. #define __HAL_ADC_COMMON_REGISTER                        ADC_COMMON_REGISTER
  1308. #define __HAL_ADC_COMMON_CCR_MULTI                       ADC_COMMON_CCR_MULTI
  1309. #define __HAL_ADC_MULTIMODE_IS_ENABLED                   ADC_MULTIMODE_IS_ENABLE
  1310. #define __ADC_MULTIMODE_IS_ENABLED                       ADC_MULTIMODE_IS_ENABLE
  1311. #define __HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER        ADC_NONMULTIMODE_OR_MULTIMODEMASTER
  1312. #define __HAL_ADC_COMMON_ADC_OTHER                       ADC_COMMON_ADC_OTHER
  1313. #define __HAL_ADC_MULTI_SLAVE                            ADC_MULTI_SLAVE
  1314.  
  1315. #define __HAL_ADC_SQR1_L                                 ADC_SQR1_L_SHIFT
  1316. #define __HAL_ADC_JSQR_JL                                ADC_JSQR_JL_SHIFT
  1317. #define __HAL_ADC_JSQR_RK_JL                             ADC_JSQR_RK_JL
  1318. #define __HAL_ADC_CR1_DISCONTINUOUS_NUM                  ADC_CR1_DISCONTINUOUS_NUM
  1319. #define __HAL_ADC_CR1_SCAN                               ADC_CR1_SCAN_SET
  1320. #define __HAL_ADC_CONVCYCLES_MAX_RANGE                   ADC_CONVCYCLES_MAX_RANGE
  1321. #define __HAL_ADC_CLOCK_PRESCALER_RANGE                  ADC_CLOCK_PRESCALER_RANGE
  1322. #define __HAL_ADC_GET_CLOCK_PRESCALER                    ADC_GET_CLOCK_PRESCALER
  1323.  
  1324. #define __HAL_ADC_SQR1                                   ADC_SQR1
  1325. #define __HAL_ADC_SMPR1                                  ADC_SMPR1
  1326. #define __HAL_ADC_SMPR2                                  ADC_SMPR2
  1327. #define __HAL_ADC_SQR3_RK                                ADC_SQR3_RK
  1328. #define __HAL_ADC_SQR2_RK                                ADC_SQR2_RK
  1329. #define __HAL_ADC_SQR1_RK                                ADC_SQR1_RK
  1330. #define __HAL_ADC_CR2_CONTINUOUS                         ADC_CR2_CONTINUOUS
  1331. #define __HAL_ADC_CR1_DISCONTINUOUS                      ADC_CR1_DISCONTINUOUS
  1332. #define __HAL_ADC_CR1_SCANCONV                           ADC_CR1_SCANCONV
  1333. #define __HAL_ADC_CR2_EOCSelection                       ADC_CR2_EOCSelection
  1334. #define __HAL_ADC_CR2_DMAContReq                         ADC_CR2_DMAContReq
  1335. #define __HAL_ADC_GET_RESOLUTION                         ADC_GET_RESOLUTION
  1336. #define __HAL_ADC_JSQR                                   ADC_JSQR
  1337.  
  1338. #define __HAL_ADC_CHSELR_CHANNEL                         ADC_CHSELR_CHANNEL
  1339. #define __HAL_ADC_CFGR1_REG_DISCCONTINUOUS               ADC_CFGR1_REG_DISCCONTINUOUS
  1340. #define __HAL_ADC_CFGR1_AUTOOFF                          ADC_CFGR1_AUTOOFF
  1341. #define __HAL_ADC_CFGR1_AUTOWAIT                         ADC_CFGR1_AUTOWAIT
  1342. #define __HAL_ADC_CFGR1_CONTINUOUS                       ADC_CFGR1_CONTINUOUS
  1343. #define __HAL_ADC_CFGR1_OVERRUN                          ADC_CFGR1_OVERRUN
  1344. #define __HAL_ADC_CFGR1_SCANDIR                          ADC_CFGR1_SCANDIR
  1345. #define __HAL_ADC_CFGR1_DMACONTREQ                       ADC_CFGR1_DMACONTREQ
  1346.  
  1347. /**
  1348.   * @}
  1349.   */
  1350.  
  1351. /** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
  1352.   * @{
  1353.   */
  1354. #define __HAL_DHR12R1_ALIGNEMENT                        DAC_DHR12R1_ALIGNMENT
  1355. #define __HAL_DHR12R2_ALIGNEMENT                        DAC_DHR12R2_ALIGNMENT
  1356. #define __HAL_DHR12RD_ALIGNEMENT                        DAC_DHR12RD_ALIGNMENT
  1357. #define IS_DAC_GENERATE_WAVE                            IS_DAC_WAVE
  1358.  
  1359. /**
  1360.   * @}
  1361.   */
  1362.    
  1363. /** @defgroup HAL_DBGMCU_Aliased_Macros HAL DBGMCU Aliased Macros maintained for legacy purpose
  1364.   * @{
  1365.   */
  1366. #define __HAL_FREEZE_TIM1_DBGMCU __HAL_DBGMCU_FREEZE_TIM1
  1367. #define __HAL_UNFREEZE_TIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM1
  1368. #define __HAL_FREEZE_TIM2_DBGMCU __HAL_DBGMCU_FREEZE_TIM2
  1369. #define __HAL_UNFREEZE_TIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM2
  1370. #define __HAL_FREEZE_TIM3_DBGMCU __HAL_DBGMCU_FREEZE_TIM3
  1371. #define __HAL_UNFREEZE_TIM3_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM3
  1372. #define __HAL_FREEZE_TIM4_DBGMCU __HAL_DBGMCU_FREEZE_TIM4
  1373. #define __HAL_UNFREEZE_TIM4_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM4
  1374. #define __HAL_FREEZE_TIM5_DBGMCU __HAL_DBGMCU_FREEZE_TIM5
  1375. #define __HAL_UNFREEZE_TIM5_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM5
  1376. #define __HAL_FREEZE_TIM6_DBGMCU __HAL_DBGMCU_FREEZE_TIM6
  1377. #define __HAL_UNFREEZE_TIM6_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM6
  1378. #define __HAL_FREEZE_TIM7_DBGMCU __HAL_DBGMCU_FREEZE_TIM7
  1379. #define __HAL_UNFREEZE_TIM7_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM7
  1380. #define __HAL_FREEZE_TIM8_DBGMCU __HAL_DBGMCU_FREEZE_TIM8
  1381. #define __HAL_UNFREEZE_TIM8_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM8
  1382.  
  1383. #define __HAL_FREEZE_TIM9_DBGMCU __HAL_DBGMCU_FREEZE_TIM9
  1384. #define __HAL_UNFREEZE_TIM9_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM9
  1385. #define __HAL_FREEZE_TIM10_DBGMCU __HAL_DBGMCU_FREEZE_TIM10
  1386. #define __HAL_UNFREEZE_TIM10_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM10
  1387. #define __HAL_FREEZE_TIM11_DBGMCU __HAL_DBGMCU_FREEZE_TIM11
  1388. #define __HAL_UNFREEZE_TIM11_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM11
  1389. #define __HAL_FREEZE_TIM12_DBGMCU __HAL_DBGMCU_FREEZE_TIM12
  1390. #define __HAL_UNFREEZE_TIM12_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM12
  1391. #define __HAL_FREEZE_TIM13_DBGMCU __HAL_DBGMCU_FREEZE_TIM13
  1392. #define __HAL_UNFREEZE_TIM13_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM13
  1393. #define __HAL_FREEZE_TIM14_DBGMCU __HAL_DBGMCU_FREEZE_TIM14
  1394. #define __HAL_UNFREEZE_TIM14_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM14
  1395. #define __HAL_FREEZE_CAN2_DBGMCU __HAL_DBGMCU_FREEZE_CAN2
  1396. #define __HAL_UNFREEZE_CAN2_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN2
  1397.  
  1398.  
  1399. #define __HAL_FREEZE_TIM15_DBGMCU __HAL_DBGMCU_FREEZE_TIM15
  1400. #define __HAL_UNFREEZE_TIM15_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM15
  1401. #define __HAL_FREEZE_TIM16_DBGMCU __HAL_DBGMCU_FREEZE_TIM16
  1402. #define __HAL_UNFREEZE_TIM16_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM16
  1403. #define __HAL_FREEZE_TIM17_DBGMCU __HAL_DBGMCU_FREEZE_TIM17
  1404. #define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17
  1405. #define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC
  1406. #define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC
  1407. #define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG
  1408. #define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG
  1409. #define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG
  1410. #define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG
  1411. #define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT
  1412. #define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT
  1413. #define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT
  1414. #define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT
  1415. #define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT
  1416. #define __HAL_UNFREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT
  1417. #define __HAL_FREEZE_CAN1_DBGMCU __HAL_DBGMCU_FREEZE_CAN1
  1418. #define __HAL_UNFREEZE_CAN1_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN1
  1419. #define __HAL_FREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM1
  1420. #define __HAL_UNFREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM1
  1421. #define __HAL_FREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM2
  1422. #define __HAL_UNFREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM2
  1423.  
  1424. /**
  1425.   * @}
  1426.   */
  1427.  
  1428. /** @defgroup HAL_COMP_Aliased_Macros HAL COMP Aliased Macros maintained for legacy purpose
  1429.   * @{
  1430.   */
  1431. #if defined(STM32F3)
  1432. #define COMP_START                                       __HAL_COMP_ENABLE
  1433. #define COMP_STOP                                        __HAL_COMP_DISABLE
  1434. #define COMP_LOCK                                        __HAL_COMP_LOCK
  1435.    
  1436. #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
  1437. #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__)   (((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
  1438.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
  1439.                                                           __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE())
  1440. #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
  1441.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
  1442.                                                           __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE())
  1443. #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
  1444.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
  1445.                                                           __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE())
  1446. #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
  1447.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
  1448.                                                           __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE())
  1449. #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__)          (((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
  1450.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
  1451.                                                           __HAL_COMP_COMP6_EXTI_ENABLE_IT())
  1452. #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__)         (((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
  1453.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
  1454.                                                           __HAL_COMP_COMP6_EXTI_DISABLE_IT())
  1455. #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__)               (((__FLAG__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
  1456.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
  1457.                                                           __HAL_COMP_COMP6_EXTI_GET_FLAG())
  1458. #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__)             (((__FLAG__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
  1459.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
  1460.                                                           __HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
  1461. # endif
  1462. # if defined(STM32F302xE) || defined(STM32F302xC)
  1463. #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__)   (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
  1464.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
  1465.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
  1466.                                                           __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE())
  1467. #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
  1468.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
  1469.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
  1470.                                                           __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE())
  1471. #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
  1472.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
  1473.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
  1474.                                                           __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE())
  1475. #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
  1476.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
  1477.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
  1478.                                                           __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE())
  1479. #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__)          (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
  1480.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
  1481.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
  1482.                                                           __HAL_COMP_COMP6_EXTI_ENABLE_IT())
  1483. #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__)         (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
  1484.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
  1485.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
  1486.                                                           __HAL_COMP_COMP6_EXTI_DISABLE_IT())
  1487. #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__)               (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
  1488.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
  1489.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
  1490.                                                           __HAL_COMP_COMP6_EXTI_GET_FLAG())
  1491. #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__)             (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
  1492.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
  1493.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
  1494.                                                           __HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
  1495. # endif
  1496. # if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx)
  1497. #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__)   (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
  1498.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
  1499.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \
  1500.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
  1501.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE() : \
  1502.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE() : \
  1503.                                                           __HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE())
  1504. #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
  1505.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
  1506.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE() : \
  1507.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
  1508.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE() : \
  1509.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE() : \
  1510.                                                           __HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE())
  1511. #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
  1512.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
  1513.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE() : \
  1514.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
  1515.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE() : \
  1516.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE() : \
  1517.                                                           __HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE())
  1518. #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
  1519.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
  1520.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE() : \
  1521.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
  1522.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE() : \
  1523.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE() : \
  1524.                                                           __HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE())
  1525. #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__)          (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
  1526.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
  1527.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_IT() : \
  1528.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
  1529.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_IT() : \
  1530.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_IT() : \
  1531.                                                           __HAL_COMP_COMP7_EXTI_ENABLE_IT())
  1532. #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__)         (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
  1533.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
  1534.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_IT() : \
  1535.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
  1536.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_IT() : \
  1537.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_IT() : \
  1538.                                                           __HAL_COMP_COMP7_EXTI_DISABLE_IT())
  1539. #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__)               (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
  1540.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
  1541.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_GET_FLAG() : \
  1542.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
  1543.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_GET_FLAG() : \
  1544.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_GET_FLAG() : \
  1545.                                                           __HAL_COMP_COMP7_EXTI_GET_FLAG())
  1546. #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__)             (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
  1547.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
  1548.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_CLEAR_FLAG() : \
  1549.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
  1550.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \
  1551.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \
  1552.                                                           __HAL_COMP_COMP7_EXTI_CLEAR_FLAG())
  1553. # endif
  1554. # if defined(STM32F373xC) ||defined(STM32F378xx)
  1555. #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__)   (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
  1556.                                                           __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
  1557. #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
  1558.                                                           __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE())
  1559. #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
  1560.                                                           __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE())
  1561. #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
  1562.                                                           __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE())
  1563. #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__)          (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
  1564.                                                           __HAL_COMP_COMP2_EXTI_ENABLE_IT())
  1565. #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__)         (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
  1566.                                                           __HAL_COMP_COMP2_EXTI_DISABLE_IT())
  1567. #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__)               (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
  1568.                                                           __HAL_COMP_COMP2_EXTI_GET_FLAG())
  1569. #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__)             (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
  1570.                                                           __HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
  1571. # endif
  1572. #else
  1573. #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__)   (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
  1574.                                                           __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
  1575. #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
  1576.                                                           __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE())
  1577. #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
  1578.                                                           __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE())
  1579. #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
  1580.                                                           __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE())
  1581. #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__)          (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
  1582.                                                           __HAL_COMP_COMP2_EXTI_ENABLE_IT())
  1583. #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__)         (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
  1584.                                                           __HAL_COMP_COMP2_EXTI_DISABLE_IT())
  1585. #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__)               (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
  1586.                                                           __HAL_COMP_COMP2_EXTI_GET_FLAG())
  1587. #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__)             (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
  1588.                                                           __HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
  1589. #endif
  1590.  
  1591. #define __HAL_COMP_GET_EXTI_LINE  COMP_GET_EXTI_LINE
  1592.  
  1593. #if defined(STM32L0) || defined(STM32L4)
  1594. /* Note: On these STM32 families, the only argument of this macro             */
  1595. /*       is COMP_FLAG_LOCK.                                                   */
  1596. /*       This macro is replaced by __HAL_COMP_IS_LOCKED with only HAL handle  */
  1597. /*       argument.                                                            */
  1598. #define __HAL_COMP_GET_FLAG(__HANDLE__, __FLAG__)  (__HAL_COMP_IS_LOCKED(__HANDLE__))
  1599. #endif
  1600. /**
  1601.   * @}
  1602.   */
  1603.  
  1604. #if defined(STM32L0) || defined(STM32L4)
  1605. /** @defgroup HAL_COMP_Aliased_Functions HAL COMP Aliased Functions maintained for legacy purpose
  1606.   * @{
  1607.   */
  1608. #define HAL_COMP_Start_IT       HAL_COMP_Start /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */
  1609. #define HAL_COMP_Stop_IT        HAL_COMP_Stop  /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */
  1610. /**
  1611.   * @}
  1612.   */
  1613. #endif
  1614.  
  1615. /** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
  1616.   * @{
  1617.   */
  1618.  
  1619. #define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_WAVE_NONE) || \
  1620.                           ((WAVE) == DAC_WAVE_NOISE)|| \
  1621.                           ((WAVE) == DAC_WAVE_TRIANGLE))
  1622.  
  1623. /**
  1624.   * @}
  1625.   */
  1626.  
  1627. /** @defgroup HAL_FLASH_Aliased_Macros HAL FLASH Aliased Macros maintained for legacy purpose
  1628.   * @{
  1629.   */
  1630.  
  1631. #define IS_WRPAREA          IS_OB_WRPAREA
  1632. #define IS_TYPEPROGRAM      IS_FLASH_TYPEPROGRAM
  1633. #define IS_TYPEPROGRAMFLASH IS_FLASH_TYPEPROGRAM
  1634. #define IS_TYPEERASE        IS_FLASH_TYPEERASE
  1635. #define IS_NBSECTORS        IS_FLASH_NBSECTORS
  1636. #define IS_OB_WDG_SOURCE    IS_OB_IWDG_SOURCE
  1637.  
  1638. /**
  1639.   * @}
  1640.   */
  1641.  
  1642. /** @defgroup HAL_I2C_Aliased_Macros HAL I2C Aliased Macros maintained for legacy purpose
  1643.   * @{
  1644.   */
  1645.  
  1646. #define __HAL_I2C_RESET_CR2             I2C_RESET_CR2
  1647. #define __HAL_I2C_GENERATE_START        I2C_GENERATE_START
  1648. #if defined(STM32F1)
  1649. #define __HAL_I2C_FREQ_RANGE            I2C_FREQRANGE
  1650. #else
  1651. #define __HAL_I2C_FREQ_RANGE            I2C_FREQ_RANGE
  1652. #endif /* STM32F1 */
  1653. #define __HAL_I2C_RISE_TIME             I2C_RISE_TIME
  1654. #define __HAL_I2C_SPEED_STANDARD        I2C_SPEED_STANDARD
  1655. #define __HAL_I2C_SPEED_FAST            I2C_SPEED_FAST
  1656. #define __HAL_I2C_SPEED                 I2C_SPEED
  1657. #define __HAL_I2C_7BIT_ADD_WRITE        I2C_7BIT_ADD_WRITE
  1658. #define __HAL_I2C_7BIT_ADD_READ         I2C_7BIT_ADD_READ
  1659. #define __HAL_I2C_10BIT_ADDRESS         I2C_10BIT_ADDRESS
  1660. #define __HAL_I2C_10BIT_HEADER_WRITE    I2C_10BIT_HEADER_WRITE
  1661. #define __HAL_I2C_10BIT_HEADER_READ     I2C_10BIT_HEADER_READ
  1662. #define __HAL_I2C_MEM_ADD_MSB           I2C_MEM_ADD_MSB
  1663. #define __HAL_I2C_MEM_ADD_LSB           I2C_MEM_ADD_LSB
  1664. #define __HAL_I2C_FREQRANGE             I2C_FREQRANGE
  1665. /**
  1666.   * @}
  1667.   */
  1668.  
  1669. /** @defgroup HAL_I2S_Aliased_Macros HAL I2S Aliased Macros maintained for legacy purpose
  1670.   * @{
  1671.   */
  1672.  
  1673. #define IS_I2S_INSTANCE                 IS_I2S_ALL_INSTANCE
  1674. #define IS_I2S_INSTANCE_EXT             IS_I2S_ALL_INSTANCE_EXT
  1675.  
  1676. /**
  1677.   * @}
  1678.   */
  1679.  
  1680. /** @defgroup HAL_IRDA_Aliased_Macros HAL IRDA Aliased Macros maintained for legacy purpose
  1681.   * @{
  1682.   */
  1683.  
  1684. #define __IRDA_DISABLE                  __HAL_IRDA_DISABLE
  1685. #define __IRDA_ENABLE                   __HAL_IRDA_ENABLE
  1686.  
  1687. #define __HAL_IRDA_GETCLOCKSOURCE       IRDA_GETCLOCKSOURCE
  1688. #define __HAL_IRDA_MASK_COMPUTATION     IRDA_MASK_COMPUTATION
  1689. #define __IRDA_GETCLOCKSOURCE           IRDA_GETCLOCKSOURCE
  1690. #define __IRDA_MASK_COMPUTATION         IRDA_MASK_COMPUTATION
  1691.  
  1692. #define IS_IRDA_ONEBIT_SAMPLE           IS_IRDA_ONE_BIT_SAMPLE                  
  1693.  
  1694.  
  1695. /**
  1696.   * @}
  1697.   */
  1698.  
  1699.  
  1700. /** @defgroup HAL_IWDG_Aliased_Macros HAL IWDG Aliased Macros maintained for legacy purpose
  1701.   * @{
  1702.   */
  1703. #define __HAL_IWDG_ENABLE_WRITE_ACCESS  IWDG_ENABLE_WRITE_ACCESS
  1704. #define __HAL_IWDG_DISABLE_WRITE_ACCESS IWDG_DISABLE_WRITE_ACCESS
  1705. /**
  1706.   * @}
  1707.   */
  1708.  
  1709.  
  1710. /** @defgroup HAL_LPTIM_Aliased_Macros HAL LPTIM Aliased Macros maintained for legacy purpose
  1711.   * @{
  1712.   */
  1713.  
  1714. #define __HAL_LPTIM_ENABLE_INTERRUPT    __HAL_LPTIM_ENABLE_IT
  1715. #define __HAL_LPTIM_DISABLE_INTERRUPT   __HAL_LPTIM_DISABLE_IT
  1716. #define __HAL_LPTIM_GET_ITSTATUS        __HAL_LPTIM_GET_IT_SOURCE
  1717.  
  1718. /**
  1719.   * @}
  1720.   */
  1721.  
  1722.  
  1723. /** @defgroup HAL_OPAMP_Aliased_Macros HAL OPAMP Aliased Macros maintained for legacy purpose
  1724.   * @{
  1725.   */
  1726. #define __OPAMP_CSR_OPAXPD                OPAMP_CSR_OPAXPD
  1727. #define __OPAMP_CSR_S3SELX                OPAMP_CSR_S3SELX
  1728. #define __OPAMP_CSR_S4SELX                OPAMP_CSR_S4SELX
  1729. #define __OPAMP_CSR_S5SELX                OPAMP_CSR_S5SELX
  1730. #define __OPAMP_CSR_S6SELX                OPAMP_CSR_S6SELX
  1731. #define __OPAMP_CSR_OPAXCAL_L             OPAMP_CSR_OPAXCAL_L
  1732. #define __OPAMP_CSR_OPAXCAL_H             OPAMP_CSR_OPAXCAL_H
  1733. #define __OPAMP_CSR_OPAXLPM               OPAMP_CSR_OPAXLPM
  1734. #define __OPAMP_CSR_ALL_SWITCHES          OPAMP_CSR_ALL_SWITCHES
  1735. #define __OPAMP_CSR_ANAWSELX              OPAMP_CSR_ANAWSELX
  1736. #define __OPAMP_CSR_OPAXCALOUT            OPAMP_CSR_OPAXCALOUT
  1737. #define __OPAMP_OFFSET_TRIM_BITSPOSITION  OPAMP_OFFSET_TRIM_BITSPOSITION
  1738. #define __OPAMP_OFFSET_TRIM_SET           OPAMP_OFFSET_TRIM_SET
  1739.  
  1740. /**
  1741.   * @}
  1742.   */
  1743.  
  1744.  
  1745. /** @defgroup HAL_PWR_Aliased_Macros HAL PWR Aliased Macros maintained for legacy purpose
  1746.   * @{
  1747.   */
  1748. #define __HAL_PVD_EVENT_DISABLE                                  __HAL_PWR_PVD_EXTI_DISABLE_EVENT
  1749. #define __HAL_PVD_EVENT_ENABLE                                   __HAL_PWR_PVD_EXTI_ENABLE_EVENT
  1750. #define __HAL_PVD_EXTI_FALLINGTRIGGER_DISABLE                    __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
  1751. #define __HAL_PVD_EXTI_FALLINGTRIGGER_ENABLE                     __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
  1752. #define __HAL_PVD_EXTI_RISINGTRIGGER_DISABLE                     __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
  1753. #define __HAL_PVD_EXTI_RISINGTRIGGER_ENABLE                      __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
  1754. #define __HAL_PVM_EVENT_DISABLE                                  __HAL_PWR_PVM_EVENT_DISABLE
  1755. #define __HAL_PVM_EVENT_ENABLE                                   __HAL_PWR_PVM_EVENT_ENABLE
  1756. #define __HAL_PVM_EXTI_FALLINGTRIGGER_DISABLE                    __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_DISABLE
  1757. #define __HAL_PVM_EXTI_FALLINGTRIGGER_ENABLE                     __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_ENABLE
  1758. #define __HAL_PVM_EXTI_RISINGTRIGGER_DISABLE                     __HAL_PWR_PVM_EXTI_RISINGTRIGGER_DISABLE
  1759. #define __HAL_PVM_EXTI_RISINGTRIGGER_ENABLE                      __HAL_PWR_PVM_EXTI_RISINGTRIGGER_ENABLE
  1760. #define __HAL_PWR_INTERNALWAKEUP_DISABLE                         HAL_PWREx_DisableInternalWakeUpLine
  1761. #define __HAL_PWR_INTERNALWAKEUP_ENABLE                          HAL_PWREx_EnableInternalWakeUpLine
  1762. #define __HAL_PWR_PULL_UP_DOWN_CONFIG_DISABLE                    HAL_PWREx_DisablePullUpPullDownConfig
  1763. #define __HAL_PWR_PULL_UP_DOWN_CONFIG_ENABLE                     HAL_PWREx_EnablePullUpPullDownConfig
  1764. #define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER()                  do { __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); } while(0)
  1765. #define __HAL_PWR_PVD_EXTI_EVENT_DISABLE                         __HAL_PWR_PVD_EXTI_DISABLE_EVENT
  1766. #define __HAL_PWR_PVD_EXTI_EVENT_ENABLE                          __HAL_PWR_PVD_EXTI_ENABLE_EVENT
  1767. #define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_DISABLE                __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
  1768. #define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_ENABLE                 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
  1769. #define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_DISABLE                 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
  1770. #define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_ENABLE                  __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
  1771. #define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER              __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
  1772. #define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER               __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
  1773. #define __HAL_PWR_PVM_DISABLE()                                  do { HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2();HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4(); } while(0)
  1774. #define __HAL_PWR_PVM_ENABLE()                                   do { HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2();HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4(); } while(0)
  1775. #define __HAL_PWR_SRAM2CONTENT_PRESERVE_DISABLE                  HAL_PWREx_DisableSRAM2ContentRetention
  1776. #define __HAL_PWR_SRAM2CONTENT_PRESERVE_ENABLE                   HAL_PWREx_EnableSRAM2ContentRetention
  1777. #define __HAL_PWR_VDDIO2_DISABLE                                 HAL_PWREx_DisableVddIO2
  1778. #define __HAL_PWR_VDDIO2_ENABLE                                  HAL_PWREx_EnableVddIO2
  1779. #define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER                 __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE
  1780. #define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER           __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE
  1781. #define __HAL_PWR_VDDUSB_DISABLE                                 HAL_PWREx_DisableVddUSB
  1782. #define __HAL_PWR_VDDUSB_ENABLE                                  HAL_PWREx_EnableVddUSB
  1783.  
  1784. #if defined (STM32F4)
  1785. #define __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD)         __HAL_PWR_PVD_EXTI_ENABLE_IT()
  1786. #define __HAL_PVD_EXTI_DISABLE_IT(PWR_EXTI_LINE_PVD)        __HAL_PWR_PVD_EXTI_DISABLE_IT()
  1787. #define __HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD)          __HAL_PWR_PVD_EXTI_GET_FLAG()  
  1788. #define __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD)        __HAL_PWR_PVD_EXTI_CLEAR_FLAG()
  1789. #define __HAL_PVD_EXTI_GENERATE_SWIT(PWR_EXTI_LINE_PVD)     __HAL_PWR_PVD_EXTI_GENERATE_SWIT()
  1790. #else
  1791. #define __HAL_PVD_EXTI_CLEAR_FLAG                                __HAL_PWR_PVD_EXTI_CLEAR_FLAG
  1792. #define __HAL_PVD_EXTI_DISABLE_IT                                __HAL_PWR_PVD_EXTI_DISABLE_IT
  1793. #define __HAL_PVD_EXTI_ENABLE_IT                                 __HAL_PWR_PVD_EXTI_ENABLE_IT
  1794. #define __HAL_PVD_EXTI_GENERATE_SWIT                             __HAL_PWR_PVD_EXTI_GENERATE_SWIT
  1795. #define __HAL_PVD_EXTI_GET_FLAG                                  __HAL_PWR_PVD_EXTI_GET_FLAG
  1796. #endif /* STM32F4 */
  1797. /**  
  1798.   * @}
  1799.   */  
  1800.  
  1801.  
  1802. /** @defgroup HAL_RCC_Aliased HAL RCC Aliased maintained for legacy purpose
  1803.   * @{
  1804.   */
  1805.  
  1806. #define RCC_StopWakeUpClock_MSI     RCC_STOP_WAKEUPCLOCK_MSI
  1807. #define RCC_StopWakeUpClock_HSI     RCC_STOP_WAKEUPCLOCK_HSI
  1808.  
  1809. #define HAL_RCC_CCSCallback HAL_RCC_CSSCallback
  1810. #define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())
  1811.  
  1812. #define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE
  1813. #define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE
  1814. #define __ADC_CLK_SLEEP_DISABLE __HAL_RCC_ADC_CLK_SLEEP_DISABLE
  1815. #define __ADC_CLK_SLEEP_ENABLE __HAL_RCC_ADC_CLK_SLEEP_ENABLE
  1816. #define __ADC_FORCE_RESET __HAL_RCC_ADC_FORCE_RESET
  1817. #define __ADC_RELEASE_RESET __HAL_RCC_ADC_RELEASE_RESET
  1818. #define __ADC1_CLK_DISABLE        __HAL_RCC_ADC1_CLK_DISABLE
  1819. #define __ADC1_CLK_ENABLE         __HAL_RCC_ADC1_CLK_ENABLE
  1820. #define __ADC1_FORCE_RESET        __HAL_RCC_ADC1_FORCE_RESET
  1821. #define __ADC1_RELEASE_RESET      __HAL_RCC_ADC1_RELEASE_RESET
  1822. #define __ADC1_CLK_SLEEP_ENABLE   __HAL_RCC_ADC1_CLK_SLEEP_ENABLE  
  1823. #define __ADC1_CLK_SLEEP_DISABLE  __HAL_RCC_ADC1_CLK_SLEEP_DISABLE  
  1824. #define __ADC2_CLK_DISABLE __HAL_RCC_ADC2_CLK_DISABLE
  1825. #define __ADC2_CLK_ENABLE __HAL_RCC_ADC2_CLK_ENABLE
  1826. #define __ADC2_FORCE_RESET __HAL_RCC_ADC2_FORCE_RESET
  1827. #define __ADC2_RELEASE_RESET __HAL_RCC_ADC2_RELEASE_RESET
  1828. #define __ADC3_CLK_DISABLE __HAL_RCC_ADC3_CLK_DISABLE
  1829. #define __ADC3_CLK_ENABLE __HAL_RCC_ADC3_CLK_ENABLE
  1830. #define __ADC3_FORCE_RESET __HAL_RCC_ADC3_FORCE_RESET
  1831. #define __ADC3_RELEASE_RESET __HAL_RCC_ADC3_RELEASE_RESET
  1832. #define __AES_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE
  1833. #define __AES_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE
  1834. #define __AES_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE
  1835. #define __AES_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE
  1836. #define __AES_FORCE_RESET __HAL_RCC_AES_FORCE_RESET
  1837. #define __AES_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET
  1838. #define __CRYP_CLK_SLEEP_ENABLE      __HAL_RCC_CRYP_CLK_SLEEP_ENABLE
  1839. #define __CRYP_CLK_SLEEP_DISABLE  __HAL_RCC_CRYP_CLK_SLEEP_DISABLE
  1840. #define __CRYP_CLK_ENABLE  __HAL_RCC_CRYP_CLK_ENABLE
  1841. #define __CRYP_CLK_DISABLE  __HAL_RCC_CRYP_CLK_DISABLE
  1842. #define __CRYP_FORCE_RESET  __HAL_RCC_CRYP_FORCE_RESET
  1843. #define __CRYP_RELEASE_RESET  __HAL_RCC_CRYP_RELEASE_RESET
  1844. #define __AFIO_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE
  1845. #define __AFIO_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE
  1846. #define __AFIO_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET
  1847. #define __AFIO_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET
  1848. #define __AHB_FORCE_RESET __HAL_RCC_AHB_FORCE_RESET
  1849. #define __AHB_RELEASE_RESET __HAL_RCC_AHB_RELEASE_RESET
  1850. #define __AHB1_FORCE_RESET __HAL_RCC_AHB1_FORCE_RESET
  1851. #define __AHB1_RELEASE_RESET __HAL_RCC_AHB1_RELEASE_RESET
  1852. #define __AHB2_FORCE_RESET __HAL_RCC_AHB2_FORCE_RESET
  1853. #define __AHB2_RELEASE_RESET __HAL_RCC_AHB2_RELEASE_RESET
  1854. #define __AHB3_FORCE_RESET __HAL_RCC_AHB3_FORCE_RESET
  1855. #define __AHB3_RELEASE_RESET __HAL_RCC_AHB3_RELEASE_RESET
  1856. #define __APB1_FORCE_RESET __HAL_RCC_APB1_FORCE_RESET
  1857. #define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
  1858. #define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
  1859. #define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
  1860. #define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
  1861. #define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
  1862. #define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
  1863. #define __BKP_RELEASE_RESET __HAL_RCC_BKP_RELEASE_RESET
  1864. #define __CAN1_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE
  1865. #define __CAN1_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE
  1866. #define __CAN1_CLK_SLEEP_DISABLE __HAL_RCC_CAN1_CLK_SLEEP_DISABLE
  1867. #define __CAN1_CLK_SLEEP_ENABLE __HAL_RCC_CAN1_CLK_SLEEP_ENABLE
  1868. #define __CAN1_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET
  1869. #define __CAN1_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET
  1870. #define __CAN_CLK_DISABLE         __HAL_RCC_CAN1_CLK_DISABLE
  1871. #define __CAN_CLK_ENABLE          __HAL_RCC_CAN1_CLK_ENABLE
  1872. #define __CAN_FORCE_RESET         __HAL_RCC_CAN1_FORCE_RESET
  1873. #define __CAN_RELEASE_RESET       __HAL_RCC_CAN1_RELEASE_RESET
  1874. #define __CAN2_CLK_DISABLE __HAL_RCC_CAN2_CLK_DISABLE
  1875. #define __CAN2_CLK_ENABLE __HAL_RCC_CAN2_CLK_ENABLE
  1876. #define __CAN2_FORCE_RESET __HAL_RCC_CAN2_FORCE_RESET
  1877. #define __CAN2_RELEASE_RESET __HAL_RCC_CAN2_RELEASE_RESET
  1878. #define __CEC_CLK_DISABLE __HAL_RCC_CEC_CLK_DISABLE
  1879. #define __CEC_CLK_ENABLE __HAL_RCC_CEC_CLK_ENABLE
  1880. #define __COMP_CLK_DISABLE        __HAL_RCC_COMP_CLK_DISABLE
  1881. #define __COMP_CLK_ENABLE         __HAL_RCC_COMP_CLK_ENABLE
  1882. #define __COMP_FORCE_RESET        __HAL_RCC_COMP_FORCE_RESET
  1883. #define __COMP_RELEASE_RESET      __HAL_RCC_COMP_RELEASE_RESET
  1884. #define __COMP_CLK_SLEEP_ENABLE   __HAL_RCC_COMP_CLK_SLEEP_ENABLE
  1885. #define __COMP_CLK_SLEEP_DISABLE  __HAL_RCC_COMP_CLK_SLEEP_DISABLE
  1886. #define __CEC_FORCE_RESET __HAL_RCC_CEC_FORCE_RESET
  1887. #define __CEC_RELEASE_RESET __HAL_RCC_CEC_RELEASE_RESET
  1888. #define __CRC_CLK_DISABLE __HAL_RCC_CRC_CLK_DISABLE
  1889. #define __CRC_CLK_ENABLE __HAL_RCC_CRC_CLK_ENABLE
  1890. #define __CRC_CLK_SLEEP_DISABLE __HAL_RCC_CRC_CLK_SLEEP_DISABLE
  1891. #define __CRC_CLK_SLEEP_ENABLE __HAL_RCC_CRC_CLK_SLEEP_ENABLE
  1892. #define __CRC_FORCE_RESET __HAL_RCC_CRC_FORCE_RESET
  1893. #define __CRC_RELEASE_RESET __HAL_RCC_CRC_RELEASE_RESET
  1894. #define __DAC_CLK_DISABLE __HAL_RCC_DAC_CLK_DISABLE
  1895. #define __DAC_CLK_ENABLE __HAL_RCC_DAC_CLK_ENABLE
  1896. #define __DAC_FORCE_RESET __HAL_RCC_DAC_FORCE_RESET
  1897. #define __DAC_RELEASE_RESET __HAL_RCC_DAC_RELEASE_RESET
  1898. #define __DAC1_CLK_DISABLE __HAL_RCC_DAC1_CLK_DISABLE
  1899. #define __DAC1_CLK_ENABLE __HAL_RCC_DAC1_CLK_ENABLE
  1900. #define __DAC1_CLK_SLEEP_DISABLE __HAL_RCC_DAC1_CLK_SLEEP_DISABLE
  1901. #define __DAC1_CLK_SLEEP_ENABLE __HAL_RCC_DAC1_CLK_SLEEP_ENABLE
  1902. #define __DAC1_FORCE_RESET __HAL_RCC_DAC1_FORCE_RESET
  1903. #define __DAC1_RELEASE_RESET __HAL_RCC_DAC1_RELEASE_RESET
  1904. #define __DBGMCU_CLK_ENABLE     __HAL_RCC_DBGMCU_CLK_ENABLE
  1905. #define __DBGMCU_CLK_DISABLE     __HAL_RCC_DBGMCU_CLK_DISABLE
  1906. #define __DBGMCU_FORCE_RESET    __HAL_RCC_DBGMCU_FORCE_RESET
  1907. #define __DBGMCU_RELEASE_RESET  __HAL_RCC_DBGMCU_RELEASE_RESET
  1908. #define __DFSDM_CLK_DISABLE __HAL_RCC_DFSDM_CLK_DISABLE
  1909. #define __DFSDM_CLK_ENABLE __HAL_RCC_DFSDM_CLK_ENABLE
  1910. #define __DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE
  1911. #define __DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE
  1912. #define __DFSDM_FORCE_RESET __HAL_RCC_DFSDM_FORCE_RESET
  1913. #define __DFSDM_RELEASE_RESET __HAL_RCC_DFSDM_RELEASE_RESET
  1914. #define __DMA1_CLK_DISABLE __HAL_RCC_DMA1_CLK_DISABLE
  1915. #define __DMA1_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE
  1916. #define __DMA1_CLK_SLEEP_DISABLE __HAL_RCC_DMA1_CLK_SLEEP_DISABLE
  1917. #define __DMA1_CLK_SLEEP_ENABLE __HAL_RCC_DMA1_CLK_SLEEP_ENABLE
  1918. #define __DMA1_FORCE_RESET __HAL_RCC_DMA1_FORCE_RESET
  1919. #define __DMA1_RELEASE_RESET __HAL_RCC_DMA1_RELEASE_RESET
  1920. #define __DMA2_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE
  1921. #define __DMA2_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
  1922. #define __DMA2_CLK_SLEEP_DISABLE __HAL_RCC_DMA2_CLK_SLEEP_DISABLE
  1923. #define __DMA2_CLK_SLEEP_ENABLE __HAL_RCC_DMA2_CLK_SLEEP_ENABLE
  1924. #define __DMA2_FORCE_RESET __HAL_RCC_DMA2_FORCE_RESET
  1925. #define __DMA2_RELEASE_RESET __HAL_RCC_DMA2_RELEASE_RESET
  1926. #define __ETHMAC_CLK_DISABLE __HAL_RCC_ETHMAC_CLK_DISABLE
  1927. #define __ETHMAC_CLK_ENABLE __HAL_RCC_ETHMAC_CLK_ENABLE
  1928. #define __ETHMAC_FORCE_RESET __HAL_RCC_ETHMAC_FORCE_RESET
  1929. #define __ETHMAC_RELEASE_RESET __HAL_RCC_ETHMAC_RELEASE_RESET
  1930. #define __ETHMACRX_CLK_DISABLE __HAL_RCC_ETHMACRX_CLK_DISABLE
  1931. #define __ETHMACRX_CLK_ENABLE __HAL_RCC_ETHMACRX_CLK_ENABLE
  1932. #define __ETHMACTX_CLK_DISABLE __HAL_RCC_ETHMACTX_CLK_DISABLE
  1933. #define __ETHMACTX_CLK_ENABLE __HAL_RCC_ETHMACTX_CLK_ENABLE
  1934. #define __FIREWALL_CLK_DISABLE __HAL_RCC_FIREWALL_CLK_DISABLE
  1935. #define __FIREWALL_CLK_ENABLE __HAL_RCC_FIREWALL_CLK_ENABLE
  1936. #define __FLASH_CLK_DISABLE __HAL_RCC_FLASH_CLK_DISABLE
  1937. #define __FLASH_CLK_ENABLE __HAL_RCC_FLASH_CLK_ENABLE
  1938. #define __FLASH_CLK_SLEEP_DISABLE __HAL_RCC_FLASH_CLK_SLEEP_DISABLE
  1939. #define __FLASH_CLK_SLEEP_ENABLE __HAL_RCC_FLASH_CLK_SLEEP_ENABLE
  1940. #define __FLASH_FORCE_RESET __HAL_RCC_FLASH_FORCE_RESET
  1941. #define __FLASH_RELEASE_RESET __HAL_RCC_FLASH_RELEASE_RESET
  1942. #define __FLITF_CLK_DISABLE       __HAL_RCC_FLITF_CLK_DISABLE
  1943. #define __FLITF_CLK_ENABLE        __HAL_RCC_FLITF_CLK_ENABLE
  1944. #define __FLITF_FORCE_RESET       __HAL_RCC_FLITF_FORCE_RESET
  1945. #define __FLITF_RELEASE_RESET     __HAL_RCC_FLITF_RELEASE_RESET
  1946. #define __FLITF_CLK_SLEEP_ENABLE  __HAL_RCC_FLITF_CLK_SLEEP_ENABLE
  1947. #define __FLITF_CLK_SLEEP_DISABLE __HAL_RCC_FLITF_CLK_SLEEP_DISABLE
  1948. #define __FMC_CLK_DISABLE __HAL_RCC_FMC_CLK_DISABLE
  1949. #define __FMC_CLK_ENABLE __HAL_RCC_FMC_CLK_ENABLE
  1950. #define __FMC_CLK_SLEEP_DISABLE __HAL_RCC_FMC_CLK_SLEEP_DISABLE
  1951. #define __FMC_CLK_SLEEP_ENABLE __HAL_RCC_FMC_CLK_SLEEP_ENABLE
  1952. #define __FMC_FORCE_RESET __HAL_RCC_FMC_FORCE_RESET
  1953. #define __FMC_RELEASE_RESET __HAL_RCC_FMC_RELEASE_RESET
  1954. #define __FSMC_CLK_DISABLE __HAL_RCC_FSMC_CLK_DISABLE
  1955. #define __FSMC_CLK_ENABLE __HAL_RCC_FSMC_CLK_ENABLE
  1956. #define __GPIOA_CLK_DISABLE __HAL_RCC_GPIOA_CLK_DISABLE
  1957. #define __GPIOA_CLK_ENABLE __HAL_RCC_GPIOA_CLK_ENABLE
  1958. #define __GPIOA_CLK_SLEEP_DISABLE __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE
  1959. #define __GPIOA_CLK_SLEEP_ENABLE __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE
  1960. #define __GPIOA_FORCE_RESET __HAL_RCC_GPIOA_FORCE_RESET
  1961. #define __GPIOA_RELEASE_RESET __HAL_RCC_GPIOA_RELEASE_RESET
  1962. #define __GPIOB_CLK_DISABLE __HAL_RCC_GPIOB_CLK_DISABLE
  1963. #define __GPIOB_CLK_ENABLE __HAL_RCC_GPIOB_CLK_ENABLE
  1964. #define __GPIOB_CLK_SLEEP_DISABLE __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE
  1965. #define __GPIOB_CLK_SLEEP_ENABLE __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE
  1966. #define __GPIOB_FORCE_RESET __HAL_RCC_GPIOB_FORCE_RESET
  1967. #define __GPIOB_RELEASE_RESET __HAL_RCC_GPIOB_RELEASE_RESET
  1968. #define __GPIOC_CLK_DISABLE __HAL_RCC_GPIOC_CLK_DISABLE
  1969. #define __GPIOC_CLK_ENABLE __HAL_RCC_GPIOC_CLK_ENABLE
  1970. #define __GPIOC_CLK_SLEEP_DISABLE __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE
  1971. #define __GPIOC_CLK_SLEEP_ENABLE __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE
  1972. #define __GPIOC_FORCE_RESET __HAL_RCC_GPIOC_FORCE_RESET
  1973. #define __GPIOC_RELEASE_RESET __HAL_RCC_GPIOC_RELEASE_RESET
  1974. #define __GPIOD_CLK_DISABLE __HAL_RCC_GPIOD_CLK_DISABLE
  1975. #define __GPIOD_CLK_ENABLE __HAL_RCC_GPIOD_CLK_ENABLE
  1976. #define __GPIOD_CLK_SLEEP_DISABLE __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE
  1977. #define __GPIOD_CLK_SLEEP_ENABLE __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE
  1978. #define __GPIOD_FORCE_RESET __HAL_RCC_GPIOD_FORCE_RESET
  1979. #define __GPIOD_RELEASE_RESET __HAL_RCC_GPIOD_RELEASE_RESET
  1980. #define __GPIOE_CLK_DISABLE __HAL_RCC_GPIOE_CLK_DISABLE
  1981. #define __GPIOE_CLK_ENABLE __HAL_RCC_GPIOE_CLK_ENABLE
  1982. #define __GPIOE_CLK_SLEEP_DISABLE __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE
  1983. #define __GPIOE_CLK_SLEEP_ENABLE __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE
  1984. #define __GPIOE_FORCE_RESET __HAL_RCC_GPIOE_FORCE_RESET
  1985. #define __GPIOE_RELEASE_RESET __HAL_RCC_GPIOE_RELEASE_RESET
  1986. #define __GPIOF_CLK_DISABLE __HAL_RCC_GPIOF_CLK_DISABLE
  1987. #define __GPIOF_CLK_ENABLE __HAL_RCC_GPIOF_CLK_ENABLE
  1988. #define __GPIOF_CLK_SLEEP_DISABLE __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE
  1989. #define __GPIOF_CLK_SLEEP_ENABLE __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE
  1990. #define __GPIOF_FORCE_RESET __HAL_RCC_GPIOF_FORCE_RESET
  1991. #define __GPIOF_RELEASE_RESET __HAL_RCC_GPIOF_RELEASE_RESET
  1992. #define __GPIOG_CLK_DISABLE __HAL_RCC_GPIOG_CLK_DISABLE
  1993. #define __GPIOG_CLK_ENABLE __HAL_RCC_GPIOG_CLK_ENABLE
  1994. #define __GPIOG_CLK_SLEEP_DISABLE __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE
  1995. #define __GPIOG_CLK_SLEEP_ENABLE __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE
  1996. #define __GPIOG_FORCE_RESET __HAL_RCC_GPIOG_FORCE_RESET
  1997. #define __GPIOG_RELEASE_RESET __HAL_RCC_GPIOG_RELEASE_RESET
  1998. #define __GPIOH_CLK_DISABLE __HAL_RCC_GPIOH_CLK_DISABLE
  1999. #define __GPIOH_CLK_ENABLE __HAL_RCC_GPIOH_CLK_ENABLE
  2000. #define __GPIOH_CLK_SLEEP_DISABLE __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE
  2001. #define __GPIOH_CLK_SLEEP_ENABLE __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE
  2002. #define __GPIOH_FORCE_RESET __HAL_RCC_GPIOH_FORCE_RESET
  2003. #define __GPIOH_RELEASE_RESET __HAL_RCC_GPIOH_RELEASE_RESET
  2004. #define __I2C1_CLK_DISABLE __HAL_RCC_I2C1_CLK_DISABLE
  2005. #define __I2C1_CLK_ENABLE __HAL_RCC_I2C1_CLK_ENABLE
  2006. #define __I2C1_CLK_SLEEP_DISABLE __HAL_RCC_I2C1_CLK_SLEEP_DISABLE
  2007. #define __I2C1_CLK_SLEEP_ENABLE __HAL_RCC_I2C1_CLK_SLEEP_ENABLE
  2008. #define __I2C1_FORCE_RESET __HAL_RCC_I2C1_FORCE_RESET
  2009. #define __I2C1_RELEASE_RESET __HAL_RCC_I2C1_RELEASE_RESET
  2010. #define __I2C2_CLK_DISABLE __HAL_RCC_I2C2_CLK_DISABLE
  2011. #define __I2C2_CLK_ENABLE __HAL_RCC_I2C2_CLK_ENABLE
  2012. #define __I2C2_CLK_SLEEP_DISABLE __HAL_RCC_I2C2_CLK_SLEEP_DISABLE
  2013. #define __I2C2_CLK_SLEEP_ENABLE __HAL_RCC_I2C2_CLK_SLEEP_ENABLE
  2014. #define __I2C2_FORCE_RESET __HAL_RCC_I2C2_FORCE_RESET
  2015. #define __I2C2_RELEASE_RESET __HAL_RCC_I2C2_RELEASE_RESET
  2016. #define __I2C3_CLK_DISABLE __HAL_RCC_I2C3_CLK_DISABLE
  2017. #define __I2C3_CLK_ENABLE __HAL_RCC_I2C3_CLK_ENABLE
  2018. #define __I2C3_CLK_SLEEP_DISABLE __HAL_RCC_I2C3_CLK_SLEEP_DISABLE
  2019. #define __I2C3_CLK_SLEEP_ENABLE __HAL_RCC_I2C3_CLK_SLEEP_ENABLE
  2020. #define __I2C3_FORCE_RESET __HAL_RCC_I2C3_FORCE_RESET
  2021. #define __I2C3_RELEASE_RESET __HAL_RCC_I2C3_RELEASE_RESET
  2022. #define __LCD_CLK_DISABLE __HAL_RCC_LCD_CLK_DISABLE
  2023. #define __LCD_CLK_ENABLE __HAL_RCC_LCD_CLK_ENABLE
  2024. #define __LCD_CLK_SLEEP_DISABLE __HAL_RCC_LCD_CLK_SLEEP_DISABLE
  2025. #define __LCD_CLK_SLEEP_ENABLE __HAL_RCC_LCD_CLK_SLEEP_ENABLE
  2026. #define __LCD_FORCE_RESET __HAL_RCC_LCD_FORCE_RESET
  2027. #define __LCD_RELEASE_RESET __HAL_RCC_LCD_RELEASE_RESET
  2028. #define __LPTIM1_CLK_DISABLE __HAL_RCC_LPTIM1_CLK_DISABLE
  2029. #define __LPTIM1_CLK_ENABLE __HAL_RCC_LPTIM1_CLK_ENABLE
  2030. #define __LPTIM1_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE
  2031. #define __LPTIM1_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE
  2032. #define __LPTIM1_FORCE_RESET __HAL_RCC_LPTIM1_FORCE_RESET
  2033. #define __LPTIM1_RELEASE_RESET __HAL_RCC_LPTIM1_RELEASE_RESET
  2034. #define __LPTIM2_CLK_DISABLE __HAL_RCC_LPTIM2_CLK_DISABLE
  2035. #define __LPTIM2_CLK_ENABLE __HAL_RCC_LPTIM2_CLK_ENABLE
  2036. #define __LPTIM2_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE
  2037. #define __LPTIM2_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE
  2038. #define __LPTIM2_FORCE_RESET __HAL_RCC_LPTIM2_FORCE_RESET
  2039. #define __LPTIM2_RELEASE_RESET __HAL_RCC_LPTIM2_RELEASE_RESET
  2040. #define __LPUART1_CLK_DISABLE __HAL_RCC_LPUART1_CLK_DISABLE
  2041. #define __LPUART1_CLK_ENABLE __HAL_RCC_LPUART1_CLK_ENABLE
  2042. #define __LPUART1_CLK_SLEEP_DISABLE __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE
  2043. #define __LPUART1_CLK_SLEEP_ENABLE __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE
  2044. #define __LPUART1_FORCE_RESET __HAL_RCC_LPUART1_FORCE_RESET
  2045. #define __LPUART1_RELEASE_RESET __HAL_RCC_LPUART1_RELEASE_RESET
  2046. #define __OPAMP_CLK_DISABLE __HAL_RCC_OPAMP_CLK_DISABLE
  2047. #define __OPAMP_CLK_ENABLE __HAL_RCC_OPAMP_CLK_ENABLE
  2048. #define __OPAMP_CLK_SLEEP_DISABLE __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE
  2049. #define __OPAMP_CLK_SLEEP_ENABLE __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE
  2050. #define __OPAMP_FORCE_RESET __HAL_RCC_OPAMP_FORCE_RESET
  2051. #define __OPAMP_RELEASE_RESET __HAL_RCC_OPAMP_RELEASE_RESET
  2052. #define __OTGFS_CLK_DISABLE __HAL_RCC_OTGFS_CLK_DISABLE
  2053. #define __OTGFS_CLK_ENABLE __HAL_RCC_OTGFS_CLK_ENABLE
  2054. #define __OTGFS_CLK_SLEEP_DISABLE __HAL_RCC_OTGFS_CLK_SLEEP_DISABLE
  2055. #define __OTGFS_CLK_SLEEP_ENABLE __HAL_RCC_OTGFS_CLK_SLEEP_ENABLE
  2056. #define __OTGFS_FORCE_RESET __HAL_RCC_OTGFS_FORCE_RESET
  2057. #define __OTGFS_RELEASE_RESET __HAL_RCC_OTGFS_RELEASE_RESET
  2058. #define __PWR_CLK_DISABLE __HAL_RCC_PWR_CLK_DISABLE
  2059. #define __PWR_CLK_ENABLE __HAL_RCC_PWR_CLK_ENABLE
  2060. #define __PWR_CLK_SLEEP_DISABLE __HAL_RCC_PWR_CLK_SLEEP_DISABLE
  2061. #define __PWR_CLK_SLEEP_ENABLE __HAL_RCC_PWR_CLK_SLEEP_ENABLE
  2062. #define __PWR_FORCE_RESET __HAL_RCC_PWR_FORCE_RESET
  2063. #define __PWR_RELEASE_RESET __HAL_RCC_PWR_RELEASE_RESET
  2064. #define __QSPI_CLK_DISABLE __HAL_RCC_QSPI_CLK_DISABLE
  2065. #define __QSPI_CLK_ENABLE __HAL_RCC_QSPI_CLK_ENABLE
  2066. #define __QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QSPI_CLK_SLEEP_DISABLE
  2067. #define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE
  2068. #define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET
  2069. #define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET
  2070. #define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE
  2071. #define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE
  2072. #define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE
  2073. #define __RNG_CLK_SLEEP_ENABLE __HAL_RCC_RNG_CLK_SLEEP_ENABLE
  2074. #define __RNG_FORCE_RESET __HAL_RCC_RNG_FORCE_RESET
  2075. #define __RNG_RELEASE_RESET __HAL_RCC_RNG_RELEASE_RESET
  2076. #define __SAI1_CLK_DISABLE __HAL_RCC_SAI1_CLK_DISABLE
  2077. #define __SAI1_CLK_ENABLE __HAL_RCC_SAI1_CLK_ENABLE
  2078. #define __SAI1_CLK_SLEEP_DISABLE __HAL_RCC_SAI1_CLK_SLEEP_DISABLE
  2079. #define __SAI1_CLK_SLEEP_ENABLE __HAL_RCC_SAI1_CLK_SLEEP_ENABLE
  2080. #define __SAI1_FORCE_RESET __HAL_RCC_SAI1_FORCE_RESET
  2081. #define __SAI1_RELEASE_RESET __HAL_RCC_SAI1_RELEASE_RESET
  2082. #define __SAI2_CLK_DISABLE __HAL_RCC_SAI2_CLK_DISABLE
  2083. #define __SAI2_CLK_ENABLE __HAL_RCC_SAI2_CLK_ENABLE
  2084. #define __SAI2_CLK_SLEEP_DISABLE __HAL_RCC_SAI2_CLK_SLEEP_DISABLE
  2085. #define __SAI2_CLK_SLEEP_ENABLE __HAL_RCC_SAI2_CLK_SLEEP_ENABLE
  2086. #define __SAI2_FORCE_RESET __HAL_RCC_SAI2_FORCE_RESET
  2087. #define __SAI2_RELEASE_RESET __HAL_RCC_SAI2_RELEASE_RESET
  2088. #define __SDIO_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
  2089. #define __SDIO_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
  2090. #define __SDMMC_CLK_DISABLE __HAL_RCC_SDMMC_CLK_DISABLE
  2091. #define __SDMMC_CLK_ENABLE __HAL_RCC_SDMMC_CLK_ENABLE
  2092. #define __SDMMC_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC_CLK_SLEEP_DISABLE
  2093. #define __SDMMC_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC_CLK_SLEEP_ENABLE
  2094. #define __SDMMC_FORCE_RESET __HAL_RCC_SDMMC_FORCE_RESET
  2095. #define __SDMMC_RELEASE_RESET __HAL_RCC_SDMMC_RELEASE_RESET
  2096. #define __SPI1_CLK_DISABLE __HAL_RCC_SPI1_CLK_DISABLE
  2097. #define __SPI1_CLK_ENABLE __HAL_RCC_SPI1_CLK_ENABLE
  2098. #define __SPI1_CLK_SLEEP_DISABLE __HAL_RCC_SPI1_CLK_SLEEP_DISABLE
  2099. #define __SPI1_CLK_SLEEP_ENABLE __HAL_RCC_SPI1_CLK_SLEEP_ENABLE
  2100. #define __SPI1_FORCE_RESET __HAL_RCC_SPI1_FORCE_RESET
  2101. #define __SPI1_RELEASE_RESET __HAL_RCC_SPI1_RELEASE_RESET
  2102. #define __SPI2_CLK_DISABLE __HAL_RCC_SPI2_CLK_DISABLE
  2103. #define __SPI2_CLK_ENABLE __HAL_RCC_SPI2_CLK_ENABLE
  2104. #define __SPI2_CLK_SLEEP_DISABLE __HAL_RCC_SPI2_CLK_SLEEP_DISABLE
  2105. #define __SPI2_CLK_SLEEP_ENABLE __HAL_RCC_SPI2_CLK_SLEEP_ENABLE
  2106. #define __SPI2_FORCE_RESET __HAL_RCC_SPI2_FORCE_RESET
  2107. #define __SPI2_RELEASE_RESET __HAL_RCC_SPI2_RELEASE_RESET
  2108. #define __SPI3_CLK_DISABLE __HAL_RCC_SPI3_CLK_DISABLE
  2109. #define __SPI3_CLK_ENABLE __HAL_RCC_SPI3_CLK_ENABLE
  2110. #define __SPI3_CLK_SLEEP_DISABLE __HAL_RCC_SPI3_CLK_SLEEP_DISABLE
  2111. #define __SPI3_CLK_SLEEP_ENABLE __HAL_RCC_SPI3_CLK_SLEEP_ENABLE
  2112. #define __SPI3_FORCE_RESET __HAL_RCC_SPI3_FORCE_RESET
  2113. #define __SPI3_RELEASE_RESET __HAL_RCC_SPI3_RELEASE_RESET
  2114. #define __SRAM_CLK_DISABLE __HAL_RCC_SRAM_CLK_DISABLE
  2115. #define __SRAM_CLK_ENABLE __HAL_RCC_SRAM_CLK_ENABLE
  2116. #define __SRAM1_CLK_SLEEP_DISABLE __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE
  2117. #define __SRAM1_CLK_SLEEP_ENABLE __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE
  2118. #define __SRAM2_CLK_SLEEP_DISABLE __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE
  2119. #define __SRAM2_CLK_SLEEP_ENABLE __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE
  2120. #define __SWPMI1_CLK_DISABLE __HAL_RCC_SWPMI1_CLK_DISABLE
  2121. #define __SWPMI1_CLK_ENABLE __HAL_RCC_SWPMI1_CLK_ENABLE
  2122. #define __SWPMI1_CLK_SLEEP_DISABLE __HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE
  2123. #define __SWPMI1_CLK_SLEEP_ENABLE __HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE
  2124. #define __SWPMI1_FORCE_RESET __HAL_RCC_SWPMI1_FORCE_RESET
  2125. #define __SWPMI1_RELEASE_RESET __HAL_RCC_SWPMI1_RELEASE_RESET
  2126. #define __SYSCFG_CLK_DISABLE __HAL_RCC_SYSCFG_CLK_DISABLE
  2127. #define __SYSCFG_CLK_ENABLE __HAL_RCC_SYSCFG_CLK_ENABLE
  2128. #define __SYSCFG_CLK_SLEEP_DISABLE __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE
  2129. #define __SYSCFG_CLK_SLEEP_ENABLE __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE
  2130. #define __SYSCFG_FORCE_RESET __HAL_RCC_SYSCFG_FORCE_RESET
  2131. #define __SYSCFG_RELEASE_RESET __HAL_RCC_SYSCFG_RELEASE_RESET
  2132. #define __TIM1_CLK_DISABLE __HAL_RCC_TIM1_CLK_DISABLE
  2133. #define __TIM1_CLK_ENABLE __HAL_RCC_TIM1_CLK_ENABLE
  2134. #define __TIM1_CLK_SLEEP_DISABLE __HAL_RCC_TIM1_CLK_SLEEP_DISABLE
  2135. #define __TIM1_CLK_SLEEP_ENABLE __HAL_RCC_TIM1_CLK_SLEEP_ENABLE
  2136. #define __TIM1_FORCE_RESET __HAL_RCC_TIM1_FORCE_RESET
  2137. #define __TIM1_RELEASE_RESET __HAL_RCC_TIM1_RELEASE_RESET
  2138. #define __TIM10_CLK_DISABLE __HAL_RCC_TIM10_CLK_DISABLE
  2139. #define __TIM10_CLK_ENABLE __HAL_RCC_TIM10_CLK_ENABLE
  2140. #define __TIM10_FORCE_RESET __HAL_RCC_TIM10_FORCE_RESET
  2141. #define __TIM10_RELEASE_RESET __HAL_RCC_TIM10_RELEASE_RESET
  2142. #define __TIM11_CLK_DISABLE __HAL_RCC_TIM11_CLK_DISABLE
  2143. #define __TIM11_CLK_ENABLE __HAL_RCC_TIM11_CLK_ENABLE
  2144. #define __TIM11_FORCE_RESET __HAL_RCC_TIM11_FORCE_RESET
  2145. #define __TIM11_RELEASE_RESET __HAL_RCC_TIM11_RELEASE_RESET
  2146. #define __TIM12_CLK_DISABLE __HAL_RCC_TIM12_CLK_DISABLE
  2147. #define __TIM12_CLK_ENABLE __HAL_RCC_TIM12_CLK_ENABLE
  2148. #define __TIM12_FORCE_RESET __HAL_RCC_TIM12_FORCE_RESET
  2149. #define __TIM12_RELEASE_RESET __HAL_RCC_TIM12_RELEASE_RESET
  2150. #define __TIM13_CLK_DISABLE __HAL_RCC_TIM13_CLK_DISABLE
  2151. #define __TIM13_CLK_ENABLE __HAL_RCC_TIM13_CLK_ENABLE
  2152. #define __TIM13_FORCE_RESET __HAL_RCC_TIM13_FORCE_RESET
  2153. #define __TIM13_RELEASE_RESET __HAL_RCC_TIM13_RELEASE_RESET
  2154. #define __TIM14_CLK_DISABLE __HAL_RCC_TIM14_CLK_DISABLE
  2155. #define __TIM14_CLK_ENABLE __HAL_RCC_TIM14_CLK_ENABLE
  2156. #define __TIM14_FORCE_RESET __HAL_RCC_TIM14_FORCE_RESET
  2157. #define __TIM14_RELEASE_RESET __HAL_RCC_TIM14_RELEASE_RESET
  2158. #define __TIM15_CLK_DISABLE __HAL_RCC_TIM15_CLK_DISABLE
  2159. #define __TIM15_CLK_ENABLE __HAL_RCC_TIM15_CLK_ENABLE
  2160. #define __TIM15_CLK_SLEEP_DISABLE __HAL_RCC_TIM15_CLK_SLEEP_DISABLE
  2161. #define __TIM15_CLK_SLEEP_ENABLE __HAL_RCC_TIM15_CLK_SLEEP_ENABLE
  2162. #define __TIM15_FORCE_RESET __HAL_RCC_TIM15_FORCE_RESET
  2163. #define __TIM15_RELEASE_RESET __HAL_RCC_TIM15_RELEASE_RESET
  2164. #define __TIM16_CLK_DISABLE __HAL_RCC_TIM16_CLK_DISABLE
  2165. #define __TIM16_CLK_ENABLE __HAL_RCC_TIM16_CLK_ENABLE
  2166. #define __TIM16_CLK_SLEEP_DISABLE __HAL_RCC_TIM16_CLK_SLEEP_DISABLE
  2167. #define __TIM16_CLK_SLEEP_ENABLE __HAL_RCC_TIM16_CLK_SLEEP_ENABLE
  2168. #define __TIM16_FORCE_RESET __HAL_RCC_TIM16_FORCE_RESET
  2169. #define __TIM16_RELEASE_RESET __HAL_RCC_TIM16_RELEASE_RESET
  2170. #define __TIM17_CLK_DISABLE __HAL_RCC_TIM17_CLK_DISABLE
  2171. #define __TIM17_CLK_ENABLE __HAL_RCC_TIM17_CLK_ENABLE
  2172. #define __TIM17_CLK_SLEEP_DISABLE __HAL_RCC_TIM17_CLK_SLEEP_DISABLE
  2173. #define __TIM17_CLK_SLEEP_ENABLE __HAL_RCC_TIM17_CLK_SLEEP_ENABLE
  2174. #define __TIM17_FORCE_RESET __HAL_RCC_TIM17_FORCE_RESET
  2175. #define __TIM17_RELEASE_RESET __HAL_RCC_TIM17_RELEASE_RESET
  2176. #define __TIM2_CLK_DISABLE __HAL_RCC_TIM2_CLK_DISABLE
  2177. #define __TIM2_CLK_ENABLE __HAL_RCC_TIM2_CLK_ENABLE
  2178. #define __TIM2_CLK_SLEEP_DISABLE __HAL_RCC_TIM2_CLK_SLEEP_DISABLE
  2179. #define __TIM2_CLK_SLEEP_ENABLE __HAL_RCC_TIM2_CLK_SLEEP_ENABLE
  2180. #define __TIM2_FORCE_RESET __HAL_RCC_TIM2_FORCE_RESET
  2181. #define __TIM2_RELEASE_RESET __HAL_RCC_TIM2_RELEASE_RESET
  2182. #define __TIM3_CLK_DISABLE __HAL_RCC_TIM3_CLK_DISABLE
  2183. #define __TIM3_CLK_ENABLE __HAL_RCC_TIM3_CLK_ENABLE
  2184. #define __TIM3_CLK_SLEEP_DISABLE __HAL_RCC_TIM3_CLK_SLEEP_DISABLE
  2185. #define __TIM3_CLK_SLEEP_ENABLE __HAL_RCC_TIM3_CLK_SLEEP_ENABLE
  2186. #define __TIM3_FORCE_RESET __HAL_RCC_TIM3_FORCE_RESET
  2187. #define __TIM3_RELEASE_RESET __HAL_RCC_TIM3_RELEASE_RESET
  2188. #define __TIM4_CLK_DISABLE __HAL_RCC_TIM4_CLK_DISABLE
  2189. #define __TIM4_CLK_ENABLE __HAL_RCC_TIM4_CLK_ENABLE
  2190. #define __TIM4_CLK_SLEEP_DISABLE __HAL_RCC_TIM4_CLK_SLEEP_DISABLE
  2191. #define __TIM4_CLK_SLEEP_ENABLE __HAL_RCC_TIM4_CLK_SLEEP_ENABLE
  2192. #define __TIM4_FORCE_RESET __HAL_RCC_TIM4_FORCE_RESET
  2193. #define __TIM4_RELEASE_RESET __HAL_RCC_TIM4_RELEASE_RESET
  2194. #define __TIM5_CLK_DISABLE __HAL_RCC_TIM5_CLK_DISABLE
  2195. #define __TIM5_CLK_ENABLE __HAL_RCC_TIM5_CLK_ENABLE
  2196. #define __TIM5_CLK_SLEEP_DISABLE __HAL_RCC_TIM5_CLK_SLEEP_DISABLE
  2197. #define __TIM5_CLK_SLEEP_ENABLE __HAL_RCC_TIM5_CLK_SLEEP_ENABLE
  2198. #define __TIM5_FORCE_RESET __HAL_RCC_TIM5_FORCE_RESET
  2199. #define __TIM5_RELEASE_RESET __HAL_RCC_TIM5_RELEASE_RESET
  2200. #define __TIM6_CLK_DISABLE __HAL_RCC_TIM6_CLK_DISABLE
  2201. #define __TIM6_CLK_ENABLE __HAL_RCC_TIM6_CLK_ENABLE
  2202. #define __TIM6_CLK_SLEEP_DISABLE __HAL_RCC_TIM6_CLK_SLEEP_DISABLE
  2203. #define __TIM6_CLK_SLEEP_ENABLE __HAL_RCC_TIM6_CLK_SLEEP_ENABLE
  2204. #define __TIM6_FORCE_RESET __HAL_RCC_TIM6_FORCE_RESET
  2205. #define __TIM6_RELEASE_RESET __HAL_RCC_TIM6_RELEASE_RESET
  2206. #define __TIM7_CLK_DISABLE __HAL_RCC_TIM7_CLK_DISABLE
  2207. #define __TIM7_CLK_ENABLE __HAL_RCC_TIM7_CLK_ENABLE
  2208. #define __TIM7_CLK_SLEEP_DISABLE __HAL_RCC_TIM7_CLK_SLEEP_DISABLE
  2209. #define __TIM7_CLK_SLEEP_ENABLE __HAL_RCC_TIM7_CLK_SLEEP_ENABLE
  2210. #define __TIM7_FORCE_RESET __HAL_RCC_TIM7_FORCE_RESET
  2211. #define __TIM7_RELEASE_RESET __HAL_RCC_TIM7_RELEASE_RESET
  2212. #define __TIM8_CLK_DISABLE __HAL_RCC_TIM8_CLK_DISABLE
  2213. #define __TIM8_CLK_ENABLE __HAL_RCC_TIM8_CLK_ENABLE
  2214. #define __TIM8_CLK_SLEEP_DISABLE __HAL_RCC_TIM8_CLK_SLEEP_DISABLE
  2215. #define __TIM8_CLK_SLEEP_ENABLE __HAL_RCC_TIM8_CLK_SLEEP_ENABLE
  2216. #define __TIM8_FORCE_RESET __HAL_RCC_TIM8_FORCE_RESET
  2217. #define __TIM8_RELEASE_RESET __HAL_RCC_TIM8_RELEASE_RESET
  2218. #define __TIM9_CLK_DISABLE __HAL_RCC_TIM9_CLK_DISABLE
  2219. #define __TIM9_CLK_ENABLE __HAL_RCC_TIM9_CLK_ENABLE
  2220. #define __TIM9_FORCE_RESET __HAL_RCC_TIM9_FORCE_RESET
  2221. #define __TIM9_RELEASE_RESET __HAL_RCC_TIM9_RELEASE_RESET
  2222. #define __TSC_CLK_DISABLE __HAL_RCC_TSC_CLK_DISABLE
  2223. #define __TSC_CLK_ENABLE __HAL_RCC_TSC_CLK_ENABLE
  2224. #define __TSC_CLK_SLEEP_DISABLE __HAL_RCC_TSC_CLK_SLEEP_DISABLE
  2225. #define __TSC_CLK_SLEEP_ENABLE __HAL_RCC_TSC_CLK_SLEEP_ENABLE
  2226. #define __TSC_FORCE_RESET __HAL_RCC_TSC_FORCE_RESET
  2227. #define __TSC_RELEASE_RESET __HAL_RCC_TSC_RELEASE_RESET
  2228. #define __UART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE
  2229. #define __UART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE
  2230. #define __UART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE
  2231. #define __UART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE
  2232. #define __UART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET
  2233. #define __UART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET
  2234. #define __UART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE
  2235. #define __UART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE
  2236. #define __UART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE
  2237. #define __UART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE
  2238. #define __UART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET
  2239. #define __UART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET
  2240. #define __USART1_CLK_DISABLE __HAL_RCC_USART1_CLK_DISABLE
  2241. #define __USART1_CLK_ENABLE __HAL_RCC_USART1_CLK_ENABLE
  2242. #define __USART1_CLK_SLEEP_DISABLE __HAL_RCC_USART1_CLK_SLEEP_DISABLE
  2243. #define __USART1_CLK_SLEEP_ENABLE __HAL_RCC_USART1_CLK_SLEEP_ENABLE
  2244. #define __USART1_FORCE_RESET __HAL_RCC_USART1_FORCE_RESET
  2245. #define __USART1_RELEASE_RESET __HAL_RCC_USART1_RELEASE_RESET
  2246. #define __USART2_CLK_DISABLE __HAL_RCC_USART2_CLK_DISABLE
  2247. #define __USART2_CLK_ENABLE __HAL_RCC_USART2_CLK_ENABLE
  2248. #define __USART2_CLK_SLEEP_DISABLE __HAL_RCC_USART2_CLK_SLEEP_DISABLE
  2249. #define __USART2_CLK_SLEEP_ENABLE __HAL_RCC_USART2_CLK_SLEEP_ENABLE
  2250. #define __USART2_FORCE_RESET __HAL_RCC_USART2_FORCE_RESET
  2251. #define __USART2_RELEASE_RESET __HAL_RCC_USART2_RELEASE_RESET
  2252. #define __USART3_CLK_DISABLE __HAL_RCC_USART3_CLK_DISABLE
  2253. #define __USART3_CLK_ENABLE __HAL_RCC_USART3_CLK_ENABLE
  2254. #define __USART3_CLK_SLEEP_DISABLE __HAL_RCC_USART3_CLK_SLEEP_DISABLE
  2255. #define __USART3_CLK_SLEEP_ENABLE __HAL_RCC_USART3_CLK_SLEEP_ENABLE
  2256. #define __USART3_FORCE_RESET __HAL_RCC_USART3_FORCE_RESET
  2257. #define __USART3_RELEASE_RESET __HAL_RCC_USART3_RELEASE_RESET
  2258. #define __USART4_CLK_DISABLE        __HAL_RCC_UART4_CLK_DISABLE
  2259. #define __USART4_CLK_ENABLE         __HAL_RCC_UART4_CLK_ENABLE
  2260. #define __USART4_CLK_SLEEP_ENABLE   __HAL_RCC_UART4_CLK_SLEEP_ENABLE
  2261. #define __USART4_CLK_SLEEP_DISABLE  __HAL_RCC_UART4_CLK_SLEEP_DISABLE
  2262. #define __USART4_FORCE_RESET        __HAL_RCC_UART4_FORCE_RESET
  2263. #define __USART4_RELEASE_RESET      __HAL_RCC_UART4_RELEASE_RESET
  2264. #define __USART5_CLK_DISABLE        __HAL_RCC_UART5_CLK_DISABLE
  2265. #define __USART5_CLK_ENABLE         __HAL_RCC_UART5_CLK_ENABLE
  2266. #define __USART5_CLK_SLEEP_ENABLE   __HAL_RCC_UART5_CLK_SLEEP_ENABLE
  2267. #define __USART5_CLK_SLEEP_DISABLE  __HAL_RCC_UART5_CLK_SLEEP_DISABLE
  2268. #define __USART5_FORCE_RESET        __HAL_RCC_UART5_FORCE_RESET
  2269. #define __USART5_RELEASE_RESET      __HAL_RCC_UART5_RELEASE_RESET
  2270. #define __USART7_CLK_DISABLE        __HAL_RCC_UART7_CLK_DISABLE
  2271. #define __USART7_CLK_ENABLE         __HAL_RCC_UART7_CLK_ENABLE
  2272. #define __USART7_FORCE_RESET        __HAL_RCC_UART7_FORCE_RESET
  2273. #define __USART7_RELEASE_RESET      __HAL_RCC_UART7_RELEASE_RESET
  2274. #define __USART8_CLK_DISABLE        __HAL_RCC_UART8_CLK_DISABLE
  2275. #define __USART8_CLK_ENABLE         __HAL_RCC_UART8_CLK_ENABLE
  2276. #define __USART8_FORCE_RESET        __HAL_RCC_UART8_FORCE_RESET
  2277. #define __USART8_RELEASE_RESET      __HAL_RCC_UART8_RELEASE_RESET
  2278. #define __USB_CLK_DISABLE         __HAL_RCC_USB_CLK_DISABLE
  2279. #define __USB_CLK_ENABLE          __HAL_RCC_USB_CLK_ENABLE
  2280. #define __USB_FORCE_RESET         __HAL_RCC_USB_FORCE_RESET
  2281. #define __USB_CLK_SLEEP_ENABLE    __HAL_RCC_USB_CLK_SLEEP_ENABLE
  2282. #define __USB_CLK_SLEEP_DISABLE   __HAL_RCC_USB_CLK_SLEEP_DISABLE
  2283. #define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE
  2284. #define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE
  2285. #define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET
  2286. #define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE
  2287. #define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE
  2288. #define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE
  2289. #define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE
  2290. #define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET
  2291. #define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET
  2292. #define __TIM21_CLK_ENABLE   __HAL_RCC_TIM21_CLK_ENABLE
  2293. #define __TIM21_CLK_DISABLE   __HAL_RCC_TIM21_CLK_DISABLE
  2294. #define __TIM21_FORCE_RESET   __HAL_RCC_TIM21_FORCE_RESET
  2295. #define __TIM21_RELEASE_RESET  __HAL_RCC_TIM21_RELEASE_RESET
  2296. #define __TIM21_CLK_SLEEP_ENABLE   __HAL_RCC_TIM21_CLK_SLEEP_ENABLE
  2297. #define __TIM21_CLK_SLEEP_DISABLE   __HAL_RCC_TIM21_CLK_SLEEP_DISABLE
  2298. #define __TIM22_CLK_ENABLE   __HAL_RCC_TIM22_CLK_ENABLE
  2299. #define __TIM22_CLK_DISABLE   __HAL_RCC_TIM22_CLK_DISABLE
  2300. #define __TIM22_FORCE_RESET   __HAL_RCC_TIM22_FORCE_RESET
  2301. #define __TIM22_RELEASE_RESET  __HAL_RCC_TIM22_RELEASE_RESET
  2302. #define __TIM22_CLK_SLEEP_ENABLE   __HAL_RCC_TIM22_CLK_SLEEP_ENABLE
  2303. #define __TIM22_CLK_SLEEP_DISABLE   __HAL_RCC_TIM22_CLK_SLEEP_DISABLE
  2304. #define __CRS_CLK_DISABLE __HAL_RCC_CRS_CLK_DISABLE
  2305. #define __CRS_CLK_ENABLE __HAL_RCC_CRS_CLK_ENABLE
  2306. #define __CRS_CLK_SLEEP_DISABLE __HAL_RCC_CRS_CLK_SLEEP_DISABLE
  2307. #define __CRS_CLK_SLEEP_ENABLE __HAL_RCC_CRS_CLK_SLEEP_ENABLE
  2308. #define __CRS_FORCE_RESET __HAL_RCC_CRS_FORCE_RESET
  2309. #define __CRS_RELEASE_RESET __HAL_RCC_CRS_RELEASE_RESET
  2310. #define __RCC_BACKUPRESET_FORCE __HAL_RCC_BACKUPRESET_FORCE
  2311. #define __RCC_BACKUPRESET_RELEASE __HAL_RCC_BACKUPRESET_RELEASE
  2312.  
  2313. #define __USB_OTG_FS_FORCE_RESET  __HAL_RCC_USB_OTG_FS_FORCE_RESET
  2314. #define __USB_OTG_FS_RELEASE_RESET  __HAL_RCC_USB_OTG_FS_RELEASE_RESET
  2315. #define __USB_OTG_FS_CLK_SLEEP_ENABLE  __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE
  2316. #define __USB_OTG_FS_CLK_SLEEP_DISABLE  __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE
  2317. #define __USB_OTG_HS_CLK_DISABLE  __HAL_RCC_USB_OTG_HS_CLK_DISABLE
  2318. #define __USB_OTG_HS_CLK_ENABLE          __HAL_RCC_USB_OTG_HS_CLK_ENABLE
  2319. #define __USB_OTG_HS_ULPI_CLK_ENABLE  __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE
  2320. #define __USB_OTG_HS_ULPI_CLK_DISABLE  __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE  
  2321. #define __TIM9_CLK_SLEEP_ENABLE          __HAL_RCC_TIM9_CLK_SLEEP_ENABLE
  2322. #define __TIM9_CLK_SLEEP_DISABLE  __HAL_RCC_TIM9_CLK_SLEEP_DISABLE  
  2323. #define __TIM10_CLK_SLEEP_ENABLE  __HAL_RCC_TIM10_CLK_SLEEP_ENABLE
  2324. #define __TIM10_CLK_SLEEP_DISABLE  __HAL_RCC_TIM10_CLK_SLEEP_DISABLE  
  2325. #define __TIM11_CLK_SLEEP_ENABLE  __HAL_RCC_TIM11_CLK_SLEEP_ENABLE
  2326. #define __TIM11_CLK_SLEEP_DISABLE  __HAL_RCC_TIM11_CLK_SLEEP_DISABLE  
  2327. #define __ETHMACPTP_CLK_SLEEP_ENABLE  __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE
  2328. #define __ETHMACPTP_CLK_SLEEP_DISABLE  __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE
  2329. #define __ETHMACPTP_CLK_ENABLE          __HAL_RCC_ETHMACPTP_CLK_ENABLE
  2330. #define __ETHMACPTP_CLK_DISABLE          __HAL_RCC_ETHMACPTP_CLK_DISABLE  
  2331. #define __HASH_CLK_ENABLE          __HAL_RCC_HASH_CLK_ENABLE
  2332. #define __HASH_FORCE_RESET          __HAL_RCC_HASH_FORCE_RESET
  2333. #define __HASH_RELEASE_RESET          __HAL_RCC_HASH_RELEASE_RESET
  2334. #define __HASH_CLK_SLEEP_ENABLE          __HAL_RCC_HASH_CLK_SLEEP_ENABLE
  2335. #define __HASH_CLK_SLEEP_DISABLE  __HAL_RCC_HASH_CLK_SLEEP_DISABLE
  2336. #define __HASH_CLK_DISABLE            __HAL_RCC_HASH_CLK_DISABLE  
  2337. #define __SPI5_CLK_ENABLE          __HAL_RCC_SPI5_CLK_ENABLE
  2338. #define __SPI5_CLK_DISABLE              __HAL_RCC_SPI5_CLK_DISABLE
  2339. #define __SPI5_FORCE_RESET          __HAL_RCC_SPI5_FORCE_RESET
  2340. #define __SPI5_RELEASE_RESET          __HAL_RCC_SPI5_RELEASE_RESET
  2341. #define __SPI5_CLK_SLEEP_ENABLE          __HAL_RCC_SPI5_CLK_SLEEP_ENABLE
  2342. #define __SPI5_CLK_SLEEP_DISABLE  __HAL_RCC_SPI5_CLK_SLEEP_DISABLE  
  2343. #define __SPI6_CLK_ENABLE          __HAL_RCC_SPI6_CLK_ENABLE
  2344. #define __SPI6_CLK_DISABLE          __HAL_RCC_SPI6_CLK_DISABLE
  2345. #define __SPI6_FORCE_RESET          __HAL_RCC_SPI6_FORCE_RESET
  2346. #define __SPI6_RELEASE_RESET         __HAL_RCC_SPI6_RELEASE_RESET
  2347. #define __SPI6_CLK_SLEEP_ENABLE          __HAL_RCC_SPI6_CLK_SLEEP_ENABLE
  2348. #define __SPI6_CLK_SLEEP_DISABLE  __HAL_RCC_SPI6_CLK_SLEEP_DISABLE  
  2349. #define __LTDC_CLK_ENABLE          __HAL_RCC_LTDC_CLK_ENABLE
  2350. #define __LTDC_CLK_DISABLE          __HAL_RCC_LTDC_CLK_DISABLE
  2351. #define __LTDC_FORCE_RESET          __HAL_RCC_LTDC_FORCE_RESET
  2352. #define __LTDC_RELEASE_RESET          __HAL_RCC_LTDC_RELEASE_RESET
  2353. #define __LTDC_CLK_SLEEP_ENABLE          __HAL_RCC_LTDC_CLK_SLEEP_ENABLE  
  2354. #define __ETHMAC_CLK_SLEEP_ENABLE  __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE
  2355. #define __ETHMAC_CLK_SLEEP_DISABLE  __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE  
  2356. #define __ETHMACTX_CLK_SLEEP_ENABLE  __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE
  2357. #define __ETHMACTX_CLK_SLEEP_DISABLE  __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE  
  2358. #define __ETHMACRX_CLK_SLEEP_ENABLE  __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE
  2359. #define __ETHMACRX_CLK_SLEEP_DISABLE  __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE  
  2360. #define __TIM12_CLK_SLEEP_ENABLE  __HAL_RCC_TIM12_CLK_SLEEP_ENABLE
  2361. #define __TIM12_CLK_SLEEP_DISABLE  __HAL_RCC_TIM12_CLK_SLEEP_DISABLE  
  2362. #define __TIM13_CLK_SLEEP_ENABLE  __HAL_RCC_TIM13_CLK_SLEEP_ENABLE
  2363. #define __TIM13_CLK_SLEEP_DISABLE  __HAL_RCC_TIM13_CLK_SLEEP_DISABLE  
  2364. #define __TIM14_CLK_SLEEP_ENABLE  __HAL_RCC_TIM14_CLK_SLEEP_ENABLE
  2365. #define __TIM14_CLK_SLEEP_DISABLE  __HAL_RCC_TIM14_CLK_SLEEP_DISABLE  
  2366. #define __BKPSRAM_CLK_ENABLE          __HAL_RCC_BKPSRAM_CLK_ENABLE
  2367. #define __BKPSRAM_CLK_DISABLE          __HAL_RCC_BKPSRAM_CLK_DISABLE
  2368. #define __BKPSRAM_CLK_SLEEP_ENABLE  __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE
  2369. #define __BKPSRAM_CLK_SLEEP_DISABLE  __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE  
  2370. #define __CCMDATARAMEN_CLK_ENABLE  __HAL_RCC_CCMDATARAMEN_CLK_ENABLE
  2371. #define __CCMDATARAMEN_CLK_DISABLE  __HAL_RCC_CCMDATARAMEN_CLK_DISABLE  
  2372. #define __USART6_CLK_ENABLE          __HAL_RCC_USART6_CLK_ENABLE
  2373. #define __USART6_CLK_DISABLE          __HAL_RCC_USART6_CLK_DISABLE
  2374. #define __USART6_FORCE_RESET        __HAL_RCC_USART6_FORCE_RESET
  2375. #define __USART6_RELEASE_RESET        __HAL_RCC_USART6_RELEASE_RESET
  2376. #define __USART6_CLK_SLEEP_ENABLE  __HAL_RCC_USART6_CLK_SLEEP_ENABLE
  2377. #define __USART6_CLK_SLEEP_DISABLE  __HAL_RCC_USART6_CLK_SLEEP_DISABLE  
  2378. #define __SPI4_CLK_ENABLE          __HAL_RCC_SPI4_CLK_ENABLE
  2379. #define __SPI4_CLK_DISABLE          __HAL_RCC_SPI4_CLK_DISABLE
  2380. #define __SPI4_FORCE_RESET          __HAL_RCC_SPI4_FORCE_RESET
  2381. #define __SPI4_RELEASE_RESET        __HAL_RCC_SPI4_RELEASE_RESET
  2382. #define __SPI4_CLK_SLEEP_ENABLE   __HAL_RCC_SPI4_CLK_SLEEP_ENABLE
  2383. #define __SPI4_CLK_SLEEP_DISABLE  __HAL_RCC_SPI4_CLK_SLEEP_DISABLE  
  2384. #define __GPIOI_CLK_ENABLE          __HAL_RCC_GPIOI_CLK_ENABLE
  2385. #define __GPIOI_CLK_DISABLE          __HAL_RCC_GPIOI_CLK_DISABLE
  2386. #define __GPIOI_FORCE_RESET          __HAL_RCC_GPIOI_FORCE_RESET
  2387. #define __GPIOI_RELEASE_RESET          __HAL_RCC_GPIOI_RELEASE_RESET
  2388. #define __GPIOI_CLK_SLEEP_ENABLE  __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE
  2389. #define __GPIOI_CLK_SLEEP_DISABLE  __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE  
  2390. #define __GPIOJ_CLK_ENABLE          __HAL_RCC_GPIOJ_CLK_ENABLE
  2391. #define __GPIOJ_CLK_DISABLE          __HAL_RCC_GPIOJ_CLK_DISABLE
  2392. #define __GPIOJ_FORCE_RESET         __HAL_RCC_GPIOJ_FORCE_RESET
  2393. #define __GPIOJ_RELEASE_RESET          __HAL_RCC_GPIOJ_RELEASE_RESET
  2394. #define __GPIOJ_CLK_SLEEP_ENABLE  __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE
  2395. #define __GPIOJ_CLK_SLEEP_DISABLE  __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE  
  2396. #define __GPIOK_CLK_ENABLE          __HAL_RCC_GPIOK_CLK_ENABLE
  2397. #define __GPIOK_CLK_DISABLE          __HAL_RCC_GPIOK_CLK_DISABLE
  2398. #define __GPIOK_RELEASE_RESET          __HAL_RCC_GPIOK_RELEASE_RESET
  2399. #define __GPIOK_CLK_SLEEP_ENABLE  __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE
  2400. #define __GPIOK_CLK_SLEEP_DISABLE  __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE  
  2401. #define __ETH_CLK_ENABLE          __HAL_RCC_ETH_CLK_ENABLE
  2402. #define __ETH_CLK_DISABLE          __HAL_RCC_ETH_CLK_DISABLE  
  2403. #define __DCMI_CLK_ENABLE          __HAL_RCC_DCMI_CLK_ENABLE
  2404. #define __DCMI_CLK_DISABLE          __HAL_RCC_DCMI_CLK_DISABLE
  2405. #define __DCMI_FORCE_RESET          __HAL_RCC_DCMI_FORCE_RESET
  2406. #define __DCMI_RELEASE_RESET          __HAL_RCC_DCMI_RELEASE_RESET
  2407. #define __DCMI_CLK_SLEEP_ENABLE   __HAL_RCC_DCMI_CLK_SLEEP_ENABLE
  2408. #define __DCMI_CLK_SLEEP_DISABLE  __HAL_RCC_DCMI_CLK_SLEEP_DISABLE  
  2409. #define __UART7_CLK_ENABLE          __HAL_RCC_UART7_CLK_ENABLE
  2410. #define __UART7_CLK_DISABLE          __HAL_RCC_UART7_CLK_DISABLE
  2411. #define __UART7_RELEASE_RESET       __HAL_RCC_UART7_RELEASE_RESET
  2412. #define __UART7_FORCE_RESET       __HAL_RCC_UART7_FORCE_RESET
  2413. #define __UART7_CLK_SLEEP_ENABLE  __HAL_RCC_UART7_CLK_SLEEP_ENABLE
  2414. #define __UART7_CLK_SLEEP_DISABLE  __HAL_RCC_UART7_CLK_SLEEP_DISABLE  
  2415. #define __UART8_CLK_ENABLE          __HAL_RCC_UART8_CLK_ENABLE
  2416. #define __UART8_CLK_DISABLE          __HAL_RCC_UART8_CLK_DISABLE
  2417. #define __UART8_FORCE_RESET          __HAL_RCC_UART8_FORCE_RESET
  2418. #define __UART8_RELEASE_RESET          __HAL_RCC_UART8_RELEASE_RESET
  2419. #define __UART8_CLK_SLEEP_ENABLE  __HAL_RCC_UART8_CLK_SLEEP_ENABLE
  2420. #define __UART8_CLK_SLEEP_DISABLE  __HAL_RCC_UART8_CLK_SLEEP_DISABLE  
  2421. #define __OTGHS_CLK_SLEEP_ENABLE  __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
  2422. #define __OTGHS_CLK_SLEEP_DISABLE  __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
  2423. #define __OTGHS_FORCE_RESET          __HAL_RCC_USB_OTG_HS_FORCE_RESET
  2424. #define __OTGHS_RELEASE_RESET          __HAL_RCC_USB_OTG_HS_RELEASE_RESET  
  2425. #define __OTGHSULPI_CLK_SLEEP_ENABLE  __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
  2426. #define __OTGHSULPI_CLK_SLEEP_DISABLE  __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
  2427. #define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE  __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
  2428. #define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE  __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
  2429. #define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED
  2430. #define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED
  2431. #define __HAL_RCC_OTGHS_FORCE_RESET          __HAL_RCC_USB_OTG_HS_FORCE_RESET
  2432. #define __HAL_RCC_OTGHS_RELEASE_RESET          __HAL_RCC_USB_OTG_HS_RELEASE_RESET  
  2433. #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE      __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
  2434. #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE     __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
  2435. #define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED  __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED
  2436. #define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED  
  2437. #define __CRYP_FORCE_RESET             __HAL_RCC_CRYP_FORCE_RESET  
  2438. #define __SRAM3_CLK_SLEEP_ENABLE       __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE  
  2439. #define __CAN2_CLK_SLEEP_ENABLE        __HAL_RCC_CAN2_CLK_SLEEP_ENABLE
  2440. #define __CAN2_CLK_SLEEP_DISABLE       __HAL_RCC_CAN2_CLK_SLEEP_DISABLE  
  2441. #define __DAC_CLK_SLEEP_ENABLE         __HAL_RCC_DAC_CLK_SLEEP_ENABLE
  2442. #define __DAC_CLK_SLEEP_DISABLE        __HAL_RCC_DAC_CLK_SLEEP_DISABLE  
  2443. #define __ADC2_CLK_SLEEP_ENABLE        __HAL_RCC_ADC2_CLK_SLEEP_ENABLE
  2444. #define __ADC2_CLK_SLEEP_DISABLE       __HAL_RCC_ADC2_CLK_SLEEP_DISABLE  
  2445. #define __ADC3_CLK_SLEEP_ENABLE        __HAL_RCC_ADC3_CLK_SLEEP_ENABLE
  2446. #define __ADC3_CLK_SLEEP_DISABLE       __HAL_RCC_ADC3_CLK_SLEEP_DISABLE  
  2447. #define __FSMC_FORCE_RESET             __HAL_RCC_FSMC_FORCE_RESET
  2448. #define __FSMC_RELEASE_RESET           __HAL_RCC_FSMC_RELEASE_RESET
  2449. #define __FSMC_CLK_SLEEP_ENABLE        __HAL_RCC_FSMC_CLK_SLEEP_ENABLE
  2450. #define __FSMC_CLK_SLEEP_DISABLE       __HAL_RCC_FSMC_CLK_SLEEP_DISABLE  
  2451. #define __SDIO_FORCE_RESET             __HAL_RCC_SDIO_FORCE_RESET
  2452. #define __SDIO_RELEASE_RESET           __HAL_RCC_SDIO_RELEASE_RESET
  2453. #define __SDIO_CLK_SLEEP_DISABLE       __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
  2454. #define __SDIO_CLK_SLEEP_ENABLE        __HAL_RCC_SDIO_CLK_SLEEP_ENABLE  
  2455. #define __DMA2D_CLK_ENABLE             __HAL_RCC_DMA2D_CLK_ENABLE
  2456. #define __DMA2D_CLK_DISABLE            __HAL_RCC_DMA2D_CLK_DISABLE
  2457. #define __DMA2D_FORCE_RESET            __HAL_RCC_DMA2D_FORCE_RESET
  2458. #define __DMA2D_RELEASE_RESET          __HAL_RCC_DMA2D_RELEASE_RESET
  2459. #define __DMA2D_CLK_SLEEP_ENABLE       __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE
  2460. #define __DMA2D_CLK_SLEEP_DISABLE      __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE
  2461.  
  2462. /* alias define maintained for legacy */
  2463. #define __HAL_RCC_OTGFS_FORCE_RESET    __HAL_RCC_USB_OTG_FS_FORCE_RESET
  2464. #define __HAL_RCC_OTGFS_RELEASE_RESET  __HAL_RCC_USB_OTG_FS_RELEASE_RESET
  2465.  
  2466. #define __ADC12_CLK_ENABLE          __HAL_RCC_ADC12_CLK_ENABLE
  2467. #define __ADC12_CLK_DISABLE         __HAL_RCC_ADC12_CLK_DISABLE
  2468. #define __ADC34_CLK_ENABLE          __HAL_RCC_ADC34_CLK_ENABLE
  2469. #define __ADC34_CLK_DISABLE         __HAL_RCC_ADC34_CLK_DISABLE
  2470. #define __ADC12_CLK_ENABLE          __HAL_RCC_ADC12_CLK_ENABLE
  2471. #define __ADC12_CLK_DISABLE         __HAL_RCC_ADC12_CLK_DISABLE
  2472. #define __DAC2_CLK_ENABLE           __HAL_RCC_DAC2_CLK_ENABLE
  2473. #define __DAC2_CLK_DISABLE          __HAL_RCC_DAC2_CLK_DISABLE
  2474. #define __TIM18_CLK_ENABLE          __HAL_RCC_TIM18_CLK_ENABLE
  2475. #define __TIM18_CLK_DISABLE         __HAL_RCC_TIM18_CLK_DISABLE
  2476. #define __TIM19_CLK_ENABLE          __HAL_RCC_TIM19_CLK_ENABLE
  2477. #define __TIM19_CLK_DISABLE         __HAL_RCC_TIM19_CLK_DISABLE
  2478. #define __TIM20_CLK_ENABLE          __HAL_RCC_TIM20_CLK_ENABLE
  2479. #define __TIM20_CLK_DISABLE         __HAL_RCC_TIM20_CLK_DISABLE
  2480. #define __HRTIM1_CLK_ENABLE         __HAL_RCC_HRTIM1_CLK_ENABLE
  2481. #define __HRTIM1_CLK_DISABLE        __HAL_RCC_HRTIM1_CLK_DISABLE
  2482. #define __SDADC1_CLK_ENABLE         __HAL_RCC_SDADC1_CLK_ENABLE
  2483. #define __SDADC2_CLK_ENABLE         __HAL_RCC_SDADC2_CLK_ENABLE
  2484. #define __SDADC3_CLK_ENABLE         __HAL_RCC_SDADC3_CLK_ENABLE
  2485. #define __SDADC1_CLK_DISABLE        __HAL_RCC_SDADC1_CLK_DISABLE
  2486. #define __SDADC2_CLK_DISABLE        __HAL_RCC_SDADC2_CLK_DISABLE
  2487. #define __SDADC3_CLK_DISABLE        __HAL_RCC_SDADC3_CLK_DISABLE
  2488.  
  2489. #define __ADC12_FORCE_RESET         __HAL_RCC_ADC12_FORCE_RESET
  2490. #define __ADC12_RELEASE_RESET       __HAL_RCC_ADC12_RELEASE_RESET
  2491. #define __ADC34_FORCE_RESET         __HAL_RCC_ADC34_FORCE_RESET
  2492. #define __ADC34_RELEASE_RESET       __HAL_RCC_ADC34_RELEASE_RESET
  2493. #define __ADC12_FORCE_RESET         __HAL_RCC_ADC12_FORCE_RESET
  2494. #define __ADC12_RELEASE_RESET       __HAL_RCC_ADC12_RELEASE_RESET
  2495. #define __DAC2_FORCE_RESET          __HAL_RCC_DAC2_FORCE_RESET
  2496. #define __DAC2_RELEASE_RESET        __HAL_RCC_DAC2_RELEASE_RESET
  2497. #define __TIM18_FORCE_RESET         __HAL_RCC_TIM18_FORCE_RESET
  2498. #define __TIM18_RELEASE_RESET       __HAL_RCC_TIM18_RELEASE_RESET
  2499. #define __TIM19_FORCE_RESET         __HAL_RCC_TIM19_FORCE_RESET
  2500. #define __TIM19_RELEASE_RESET       __HAL_RCC_TIM19_RELEASE_RESET
  2501. #define __TIM20_FORCE_RESET         __HAL_RCC_TIM20_FORCE_RESET
  2502. #define __TIM20_RELEASE_RESET       __HAL_RCC_TIM20_RELEASE_RESET
  2503. #define __HRTIM1_FORCE_RESET        __HAL_RCC_HRTIM1_FORCE_RESET
  2504. #define __HRTIM1_RELEASE_RESET      __HAL_RCC_HRTIM1_RELEASE_RESET
  2505. #define __SDADC1_FORCE_RESET        __HAL_RCC_SDADC1_FORCE_RESET
  2506. #define __SDADC2_FORCE_RESET        __HAL_RCC_SDADC2_FORCE_RESET
  2507. #define __SDADC3_FORCE_RESET        __HAL_RCC_SDADC3_FORCE_RESET
  2508. #define __SDADC1_RELEASE_RESET      __HAL_RCC_SDADC1_RELEASE_RESET
  2509. #define __SDADC2_RELEASE_RESET      __HAL_RCC_SDADC2_RELEASE_RESET
  2510. #define __SDADC3_RELEASE_RESET      __HAL_RCC_SDADC3_RELEASE_RESET
  2511.  
  2512. #define __ADC1_IS_CLK_ENABLED       __HAL_RCC_ADC1_IS_CLK_ENABLED
  2513. #define __ADC1_IS_CLK_DISABLED      __HAL_RCC_ADC1_IS_CLK_DISABLED
  2514. #define __ADC12_IS_CLK_ENABLED      __HAL_RCC_ADC12_IS_CLK_ENABLED
  2515. #define __ADC12_IS_CLK_DISABLED     __HAL_RCC_ADC12_IS_CLK_DISABLED
  2516. #define __ADC34_IS_CLK_ENABLED      __HAL_RCC_ADC34_IS_CLK_ENABLED
  2517. #define __ADC34_IS_CLK_DISABLED     __HAL_RCC_ADC34_IS_CLK_DISABLED
  2518. #define __CEC_IS_CLK_ENABLED        __HAL_RCC_CEC_IS_CLK_ENABLED
  2519. #define __CEC_IS_CLK_DISABLED       __HAL_RCC_CEC_IS_CLK_DISABLED
  2520. #define __CRC_IS_CLK_ENABLED        __HAL_RCC_CRC_IS_CLK_ENABLED
  2521. #define __CRC_IS_CLK_DISABLED       __HAL_RCC_CRC_IS_CLK_DISABLED
  2522. #define __DAC1_IS_CLK_ENABLED       __HAL_RCC_DAC1_IS_CLK_ENABLED
  2523. #define __DAC1_IS_CLK_DISABLED      __HAL_RCC_DAC1_IS_CLK_DISABLED
  2524. #define __DAC2_IS_CLK_ENABLED       __HAL_RCC_DAC2_IS_CLK_ENABLED
  2525. #define __DAC2_IS_CLK_DISABLED      __HAL_RCC_DAC2_IS_CLK_DISABLED
  2526. #define __DMA1_IS_CLK_ENABLED       __HAL_RCC_DMA1_IS_CLK_ENABLED
  2527. #define __DMA1_IS_CLK_DISABLED      __HAL_RCC_DMA1_IS_CLK_DISABLED
  2528. #define __DMA2_IS_CLK_ENABLED       __HAL_RCC_DMA2_IS_CLK_ENABLED
  2529. #define __DMA2_IS_CLK_DISABLED      __HAL_RCC_DMA2_IS_CLK_DISABLED
  2530. #define __FLITF_IS_CLK_ENABLED      __HAL_RCC_FLITF_IS_CLK_ENABLED
  2531. #define __FLITF_IS_CLK_DISABLED     __HAL_RCC_FLITF_IS_CLK_DISABLED
  2532. #define __FMC_IS_CLK_ENABLED        __HAL_RCC_FMC_IS_CLK_ENABLED
  2533. #define __FMC_IS_CLK_DISABLED       __HAL_RCC_FMC_IS_CLK_DISABLED
  2534. #define __GPIOA_IS_CLK_ENABLED      __HAL_RCC_GPIOA_IS_CLK_ENABLED
  2535. #define __GPIOA_IS_CLK_DISABLED     __HAL_RCC_GPIOA_IS_CLK_DISABLED
  2536. #define __GPIOB_IS_CLK_ENABLED      __HAL_RCC_GPIOB_IS_CLK_ENABLED
  2537. #define __GPIOB_IS_CLK_DISABLED     __HAL_RCC_GPIOB_IS_CLK_DISABLED
  2538. #define __GPIOC_IS_CLK_ENABLED      __HAL_RCC_GPIOC_IS_CLK_ENABLED
  2539. #define __GPIOC_IS_CLK_DISABLED     __HAL_RCC_GPIOC_IS_CLK_DISABLED
  2540. #define __GPIOD_IS_CLK_ENABLED      __HAL_RCC_GPIOD_IS_CLK_ENABLED
  2541. #define __GPIOD_IS_CLK_DISABLED     __HAL_RCC_GPIOD_IS_CLK_DISABLED
  2542. #define __GPIOE_IS_CLK_ENABLED      __HAL_RCC_GPIOE_IS_CLK_ENABLED
  2543. #define __GPIOE_IS_CLK_DISABLED     __HAL_RCC_GPIOE_IS_CLK_DISABLED
  2544. #define __GPIOF_IS_CLK_ENABLED      __HAL_RCC_GPIOF_IS_CLK_ENABLED
  2545. #define __GPIOF_IS_CLK_DISABLED     __HAL_RCC_GPIOF_IS_CLK_DISABLED
  2546. #define __GPIOG_IS_CLK_ENABLED      __HAL_RCC_GPIOG_IS_CLK_ENABLED
  2547. #define __GPIOG_IS_CLK_DISABLED     __HAL_RCC_GPIOG_IS_CLK_DISABLED
  2548. #define __GPIOH_IS_CLK_ENABLED      __HAL_RCC_GPIOH_IS_CLK_ENABLED
  2549. #define __GPIOH_IS_CLK_DISABLED     __HAL_RCC_GPIOH_IS_CLK_DISABLED
  2550. #define __HRTIM1_IS_CLK_ENABLED     __HAL_RCC_HRTIM1_IS_CLK_ENABLED
  2551. #define __HRTIM1_IS_CLK_DISABLED    __HAL_RCC_HRTIM1_IS_CLK_DISABLED
  2552. #define __I2C1_IS_CLK_ENABLED       __HAL_RCC_I2C1_IS_CLK_ENABLED
  2553. #define __I2C1_IS_CLK_DISABLED      __HAL_RCC_I2C1_IS_CLK_DISABLED
  2554. #define __I2C2_IS_CLK_ENABLED       __HAL_RCC_I2C2_IS_CLK_ENABLED
  2555. #define __I2C2_IS_CLK_DISABLED      __HAL_RCC_I2C2_IS_CLK_DISABLED
  2556. #define __I2C3_IS_CLK_ENABLED       __HAL_RCC_I2C3_IS_CLK_ENABLED
  2557. #define __I2C3_IS_CLK_DISABLED      __HAL_RCC_I2C3_IS_CLK_DISABLED
  2558. #define __PWR_IS_CLK_ENABLED        __HAL_RCC_PWR_IS_CLK_ENABLED
  2559. #define __PWR_IS_CLK_DISABLED       __HAL_RCC_PWR_IS_CLK_DISABLED
  2560. #define __SYSCFG_IS_CLK_ENABLED     __HAL_RCC_SYSCFG_IS_CLK_ENABLED
  2561. #define __SYSCFG_IS_CLK_DISABLED    __HAL_RCC_SYSCFG_IS_CLK_DISABLED
  2562. #define __SPI1_IS_CLK_ENABLED       __HAL_RCC_SPI1_IS_CLK_ENABLED
  2563. #define __SPI1_IS_CLK_DISABLED      __HAL_RCC_SPI1_IS_CLK_DISABLED
  2564. #define __SPI2_IS_CLK_ENABLED       __HAL_RCC_SPI2_IS_CLK_ENABLED
  2565. #define __SPI2_IS_CLK_DISABLED      __HAL_RCC_SPI2_IS_CLK_DISABLED
  2566. #define __SPI3_IS_CLK_ENABLED       __HAL_RCC_SPI3_IS_CLK_ENABLED
  2567. #define __SPI3_IS_CLK_DISABLED      __HAL_RCC_SPI3_IS_CLK_DISABLED
  2568. #define __SPI4_IS_CLK_ENABLED       __HAL_RCC_SPI4_IS_CLK_ENABLED
  2569. #define __SPI4_IS_CLK_DISABLED      __HAL_RCC_SPI4_IS_CLK_DISABLED
  2570. #define __SDADC1_IS_CLK_ENABLED     __HAL_RCC_SDADC1_IS_CLK_ENABLED
  2571. #define __SDADC1_IS_CLK_DISABLED    __HAL_RCC_SDADC1_IS_CLK_DISABLED
  2572. #define __SDADC2_IS_CLK_ENABLED     __HAL_RCC_SDADC2_IS_CLK_ENABLED
  2573. #define __SDADC2_IS_CLK_DISABLED    __HAL_RCC_SDADC2_IS_CLK_DISABLED
  2574. #define __SDADC3_IS_CLK_ENABLED     __HAL_RCC_SDADC3_IS_CLK_ENABLED
  2575. #define __SDADC3_IS_CLK_DISABLED    __HAL_RCC_SDADC3_IS_CLK_DISABLED
  2576. #define __SRAM_IS_CLK_ENABLED       __HAL_RCC_SRAM_IS_CLK_ENABLED
  2577. #define __SRAM_IS_CLK_DISABLED      __HAL_RCC_SRAM_IS_CLK_DISABLED
  2578. #define __TIM1_IS_CLK_ENABLED       __HAL_RCC_TIM1_IS_CLK_ENABLED
  2579. #define __TIM1_IS_CLK_DISABLED      __HAL_RCC_TIM1_IS_CLK_DISABLED
  2580. #define __TIM2_IS_CLK_ENABLED       __HAL_RCC_TIM2_IS_CLK_ENABLED
  2581. #define __TIM2_IS_CLK_DISABLED      __HAL_RCC_TIM2_IS_CLK_DISABLED
  2582. #define __TIM3_IS_CLK_ENABLED       __HAL_RCC_TIM3_IS_CLK_ENABLED
  2583. #define __TIM3_IS_CLK_DISABLED      __HAL_RCC_TIM3_IS_CLK_DISABLED
  2584. #define __TIM4_IS_CLK_ENABLED       __HAL_RCC_TIM4_IS_CLK_ENABLED
  2585. #define __TIM4_IS_CLK_DISABLED      __HAL_RCC_TIM4_IS_CLK_DISABLED
  2586. #define __TIM5_IS_CLK_ENABLED       __HAL_RCC_TIM5_IS_CLK_ENABLED
  2587. #define __TIM5_IS_CLK_DISABLED      __HAL_RCC_TIM5_IS_CLK_DISABLED
  2588. #define __TIM6_IS_CLK_ENABLED       __HAL_RCC_TIM6_IS_CLK_ENABLED
  2589. #define __TIM6_IS_CLK_DISABLED      __HAL_RCC_TIM6_IS_CLK_DISABLED
  2590. #define __TIM7_IS_CLK_ENABLED       __HAL_RCC_TIM7_IS_CLK_ENABLED
  2591. #define __TIM7_IS_CLK_DISABLED      __HAL_RCC_TIM7_IS_CLK_DISABLED
  2592. #define __TIM8_IS_CLK_ENABLED       __HAL_RCC_TIM8_IS_CLK_ENABLED
  2593. #define __TIM8_IS_CLK_DISABLED      __HAL_RCC_TIM8_IS_CLK_DISABLED
  2594. #define __TIM12_IS_CLK_ENABLED      __HAL_RCC_TIM12_IS_CLK_ENABLED
  2595. #define __TIM12_IS_CLK_DISABLED     __HAL_RCC_TIM12_IS_CLK_DISABLED
  2596. #define __TIM13_IS_CLK_ENABLED      __HAL_RCC_TIM13_IS_CLK_ENABLED
  2597. #define __TIM13_IS_CLK_DISABLED     __HAL_RCC_TIM13_IS_CLK_DISABLED
  2598. #define __TIM14_IS_CLK_ENABLED      __HAL_RCC_TIM14_IS_CLK_ENABLED
  2599. #define __TIM14_IS_CLK_DISABLED     __HAL_RCC_TIM14_IS_CLK_DISABLED
  2600. #define __TIM15_IS_CLK_ENABLED      __HAL_RCC_TIM15_IS_CLK_ENABLED
  2601. #define __TIM15_IS_CLK_DISABLED     __HAL_RCC_TIM15_IS_CLK_DISABLED
  2602. #define __TIM16_IS_CLK_ENABLED      __HAL_RCC_TIM16_IS_CLK_ENABLED
  2603. #define __TIM16_IS_CLK_DISABLED     __HAL_RCC_TIM16_IS_CLK_DISABLED
  2604. #define __TIM17_IS_CLK_ENABLED      __HAL_RCC_TIM17_IS_CLK_ENABLED
  2605. #define __TIM17_IS_CLK_DISABLED     __HAL_RCC_TIM17_IS_CLK_DISABLED
  2606. #define __TIM18_IS_CLK_ENABLED      __HAL_RCC_TIM18_IS_CLK_ENABLED
  2607. #define __TIM18_IS_CLK_DISABLED     __HAL_RCC_TIM18_IS_CLK_DISABLED
  2608. #define __TIM19_IS_CLK_ENABLED      __HAL_RCC_TIM19_IS_CLK_ENABLED
  2609. #define __TIM19_IS_CLK_DISABLED     __HAL_RCC_TIM19_IS_CLK_DISABLED
  2610. #define __TIM20_IS_CLK_ENABLED      __HAL_RCC_TIM20_IS_CLK_ENABLED
  2611. #define __TIM20_IS_CLK_DISABLED     __HAL_RCC_TIM20_IS_CLK_DISABLED
  2612. #define __TSC_IS_CLK_ENABLED        __HAL_RCC_TSC_IS_CLK_ENABLED
  2613. #define __TSC_IS_CLK_DISABLED       __HAL_RCC_TSC_IS_CLK_DISABLED
  2614. #define __UART4_IS_CLK_ENABLED      __HAL_RCC_UART4_IS_CLK_ENABLED
  2615. #define __UART4_IS_CLK_DISABLED     __HAL_RCC_UART4_IS_CLK_DISABLED
  2616. #define __UART5_IS_CLK_ENABLED      __HAL_RCC_UART5_IS_CLK_ENABLED
  2617. #define __UART5_IS_CLK_DISABLED     __HAL_RCC_UART5_IS_CLK_DISABLED
  2618. #define __USART1_IS_CLK_ENABLED     __HAL_RCC_USART1_IS_CLK_ENABLED
  2619. #define __USART1_IS_CLK_DISABLED    __HAL_RCC_USART1_IS_CLK_DISABLED
  2620. #define __USART2_IS_CLK_ENABLED     __HAL_RCC_USART2_IS_CLK_ENABLED
  2621. #define __USART2_IS_CLK_DISABLED    __HAL_RCC_USART2_IS_CLK_DISABLED
  2622. #define __USART3_IS_CLK_ENABLED     __HAL_RCC_USART3_IS_CLK_ENABLED
  2623. #define __USART3_IS_CLK_DISABLED    __HAL_RCC_USART3_IS_CLK_DISABLED
  2624. #define __USB_IS_CLK_ENABLED        __HAL_RCC_USB_IS_CLK_ENABLED
  2625. #define __USB_IS_CLK_DISABLED       __HAL_RCC_USB_IS_CLK_DISABLED
  2626. #define __WWDG_IS_CLK_ENABLED       __HAL_RCC_WWDG_IS_CLK_ENABLED
  2627. #define __WWDG_IS_CLK_DISABLED      __HAL_RCC_WWDG_IS_CLK_DISABLED
  2628.  
  2629. #if defined(STM32F4)
  2630. #define __HAL_RCC_SDMMC1_FORCE_RESET       __HAL_RCC_SDIO_FORCE_RESET
  2631. #define __HAL_RCC_SDMMC1_RELEASE_RESET     __HAL_RCC_SDIO_RELEASE_RESET
  2632. #define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE  __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
  2633. #define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
  2634. #define __HAL_RCC_SDMMC1_CLK_ENABLE        __HAL_RCC_SDIO_CLK_ENABLE
  2635. #define __HAL_RCC_SDMMC1_CLK_DISABLE       __HAL_RCC_SDIO_CLK_DISABLE
  2636. #define __HAL_RCC_SDMMC1_IS_CLK_ENABLED    __HAL_RCC_SDIO_IS_CLK_ENABLED
  2637. #define __HAL_RCC_SDMMC1_IS_CLK_DISABLED   __HAL_RCC_SDIO_IS_CLK_DISABLED
  2638. #define Sdmmc1ClockSelection               SdioClockSelection
  2639. #define RCC_PERIPHCLK_SDMMC1               RCC_PERIPHCLK_SDIO
  2640. #define RCC_SDMMC1CLKSOURCE_CLK48          RCC_SDIOCLKSOURCE_CK48
  2641. #define RCC_SDMMC1CLKSOURCE_SYSCLK         RCC_SDIOCLKSOURCE_SYSCLK
  2642. #define __HAL_RCC_SDMMC1_CONFIG            __HAL_RCC_SDIO_CONFIG
  2643. #define __HAL_RCC_GET_SDMMC1_SOURCE        __HAL_RCC_GET_SDIO_SOURCE
  2644. #endif
  2645.  
  2646. #if defined(STM32F7) || defined(STM32L4)
  2647. #define __HAL_RCC_SDIO_FORCE_RESET         __HAL_RCC_SDMMC1_FORCE_RESET
  2648. #define __HAL_RCC_SDIO_RELEASE_RESET       __HAL_RCC_SDMMC1_RELEASE_RESET
  2649. #define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE    __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE
  2650. #define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE   __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE
  2651. #define __HAL_RCC_SDIO_CLK_ENABLE          __HAL_RCC_SDMMC1_CLK_ENABLE
  2652. #define __HAL_RCC_SDIO_CLK_DISABLE         __HAL_RCC_SDMMC1_CLK_DISABLE
  2653. #define __HAL_RCC_SDIO_IS_CLK_ENABLED      __HAL_RCC_SDMMC1_IS_CLK_ENABLED
  2654. #define __HAL_RCC_SDIO_IS_CLK_DISABLED     __HAL_RCC_SDMMC1_IS_CLK_DISABLED
  2655. #define SdioClockSelection                 Sdmmc1ClockSelection
  2656. #define RCC_PERIPHCLK_SDIO                 RCC_PERIPHCLK_SDMMC1
  2657. #define __HAL_RCC_SDIO_CONFIG              __HAL_RCC_SDMMC1_CONFIG
  2658. #define __HAL_RCC_GET_SDIO_SOURCE          __HAL_RCC_GET_SDMMC1_SOURCE 
  2659. #endif
  2660.  
  2661. #if defined(STM32H7)
  2662. #define __HAL_RCC_USB_OTG_HS_CLK_ENABLE()              __HAL_RCC_USB1_OTG_HS_CLK_ENABLE()
  2663. #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE()         __HAL_RCC_USB1_OTG_HS_ULPI_CLK_ENABLE()
  2664. #define __HAL_RCC_USB_OTG_HS_CLK_DISABLE()             __HAL_RCC_USB1_OTG_HS_CLK_DISABLE()
  2665. #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE()        __HAL_RCC_USB1_OTG_HS_ULPI_CLK_DISABLE()
  2666. #define __HAL_RCC_USB_OTG_HS_FORCE_RESET()             __HAL_RCC_USB1_OTG_HS_FORCE_RESET()
  2667. #define __HAL_RCC_USB_OTG_HS_RELEASE_RESET()           __HAL_RCC_USB1_OTG_HS_RELEASE_RESET()
  2668. #define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE()        __HAL_RCC_USB1_OTG_HS_CLK_SLEEP_ENABLE()
  2669. #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE()   __HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_ENABLE()
  2670. #define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE()       __HAL_RCC_USB1_OTG_HS_CLK_SLEEP_DISABLE()
  2671. #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE()  __HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_DISABLE()
  2672.  
  2673. #define __HAL_RCC_USB_OTG_FS_CLK_ENABLE()             __HAL_RCC_USB2_OTG_FS_CLK_ENABLE()
  2674. #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_ENABLE()        __HAL_RCC_USB2_OTG_FS_ULPI_CLK_ENABLE()
  2675. #define __HAL_RCC_USB_OTG_FS_CLK_DISABLE()            __HAL_RCC_USB2_OTG_FS_CLK_DISABLE()
  2676. #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_DISABLE()       __HAL_RCC_USB2_OTG_FS_ULPI_CLK_DISABLE()
  2677. #define __HAL_RCC_USB_OTG_FS_FORCE_RESET()            __HAL_RCC_USB2_OTG_FS_FORCE_RESET()
  2678. #define __HAL_RCC_USB_OTG_FS_RELEASE_RESET()          __HAL_RCC_USB2_OTG_FS_RELEASE_RESET()
  2679. #define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE()       __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_ENABLE()
  2680. #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_ENABLE()  __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_ENABLE()
  2681. #define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE()      __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_DISABLE()
  2682. #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE()
  2683. #endif
  2684.  
  2685. #if defined(STM32F7)
  2686. #define RCC_SDIOCLKSOURCE_CLK48             RCC_SDMMC1CLKSOURCE_CLK48
  2687. #define RCC_SDIOCLKSOURCE_SYSCLK           RCC_SDMMC1CLKSOURCE_SYSCLK
  2688. #endif
  2689.  
  2690. #define __HAL_RCC_I2SCLK            __HAL_RCC_I2S_CONFIG
  2691. #define __HAL_RCC_I2SCLK_CONFIG     __HAL_RCC_I2S_CONFIG
  2692.  
  2693. #define __RCC_PLLSRC                RCC_GET_PLL_OSCSOURCE
  2694.  
  2695. #define IS_RCC_MSIRANGE             IS_RCC_MSI_CLOCK_RANGE
  2696. #define IS_RCC_RTCCLK_SOURCE        IS_RCC_RTCCLKSOURCE
  2697. #define IS_RCC_SYSCLK_DIV           IS_RCC_HCLK
  2698. #define IS_RCC_HCLK_DIV             IS_RCC_PCLK
  2699. #define IS_RCC_PERIPHCLK            IS_RCC_PERIPHCLOCK
  2700.  
  2701. #define RCC_IT_HSI14                RCC_IT_HSI14RDY
  2702.  
  2703. #define RCC_IT_CSSLSE               RCC_IT_LSECSS
  2704. #define RCC_IT_CSSHSE               RCC_IT_CSS
  2705.  
  2706. #define RCC_PLLMUL_3                RCC_PLL_MUL3
  2707. #define RCC_PLLMUL_4                RCC_PLL_MUL4
  2708. #define RCC_PLLMUL_6                RCC_PLL_MUL6
  2709. #define RCC_PLLMUL_8                RCC_PLL_MUL8
  2710. #define RCC_PLLMUL_12               RCC_PLL_MUL12
  2711. #define RCC_PLLMUL_16               RCC_PLL_MUL16
  2712. #define RCC_PLLMUL_24               RCC_PLL_MUL24
  2713. #define RCC_PLLMUL_32               RCC_PLL_MUL32
  2714. #define RCC_PLLMUL_48               RCC_PLL_MUL48
  2715.  
  2716. #define RCC_PLLDIV_2                RCC_PLL_DIV2
  2717. #define RCC_PLLDIV_3                RCC_PLL_DIV3
  2718. #define RCC_PLLDIV_4                RCC_PLL_DIV4
  2719.  
  2720. #define IS_RCC_MCOSOURCE            IS_RCC_MCO1SOURCE
  2721. #define __HAL_RCC_MCO_CONFIG        __HAL_RCC_MCO1_CONFIG
  2722. #define RCC_MCO_NODIV               RCC_MCODIV_1
  2723. #define RCC_MCO_DIV1                RCC_MCODIV_1
  2724. #define RCC_MCO_DIV2                RCC_MCODIV_2
  2725. #define RCC_MCO_DIV4                RCC_MCODIV_4
  2726. #define RCC_MCO_DIV8                RCC_MCODIV_8
  2727. #define RCC_MCO_DIV16               RCC_MCODIV_16
  2728. #define RCC_MCO_DIV32               RCC_MCODIV_32
  2729. #define RCC_MCO_DIV64               RCC_MCODIV_64
  2730. #define RCC_MCO_DIV128              RCC_MCODIV_128
  2731. #define RCC_MCOSOURCE_NONE          RCC_MCO1SOURCE_NOCLOCK
  2732. #define RCC_MCOSOURCE_LSI           RCC_MCO1SOURCE_LSI
  2733. #define RCC_MCOSOURCE_LSE           RCC_MCO1SOURCE_LSE
  2734. #define RCC_MCOSOURCE_SYSCLK        RCC_MCO1SOURCE_SYSCLK
  2735. #define RCC_MCOSOURCE_HSI           RCC_MCO1SOURCE_HSI
  2736. #define RCC_MCOSOURCE_HSI14         RCC_MCO1SOURCE_HSI14
  2737. #define RCC_MCOSOURCE_HSI48         RCC_MCO1SOURCE_HSI48
  2738. #define RCC_MCOSOURCE_HSE           RCC_MCO1SOURCE_HSE
  2739. #define RCC_MCOSOURCE_PLLCLK_DIV1   RCC_MCO1SOURCE_PLLCLK
  2740. #define RCC_MCOSOURCE_PLLCLK_NODIV  RCC_MCO1SOURCE_PLLCLK
  2741. #define RCC_MCOSOURCE_PLLCLK_DIV2   RCC_MCO1SOURCE_PLLCLK_DIV2
  2742.  
  2743. #define RCC_RTCCLKSOURCE_NONE       RCC_RTCCLKSOURCE_NO_CLK
  2744.  
  2745. #define RCC_USBCLK_PLLSAI1          RCC_USBCLKSOURCE_PLLSAI1
  2746. #define RCC_USBCLK_PLL              RCC_USBCLKSOURCE_PLL
  2747. #define RCC_USBCLK_MSI              RCC_USBCLKSOURCE_MSI
  2748. #define RCC_USBCLKSOURCE_PLLCLK     RCC_USBCLKSOURCE_PLL
  2749. #define RCC_USBPLLCLK_DIV1          RCC_USBCLKSOURCE_PLL
  2750. #define RCC_USBPLLCLK_DIV1_5        RCC_USBCLKSOURCE_PLL_DIV1_5
  2751. #define RCC_USBPLLCLK_DIV2          RCC_USBCLKSOURCE_PLL_DIV2
  2752. #define RCC_USBPLLCLK_DIV3          RCC_USBCLKSOURCE_PLL_DIV3
  2753.  
  2754. #define HSION_BitNumber        RCC_HSION_BIT_NUMBER
  2755. #define HSION_BITNUMBER        RCC_HSION_BIT_NUMBER
  2756. #define HSEON_BitNumber        RCC_HSEON_BIT_NUMBER
  2757. #define HSEON_BITNUMBER        RCC_HSEON_BIT_NUMBER
  2758. #define MSION_BITNUMBER        RCC_MSION_BIT_NUMBER
  2759. #define CSSON_BitNumber        RCC_CSSON_BIT_NUMBER
  2760. #define CSSON_BITNUMBER        RCC_CSSON_BIT_NUMBER
  2761. #define PLLON_BitNumber        RCC_PLLON_BIT_NUMBER
  2762. #define PLLON_BITNUMBER        RCC_PLLON_BIT_NUMBER
  2763. #define PLLI2SON_BitNumber     RCC_PLLI2SON_BIT_NUMBER
  2764. #define I2SSRC_BitNumber       RCC_I2SSRC_BIT_NUMBER
  2765. #define RTCEN_BitNumber        RCC_RTCEN_BIT_NUMBER
  2766. #define RTCEN_BITNUMBER        RCC_RTCEN_BIT_NUMBER
  2767. #define BDRST_BitNumber        RCC_BDRST_BIT_NUMBER
  2768. #define BDRST_BITNUMBER        RCC_BDRST_BIT_NUMBER
  2769. #define RTCRST_BITNUMBER       RCC_RTCRST_BIT_NUMBER
  2770. #define LSION_BitNumber        RCC_LSION_BIT_NUMBER
  2771. #define LSION_BITNUMBER        RCC_LSION_BIT_NUMBER
  2772. #define LSEON_BitNumber        RCC_LSEON_BIT_NUMBER
  2773. #define LSEON_BITNUMBER        RCC_LSEON_BIT_NUMBER
  2774. #define LSEBYP_BITNUMBER       RCC_LSEBYP_BIT_NUMBER
  2775. #define PLLSAION_BitNumber     RCC_PLLSAION_BIT_NUMBER
  2776. #define TIMPRE_BitNumber       RCC_TIMPRE_BIT_NUMBER
  2777. #define RMVF_BitNumber         RCC_RMVF_BIT_NUMBER
  2778. #define RMVF_BITNUMBER         RCC_RMVF_BIT_NUMBER
  2779. #define RCC_CR2_HSI14TRIM_BitNumber RCC_HSI14TRIM_BIT_NUMBER
  2780. #define CR_BYTE2_ADDRESS       RCC_CR_BYTE2_ADDRESS
  2781. #define CIR_BYTE1_ADDRESS      RCC_CIR_BYTE1_ADDRESS
  2782. #define CIR_BYTE2_ADDRESS      RCC_CIR_BYTE2_ADDRESS
  2783. #define BDCR_BYTE0_ADDRESS     RCC_BDCR_BYTE0_ADDRESS
  2784. #define DBP_TIMEOUT_VALUE      RCC_DBP_TIMEOUT_VALUE
  2785. #define LSE_TIMEOUT_VALUE      RCC_LSE_TIMEOUT_VALUE
  2786.  
  2787. #define CR_HSION_BB            RCC_CR_HSION_BB
  2788. #define CR_CSSON_BB            RCC_CR_CSSON_BB
  2789. #define CR_PLLON_BB            RCC_CR_PLLON_BB
  2790. #define CR_PLLI2SON_BB         RCC_CR_PLLI2SON_BB
  2791. #define CR_MSION_BB            RCC_CR_MSION_BB
  2792. #define CSR_LSION_BB           RCC_CSR_LSION_BB
  2793. #define CSR_LSEON_BB           RCC_CSR_LSEON_BB
  2794. #define CSR_LSEBYP_BB          RCC_CSR_LSEBYP_BB
  2795. #define CSR_RTCEN_BB           RCC_CSR_RTCEN_BB
  2796. #define CSR_RTCRST_BB          RCC_CSR_RTCRST_BB
  2797. #define CFGR_I2SSRC_BB         RCC_CFGR_I2SSRC_BB
  2798. #define BDCR_RTCEN_BB          RCC_BDCR_RTCEN_BB
  2799. #define BDCR_BDRST_BB          RCC_BDCR_BDRST_BB
  2800. #define CR_HSEON_BB            RCC_CR_HSEON_BB
  2801. #define CSR_RMVF_BB            RCC_CSR_RMVF_BB
  2802. #define CR_PLLSAION_BB         RCC_CR_PLLSAION_BB
  2803. #define DCKCFGR_TIMPRE_BB      RCC_DCKCFGR_TIMPRE_BB
  2804.  
  2805. #define __HAL_RCC_CRS_ENABLE_FREQ_ERROR_COUNTER     __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE
  2806. #define __HAL_RCC_CRS_DISABLE_FREQ_ERROR_COUNTER    __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE
  2807. #define __HAL_RCC_CRS_ENABLE_AUTOMATIC_CALIB        __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE
  2808. #define __HAL_RCC_CRS_DISABLE_AUTOMATIC_CALIB       __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE
  2809. #define __HAL_RCC_CRS_CALCULATE_RELOADVALUE         __HAL_RCC_CRS_RELOADVALUE_CALCULATE
  2810.  
  2811. #define __HAL_RCC_GET_IT_SOURCE                     __HAL_RCC_GET_IT
  2812.  
  2813. #define RCC_CRS_SYNCWARM       RCC_CRS_SYNCWARN
  2814. #define RCC_CRS_TRIMOV         RCC_CRS_TRIMOVF
  2815.  
  2816. #define RCC_PERIPHCLK_CK48               RCC_PERIPHCLK_CLK48
  2817. #define RCC_CK48CLKSOURCE_PLLQ           RCC_CLK48CLKSOURCE_PLLQ
  2818. #define RCC_CK48CLKSOURCE_PLLSAIP        RCC_CLK48CLKSOURCE_PLLSAIP
  2819. #define RCC_CK48CLKSOURCE_PLLI2SQ        RCC_CLK48CLKSOURCE_PLLI2SQ
  2820. #define IS_RCC_CK48CLKSOURCE             IS_RCC_CLK48CLKSOURCE
  2821. #define RCC_SDIOCLKSOURCE_CK48           RCC_SDIOCLKSOURCE_CLK48
  2822.  
  2823. #define __HAL_RCC_DFSDM_CLK_ENABLE             __HAL_RCC_DFSDM1_CLK_ENABLE
  2824. #define __HAL_RCC_DFSDM_CLK_DISABLE            __HAL_RCC_DFSDM1_CLK_DISABLE
  2825. #define __HAL_RCC_DFSDM_IS_CLK_ENABLED         __HAL_RCC_DFSDM1_IS_CLK_ENABLED
  2826. #define __HAL_RCC_DFSDM_IS_CLK_DISABLED        __HAL_RCC_DFSDM1_IS_CLK_DISABLED
  2827. #define __HAL_RCC_DFSDM_FORCE_RESET            __HAL_RCC_DFSDM1_FORCE_RESET
  2828. #define __HAL_RCC_DFSDM_RELEASE_RESET          __HAL_RCC_DFSDM1_RELEASE_RESET
  2829. #define __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE       __HAL_RCC_DFSDM1_CLK_SLEEP_ENABLE
  2830. #define __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE      __HAL_RCC_DFSDM1_CLK_SLEEP_DISABLE
  2831. #define __HAL_RCC_DFSDM_IS_CLK_SLEEP_ENABLED   __HAL_RCC_DFSDM1_IS_CLK_SLEEP_ENABLED
  2832. #define __HAL_RCC_DFSDM_IS_CLK_SLEEP_DISABLED  __HAL_RCC_DFSDM1_IS_CLK_SLEEP_DISABLED
  2833. #define DfsdmClockSelection         Dfsdm1ClockSelection
  2834. #define RCC_PERIPHCLK_DFSDM         RCC_PERIPHCLK_DFSDM1
  2835. #define RCC_DFSDMCLKSOURCE_PCLK     RCC_DFSDM1CLKSOURCE_PCLK2
  2836. #define RCC_DFSDMCLKSOURCE_SYSCLK   RCC_DFSDM1CLKSOURCE_SYSCLK
  2837. #define __HAL_RCC_DFSDM_CONFIG      __HAL_RCC_DFSDM1_CONFIG
  2838. #define __HAL_RCC_GET_DFSDM_SOURCE  __HAL_RCC_GET_DFSDM1_SOURCE
  2839. #define RCC_DFSDM1CLKSOURCE_PCLK    RCC_DFSDM1CLKSOURCE_PCLK2
  2840. #define RCC_SWPMI1CLKSOURCE_PCLK    RCC_SWPMI1CLKSOURCE_PCLK1
  2841. #define RCC_LPTIM1CLKSOURCE_PCLK    RCC_LPTIM1CLKSOURCE_PCLK1
  2842. #define RCC_LPTIM2CLKSOURCE_PCLK    RCC_LPTIM2CLKSOURCE_PCLK1
  2843.  
  2844. #define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1    RCC_DFSDM1AUDIOCLKSOURCE_I2S1
  2845. #define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2    RCC_DFSDM1AUDIOCLKSOURCE_I2S2
  2846. #define RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB1    RCC_DFSDM2AUDIOCLKSOURCE_I2S1
  2847. #define RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB2    RCC_DFSDM2AUDIOCLKSOURCE_I2S2
  2848. #define RCC_DFSDM1CLKSOURCE_APB2            RCC_DFSDM1CLKSOURCE_PCLK2
  2849. #define RCC_DFSDM2CLKSOURCE_APB2            RCC_DFSDM2CLKSOURCE_PCLK2
  2850. #define RCC_FMPI2C1CLKSOURCE_APB            RCC_FMPI2C1CLKSOURCE_PCLK1
  2851.  
  2852. /**
  2853.   * @}
  2854.   */
  2855.  
  2856. /** @defgroup HAL_RNG_Aliased_Macros HAL RNG Aliased Macros maintained for legacy purpose
  2857.   * @{
  2858.   */
  2859. #define  HAL_RNG_ReadyCallback(__HANDLE__)  HAL_RNG_ReadyDataCallback((__HANDLE__), uint32_t random32bit)                                      
  2860.  
  2861. /**
  2862.   * @}
  2863.   */
  2864.  
  2865. /** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
  2866.   * @{
  2867.   */
  2868.  
  2869. #define __HAL_RTC_CLEAR_FLAG                      __HAL_RTC_EXTI_CLEAR_FLAG
  2870. #define __HAL_RTC_DISABLE_IT                      __HAL_RTC_EXTI_DISABLE_IT
  2871. #define __HAL_RTC_ENABLE_IT                       __HAL_RTC_EXTI_ENABLE_IT
  2872.  
  2873. #if defined (STM32F1)
  2874. #define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT)  __HAL_RTC_ALARM_EXTI_CLEAR_FLAG()
  2875.  
  2876. #define __HAL_RTC_EXTI_ENABLE_IT(RTC_EXTI_LINE_ALARM_EVENT)   __HAL_RTC_ALARM_EXTI_ENABLE_IT()
  2877.  
  2878. #define __HAL_RTC_EXTI_DISABLE_IT(RTC_EXTI_LINE_ALARM_EVENT)  __HAL_RTC_ALARM_EXTI_DISABLE_IT()
  2879.  
  2880. #define __HAL_RTC_EXTI_GET_FLAG(RTC_EXTI_LINE_ALARM_EVENT)    __HAL_RTC_ALARM_EXTI_GET_FLAG()
  2881.  
  2882. #define __HAL_RTC_EXTI_GENERATE_SWIT(RTC_EXTI_LINE_ALARM_EVENT)   __HAL_RTC_ALARM_EXTI_GENERATE_SWIT()
  2883. #else
  2884. #define __HAL_RTC_EXTI_CLEAR_FLAG(__EXTI_LINE__)  (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() : \
  2885.                                                    (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() : \
  2886.                                                       __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG()))
  2887. #define __HAL_RTC_EXTI_ENABLE_IT(__EXTI_LINE__)   (((__EXTI_LINE__)  == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_ENABLE_IT() : \
  2888.                                                   (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() : \
  2889.                                                       __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT()))
  2890. #define __HAL_RTC_EXTI_DISABLE_IT(__EXTI_LINE__)  (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_DISABLE_IT() : \
  2891.                                                   (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() : \
  2892.                                                       __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT()))
  2893. #define __HAL_RTC_EXTI_GET_FLAG(__EXTI_LINE__)    (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GET_FLAG() : \
  2894.                                                   (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() : \
  2895.                                                       __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG()))
  2896. #define __HAL_RTC_EXTI_GENERATE_SWIT(__EXTI_LINE__)   (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() : \
  2897.                                                       (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() :  \
  2898.                                                           __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT()))
  2899. #endif   /* STM32F1 */
  2900.  
  2901. #define IS_ALARM                                  IS_RTC_ALARM
  2902. #define IS_ALARM_MASK                             IS_RTC_ALARM_MASK
  2903. #define IS_TAMPER                                 IS_RTC_TAMPER
  2904. #define IS_TAMPER_ERASE_MODE                      IS_RTC_TAMPER_ERASE_MODE
  2905. #define IS_TAMPER_FILTER                          IS_RTC_TAMPER_FILTER
  2906. #define IS_TAMPER_INTERRUPT                       IS_RTC_TAMPER_INTERRUPT
  2907. #define IS_TAMPER_MASKFLAG_STATE                  IS_RTC_TAMPER_MASKFLAG_STATE
  2908. #define IS_TAMPER_PRECHARGE_DURATION              IS_RTC_TAMPER_PRECHARGE_DURATION
  2909. #define IS_TAMPER_PULLUP_STATE                    IS_RTC_TAMPER_PULLUP_STATE
  2910. #define IS_TAMPER_SAMPLING_FREQ                   IS_RTC_TAMPER_SAMPLING_FREQ
  2911. #define IS_TAMPER_TIMESTAMPONTAMPER_DETECTION     IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION
  2912. #define IS_TAMPER_TRIGGER                         IS_RTC_TAMPER_TRIGGER
  2913. #define IS_WAKEUP_CLOCK                           IS_RTC_WAKEUP_CLOCK
  2914. #define IS_WAKEUP_COUNTER                         IS_RTC_WAKEUP_COUNTER
  2915.  
  2916. #define __RTC_WRITEPROTECTION_ENABLE  __HAL_RTC_WRITEPROTECTION_ENABLE
  2917. #define __RTC_WRITEPROTECTION_DISABLE  __HAL_RTC_WRITEPROTECTION_DISABLE
  2918.  
  2919. /**
  2920.   * @}
  2921.   */
  2922.  
  2923. /** @defgroup HAL_SD_Aliased_Macros HAL SD Aliased Macros maintained for legacy purpose
  2924.   * @{
  2925.   */
  2926.  
  2927. #define SD_OCR_CID_CSD_OVERWRIETE   SD_OCR_CID_CSD_OVERWRITE
  2928. #define SD_CMD_SD_APP_STAUS         SD_CMD_SD_APP_STATUS
  2929.  
  2930. #if defined(STM32F4) || defined(STM32F2)
  2931. #define  SD_SDMMC_DISABLED          SD_SDIO_DISABLED
  2932. #define  SD_SDMMC_FUNCTION_BUSY     SD_SDIO_FUNCTION_BUSY    
  2933. #define  SD_SDMMC_FUNCTION_FAILED   SD_SDIO_FUNCTION_FAILED  
  2934. #define  SD_SDMMC_UNKNOWN_FUNCTION  SD_SDIO_UNKNOWN_FUNCTION  
  2935. #define  SD_CMD_SDMMC_SEN_OP_COND   SD_CMD_SDIO_SEN_OP_COND  
  2936. #define  SD_CMD_SDMMC_RW_DIRECT     SD_CMD_SDIO_RW_DIRECT    
  2937. #define  SD_CMD_SDMMC_RW_EXTENDED   SD_CMD_SDIO_RW_EXTENDED  
  2938. #define  __HAL_SD_SDMMC_ENABLE      __HAL_SD_SDIO_ENABLE      
  2939. #define  __HAL_SD_SDMMC_DISABLE     __HAL_SD_SDIO_DISABLE    
  2940. #define  __HAL_SD_SDMMC_DMA_ENABLE  __HAL_SD_SDIO_DMA_ENABLE  
  2941. #define  __HAL_SD_SDMMC_DMA_DISABLE __HAL_SD_SDIO_DMA_DISABL  
  2942. #define  __HAL_SD_SDMMC_ENABLE_IT   __HAL_SD_SDIO_ENABLE_IT  
  2943. #define  __HAL_SD_SDMMC_DISABLE_IT  __HAL_SD_SDIO_DISABLE_IT  
  2944. #define  __HAL_SD_SDMMC_GET_FLAG    __HAL_SD_SDIO_GET_FLAG    
  2945. #define  __HAL_SD_SDMMC_CLEAR_FLAG  __HAL_SD_SDIO_CLEAR_FLAG  
  2946. #define  __HAL_SD_SDMMC_GET_IT      __HAL_SD_SDIO_GET_IT      
  2947. #define  __HAL_SD_SDMMC_CLEAR_IT    __HAL_SD_SDIO_CLEAR_IT    
  2948. #define  SDMMC_STATIC_FLAGS         SDIO_STATIC_FLAGS          
  2949. #define  SDMMC_CMD0TIMEOUT          SDIO_CMD0TIMEOUT           
  2950. #define  SD_SDMMC_SEND_IF_COND      SD_SDIO_SEND_IF_COND
  2951. /* alias CMSIS */
  2952. #define  SDMMC1_IRQn                SDIO_IRQn
  2953. #define  SDMMC1_IRQHandler          SDIO_IRQHandler
  2954. #endif
  2955.  
  2956. #if defined(STM32F7) || defined(STM32L4)
  2957. #define  SD_SDIO_DISABLED           SD_SDMMC_DISABLED
  2958. #define  SD_SDIO_FUNCTION_BUSY      SD_SDMMC_FUNCTION_BUSY    
  2959. #define  SD_SDIO_FUNCTION_FAILED    SD_SDMMC_FUNCTION_FAILED  
  2960. #define  SD_SDIO_UNKNOWN_FUNCTION   SD_SDMMC_UNKNOWN_FUNCTION
  2961. #define  SD_CMD_SDIO_SEN_OP_COND    SD_CMD_SDMMC_SEN_OP_COND
  2962. #define  SD_CMD_SDIO_RW_DIRECT      SD_CMD_SDMMC_RW_DIRECT
  2963. #define  SD_CMD_SDIO_RW_EXTENDED    SD_CMD_SDMMC_RW_EXTENDED
  2964. #define  __HAL_SD_SDIO_ENABLE       __HAL_SD_SDMMC_ENABLE
  2965. #define  __HAL_SD_SDIO_DISABLE      __HAL_SD_SDMMC_DISABLE
  2966. #define  __HAL_SD_SDIO_DMA_ENABLE   __HAL_SD_SDMMC_DMA_ENABLE
  2967. #define  __HAL_SD_SDIO_DMA_DISABL   __HAL_SD_SDMMC_DMA_DISABLE
  2968. #define  __HAL_SD_SDIO_ENABLE_IT    __HAL_SD_SDMMC_ENABLE_IT
  2969. #define  __HAL_SD_SDIO_DISABLE_IT   __HAL_SD_SDMMC_DISABLE_IT
  2970. #define  __HAL_SD_SDIO_GET_FLAG     __HAL_SD_SDMMC_GET_FLAG
  2971. #define  __HAL_SD_SDIO_CLEAR_FLAG   __HAL_SD_SDMMC_CLEAR_FLAG
  2972. #define  __HAL_SD_SDIO_GET_IT       __HAL_SD_SDMMC_GET_IT
  2973. #define  __HAL_SD_SDIO_CLEAR_IT     __HAL_SD_SDMMC_CLEAR_IT
  2974. #define  SDIO_STATIC_FLAGS              SDMMC_STATIC_FLAGS
  2975. #define  SDIO_CMD0TIMEOUT                 SDMMC_CMD0TIMEOUT
  2976. #define  SD_SDIO_SEND_IF_COND         SD_SDMMC_SEND_IF_COND
  2977. /* alias CMSIS for compatibilities */
  2978. #define  SDIO_IRQn                  SDMMC1_IRQn
  2979. #define  SDIO_IRQHandler            SDMMC1_IRQHandler
  2980. #endif
  2981.  
  2982. #if defined(STM32F7) || defined(STM32F4) || defined(STM32F2)
  2983. #define  HAL_SD_CardCIDTypedef       HAL_SD_CardCIDTypeDef
  2984. #define  HAL_SD_CardCSDTypedef       HAL_SD_CardCSDTypeDef
  2985. #define  HAL_SD_CardStatusTypedef    HAL_SD_CardStatusTypeDef
  2986. #define  HAL_SD_CardStateTypedef     HAL_SD_CardStateTypeDef
  2987. #endif
  2988.  
  2989. /**
  2990.   * @}
  2991.   */
  2992.  
  2993. /** @defgroup HAL_SMARTCARD_Aliased_Macros HAL SMARTCARD Aliased Macros maintained for legacy purpose
  2994.   * @{
  2995.   */
  2996.  
  2997. #define __SMARTCARD_ENABLE_IT           __HAL_SMARTCARD_ENABLE_IT
  2998. #define __SMARTCARD_DISABLE_IT          __HAL_SMARTCARD_DISABLE_IT
  2999. #define __SMARTCARD_ENABLE              __HAL_SMARTCARD_ENABLE
  3000. #define __SMARTCARD_DISABLE             __HAL_SMARTCARD_DISABLE
  3001. #define __SMARTCARD_DMA_REQUEST_ENABLE  __HAL_SMARTCARD_DMA_REQUEST_ENABLE
  3002. #define __SMARTCARD_DMA_REQUEST_DISABLE __HAL_SMARTCARD_DMA_REQUEST_DISABLE
  3003.  
  3004. #define __HAL_SMARTCARD_GETCLOCKSOURCE  SMARTCARD_GETCLOCKSOURCE
  3005. #define __SMARTCARD_GETCLOCKSOURCE      SMARTCARD_GETCLOCKSOURCE
  3006.  
  3007. #define IS_SMARTCARD_ONEBIT_SAMPLING    IS_SMARTCARD_ONE_BIT_SAMPLE                  
  3008.  
  3009. /**
  3010.   * @}
  3011.   */
  3012.  
  3013. /** @defgroup HAL_SMBUS_Aliased_Macros HAL SMBUS Aliased Macros maintained for legacy purpose
  3014.   * @{
  3015.   */
  3016. #define __HAL_SMBUS_RESET_CR1           SMBUS_RESET_CR1
  3017. #define __HAL_SMBUS_RESET_CR2           SMBUS_RESET_CR2
  3018. #define __HAL_SMBUS_GENERATE_START      SMBUS_GENERATE_START
  3019. #define __HAL_SMBUS_GET_ADDR_MATCH      SMBUS_GET_ADDR_MATCH
  3020. #define __HAL_SMBUS_GET_DIR             SMBUS_GET_DIR
  3021. #define __HAL_SMBUS_GET_STOP_MODE       SMBUS_GET_STOP_MODE
  3022. #define __HAL_SMBUS_GET_PEC_MODE        SMBUS_GET_PEC_MODE
  3023. #define __HAL_SMBUS_GET_ALERT_ENABLED   SMBUS_GET_ALERT_ENABLED
  3024. /**
  3025.   * @}
  3026.   */
  3027.  
  3028. /** @defgroup HAL_SPI_Aliased_Macros HAL SPI Aliased Macros maintained for legacy purpose
  3029.   * @{
  3030.   */
  3031.  
  3032. #define __HAL_SPI_1LINE_TX              SPI_1LINE_TX
  3033. #define __HAL_SPI_1LINE_RX              SPI_1LINE_RX
  3034. #define __HAL_SPI_RESET_CRC             SPI_RESET_CRC
  3035.  
  3036. /**
  3037.   * @}
  3038.   */
  3039.  
  3040. /** @defgroup HAL_UART_Aliased_Macros HAL UART Aliased Macros maintained for legacy purpose
  3041.   * @{
  3042.   */
  3043.  
  3044. #define __HAL_UART_GETCLOCKSOURCE       UART_GETCLOCKSOURCE
  3045. #define __HAL_UART_MASK_COMPUTATION     UART_MASK_COMPUTATION
  3046. #define __UART_GETCLOCKSOURCE           UART_GETCLOCKSOURCE
  3047. #define __UART_MASK_COMPUTATION         UART_MASK_COMPUTATION
  3048.  
  3049. #define IS_UART_WAKEUPMETHODE           IS_UART_WAKEUPMETHOD
  3050.  
  3051. #define IS_UART_ONEBIT_SAMPLE           IS_UART_ONE_BIT_SAMPLE                  
  3052. #define IS_UART_ONEBIT_SAMPLING         IS_UART_ONE_BIT_SAMPLE                  
  3053.  
  3054. /**
  3055.   * @}
  3056.   */
  3057.  
  3058.  
  3059. /** @defgroup HAL_USART_Aliased_Macros HAL USART Aliased Macros maintained for legacy purpose
  3060.   * @{
  3061.   */
  3062.  
  3063. #define __USART_ENABLE_IT               __HAL_USART_ENABLE_IT
  3064. #define __USART_DISABLE_IT              __HAL_USART_DISABLE_IT
  3065. #define __USART_ENABLE                  __HAL_USART_ENABLE
  3066. #define __USART_DISABLE                 __HAL_USART_DISABLE
  3067.  
  3068. #define __HAL_USART_GETCLOCKSOURCE      USART_GETCLOCKSOURCE
  3069. #define __USART_GETCLOCKSOURCE          USART_GETCLOCKSOURCE
  3070.  
  3071. /**
  3072.   * @}
  3073.   */
  3074.  
  3075. /** @defgroup HAL_USB_Aliased_Macros HAL USB Aliased Macros maintained for legacy purpose
  3076.   * @{
  3077.   */
  3078. #define USB_EXTI_LINE_WAKEUP                               USB_WAKEUP_EXTI_LINE
  3079.  
  3080. #define USB_FS_EXTI_TRIGGER_RISING_EDGE                    USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE
  3081. #define USB_FS_EXTI_TRIGGER_FALLING_EDGE                   USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE
  3082. #define USB_FS_EXTI_TRIGGER_BOTH_EDGE                      USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE
  3083. #define USB_FS_EXTI_LINE_WAKEUP                            USB_OTG_FS_WAKEUP_EXTI_LINE
  3084.  
  3085. #define USB_HS_EXTI_TRIGGER_RISING_EDGE                    USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE
  3086. #define USB_HS_EXTI_TRIGGER_FALLING_EDGE                   USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE
  3087. #define USB_HS_EXTI_TRIGGER_BOTH_EDGE                      USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE
  3088. #define USB_HS_EXTI_LINE_WAKEUP                            USB_OTG_HS_WAKEUP_EXTI_LINE
  3089.  
  3090. #define __HAL_USB_EXTI_ENABLE_IT                           __HAL_USB_WAKEUP_EXTI_ENABLE_IT
  3091. #define __HAL_USB_EXTI_DISABLE_IT                          __HAL_USB_WAKEUP_EXTI_DISABLE_IT
  3092. #define __HAL_USB_EXTI_GET_FLAG                            __HAL_USB_WAKEUP_EXTI_GET_FLAG
  3093. #define __HAL_USB_EXTI_CLEAR_FLAG                          __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG
  3094. #define __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER             __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE
  3095. #define __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER            __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE
  3096. #define __HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER           __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
  3097.  
  3098. #define __HAL_USB_FS_EXTI_ENABLE_IT                        __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT
  3099. #define __HAL_USB_FS_EXTI_DISABLE_IT                       __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT
  3100. #define __HAL_USB_FS_EXTI_GET_FLAG                         __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG
  3101. #define __HAL_USB_FS_EXTI_CLEAR_FLAG                       __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG
  3102. #define __HAL_USB_FS_EXTI_SET_RISING_EGDE_TRIGGER          __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE
  3103. #define __HAL_USB_FS_EXTI_SET_FALLING_EGDE_TRIGGER         __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
  3104. #define __HAL_USB_FS_EXTI_SET_FALLINGRISING_TRIGGER        __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
  3105. #define __HAL_USB_FS_EXTI_GENERATE_SWIT                    __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT
  3106.  
  3107. #define __HAL_USB_HS_EXTI_ENABLE_IT                        __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT
  3108. #define __HAL_USB_HS_EXTI_DISABLE_IT                       __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT
  3109. #define __HAL_USB_HS_EXTI_GET_FLAG                         __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG
  3110. #define __HAL_USB_HS_EXTI_CLEAR_FLAG                       __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG
  3111. #define __HAL_USB_HS_EXTI_SET_RISING_EGDE_TRIGGER          __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE
  3112. #define __HAL_USB_HS_EXTI_SET_FALLING_EGDE_TRIGGER         __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
  3113. #define __HAL_USB_HS_EXTI_SET_FALLINGRISING_TRIGGER        __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
  3114. #define __HAL_USB_HS_EXTI_GENERATE_SWIT                    __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT
  3115.  
  3116. #define HAL_PCD_ActiveRemoteWakeup                         HAL_PCD_ActivateRemoteWakeup
  3117. #define HAL_PCD_DeActiveRemoteWakeup                       HAL_PCD_DeActivateRemoteWakeup
  3118.  
  3119. #define HAL_PCD_SetTxFiFo                                  HAL_PCDEx_SetTxFiFo
  3120. #define HAL_PCD_SetRxFiFo                                  HAL_PCDEx_SetRxFiFo
  3121. /**
  3122.   * @}
  3123.   */
  3124.  
  3125. /** @defgroup HAL_TIM_Aliased_Macros HAL TIM Aliased Macros maintained for legacy purpose
  3126.   * @{
  3127.   */
  3128. #define __HAL_TIM_SetICPrescalerValue   TIM_SET_ICPRESCALERVALUE
  3129. #define __HAL_TIM_ResetICPrescalerValue TIM_RESET_ICPRESCALERVALUE
  3130.  
  3131. #define TIM_GET_ITSTATUS                __HAL_TIM_GET_IT_SOURCE
  3132. #define TIM_GET_CLEAR_IT                __HAL_TIM_CLEAR_IT
  3133.  
  3134. #define __HAL_TIM_GET_ITSTATUS          __HAL_TIM_GET_IT_SOURCE
  3135.  
  3136. #define __HAL_TIM_DIRECTION_STATUS      __HAL_TIM_IS_TIM_COUNTING_DOWN
  3137. #define __HAL_TIM_PRESCALER             __HAL_TIM_SET_PRESCALER
  3138. #define __HAL_TIM_SetCounter            __HAL_TIM_SET_COUNTER
  3139. #define __HAL_TIM_GetCounter            __HAL_TIM_GET_COUNTER
  3140. #define __HAL_TIM_SetAutoreload         __HAL_TIM_SET_AUTORELOAD
  3141. #define __HAL_TIM_GetAutoreload         __HAL_TIM_GET_AUTORELOAD
  3142. #define __HAL_TIM_SetClockDivision      __HAL_TIM_SET_CLOCKDIVISION
  3143. #define __HAL_TIM_GetClockDivision      __HAL_TIM_GET_CLOCKDIVISION
  3144. #define __HAL_TIM_SetICPrescaler        __HAL_TIM_SET_ICPRESCALER
  3145. #define __HAL_TIM_GetICPrescaler        __HAL_TIM_GET_ICPRESCALER
  3146. #define __HAL_TIM_SetCompare            __HAL_TIM_SET_COMPARE
  3147. #define __HAL_TIM_GetCompare            __HAL_TIM_GET_COMPARE
  3148.  
  3149. #define TIM_BREAKINPUTSOURCE_DFSDM  TIM_BREAKINPUTSOURCE_DFSDM1
  3150. /**
  3151.   * @}
  3152.   */
  3153.  
  3154. /** @defgroup HAL_ETH_Aliased_Macros HAL ETH Aliased Macros maintained for legacy purpose
  3155.   * @{
  3156.   */
  3157.  
  3158. #define __HAL_ETH_EXTI_ENABLE_IT                   __HAL_ETH_WAKEUP_EXTI_ENABLE_IT
  3159. #define __HAL_ETH_EXTI_DISABLE_IT                  __HAL_ETH_WAKEUP_EXTI_DISABLE_IT
  3160. #define __HAL_ETH_EXTI_GET_FLAG                    __HAL_ETH_WAKEUP_EXTI_GET_FLAG
  3161. #define __HAL_ETH_EXTI_CLEAR_FLAG                  __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG
  3162. #define __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER     __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER
  3163. #define __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER    __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER
  3164. #define __HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER   __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER
  3165.  
  3166. #define ETH_PROMISCIOUSMODE_ENABLE   ETH_PROMISCUOUS_MODE_ENABLE
  3167. #define ETH_PROMISCIOUSMODE_DISABLE  ETH_PROMISCUOUS_MODE_DISABLE
  3168. #define IS_ETH_PROMISCIOUS_MODE      IS_ETH_PROMISCUOUS_MODE
  3169. /**
  3170.   * @}
  3171.   */
  3172.  
  3173. /** @defgroup HAL_LTDC_Aliased_Macros HAL LTDC Aliased Macros maintained for legacy purpose
  3174.   * @{
  3175.   */
  3176. #define __HAL_LTDC_LAYER LTDC_LAYER
  3177. #define __HAL_LTDC_RELOAD_CONFIG  __HAL_LTDC_RELOAD_IMMEDIATE_CONFIG
  3178. /**
  3179.   * @}
  3180.   */
  3181.  
  3182. /** @defgroup HAL_SAI_Aliased_Macros HAL SAI Aliased Macros maintained for legacy purpose
  3183.   * @{
  3184.   */
  3185. #define SAI_OUTPUTDRIVE_DISABLED          SAI_OUTPUTDRIVE_DISABLE
  3186. #define SAI_OUTPUTDRIVE_ENABLED           SAI_OUTPUTDRIVE_ENABLE
  3187. #define SAI_MASTERDIVIDER_ENABLED         SAI_MASTERDIVIDER_ENABLE
  3188. #define SAI_MASTERDIVIDER_DISABLED        SAI_MASTERDIVIDER_DISABLE
  3189. #define SAI_STREOMODE                     SAI_STEREOMODE
  3190. #define SAI_FIFOStatus_Empty              SAI_FIFOSTATUS_EMPTY
  3191. #define SAI_FIFOStatus_Less1QuarterFull   SAI_FIFOSTATUS_LESS1QUARTERFULL
  3192. #define SAI_FIFOStatus_1QuarterFull       SAI_FIFOSTATUS_1QUARTERFULL
  3193. #define SAI_FIFOStatus_HalfFull           SAI_FIFOSTATUS_HALFFULL
  3194. #define SAI_FIFOStatus_3QuartersFull      SAI_FIFOSTATUS_3QUARTERFULL
  3195. #define SAI_FIFOStatus_Full               SAI_FIFOSTATUS_FULL
  3196. #define IS_SAI_BLOCK_MONO_STREO_MODE      IS_SAI_BLOCK_MONO_STEREO_MODE
  3197. #define SAI_SYNCHRONOUS_EXT               SAI_SYNCHRONOUS_EXT_SAI1
  3198. #define SAI_SYNCEXT_IN_ENABLE             SAI_SYNCEXT_OUTBLOCKA_ENABLE
  3199. /**
  3200.   * @}
  3201.   */
  3202.  
  3203.  
  3204. /** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
  3205.   * @{
  3206.   */
  3207.  
  3208. /**
  3209.   * @}
  3210.   */
  3211.  
  3212. #ifdef __cplusplus
  3213. }
  3214. #endif
  3215.  
  3216. #endif /* ___STM32_HAL_LEGACY */
  3217.  
  3218. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  3219.  
  3220.