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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32f0xx_hal_tim_ex.c
  4.   * @author  MCD Application Team
  5.   * @brief   TIM HAL module driver.
  6.   *          This file provides firmware functions to manage the following
  7.   *          functionalities of the Timer Extended peripheral:
  8.   *           + Time Hall Sensor Interface Initialization
  9.   *           + Time Hall Sensor Interface Start
  10.   *           + Time Complementary signal break and dead time configuration
  11.   *           + Time Master and Slave synchronization configuration
  12.   *           + Time OCRef clear configuration
  13.   *           + Timer remapping capabilities configuration
  14.   @verbatim
  15.   ==============================================================================
  16.                       ##### TIMER Extended features #####
  17.   ==============================================================================
  18.   [..]
  19.     The Timer Extended features include:
  20.     (#) Complementary outputs with programmable dead-time for :
  21.         (++) Output Compare
  22.         (++) PWM generation (Edge and Center-aligned Mode)
  23.         (++) One-pulse mode output
  24.     (#) Synchronization circuit to control the timer with external signals and to
  25.         interconnect several timers together.
  26.     (#) Break input to put the timer output signals in reset state or in a known state.
  27.     (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
  28.         positioning purposes
  29.  
  30.             ##### How to use this driver #####
  31.   ==============================================================================
  32.     [..]
  33.      (#) Initialize the TIM low level resources by implementing the following functions
  34.          depending on the selected feature:
  35.            (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
  36.  
  37.      (#) Initialize the TIM low level resources :
  38.         (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
  39.         (##) TIM pins configuration
  40.             (+++) Enable the clock for the TIM GPIOs using the following function:
  41.               __HAL_RCC_GPIOx_CLK_ENABLE();
  42.             (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
  43.  
  44.      (#) The external Clock can be configured, if needed (the default clock is the
  45.          internal clock from the APBx), using the following function:
  46.          HAL_TIM_ConfigClockSource, the clock configuration should be done before
  47.          any start function.
  48.  
  49.      (#) Configure the TIM in the desired functioning mode using one of the
  50.          initialization function of this driver:
  51.           (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the
  52.                Timer Hall Sensor Interface and the commutation event with the corresponding
  53.                Interrupt and DMA request if needed (Note that One Timer is used to interface
  54.                with the Hall sensor Interface and another Timer should be used to use
  55.                the commutation event).
  56.  
  57.      (#) Activate the TIM peripheral using one of the start functions:
  58.            (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(),
  59.                 HAL_TIMEx_OCN_Start_IT()
  60.            (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(),
  61.                 HAL_TIMEx_PWMN_Start_IT()
  62.            (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
  63.            (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(),
  64.                 HAL_TIMEx_HallSensor_Start_IT().
  65.  
  66.   @endverbatim
  67.   ******************************************************************************
  68.   * @attention
  69.   *
  70.   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  71.   * All rights reserved.</center></h2>
  72.   *
  73.   * This software component is licensed by ST under BSD 3-Clause license,
  74.   * the "License"; You may not use this file except in compliance with the
  75.   * License. You may obtain a copy of the License at:
  76.   *                        opensource.org/licenses/BSD-3-Clause
  77.   *
  78.   ******************************************************************************
  79.   */
  80.  
  81. /* Includes ------------------------------------------------------------------*/
  82. #include "stm32f0xx_hal.h"
  83.  
  84. /** @addtogroup STM32F0xx_HAL_Driver
  85.   * @{
  86.   */
  87.  
  88. /** @defgroup TIMEx TIMEx
  89.   * @brief TIM Extended HAL module driver
  90.   * @{
  91.   */
  92.  
  93. #ifdef HAL_TIM_MODULE_ENABLED
  94.  
  95. /* Private typedef -----------------------------------------------------------*/
  96. /* Private define ------------------------------------------------------------*/
  97. /* Private macros ------------------------------------------------------------*/
  98. /* Private variables ---------------------------------------------------------*/
  99. /* Private function prototypes -----------------------------------------------*/
  100. static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma);
  101. static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma);
  102. static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState);
  103.  
  104. /* Exported functions --------------------------------------------------------*/
  105. /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
  106.   * @{
  107.   */
  108.  
  109. /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
  110.   * @brief    Timer Hall Sensor functions
  111.   *
  112. @verbatim
  113.   ==============================================================================
  114.                       ##### Timer Hall Sensor functions #####
  115.   ==============================================================================
  116.   [..]
  117.     This section provides functions allowing to:
  118.     (+) Initialize and configure TIM HAL Sensor.
  119.     (+) De-initialize TIM HAL Sensor.
  120.     (+) Start the Hall Sensor Interface.
  121.     (+) Stop the Hall Sensor Interface.
  122.     (+) Start the Hall Sensor Interface and enable interrupts.
  123.     (+) Stop the Hall Sensor Interface and disable interrupts.
  124.     (+) Start the Hall Sensor Interface and enable DMA transfers.
  125.     (+) Stop the Hall Sensor Interface and disable DMA transfers.
  126.  
  127. @endverbatim
  128.   * @{
  129.   */
  130. /**
  131.   * @brief  Initializes the TIM Hall Sensor Interface and initialize the associated handle.
  132.   * @note   When the timer instance is initialized in Hall Sensor Interface mode,
  133.   *         timer channels 1 and channel 2 are reserved and cannot be used for
  134.   *         other purpose.
  135.   * @param  htim TIM Hall Sensor Interface handle
  136.   * @param  sConfig TIM Hall Sensor configuration structure
  137.   * @retval HAL status
  138.   */
  139. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig)
  140. {
  141.   TIM_OC_InitTypeDef OC_Config;
  142.  
  143.   /* Check the TIM handle allocation */
  144.   if (htim == NULL)
  145.   {
  146.     return HAL_ERROR;
  147.   }
  148.  
  149.   /* Check the parameters */
  150.   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  151.   assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
  152.   assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
  153.   assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
  154.   assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
  155.   assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
  156.   assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
  157.  
  158.   if (htim->State == HAL_TIM_STATE_RESET)
  159.   {
  160.     /* Allocate lock resource and initialize it */
  161.     htim->Lock = HAL_UNLOCKED;
  162.  
  163. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  164.     /* Reset interrupt callbacks to legacy week callbacks */
  165.     TIM_ResetCallback(htim);
  166.  
  167.     if (htim->HallSensor_MspInitCallback == NULL)
  168.     {
  169.       htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
  170.     }
  171.     /* Init the low level hardware : GPIO, CLOCK, NVIC */
  172.     htim->HallSensor_MspInitCallback(htim);
  173. #else
  174.     /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
  175.     HAL_TIMEx_HallSensor_MspInit(htim);
  176. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  177.   }
  178.  
  179.   /* Set the TIM state */
  180.   htim->State = HAL_TIM_STATE_BUSY;
  181.  
  182.   /* Configure the Time base in the Encoder Mode */
  183.   TIM_Base_SetConfig(htim->Instance, &htim->Init);
  184.  
  185.   /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the  Hall sensor */
  186.   TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
  187.  
  188.   /* Reset the IC1PSC Bits */
  189.   htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
  190.   /* Set the IC1PSC value */
  191.   htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
  192.  
  193.   /* Enable the Hall sensor interface (XOR function of the three inputs) */
  194.   htim->Instance->CR2 |= TIM_CR2_TI1S;
  195.  
  196.   /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
  197.   htim->Instance->SMCR &= ~TIM_SMCR_TS;
  198.   htim->Instance->SMCR |= TIM_TS_TI1F_ED;
  199.  
  200.   /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
  201.   htim->Instance->SMCR &= ~TIM_SMCR_SMS;
  202.   htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
  203.  
  204.   /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
  205.   OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
  206.   OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
  207.   OC_Config.OCMode = TIM_OCMODE_PWM2;
  208.   OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
  209.   OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
  210.   OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
  211.   OC_Config.Pulse = sConfig->Commutation_Delay;
  212.  
  213.   TIM_OC2_SetConfig(htim->Instance, &OC_Config);
  214.  
  215.   /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
  216.     register to 101 */
  217.   htim->Instance->CR2 &= ~TIM_CR2_MMS;
  218.   htim->Instance->CR2 |= TIM_TRGO_OC2REF;
  219.  
  220.   /* Initialize the DMA burst operation state */
  221.   htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
  222.  
  223.   /* Initialize the TIM channels state */
  224.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  225.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  226.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  227.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  228.  
  229.   /* Initialize the TIM state*/
  230.   htim->State = HAL_TIM_STATE_READY;
  231.  
  232.   return HAL_OK;
  233. }
  234.  
  235. /**
  236.   * @brief  DeInitializes the TIM Hall Sensor interface
  237.   * @param  htim TIM Hall Sensor Interface handle
  238.   * @retval HAL status
  239.   */
  240. HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
  241. {
  242.   /* Check the parameters */
  243.   assert_param(IS_TIM_INSTANCE(htim->Instance));
  244.  
  245.   htim->State = HAL_TIM_STATE_BUSY;
  246.  
  247.   /* Disable the TIM Peripheral Clock */
  248.   __HAL_TIM_DISABLE(htim);
  249.  
  250. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  251.   if (htim->HallSensor_MspDeInitCallback == NULL)
  252.   {
  253.     htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
  254.   }
  255.   /* DeInit the low level hardware */
  256.   htim->HallSensor_MspDeInitCallback(htim);
  257. #else
  258.   /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  259.   HAL_TIMEx_HallSensor_MspDeInit(htim);
  260. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  261.  
  262.   /* Change the DMA burst operation state */
  263.   htim->DMABurstState = HAL_DMA_BURST_STATE_RESET;
  264.  
  265.   /* Change the TIM channels state */
  266.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
  267.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
  268.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
  269.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
  270.  
  271.   /* Change TIM state */
  272.   htim->State = HAL_TIM_STATE_RESET;
  273.  
  274.   /* Release Lock */
  275.   __HAL_UNLOCK(htim);
  276.  
  277.   return HAL_OK;
  278. }
  279.  
  280. /**
  281.   * @brief  Initializes the TIM Hall Sensor MSP.
  282.   * @param  htim TIM Hall Sensor Interface handle
  283.   * @retval None
  284.   */
  285. __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
  286. {
  287.   /* Prevent unused argument(s) compilation warning */
  288.   UNUSED(htim);
  289.  
  290.   /* NOTE : This function should not be modified, when the callback is needed,
  291.             the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
  292.    */
  293. }
  294.  
  295. /**
  296.   * @brief  DeInitializes TIM Hall Sensor MSP.
  297.   * @param  htim TIM Hall Sensor Interface handle
  298.   * @retval None
  299.   */
  300. __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
  301. {
  302.   /* Prevent unused argument(s) compilation warning */
  303.   UNUSED(htim);
  304.  
  305.   /* NOTE : This function should not be modified, when the callback is needed,
  306.             the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
  307.    */
  308. }
  309.  
  310. /**
  311.   * @brief  Starts the TIM Hall Sensor Interface.
  312.   * @param  htim TIM Hall Sensor Interface handle
  313.   * @retval HAL status
  314.   */
  315. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
  316. {
  317.   uint32_t tmpsmcr;
  318.   HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  319.   HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
  320.   HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  321.   HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
  322.  
  323.   /* Check the parameters */
  324.   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  325.  
  326.   /* Check the TIM channels state */
  327.   if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  328.       || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
  329.       || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  330.       || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
  331.   {
  332.     return HAL_ERROR;
  333.   }
  334.  
  335.   /* Set the TIM channels state */
  336.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  337.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  338.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  339.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  340.  
  341.   /* Enable the Input Capture channel 1
  342.   (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
  343.   TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  344.   TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  345.  
  346.   /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  347.   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  348.   {
  349.     tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  350.     if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  351.     {
  352.       __HAL_TIM_ENABLE(htim);
  353.     }
  354.   }
  355.   else
  356.   {
  357.     __HAL_TIM_ENABLE(htim);
  358.   }
  359.  
  360.   /* Return function status */
  361.   return HAL_OK;
  362. }
  363.  
  364. /**
  365.   * @brief  Stops the TIM Hall sensor Interface.
  366.   * @param  htim TIM Hall Sensor Interface handle
  367.   * @retval HAL status
  368.   */
  369. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
  370. {
  371.   /* Check the parameters */
  372.   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  373.  
  374.   /* Disable the Input Capture channels 1, 2 and 3
  375.   (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
  376.   TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  377.   TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  378.  
  379.   /* Disable the Peripheral */
  380.   __HAL_TIM_DISABLE(htim);
  381.  
  382.   /* Set the TIM channels state */
  383.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  384.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  385.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  386.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  387.  
  388.   /* Return function status */
  389.   return HAL_OK;
  390. }
  391.  
  392. /**
  393.   * @brief  Starts the TIM Hall Sensor Interface in interrupt mode.
  394.   * @param  htim TIM Hall Sensor Interface handle
  395.   * @retval HAL status
  396.   */
  397. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
  398. {
  399.   uint32_t tmpsmcr;
  400.   HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  401.   HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
  402.   HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  403.   HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
  404.  
  405.   /* Check the parameters */
  406.   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  407.  
  408.   /* Check the TIM channels state */
  409.   if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  410.       || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
  411.       || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  412.       || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
  413.   {
  414.     return HAL_ERROR;
  415.   }
  416.  
  417.   /* Set the TIM channels state */
  418.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  419.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  420.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  421.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  422.  
  423.   /* Enable the capture compare Interrupts 1 event */
  424.   __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  425.  
  426.   /* Enable the Input Capture channel 1
  427.   (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
  428.   TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  429.   TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  430.  
  431.   /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  432.   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  433.   {
  434.     tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  435.     if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  436.     {
  437.       __HAL_TIM_ENABLE(htim);
  438.     }
  439.   }
  440.   else
  441.   {
  442.     __HAL_TIM_ENABLE(htim);
  443.   }
  444.  
  445.   /* Return function status */
  446.   return HAL_OK;
  447. }
  448.  
  449. /**
  450.   * @brief  Stops the TIM Hall Sensor Interface in interrupt mode.
  451.   * @param  htim TIM Hall Sensor Interface handle
  452.   * @retval HAL status
  453.   */
  454. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
  455. {
  456.   /* Check the parameters */
  457.   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  458.  
  459.   /* Disable the Input Capture channel 1
  460.   (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
  461.   TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  462.   TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  463.  
  464.   /* Disable the capture compare Interrupts event */
  465.   __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  466.  
  467.   /* Disable the Peripheral */
  468.   __HAL_TIM_DISABLE(htim);
  469.  
  470.   /* Set the TIM channels state */
  471.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  472.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  473.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  474.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  475.  
  476.   /* Return function status */
  477.   return HAL_OK;
  478. }
  479.  
  480. /**
  481.   * @brief  Starts the TIM Hall Sensor Interface in DMA mode.
  482.   * @param  htim TIM Hall Sensor Interface handle
  483.   * @param  pData The destination Buffer address.
  484.   * @param  Length The length of data to be transferred from TIM peripheral to memory.
  485.   * @retval HAL status
  486.   */
  487. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
  488. {
  489.   uint32_t tmpsmcr;
  490.   HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  491.   HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  492.  
  493.   /* Check the parameters */
  494.   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  495.  
  496.   /* Set the TIM channel state */
  497.   if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)
  498.       || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY))
  499.   {
  500.     return HAL_BUSY;
  501.   }
  502.   else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
  503.            && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
  504.   {
  505.     if ((pData == NULL) && (Length > 0U))
  506.     {
  507.       return HAL_ERROR;
  508.     }
  509.     else
  510.     {
  511.       TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  512.       TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  513.     }
  514.   }
  515.   else
  516.   {
  517.     return HAL_ERROR;
  518.   }
  519.  
  520.   /* Enable the Input Capture channel 1
  521.   (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
  522.   TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  523.   TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  524.  
  525.   /* Set the DMA Input Capture 1 Callbacks */
  526.   htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
  527.   htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
  528.   /* Set the DMA error callback */
  529.   htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
  530.  
  531.   /* Enable the DMA channel for Capture 1*/
  532.   if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK)
  533.   {
  534.     /* Return error status */
  535.     return HAL_ERROR;
  536.   }
  537.   /* Enable the capture compare 1 Interrupt */
  538.   __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  539.  
  540.   /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  541.   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  542.   {
  543.     tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  544.     if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  545.     {
  546.       __HAL_TIM_ENABLE(htim);
  547.     }
  548.   }
  549.   else
  550.   {
  551.     __HAL_TIM_ENABLE(htim);
  552.   }
  553.  
  554.   /* Return function status */
  555.   return HAL_OK;
  556. }
  557.  
  558. /**
  559.   * @brief  Stops the TIM Hall Sensor Interface in DMA mode.
  560.   * @param  htim TIM Hall Sensor Interface handle
  561.   * @retval HAL status
  562.   */
  563. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
  564. {
  565.   /* Check the parameters */
  566.   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  567.  
  568.   /* Disable the Input Capture channel 1
  569.   (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
  570.   TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  571.   TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  572.  
  573.  
  574.   /* Disable the capture compare Interrupts 1 event */
  575.   __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  576.  
  577.   (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
  578.  
  579.   /* Disable the Peripheral */
  580.   __HAL_TIM_DISABLE(htim);
  581.  
  582.   /* Set the TIM channel state */
  583.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  584.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  585.  
  586.   /* Return function status */
  587.   return HAL_OK;
  588. }
  589.  
  590. /**
  591.   * @}
  592.   */
  593.  
  594. /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
  595.   *  @brief   Timer Complementary Output Compare functions
  596.   *
  597. @verbatim
  598.   ==============================================================================
  599.               ##### Timer Complementary Output Compare functions #####
  600.   ==============================================================================
  601.   [..]
  602.     This section provides functions allowing to:
  603.     (+) Start the Complementary Output Compare/PWM.
  604.     (+) Stop the Complementary Output Compare/PWM.
  605.     (+) Start the Complementary Output Compare/PWM and enable interrupts.
  606.     (+) Stop the Complementary Output Compare/PWM and disable interrupts.
  607.     (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
  608.     (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
  609.  
  610. @endverbatim
  611.   * @{
  612.   */
  613.  
  614. /**
  615.   * @brief  Starts the TIM Output Compare signal generation on the complementary
  616.   *         output.
  617.   * @param  htim TIM Output Compare handle
  618.   * @param  Channel TIM Channel to be enabled
  619.   *          This parameter can be one of the following values:
  620.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  621.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  622.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  623.   * @retval HAL status
  624.   */
  625. HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
  626. {
  627.   uint32_t tmpsmcr;
  628.  
  629.   /* Check the parameters */
  630.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  631.  
  632.   /* Check the TIM complementary channel state */
  633.   if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  634.   {
  635.     return HAL_ERROR;
  636.   }
  637.  
  638.   /* Set the TIM complementary channel state */
  639.   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  640.  
  641.   /* Enable the Capture compare channel N */
  642.   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  643.  
  644.   /* Enable the Main Output */
  645.   __HAL_TIM_MOE_ENABLE(htim);
  646.  
  647.   /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  648.   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  649.   {
  650.     tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  651.     if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  652.     {
  653.       __HAL_TIM_ENABLE(htim);
  654.     }
  655.   }
  656.   else
  657.   {
  658.     __HAL_TIM_ENABLE(htim);
  659.   }
  660.  
  661.   /* Return function status */
  662.   return HAL_OK;
  663. }
  664.  
  665. /**
  666.   * @brief  Stops the TIM Output Compare signal generation on the complementary
  667.   *         output.
  668.   * @param  htim TIM handle
  669.   * @param  Channel TIM Channel to be disabled
  670.   *          This parameter can be one of the following values:
  671.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  672.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  673.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  674.   * @retval HAL status
  675.   */
  676. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
  677. {
  678.   /* Check the parameters */
  679.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  680.  
  681.   /* Disable the Capture compare channel N */
  682.   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  683.  
  684.   /* Disable the Main Output */
  685.   __HAL_TIM_MOE_DISABLE(htim);
  686.  
  687.   /* Disable the Peripheral */
  688.   __HAL_TIM_DISABLE(htim);
  689.  
  690.   /* Set the TIM complementary channel state */
  691.   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  692.  
  693.   /* Return function status */
  694.   return HAL_OK;
  695. }
  696.  
  697. /**
  698.   * @brief  Starts the TIM Output Compare signal generation in interrupt mode
  699.   *         on the complementary output.
  700.   * @param  htim TIM OC handle
  701.   * @param  Channel TIM Channel to be enabled
  702.   *          This parameter can be one of the following values:
  703.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  704.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  705.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  706.   * @retval HAL status
  707.   */
  708. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  709. {
  710.   HAL_StatusTypeDef status = HAL_OK;
  711.   uint32_t tmpsmcr;
  712.  
  713.   /* Check the parameters */
  714.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  715.  
  716.   /* Check the TIM complementary channel state */
  717.   if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  718.   {
  719.     return HAL_ERROR;
  720.   }
  721.  
  722.   /* Set the TIM complementary channel state */
  723.   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  724.  
  725.   switch (Channel)
  726.   {
  727.     case TIM_CHANNEL_1:
  728.     {
  729.       /* Enable the TIM Output Compare interrupt */
  730.       __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  731.       break;
  732.     }
  733.  
  734.     case TIM_CHANNEL_2:
  735.     {
  736.       /* Enable the TIM Output Compare interrupt */
  737.       __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  738.       break;
  739.     }
  740.  
  741.     case TIM_CHANNEL_3:
  742.     {
  743.       /* Enable the TIM Output Compare interrupt */
  744.       __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
  745.       break;
  746.     }
  747.  
  748.  
  749.     default:
  750.       status = HAL_ERROR;
  751.       break;
  752.   }
  753.  
  754.   if (status == HAL_OK)
  755.   {
  756.     /* Enable the TIM Break interrupt */
  757.     __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
  758.  
  759.     /* Enable the Capture compare channel N */
  760.     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  761.  
  762.     /* Enable the Main Output */
  763.     __HAL_TIM_MOE_ENABLE(htim);
  764.  
  765.     /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  766.     if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  767.     {
  768.       tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  769.       if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  770.       {
  771.         __HAL_TIM_ENABLE(htim);
  772.       }
  773.     }
  774.     else
  775.     {
  776.       __HAL_TIM_ENABLE(htim);
  777.     }
  778.   }
  779.  
  780.   /* Return function status */
  781.   return status;
  782. }
  783.  
  784. /**
  785.   * @brief  Stops the TIM Output Compare signal generation in interrupt mode
  786.   *         on the complementary output.
  787.   * @param  htim TIM Output Compare handle
  788.   * @param  Channel TIM Channel to be disabled
  789.   *          This parameter can be one of the following values:
  790.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  791.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  792.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  793.   * @retval HAL status
  794.   */
  795. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  796. {
  797.   HAL_StatusTypeDef status = HAL_OK;
  798.   uint32_t tmpccer;
  799.  
  800.   /* Check the parameters */
  801.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  802.  
  803.   switch (Channel)
  804.   {
  805.     case TIM_CHANNEL_1:
  806.     {
  807.       /* Disable the TIM Output Compare interrupt */
  808.       __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  809.       break;
  810.     }
  811.  
  812.     case TIM_CHANNEL_2:
  813.     {
  814.       /* Disable the TIM Output Compare interrupt */
  815.       __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  816.       break;
  817.     }
  818.  
  819.     case TIM_CHANNEL_3:
  820.     {
  821.       /* Disable the TIM Output Compare interrupt */
  822.       __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
  823.       break;
  824.     }
  825.  
  826.     default:
  827.       status = HAL_ERROR;
  828.       break;
  829.   }
  830.  
  831.   if (status == HAL_OK)
  832.   {
  833.     /* Disable the Capture compare channel N */
  834.     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  835.  
  836.     /* Disable the TIM Break interrupt (only if no more channel is active) */
  837.     tmpccer = htim->Instance->CCER;
  838.     if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
  839.     {
  840.       __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
  841.     }
  842.  
  843.     /* Disable the Main Output */
  844.     __HAL_TIM_MOE_DISABLE(htim);
  845.  
  846.     /* Disable the Peripheral */
  847.     __HAL_TIM_DISABLE(htim);
  848.  
  849.     /* Set the TIM complementary channel state */
  850.     TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  851.   }
  852.  
  853.   /* Return function status */
  854.   return status;
  855. }
  856.  
  857. /**
  858.   * @brief  Starts the TIM Output Compare signal generation in DMA mode
  859.   *         on the complementary output.
  860.   * @param  htim TIM Output Compare handle
  861.   * @param  Channel TIM Channel to be enabled
  862.   *          This parameter can be one of the following values:
  863.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  864.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  865.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  866.   * @param  pData The source Buffer address.
  867.   * @param  Length The length of data to be transferred from memory to TIM peripheral
  868.   * @retval HAL status
  869.   */
  870. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
  871. {
  872.   HAL_StatusTypeDef status = HAL_OK;
  873.   uint32_t tmpsmcr;
  874.  
  875.   /* Check the parameters */
  876.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  877.  
  878.   /* Set the TIM complementary channel state */
  879.   if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
  880.   {
  881.     return HAL_BUSY;
  882.   }
  883.   else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
  884.   {
  885.     if ((pData == NULL) && (Length > 0U))
  886.     {
  887.       return HAL_ERROR;
  888.     }
  889.     else
  890.     {
  891.       TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  892.     }
  893.   }
  894.   else
  895.   {
  896.     return HAL_ERROR;
  897.   }
  898.  
  899.   switch (Channel)
  900.   {
  901.     case TIM_CHANNEL_1:
  902.     {
  903.       /* Set the DMA compare callbacks */
  904.       htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  905.       htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  906.  
  907.       /* Set the DMA error callback */
  908.       htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
  909.  
  910.       /* Enable the DMA channel */
  911.       if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
  912.                            Length) != HAL_OK)
  913.       {
  914.         /* Return error status */
  915.         return HAL_ERROR;
  916.       }
  917.       /* Enable the TIM Output Compare DMA request */
  918.       __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  919.       break;
  920.     }
  921.  
  922.     case TIM_CHANNEL_2:
  923.     {
  924.       /* Set the DMA compare callbacks */
  925.       htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  926.       htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  927.  
  928.       /* Set the DMA error callback */
  929.       htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
  930.  
  931.       /* Enable the DMA channel */
  932.       if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
  933.                            Length) != HAL_OK)
  934.       {
  935.         /* Return error status */
  936.         return HAL_ERROR;
  937.       }
  938.       /* Enable the TIM Output Compare DMA request */
  939.       __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
  940.       break;
  941.     }
  942.  
  943.     case TIM_CHANNEL_3:
  944.     {
  945.       /* Set the DMA compare callbacks */
  946.       htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  947.       htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  948.  
  949.       /* Set the DMA error callback */
  950.       htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
  951.  
  952.       /* Enable the DMA channel */
  953.       if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
  954.                            Length) != HAL_OK)
  955.       {
  956.         /* Return error status */
  957.         return HAL_ERROR;
  958.       }
  959.       /* Enable the TIM Output Compare DMA request */
  960.       __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
  961.       break;
  962.     }
  963.  
  964.     default:
  965.       status = HAL_ERROR;
  966.       break;
  967.   }
  968.  
  969.   if (status == HAL_OK)
  970.   {
  971.     /* Enable the Capture compare channel N */
  972.     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  973.  
  974.     /* Enable the Main Output */
  975.     __HAL_TIM_MOE_ENABLE(htim);
  976.  
  977.     /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  978.     if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  979.     {
  980.       tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  981.       if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  982.       {
  983.         __HAL_TIM_ENABLE(htim);
  984.       }
  985.     }
  986.     else
  987.     {
  988.       __HAL_TIM_ENABLE(htim);
  989.     }
  990.   }
  991.  
  992.   /* Return function status */
  993.   return status;
  994. }
  995.  
  996. /**
  997.   * @brief  Stops the TIM Output Compare signal generation in DMA mode
  998.   *         on the complementary output.
  999.   * @param  htim TIM Output Compare handle
  1000.   * @param  Channel TIM Channel to be disabled
  1001.   *          This parameter can be one of the following values:
  1002.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1003.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1004.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1005.   * @retval HAL status
  1006.   */
  1007. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
  1008. {
  1009.   HAL_StatusTypeDef status = HAL_OK;
  1010.  
  1011.   /* Check the parameters */
  1012.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1013.  
  1014.   switch (Channel)
  1015.   {
  1016.     case TIM_CHANNEL_1:
  1017.     {
  1018.       /* Disable the TIM Output Compare DMA request */
  1019.       __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  1020.       (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
  1021.       break;
  1022.     }
  1023.  
  1024.     case TIM_CHANNEL_2:
  1025.     {
  1026.       /* Disable the TIM Output Compare DMA request */
  1027.       __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
  1028.       (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
  1029.       break;
  1030.     }
  1031.  
  1032.     case TIM_CHANNEL_3:
  1033.     {
  1034.       /* Disable the TIM Output Compare DMA request */
  1035.       __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
  1036.       (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
  1037.       break;
  1038.     }
  1039.  
  1040.     default:
  1041.       status = HAL_ERROR;
  1042.       break;
  1043.   }
  1044.  
  1045.   if (status == HAL_OK)
  1046.   {
  1047.     /* Disable the Capture compare channel N */
  1048.     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  1049.  
  1050.     /* Disable the Main Output */
  1051.     __HAL_TIM_MOE_DISABLE(htim);
  1052.  
  1053.     /* Disable the Peripheral */
  1054.     __HAL_TIM_DISABLE(htim);
  1055.  
  1056.     /* Set the TIM complementary channel state */
  1057.     TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  1058.   }
  1059.  
  1060.   /* Return function status */
  1061.   return status;
  1062. }
  1063.  
  1064. /**
  1065.   * @}
  1066.   */
  1067.  
  1068. /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
  1069.   * @brief    Timer Complementary PWM functions
  1070.   *
  1071. @verbatim
  1072.   ==============================================================================
  1073.                  ##### Timer Complementary PWM functions #####
  1074.   ==============================================================================
  1075.   [..]
  1076.     This section provides functions allowing to:
  1077.     (+) Start the Complementary PWM.
  1078.     (+) Stop the Complementary PWM.
  1079.     (+) Start the Complementary PWM and enable interrupts.
  1080.     (+) Stop the Complementary PWM and disable interrupts.
  1081.     (+) Start the Complementary PWM and enable DMA transfers.
  1082.     (+) Stop the Complementary PWM and disable DMA transfers.
  1083.     (+) Start the Complementary Input Capture measurement.
  1084.     (+) Stop the Complementary Input Capture.
  1085.     (+) Start the Complementary Input Capture and enable interrupts.
  1086.     (+) Stop the Complementary Input Capture and disable interrupts.
  1087.     (+) Start the Complementary Input Capture and enable DMA transfers.
  1088.     (+) Stop the Complementary Input Capture and disable DMA transfers.
  1089.     (+) Start the Complementary One Pulse generation.
  1090.     (+) Stop the Complementary One Pulse.
  1091.     (+) Start the Complementary One Pulse and enable interrupts.
  1092.     (+) Stop the Complementary One Pulse and disable interrupts.
  1093.  
  1094. @endverbatim
  1095.   * @{
  1096.   */
  1097.  
  1098. /**
  1099.   * @brief  Starts the PWM signal generation on the complementary output.
  1100.   * @param  htim TIM handle
  1101.   * @param  Channel TIM Channel to be enabled
  1102.   *          This parameter can be one of the following values:
  1103.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1104.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1105.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1106.   * @retval HAL status
  1107.   */
  1108. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
  1109. {
  1110.   uint32_t tmpsmcr;
  1111.  
  1112.   /* Check the parameters */
  1113.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1114.  
  1115.   /* Check the TIM complementary channel state */
  1116.   if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  1117.   {
  1118.     return HAL_ERROR;
  1119.   }
  1120.  
  1121.   /* Set the TIM complementary channel state */
  1122.   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  1123.  
  1124.   /* Enable the complementary PWM output  */
  1125.   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  1126.  
  1127.   /* Enable the Main Output */
  1128.   __HAL_TIM_MOE_ENABLE(htim);
  1129.  
  1130.   /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  1131.   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  1132.   {
  1133.     tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  1134.     if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  1135.     {
  1136.       __HAL_TIM_ENABLE(htim);
  1137.     }
  1138.   }
  1139.   else
  1140.   {
  1141.     __HAL_TIM_ENABLE(htim);
  1142.   }
  1143.  
  1144.   /* Return function status */
  1145.   return HAL_OK;
  1146. }
  1147.  
  1148. /**
  1149.   * @brief  Stops the PWM signal generation on the complementary output.
  1150.   * @param  htim TIM handle
  1151.   * @param  Channel TIM Channel to be disabled
  1152.   *          This parameter can be one of the following values:
  1153.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1154.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1155.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1156.   * @retval HAL status
  1157.   */
  1158. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
  1159. {
  1160.   /* Check the parameters */
  1161.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1162.  
  1163.   /* Disable the complementary PWM output  */
  1164.   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  1165.  
  1166.   /* Disable the Main Output */
  1167.   __HAL_TIM_MOE_DISABLE(htim);
  1168.  
  1169.   /* Disable the Peripheral */
  1170.   __HAL_TIM_DISABLE(htim);
  1171.  
  1172.   /* Set the TIM complementary channel state */
  1173.   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  1174.  
  1175.   /* Return function status */
  1176.   return HAL_OK;
  1177. }
  1178.  
  1179. /**
  1180.   * @brief  Starts the PWM signal generation in interrupt mode on the
  1181.   *         complementary output.
  1182.   * @param  htim TIM handle
  1183.   * @param  Channel TIM Channel to be disabled
  1184.   *          This parameter can be one of the following values:
  1185.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1186.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1187.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1188.   * @retval HAL status
  1189.   */
  1190. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  1191. {
  1192.   HAL_StatusTypeDef status = HAL_OK;
  1193.   uint32_t tmpsmcr;
  1194.  
  1195.   /* Check the parameters */
  1196.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1197.  
  1198.   /* Check the TIM complementary channel state */
  1199.   if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  1200.   {
  1201.     return HAL_ERROR;
  1202.   }
  1203.  
  1204.   /* Set the TIM complementary channel state */
  1205.   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  1206.  
  1207.   switch (Channel)
  1208.   {
  1209.     case TIM_CHANNEL_1:
  1210.     {
  1211.       /* Enable the TIM Capture/Compare 1 interrupt */
  1212.       __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  1213.       break;
  1214.     }
  1215.  
  1216.     case TIM_CHANNEL_2:
  1217.     {
  1218.       /* Enable the TIM Capture/Compare 2 interrupt */
  1219.       __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  1220.       break;
  1221.     }
  1222.  
  1223.     case TIM_CHANNEL_3:
  1224.     {
  1225.       /* Enable the TIM Capture/Compare 3 interrupt */
  1226.       __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
  1227.       break;
  1228.     }
  1229.  
  1230.     default:
  1231.       status = HAL_ERROR;
  1232.       break;
  1233.   }
  1234.  
  1235.   if (status == HAL_OK)
  1236.   {
  1237.     /* Enable the TIM Break interrupt */
  1238.     __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
  1239.  
  1240.     /* Enable the complementary PWM output  */
  1241.     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  1242.  
  1243.     /* Enable the Main Output */
  1244.     __HAL_TIM_MOE_ENABLE(htim);
  1245.  
  1246.     /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  1247.     if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  1248.     {
  1249.       tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  1250.       if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  1251.       {
  1252.         __HAL_TIM_ENABLE(htim);
  1253.       }
  1254.     }
  1255.     else
  1256.     {
  1257.       __HAL_TIM_ENABLE(htim);
  1258.     }
  1259.   }
  1260.  
  1261.   /* Return function status */
  1262.   return status;
  1263. }
  1264.  
  1265. /**
  1266.   * @brief  Stops the PWM signal generation in interrupt mode on the
  1267.   *         complementary output.
  1268.   * @param  htim TIM handle
  1269.   * @param  Channel TIM Channel to be disabled
  1270.   *          This parameter can be one of the following values:
  1271.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1272.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1273.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1274.   * @retval HAL status
  1275.   */
  1276. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  1277. {
  1278.   HAL_StatusTypeDef status = HAL_OK;
  1279.   uint32_t tmpccer;
  1280.  
  1281.   /* Check the parameters */
  1282.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1283.  
  1284.   switch (Channel)
  1285.   {
  1286.     case TIM_CHANNEL_1:
  1287.     {
  1288.       /* Disable the TIM Capture/Compare 1 interrupt */
  1289.       __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  1290.       break;
  1291.     }
  1292.  
  1293.     case TIM_CHANNEL_2:
  1294.     {
  1295.       /* Disable the TIM Capture/Compare 2 interrupt */
  1296.       __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  1297.       break;
  1298.     }
  1299.  
  1300.     case TIM_CHANNEL_3:
  1301.     {
  1302.       /* Disable the TIM Capture/Compare 3 interrupt */
  1303.       __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
  1304.       break;
  1305.     }
  1306.  
  1307.     default:
  1308.       status = HAL_ERROR;
  1309.       break;
  1310.   }
  1311.  
  1312.   if (status == HAL_OK)
  1313.   {
  1314.     /* Disable the complementary PWM output  */
  1315.     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  1316.  
  1317.     /* Disable the TIM Break interrupt (only if no more channel is active) */
  1318.     tmpccer = htim->Instance->CCER;
  1319.     if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
  1320.     {
  1321.       __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
  1322.     }
  1323.  
  1324.     /* Disable the Main Output */
  1325.     __HAL_TIM_MOE_DISABLE(htim);
  1326.  
  1327.     /* Disable the Peripheral */
  1328.     __HAL_TIM_DISABLE(htim);
  1329.  
  1330.     /* Set the TIM complementary channel state */
  1331.     TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  1332.   }
  1333.  
  1334.   /* Return function status */
  1335.   return status;
  1336. }
  1337.  
  1338. /**
  1339.   * @brief  Starts the TIM PWM signal generation in DMA mode on the
  1340.   *         complementary output
  1341.   * @param  htim TIM handle
  1342.   * @param  Channel TIM Channel to be enabled
  1343.   *          This parameter can be one of the following values:
  1344.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1345.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1346.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1347.   * @param  pData The source Buffer address.
  1348.   * @param  Length The length of data to be transferred from memory to TIM peripheral
  1349.   * @retval HAL status
  1350.   */
  1351. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
  1352. {
  1353.   HAL_StatusTypeDef status = HAL_OK;
  1354.   uint32_t tmpsmcr;
  1355.  
  1356.   /* Check the parameters */
  1357.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1358.  
  1359.   /* Set the TIM complementary channel state */
  1360.   if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
  1361.   {
  1362.     return HAL_BUSY;
  1363.   }
  1364.   else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
  1365.   {
  1366.     if ((pData == NULL) && (Length > 0U))
  1367.     {
  1368.       return HAL_ERROR;
  1369.     }
  1370.     else
  1371.     {
  1372.       TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  1373.     }
  1374.   }
  1375.   else
  1376.   {
  1377.     return HAL_ERROR;
  1378.   }
  1379.  
  1380.   switch (Channel)
  1381.   {
  1382.     case TIM_CHANNEL_1:
  1383.     {
  1384.       /* Set the DMA compare callbacks */
  1385.       htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  1386.       htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  1387.  
  1388.       /* Set the DMA error callback */
  1389.       htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
  1390.  
  1391.       /* Enable the DMA channel */
  1392.       if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
  1393.                            Length) != HAL_OK)
  1394.       {
  1395.         /* Return error status */
  1396.         return HAL_ERROR;
  1397.       }
  1398.       /* Enable the TIM Capture/Compare 1 DMA request */
  1399.       __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  1400.       break;
  1401.     }
  1402.  
  1403.     case TIM_CHANNEL_2:
  1404.     {
  1405.       /* Set the DMA compare callbacks */
  1406.       htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  1407.       htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  1408.  
  1409.       /* Set the DMA error callback */
  1410.       htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
  1411.  
  1412.       /* Enable the DMA channel */
  1413.       if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
  1414.                            Length) != HAL_OK)
  1415.       {
  1416.         /* Return error status */
  1417.         return HAL_ERROR;
  1418.       }
  1419.       /* Enable the TIM Capture/Compare 2 DMA request */
  1420.       __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
  1421.       break;
  1422.     }
  1423.  
  1424.     case TIM_CHANNEL_3:
  1425.     {
  1426.       /* Set the DMA compare callbacks */
  1427.       htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  1428.       htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  1429.  
  1430.       /* Set the DMA error callback */
  1431.       htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
  1432.  
  1433.       /* Enable the DMA channel */
  1434.       if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
  1435.                            Length) != HAL_OK)
  1436.       {
  1437.         /* Return error status */
  1438.         return HAL_ERROR;
  1439.       }
  1440.       /* Enable the TIM Capture/Compare 3 DMA request */
  1441.       __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
  1442.       break;
  1443.     }
  1444.  
  1445.     default:
  1446.       status = HAL_ERROR;
  1447.       break;
  1448.   }
  1449.  
  1450.   if (status == HAL_OK)
  1451.   {
  1452.     /* Enable the complementary PWM output  */
  1453.     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  1454.  
  1455.     /* Enable the Main Output */
  1456.     __HAL_TIM_MOE_ENABLE(htim);
  1457.  
  1458.     /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  1459.     if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  1460.     {
  1461.       tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  1462.       if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  1463.       {
  1464.         __HAL_TIM_ENABLE(htim);
  1465.       }
  1466.     }
  1467.     else
  1468.     {
  1469.       __HAL_TIM_ENABLE(htim);
  1470.     }
  1471.   }
  1472.  
  1473.   /* Return function status */
  1474.   return status;
  1475. }
  1476.  
  1477. /**
  1478.   * @brief  Stops the TIM PWM signal generation in DMA mode on the complementary
  1479.   *         output
  1480.   * @param  htim TIM handle
  1481.   * @param  Channel TIM Channel to be disabled
  1482.   *          This parameter can be one of the following values:
  1483.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1484.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1485.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1486.   * @retval HAL status
  1487.   */
  1488. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
  1489. {
  1490.   HAL_StatusTypeDef status = HAL_OK;
  1491.  
  1492.   /* Check the parameters */
  1493.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1494.  
  1495.   switch (Channel)
  1496.   {
  1497.     case TIM_CHANNEL_1:
  1498.     {
  1499.       /* Disable the TIM Capture/Compare 1 DMA request */
  1500.       __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  1501.       (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
  1502.       break;
  1503.     }
  1504.  
  1505.     case TIM_CHANNEL_2:
  1506.     {
  1507.       /* Disable the TIM Capture/Compare 2 DMA request */
  1508.       __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
  1509.       (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
  1510.       break;
  1511.     }
  1512.  
  1513.     case TIM_CHANNEL_3:
  1514.     {
  1515.       /* Disable the TIM Capture/Compare 3 DMA request */
  1516.       __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
  1517.       (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
  1518.       break;
  1519.     }
  1520.  
  1521.     default:
  1522.       status = HAL_ERROR;
  1523.       break;
  1524.   }
  1525.  
  1526.   if (status == HAL_OK)
  1527.   {
  1528.     /* Disable the complementary PWM output */
  1529.     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  1530.  
  1531.     /* Disable the Main Output */
  1532.     __HAL_TIM_MOE_DISABLE(htim);
  1533.  
  1534.     /* Disable the Peripheral */
  1535.     __HAL_TIM_DISABLE(htim);
  1536.  
  1537.     /* Set the TIM complementary channel state */
  1538.     TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  1539.   }
  1540.  
  1541.   /* Return function status */
  1542.   return status;
  1543. }
  1544.  
  1545. /**
  1546.   * @}
  1547.   */
  1548.  
  1549. /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
  1550.   * @brief    Timer Complementary One Pulse functions
  1551.   *
  1552. @verbatim
  1553.   ==============================================================================
  1554.                 ##### Timer Complementary One Pulse functions #####
  1555.   ==============================================================================
  1556.   [..]
  1557.     This section provides functions allowing to:
  1558.     (+) Start the Complementary One Pulse generation.
  1559.     (+) Stop the Complementary One Pulse.
  1560.     (+) Start the Complementary One Pulse and enable interrupts.
  1561.     (+) Stop the Complementary One Pulse and disable interrupts.
  1562.  
  1563. @endverbatim
  1564.   * @{
  1565.   */
  1566.  
  1567. /**
  1568.   * @brief  Starts the TIM One Pulse signal generation on the complementary
  1569.   *         output.
  1570.   * @note OutputChannel must match the pulse output channel chosen when calling
  1571.   *       @ref HAL_TIM_OnePulse_ConfigChannel().
  1572.   * @param  htim TIM One Pulse handle
  1573.   * @param  OutputChannel pulse output channel to enable
  1574.   *          This parameter can be one of the following values:
  1575.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1576.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1577.   * @retval HAL status
  1578.   */
  1579. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1580. {
  1581.   uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1582.   HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  1583.   HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
  1584.   HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  1585.   HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
  1586.  
  1587.   /* Check the parameters */
  1588.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1589.  
  1590.   /* Check the TIM channels state */
  1591.   if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  1592.       || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
  1593.       || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  1594.       || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
  1595.   {
  1596.     return HAL_ERROR;
  1597.   }
  1598.  
  1599.   /* Set the TIM channels state */
  1600.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  1601.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  1602.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  1603.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  1604.  
  1605.   /* Enable the complementary One Pulse output channel and the Input Capture channel */
  1606.   TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
  1607.   TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
  1608.  
  1609.   /* Enable the Main Output */
  1610.   __HAL_TIM_MOE_ENABLE(htim);
  1611.  
  1612.   /* Return function status */
  1613.   return HAL_OK;
  1614. }
  1615.  
  1616. /**
  1617.   * @brief  Stops the TIM One Pulse signal generation on the complementary
  1618.   *         output.
  1619.   * @note OutputChannel must match the pulse output channel chosen when calling
  1620.   *       @ref HAL_TIM_OnePulse_ConfigChannel().
  1621.   * @param  htim TIM One Pulse handle
  1622.   * @param  OutputChannel pulse output channel to disable
  1623.   *          This parameter can be one of the following values:
  1624.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1625.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1626.   * @retval HAL status
  1627.   */
  1628. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1629. {
  1630.   uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1631.  
  1632.   /* Check the parameters */
  1633.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1634.  
  1635.   /* Disable the complementary One Pulse output channel and the Input Capture channel */
  1636.   TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
  1637.   TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
  1638.  
  1639.   /* Disable the Main Output */
  1640.   __HAL_TIM_MOE_DISABLE(htim);
  1641.  
  1642.   /* Disable the Peripheral */
  1643.   __HAL_TIM_DISABLE(htim);
  1644.  
  1645.   /* Set the TIM  channels state */
  1646.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  1647.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  1648.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  1649.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  1650.  
  1651.   /* Return function status */
  1652.   return HAL_OK;
  1653. }
  1654.  
  1655. /**
  1656.   * @brief  Starts the TIM One Pulse signal generation in interrupt mode on the
  1657.   *         complementary channel.
  1658.   * @note OutputChannel must match the pulse output channel chosen when calling
  1659.   *       @ref HAL_TIM_OnePulse_ConfigChannel().
  1660.   * @param  htim TIM One Pulse handle
  1661.   * @param  OutputChannel pulse output channel to enable
  1662.   *          This parameter can be one of the following values:
  1663.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1664.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1665.   * @retval HAL status
  1666.   */
  1667. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1668. {
  1669.   uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1670.   HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  1671.   HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
  1672.   HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  1673.   HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
  1674.  
  1675.   /* Check the parameters */
  1676.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1677.  
  1678.   /* Check the TIM channels state */
  1679.   if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  1680.       || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
  1681.       || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  1682.       || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
  1683.   {
  1684.     return HAL_ERROR;
  1685.   }
  1686.  
  1687.   /* Set the TIM channels state */
  1688.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  1689.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  1690.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  1691.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  1692.  
  1693.   /* Enable the TIM Capture/Compare 1 interrupt */
  1694.   __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  1695.  
  1696.   /* Enable the TIM Capture/Compare 2 interrupt */
  1697.   __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  1698.  
  1699.   /* Enable the complementary One Pulse output channel and the Input Capture channel */
  1700.   TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
  1701.   TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
  1702.  
  1703.   /* Enable the Main Output */
  1704.   __HAL_TIM_MOE_ENABLE(htim);
  1705.  
  1706.   /* Return function status */
  1707.   return HAL_OK;
  1708. }
  1709.  
  1710. /**
  1711.   * @brief  Stops the TIM One Pulse signal generation in interrupt mode on the
  1712.   *         complementary channel.
  1713.   * @note OutputChannel must match the pulse output channel chosen when calling
  1714.   *       @ref HAL_TIM_OnePulse_ConfigChannel().
  1715.   * @param  htim TIM One Pulse handle
  1716.   * @param  OutputChannel pulse output channel to disable
  1717.   *          This parameter can be one of the following values:
  1718.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1719.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1720.   * @retval HAL status
  1721.   */
  1722. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1723. {
  1724.   uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1725.  
  1726.   /* Check the parameters */
  1727.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1728.  
  1729.   /* Disable the TIM Capture/Compare 1 interrupt */
  1730.   __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  1731.  
  1732.   /* Disable the TIM Capture/Compare 2 interrupt */
  1733.   __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  1734.  
  1735.   /* Disable the complementary One Pulse output channel and the Input Capture channel */
  1736.   TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
  1737.   TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
  1738.  
  1739.   /* Disable the Main Output */
  1740.   __HAL_TIM_MOE_DISABLE(htim);
  1741.  
  1742.   /* Disable the Peripheral */
  1743.   __HAL_TIM_DISABLE(htim);
  1744.  
  1745.   /* Set the TIM  channels state */
  1746.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  1747.   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  1748.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  1749.   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  1750.  
  1751.   /* Return function status */
  1752.   return HAL_OK;
  1753. }
  1754.  
  1755. /**
  1756.   * @}
  1757.   */
  1758.  
  1759. /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
  1760.   * @brief    Peripheral Control functions
  1761.   *
  1762. @verbatim
  1763.   ==============================================================================
  1764.                     ##### Peripheral Control functions #####
  1765.   ==============================================================================
  1766.   [..]
  1767.     This section provides functions allowing to:
  1768.       (+) Configure the commutation event in case of use of the Hall sensor interface.
  1769.       (+) Configure Output channels for OC and PWM mode.
  1770.  
  1771.       (+) Configure Complementary channels, break features and dead time.
  1772.       (+) Configure Master synchronization.
  1773.       (+) Configure timer remapping capabilities.
  1774.  
  1775. @endverbatim
  1776.   * @{
  1777.   */
  1778.  
  1779. /**
  1780.   * @brief  Configure the TIM commutation event sequence.
  1781.   * @note  This function is mandatory to use the commutation event in order to
  1782.   *        update the configuration at each commutation detection on the TRGI input of the Timer,
  1783.   *        the typical use of this feature is with the use of another Timer(interface Timer)
  1784.   *        configured in Hall sensor interface, this interface Timer will generate the
  1785.   *        commutation at its TRGO output (connected to Timer used in this function) each time
  1786.   *        the TI1 of the Interface Timer detect a commutation at its input TI1.
  1787.   * @param  htim TIM handle
  1788.   * @param  InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
  1789.   *          This parameter can be one of the following values:
  1790.   *            @arg TIM_TS_ITR0: Internal trigger 0 selected
  1791.   *            @arg TIM_TS_ITR1: Internal trigger 1 selected
  1792.   *            @arg TIM_TS_ITR2: Internal trigger 2 selected
  1793.   *            @arg TIM_TS_ITR3: Internal trigger 3 selected
  1794.   *            @arg TIM_TS_NONE: No trigger is needed
  1795.   * @param  CommutationSource the Commutation Event source
  1796.   *          This parameter can be one of the following values:
  1797.   *            @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1798.   *            @arg TIM_COMMUTATION_SOFTWARE:  Commutation source is set by software using the COMG bit
  1799.   * @retval HAL status
  1800.   */
  1801. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t  InputTrigger,
  1802.                                               uint32_t  CommutationSource)
  1803. {
  1804.   /* Check the parameters */
  1805.   assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1806.   assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1807.  
  1808.   __HAL_LOCK(htim);
  1809.  
  1810.   if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1811.       (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  1812.   {
  1813.     /* Select the Input trigger */
  1814.     htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1815.     htim->Instance->SMCR |= InputTrigger;
  1816.   }
  1817.  
  1818.   /* Select the Capture Compare preload feature */
  1819.   htim->Instance->CR2 |= TIM_CR2_CCPC;
  1820.   /* Select the Commutation event source */
  1821.   htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1822.   htim->Instance->CR2 |= CommutationSource;
  1823.  
  1824.   /* Disable Commutation Interrupt */
  1825.   __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
  1826.  
  1827.   /* Disable Commutation DMA request */
  1828.   __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
  1829.  
  1830.   __HAL_UNLOCK(htim);
  1831.  
  1832.   return HAL_OK;
  1833. }
  1834.  
  1835. /**
  1836.   * @brief  Configure the TIM commutation event sequence with interrupt.
  1837.   * @note  This function is mandatory to use the commutation event in order to
  1838.   *        update the configuration at each commutation detection on the TRGI input of the Timer,
  1839.   *        the typical use of this feature is with the use of another Timer(interface Timer)
  1840.   *        configured in Hall sensor interface, this interface Timer will generate the
  1841.   *        commutation at its TRGO output (connected to Timer used in this function) each time
  1842.   *        the TI1 of the Interface Timer detect a commutation at its input TI1.
  1843.   * @param  htim TIM handle
  1844.   * @param  InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
  1845.   *          This parameter can be one of the following values:
  1846.   *            @arg TIM_TS_ITR0: Internal trigger 0 selected
  1847.   *            @arg TIM_TS_ITR1: Internal trigger 1 selected
  1848.   *            @arg TIM_TS_ITR2: Internal trigger 2 selected
  1849.   *            @arg TIM_TS_ITR3: Internal trigger 3 selected
  1850.   *            @arg TIM_TS_NONE: No trigger is needed
  1851.   * @param  CommutationSource the Commutation Event source
  1852.   *          This parameter can be one of the following values:
  1853.   *            @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1854.   *            @arg TIM_COMMUTATION_SOFTWARE:  Commutation source is set by software using the COMG bit
  1855.   * @retval HAL status
  1856.   */
  1857. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t  InputTrigger,
  1858.                                                  uint32_t  CommutationSource)
  1859. {
  1860.   /* Check the parameters */
  1861.   assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1862.   assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1863.  
  1864.   __HAL_LOCK(htim);
  1865.  
  1866.   if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1867.       (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  1868.   {
  1869.     /* Select the Input trigger */
  1870.     htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1871.     htim->Instance->SMCR |= InputTrigger;
  1872.   }
  1873.  
  1874.   /* Select the Capture Compare preload feature */
  1875.   htim->Instance->CR2 |= TIM_CR2_CCPC;
  1876.   /* Select the Commutation event source */
  1877.   htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1878.   htim->Instance->CR2 |= CommutationSource;
  1879.  
  1880.   /* Disable Commutation DMA request */
  1881.   __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
  1882.  
  1883.   /* Enable the Commutation Interrupt */
  1884.   __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
  1885.  
  1886.   __HAL_UNLOCK(htim);
  1887.  
  1888.   return HAL_OK;
  1889. }
  1890.  
  1891. /**
  1892.   * @brief  Configure the TIM commutation event sequence with DMA.
  1893.   * @note  This function is mandatory to use the commutation event in order to
  1894.   *        update the configuration at each commutation detection on the TRGI input of the Timer,
  1895.   *        the typical use of this feature is with the use of another Timer(interface Timer)
  1896.   *        configured in Hall sensor interface, this interface Timer will generate the
  1897.   *        commutation at its TRGO output (connected to Timer used in this function) each time
  1898.   *        the TI1 of the Interface Timer detect a commutation at its input TI1.
  1899.   * @note  The user should configure the DMA in his own software, in This function only the COMDE bit is set
  1900.   * @param  htim TIM handle
  1901.   * @param  InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
  1902.   *          This parameter can be one of the following values:
  1903.   *            @arg TIM_TS_ITR0: Internal trigger 0 selected
  1904.   *            @arg TIM_TS_ITR1: Internal trigger 1 selected
  1905.   *            @arg TIM_TS_ITR2: Internal trigger 2 selected
  1906.   *            @arg TIM_TS_ITR3: Internal trigger 3 selected
  1907.   *            @arg TIM_TS_NONE: No trigger is needed
  1908.   * @param  CommutationSource the Commutation Event source
  1909.   *          This parameter can be one of the following values:
  1910.   *            @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1911.   *            @arg TIM_COMMUTATION_SOFTWARE:  Commutation source is set by software using the COMG bit
  1912.   * @retval HAL status
  1913.   */
  1914. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t  InputTrigger,
  1915.                                                   uint32_t  CommutationSource)
  1916. {
  1917.   /* Check the parameters */
  1918.   assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1919.   assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1920.  
  1921.   __HAL_LOCK(htim);
  1922.  
  1923.   if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1924.       (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  1925.   {
  1926.     /* Select the Input trigger */
  1927.     htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1928.     htim->Instance->SMCR |= InputTrigger;
  1929.   }
  1930.  
  1931.   /* Select the Capture Compare preload feature */
  1932.   htim->Instance->CR2 |= TIM_CR2_CCPC;
  1933.   /* Select the Commutation event source */
  1934.   htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1935.   htim->Instance->CR2 |= CommutationSource;
  1936.  
  1937.   /* Enable the Commutation DMA Request */
  1938.   /* Set the DMA Commutation Callback */
  1939.   htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
  1940.   htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
  1941.   /* Set the DMA error callback */
  1942.   htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
  1943.  
  1944.   /* Disable Commutation Interrupt */
  1945.   __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
  1946.  
  1947.   /* Enable the Commutation DMA Request */
  1948.   __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
  1949.  
  1950.   __HAL_UNLOCK(htim);
  1951.  
  1952.   return HAL_OK;
  1953. }
  1954.  
  1955. /**
  1956.   * @brief  Configures the TIM in master mode.
  1957.   * @param  htim TIM handle.
  1958.   * @param  sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
  1959.   *         contains the selected trigger output (TRGO) and the Master/Slave
  1960.   *         mode.
  1961.   * @retval HAL status
  1962.   */
  1963. HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
  1964.                                                         TIM_MasterConfigTypeDef *sMasterConfig)
  1965. {
  1966.   uint32_t tmpcr2;
  1967.   uint32_t tmpsmcr;
  1968.  
  1969.   /* Check the parameters */
  1970.   assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
  1971.   assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  1972.   assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
  1973.  
  1974.   /* Check input state */
  1975.   __HAL_LOCK(htim);
  1976.  
  1977.   /* Change the handler state */
  1978.   htim->State = HAL_TIM_STATE_BUSY;
  1979.  
  1980.   /* Get the TIMx CR2 register value */
  1981.   tmpcr2 = htim->Instance->CR2;
  1982.  
  1983.   /* Get the TIMx SMCR register value */
  1984.   tmpsmcr = htim->Instance->SMCR;
  1985.  
  1986.   /* Reset the MMS Bits */
  1987.   tmpcr2 &= ~TIM_CR2_MMS;
  1988.   /* Select the TRGO source */
  1989.   tmpcr2 |=  sMasterConfig->MasterOutputTrigger;
  1990.  
  1991.   /* Update TIMx CR2 */
  1992.   htim->Instance->CR2 = tmpcr2;
  1993.  
  1994.   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  1995.   {
  1996.     /* Reset the MSM Bit */
  1997.     tmpsmcr &= ~TIM_SMCR_MSM;
  1998.     /* Set master mode */
  1999.     tmpsmcr |= sMasterConfig->MasterSlaveMode;
  2000.  
  2001.     /* Update TIMx SMCR */
  2002.     htim->Instance->SMCR = tmpsmcr;
  2003.   }
  2004.  
  2005.   /* Change the htim state */
  2006.   htim->State = HAL_TIM_STATE_READY;
  2007.  
  2008.   __HAL_UNLOCK(htim);
  2009.  
  2010.   return HAL_OK;
  2011. }
  2012.  
  2013. /**
  2014.   * @brief  Configures the Break feature, dead time, Lock level, OSSI/OSSR State
  2015.   *         and the AOE(automatic output enable).
  2016.   * @param  htim TIM handle
  2017.   * @param  sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
  2018.   *         contains the BDTR Register configuration  information for the TIM peripheral.
  2019.   * @note   Interrupts can be generated when an active level is detected on the
  2020.   *         break input, the break 2 input or the system break input. Break
  2021.   *         interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
  2022.   * @retval HAL status
  2023.   */
  2024. HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
  2025.                                                 TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
  2026. {
  2027.   /* Keep this variable initialized to 0 as it is used to configure BDTR register */
  2028.   uint32_t tmpbdtr = 0U;
  2029.  
  2030.   /* Check the parameters */
  2031.   assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
  2032.   assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
  2033.   assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
  2034.   assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
  2035.   assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
  2036.   assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
  2037.   assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
  2038.   assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
  2039.  
  2040.   /* Check input state */
  2041.   __HAL_LOCK(htim);
  2042.  
  2043.   /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
  2044.      the OSSI State, the dead time value and the Automatic Output Enable Bit */
  2045.  
  2046.   /* Set the BDTR bits */
  2047.   MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
  2048.   MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
  2049.   MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
  2050.   MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
  2051.   MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
  2052.   MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
  2053.   MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
  2054.  
  2055.  
  2056.   /* Set TIMx_BDTR */
  2057.   htim->Instance->BDTR = tmpbdtr;
  2058.  
  2059.   __HAL_UNLOCK(htim);
  2060.  
  2061.   return HAL_OK;
  2062. }
  2063.  
  2064. /**
  2065.   * @brief  Configures the TIMx Remapping input capabilities.
  2066.   * @param  htim TIM handle.
  2067.   * @param  Remap specifies the TIM remapping source.
  2068.   *         For TIM14, the parameter can have the following values:
  2069.   *           @arg TIM_TIM14_GPIO:    TIM14 TI1 is connected to GPIO
  2070.   *           @arg TIM_TIM14_RTC:     TIM14 TI1 is connected to RTC_clock
  2071.   *           @arg TIM_TIM14_HSE:     TIM14 TI1 is connected to HSE/32
  2072.   *           @arg TIM_TIM14_MCO:     TIM14 TI1 is connected to MCO
  2073.   *
  2074.   * @retval HAL status
  2075.   */
  2076. HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
  2077. {
  2078.   __HAL_LOCK(htim);
  2079.  
  2080.   /* Check parameters */
  2081.   assert_param(IS_TIM_REMAP(htim->Instance, Remap));
  2082.  
  2083.   /* Set the Timer remapping configuration */
  2084.   WRITE_REG(htim->Instance->OR, Remap);
  2085.  
  2086.   __HAL_UNLOCK(htim);
  2087.  
  2088.   return HAL_OK;
  2089. }
  2090.  
  2091. /**
  2092.   * @}
  2093.   */
  2094.  
  2095. /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
  2096.   * @brief    Extended Callbacks functions
  2097.   *
  2098. @verbatim
  2099.   ==============================================================================
  2100.                     ##### Extended Callbacks functions #####
  2101.   ==============================================================================
  2102.   [..]
  2103.     This section provides Extended TIM callback functions:
  2104.     (+) Timer Commutation callback
  2105.     (+) Timer Break callback
  2106.  
  2107. @endverbatim
  2108.   * @{
  2109.   */
  2110.  
  2111. /**
  2112.   * @brief  Hall commutation changed callback in non-blocking mode
  2113.   * @param  htim TIM handle
  2114.   * @retval None
  2115.   */
  2116. __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
  2117. {
  2118.   /* Prevent unused argument(s) compilation warning */
  2119.   UNUSED(htim);
  2120.  
  2121.   /* NOTE : This function should not be modified, when the callback is needed,
  2122.             the HAL_TIMEx_CommutCallback could be implemented in the user file
  2123.    */
  2124. }
  2125. /**
  2126.   * @brief  Hall commutation changed half complete callback in non-blocking mode
  2127.   * @param  htim TIM handle
  2128.   * @retval None
  2129.   */
  2130. __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
  2131. {
  2132.   /* Prevent unused argument(s) compilation warning */
  2133.   UNUSED(htim);
  2134.  
  2135.   /* NOTE : This function should not be modified, when the callback is needed,
  2136.             the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file
  2137.    */
  2138. }
  2139.  
  2140. /**
  2141.   * @brief  Hall Break detection callback in non-blocking mode
  2142.   * @param  htim TIM handle
  2143.   * @retval None
  2144.   */
  2145. __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
  2146. {
  2147.   /* Prevent unused argument(s) compilation warning */
  2148.   UNUSED(htim);
  2149.  
  2150.   /* NOTE : This function should not be modified, when the callback is needed,
  2151.             the HAL_TIMEx_BreakCallback could be implemented in the user file
  2152.    */
  2153. }
  2154. /**
  2155.   * @}
  2156.   */
  2157.  
  2158. /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
  2159.   * @brief    Extended Peripheral State functions
  2160.   *
  2161. @verbatim
  2162.   ==============================================================================
  2163.                 ##### Extended Peripheral State functions #####
  2164.   ==============================================================================
  2165.   [..]
  2166.     This subsection permits to get in run-time the status of the peripheral
  2167.     and the data flow.
  2168.  
  2169. @endverbatim
  2170.   * @{
  2171.   */
  2172.  
  2173. /**
  2174.   * @brief  Return the TIM Hall Sensor interface handle state.
  2175.   * @param  htim TIM Hall Sensor handle
  2176.   * @retval HAL state
  2177.   */
  2178. HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
  2179. {
  2180.   return htim->State;
  2181. }
  2182.  
  2183. /**
  2184.   * @brief  Return actual state of the TIM complementary channel.
  2185.   * @param  htim TIM handle
  2186.   * @param  ChannelN TIM Complementary channel
  2187.   *          This parameter can be one of the following values:
  2188.   *            @arg TIM_CHANNEL_1: TIM Channel 1
  2189.   *            @arg TIM_CHANNEL_2: TIM Channel 2
  2190.   *            @arg TIM_CHANNEL_3: TIM Channel 3
  2191.   * @retval TIM Complementary channel state
  2192.   */
  2193. HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim,  uint32_t ChannelN)
  2194. {
  2195.   HAL_TIM_ChannelStateTypeDef channel_state;
  2196.  
  2197.   /* Check the parameters */
  2198.   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, ChannelN));
  2199.  
  2200.   channel_state = TIM_CHANNEL_N_STATE_GET(htim, ChannelN);
  2201.  
  2202.   return channel_state;
  2203. }
  2204. /**
  2205.   * @}
  2206.   */
  2207.  
  2208. /**
  2209.   * @}
  2210.   */
  2211.  
  2212. /* Private functions ---------------------------------------------------------*/
  2213. /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
  2214.   * @{
  2215.   */
  2216.  
  2217. /**
  2218.   * @brief  TIM DMA Commutation callback.
  2219.   * @param  hdma pointer to DMA handle.
  2220.   * @retval None
  2221.   */
  2222. void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
  2223. {
  2224.   TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  2225.  
  2226.   /* Change the htim state */
  2227.   htim->State = HAL_TIM_STATE_READY;
  2228.  
  2229. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  2230.   htim->CommutationCallback(htim);
  2231. #else
  2232.   HAL_TIMEx_CommutCallback(htim);
  2233. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  2234. }
  2235.  
  2236. /**
  2237.   * @brief  TIM DMA Commutation half complete callback.
  2238.   * @param  hdma pointer to DMA handle.
  2239.   * @retval None
  2240.   */
  2241. void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
  2242. {
  2243.   TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  2244.  
  2245.   /* Change the htim state */
  2246.   htim->State = HAL_TIM_STATE_READY;
  2247.  
  2248. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  2249.   htim->CommutationHalfCpltCallback(htim);
  2250. #else
  2251.   HAL_TIMEx_CommutHalfCpltCallback(htim);
  2252. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  2253. }
  2254.  
  2255.  
  2256. /**
  2257.   * @brief  TIM DMA Delay Pulse complete callback (complementary channel).
  2258.   * @param  hdma pointer to DMA handle.
  2259.   * @retval None
  2260.   */
  2261. static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma)
  2262. {
  2263.   TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  2264.  
  2265.   if (hdma == htim->hdma[TIM_DMA_ID_CC1])
  2266.   {
  2267.     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
  2268.  
  2269.     if (hdma->Init.Mode == DMA_NORMAL)
  2270.     {
  2271.       TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  2272.     }
  2273.   }
  2274.   else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
  2275.   {
  2276.     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
  2277.  
  2278.     if (hdma->Init.Mode == DMA_NORMAL)
  2279.     {
  2280.       TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  2281.     }
  2282.   }
  2283.   else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
  2284.   {
  2285.     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
  2286.  
  2287.     if (hdma->Init.Mode == DMA_NORMAL)
  2288.     {
  2289.       TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
  2290.     }
  2291.   }
  2292.   else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
  2293.   {
  2294.     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
  2295.  
  2296.     if (hdma->Init.Mode == DMA_NORMAL)
  2297.     {
  2298.       TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
  2299.     }
  2300.   }
  2301.   else
  2302.   {
  2303.     /* nothing to do */
  2304.   }
  2305.  
  2306. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  2307.   htim->PWM_PulseFinishedCallback(htim);
  2308. #else
  2309.   HAL_TIM_PWM_PulseFinishedCallback(htim);
  2310. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  2311.  
  2312.   htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
  2313. }
  2314.  
  2315. /**
  2316.   * @brief  TIM DMA error callback (complementary channel)
  2317.   * @param  hdma pointer to DMA handle.
  2318.   * @retval None
  2319.   */
  2320. static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma)
  2321. {
  2322.   TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  2323.  
  2324.   if (hdma == htim->hdma[TIM_DMA_ID_CC1])
  2325.   {
  2326.     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
  2327.     TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  2328.   }
  2329.   else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
  2330.   {
  2331.     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
  2332.     TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  2333.   }
  2334.   else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
  2335.   {
  2336.     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
  2337.     TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
  2338.   }
  2339.   else
  2340.   {
  2341.     /* nothing to do */
  2342.   }
  2343.  
  2344. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  2345.   htim->ErrorCallback(htim);
  2346. #else
  2347.   HAL_TIM_ErrorCallback(htim);
  2348. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  2349.  
  2350.   htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
  2351. }
  2352.  
  2353. /**
  2354.   * @brief  Enables or disables the TIM Capture Compare Channel xN.
  2355.   * @param  TIMx to select the TIM peripheral
  2356.   * @param  Channel specifies the TIM Channel
  2357.   *          This parameter can be one of the following values:
  2358.   *            @arg TIM_CHANNEL_1: TIM Channel 1
  2359.   *            @arg TIM_CHANNEL_2: TIM Channel 2
  2360.   *            @arg TIM_CHANNEL_3: TIM Channel 3
  2361.   * @param  ChannelNState specifies the TIM Channel CCxNE bit new state.
  2362.   *          This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
  2363.   * @retval None
  2364.   */
  2365. static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
  2366. {
  2367.   uint32_t tmp;
  2368.  
  2369.   tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
  2370.  
  2371.   /* Reset the CCxNE Bit */
  2372.   TIMx->CCER &=  ~tmp;
  2373.  
  2374.   /* Set or reset the CCxNE Bit */
  2375.   TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
  2376. }
  2377. /**
  2378.   * @}
  2379.   */
  2380.  
  2381. #endif /* HAL_TIM_MODULE_ENABLED */
  2382. /**
  2383.   * @}
  2384.   */
  2385.  
  2386. /**
  2387.   * @}
  2388.   */
  2389.  
  2390. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  2391.