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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32f0xx_hal_pwr.c
  4.   * @author  MCD Application Team
  5.   * @brief   PWR HAL module driver.
  6.   *          This file provides firmware functions to manage the following
  7.   *          functionalities of the Power Controller (PWR) peripheral:
  8.   *           + Initialization/de-initialization function
  9.   *           + Peripheral Control function
  10.   *
  11.   @verbatim
  12.   ******************************************************************************
  13.   * @attention
  14.   *
  15.   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  16.   * All rights reserved.</center></h2>
  17.   *
  18.   * This software component is licensed by ST under BSD 3-Clause license,
  19.   * the "License"; You may not use this file except in compliance with the
  20.   * License. You may obtain a copy of the License at:
  21.   *                        opensource.org/licenses/BSD-3-Clause
  22.   *
  23.   ******************************************************************************
  24.   */
  25.  
  26. /* Includes ------------------------------------------------------------------*/
  27. #include "stm32f0xx_hal.h"
  28.  
  29. /** @addtogroup STM32F0xx_HAL_Driver
  30.   * @{
  31.   */
  32.  
  33. /** @defgroup PWR PWR
  34.   * @brief PWR HAL module driver
  35.   * @{
  36.   */
  37.  
  38. #ifdef HAL_PWR_MODULE_ENABLED
  39.  
  40. /* Private typedef -----------------------------------------------------------*/
  41. /* Private define ------------------------------------------------------------*/
  42. /* Private macro -------------------------------------------------------------*/
  43. /* Private variables ---------------------------------------------------------*/
  44. /* Private function prototypes -----------------------------------------------*/
  45. /* Private functions ---------------------------------------------------------*/
  46.  
  47. /** @defgroup PWR_Exported_Functions PWR Exported Functions
  48.   * @{
  49.   */
  50.  
  51. /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
  52.   *  @brief    Initialization and de-initialization functions
  53.   *
  54. @verbatim
  55.  ===============================================================================
  56.               ##### Initialization and de-initialization functions #####
  57.  ===============================================================================
  58.     [..]
  59.       After reset, the backup domain (RTC registers, RTC backup data
  60.       registers) is protected against possible unwanted
  61.       write accesses.
  62.       To enable access to the RTC Domain and RTC registers, proceed as follows:
  63.         (+) Enable the Power Controller (PWR) APB1 interface clock using the
  64.             __HAL_RCC_PWR_CLK_ENABLE() macro.
  65.         (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
  66.  
  67. @endverbatim
  68.   * @{
  69.   */
  70.  
  71. /**
  72.   * @brief Deinitializes the PWR peripheral registers to their default reset values.
  73.   * @retval None
  74.   */
  75. void HAL_PWR_DeInit(void)
  76. {
  77.   __HAL_RCC_PWR_FORCE_RESET();
  78.   __HAL_RCC_PWR_RELEASE_RESET();
  79. }
  80.  
  81. /**
  82.   * @brief Enables access to the backup domain (RTC registers, RTC
  83.   *         backup data registers when present).
  84.   * @note  If the HSE divided by 32 is used as the RTC clock, the
  85.   *         Backup Domain Access should be kept enabled.
  86.   * @retval None
  87.   */
  88. void HAL_PWR_EnableBkUpAccess(void)
  89. {
  90.   PWR->CR |= (uint32_t)PWR_CR_DBP;
  91. }
  92.  
  93. /**
  94.   * @brief Disables access to the backup domain (RTC registers, RTC
  95.   *         backup data registers when present).
  96.   * @note  If the HSE divided by 32 is used as the RTC clock, the
  97.   *         Backup Domain Access should be kept enabled.
  98.   * @retval None
  99.   */
  100. void HAL_PWR_DisableBkUpAccess(void)
  101. {
  102.   PWR->CR &= ~((uint32_t)PWR_CR_DBP);
  103. }
  104.  
  105. /**
  106.   * @}
  107.   */
  108.  
  109. /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
  110.   *  @brief Low Power modes configuration functions
  111.   *
  112. @verbatim
  113.  
  114.  ===============================================================================
  115.                  ##### Peripheral Control functions #####
  116.  ===============================================================================
  117.    
  118.     *** WakeUp pin configuration ***
  119.     ================================
  120.     [..]
  121.       (+) WakeUp pin is used to wakeup the system from Standby mode. This pin is
  122.           forced in input pull down configuration and is active on rising edges.
  123.       (+) There are two WakeUp pins, and up to eight Wakeup pins on STM32F07x & STM32F09x devices.
  124.          (++)WakeUp Pin 1 on PA.00.
  125.          (++)WakeUp Pin 2 on PC.13.
  126.          (++)WakeUp Pin 3 on PE.06.(STM32F07x/STM32F09x)
  127.          (++)WakeUp Pin 4 on PA.02.(STM32F07x/STM32F09x)
  128.          (++)WakeUp Pin 5 on PC.05.(STM32F07x/STM32F09x)
  129.          (++)WakeUp Pin 6 on PB.05.(STM32F07x/STM32F09x)
  130.          (++)WakeUp Pin 7 on PB.15.(STM32F07x/STM32F09x)
  131.          (++)WakeUp Pin 8 on PF.02.(STM32F07x/STM32F09x)
  132.  
  133.     *** Low Power modes configuration ***
  134.     =====================================
  135.     [..]
  136.       The devices feature 3 low-power modes:
  137.       (+) Sleep mode: Cortex-M0 core stopped, peripherals kept running.
  138.       (+) Stop mode: all clocks are stopped, regulator running, regulator
  139.           in low power mode
  140.       (+) Standby mode: 1.2V domain powered off (mode not available on STM32F0x8 devices).
  141.  
  142.    *** Sleep mode ***
  143.    ==================
  144.     [..]
  145.       (+) Entry:
  146.           The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFx)
  147.               functions with
  148.           (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
  149.           (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
  150.      
  151.       (+) Exit:
  152.         (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
  153.               controller (NVIC) can wake up the device from Sleep mode.
  154.  
  155.    *** Stop mode ***
  156.    =================
  157.     [..]
  158.       In Stop mode, all clocks in the 1.8V domain are stopped, the PLL, the HSI,
  159.       and the HSE RC oscillators are disabled. Internal SRAM and register contents
  160.       are preserved.
  161.       The voltage regulator can be configured either in normal or low-power mode.
  162.       To minimize the consumption.
  163.  
  164.       (+) Entry:
  165.           The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_STOPENTRY_WFI )
  166.              function with:
  167.           (++) Main regulator ON.
  168.           (++) Low Power regulator ON.
  169.           (++) PWR_STOPENTRY_WFI: enter STOP mode with WFI instruction
  170.           (++) PWR_STOPENTRY_WFE: enter STOP mode with WFE instruction
  171.       (+) Exit:
  172.           (++) Any EXTI Line (Internal or External) configured in Interrupt/Event mode.
  173.           (++) Some specific communication peripherals (CEC, USART, I2C) interrupts,
  174.                when programmed in wakeup mode (the peripheral must be
  175.                programmed in wakeup mode and the corresponding interrupt vector
  176.                must be enabled in the NVIC)
  177.  
  178.    *** Standby mode ***
  179.    ====================
  180.      [..]
  181.       The Standby mode allows to achieve the lowest power consumption. It is based
  182.       on the Cortex-M0 deep sleep mode, with the voltage regulator disabled.
  183.       The 1.8V domain is consequently powered off. The PLL, the HSI oscillator and
  184.       the HSE oscillator are also switched off. SRAM and register contents are lost
  185.       except for the RTC registers, RTC backup registers and Standby circuitry.
  186.       The voltage regulator is OFF.
  187.  
  188.       (+) Entry:
  189.           (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
  190.       (+) Exit:
  191.           (++) WKUP pin rising edge, RTC alarm (Alarm A), RTC wakeup,
  192.                tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
  193.  
  194.    *** Auto-wakeup (AWU) from low-power mode ***
  195.    =============================================
  196.     [..]
  197.       The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
  198.       Wakeup event, a tamper event, a time-stamp event, or a comparator event,
  199.       without depending on an external interrupt (Auto-wakeup mode).
  200.  
  201.     (+) RTC auto-wakeup (AWU) from the Stop and Standby modes
  202.  
  203.       (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to
  204.             configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function.
  205.  
  206.       (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
  207.            is necessary to configure the RTC to detect the tamper or time stamp event using the
  208.            HAL_RTC_SetTimeStamp_IT() or HAL_RTC_SetTamper_IT() functions.
  209.  
  210.       (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to
  211.            configure the RTC to generate the RTC WakeUp event using the HAL_RTC_SetWakeUpTimer_IT() function.
  212.  
  213.     (+) Comparator auto-wakeup (AWU) from the Stop mode
  214.  
  215.       (++) To wake up from the Stop mode with a comparator wakeup event, it is necessary to:
  216.            (+++) Configure the EXTI Line associated with the comparator (example EXTI Line 22 for comparator 2)
  217.                  to be sensitive to to the selected edges (falling, rising or falling
  218.                  and rising) (Interrupt or Event modes) using the EXTI_Init() function.
  219.            (+++) Configure the comparator to generate the event.      
  220. @endverbatim
  221.   * @{
  222.   */
  223.  
  224. /**
  225.   * @brief Enables the WakeUp PINx functionality.
  226.   * @param WakeUpPinx Specifies the Power Wake-Up pin to enable.
  227.   *         This parameter can be value of :
  228.   *           @ref PWREx_WakeUp_Pins
  229.   * @retval None
  230.   */
  231. void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
  232. {
  233.   /* Check the parameters */
  234.   assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
  235.   /* Enable the EWUPx pin */
  236.   SET_BIT(PWR->CSR, WakeUpPinx);
  237. }
  238.  
  239. /**
  240.   * @brief Disables the WakeUp PINx functionality.
  241.   * @param WakeUpPinx Specifies the Power Wake-Up pin to disable.
  242.   *         This parameter can be values of :
  243.   *           @ref PWREx_WakeUp_Pins
  244.   * @retval None
  245.   */
  246. void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
  247. {
  248.   /* Check the parameters */
  249.   assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
  250.   /* Disable the EWUPx pin */
  251.   CLEAR_BIT(PWR->CSR, WakeUpPinx);
  252. }
  253.  
  254. /**
  255.   * @brief Enters Sleep mode.
  256.   * @note  In Sleep mode, all I/O pins keep the same state as in Run mode.
  257.   * @param Regulator Specifies the regulator state in SLEEP mode.
  258.   *           On STM32F0 devices, this parameter is a dummy value and it is ignored
  259.   *           as regulator can't be modified in this mode. Parameter is kept for platform
  260.   *           compatibility.
  261.   * @param SLEEPEntry Specifies if SLEEP mode is entered with WFI or WFE instruction.
  262.   *           When WFI entry is used, tick interrupt have to be disabled if not desired as
  263.   *           the interrupt wake up source.
  264.   *           This parameter can be one of the following values:
  265.   *            @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
  266.   *            @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
  267.   * @retval None
  268.   */
  269. void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
  270. {
  271.   /* Check the parameters */
  272.   assert_param(IS_PWR_REGULATOR(Regulator));
  273.   assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
  274.  
  275.   /* Clear SLEEPDEEP bit of Cortex System Control Register */
  276.   SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
  277.  
  278.   /* Select SLEEP mode entry -------------------------------------------------*/
  279.   if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
  280.   {
  281.     /* Request Wait For Interrupt */
  282.     __WFI();
  283.   }
  284.   else
  285.   {
  286.     /* Request Wait For Event */
  287.     __SEV();
  288.     __WFE();
  289.     __WFE();
  290.   }
  291. }
  292.  
  293. /**
  294.   * @brief Enters STOP mode.
  295.   * @note  In Stop mode, all I/O pins keep the same state as in Run mode.
  296.   * @note  When exiting Stop mode by issuing an interrupt or a wakeup event,
  297.   *         the HSI RC oscillator is selected as system clock.
  298.   * @note  When the voltage regulator operates in low power mode, an additional
  299.   *         startup delay is incurred when waking up from Stop mode.
  300.   *         By keeping the internal regulator ON during Stop mode, the consumption
  301.   *         is higher although the startup time is reduced.
  302.   * @param Regulator Specifies the regulator state in STOP mode.
  303.   *          This parameter can be one of the following values:
  304.   *            @arg PWR_MAINREGULATOR_ON: STOP mode with regulator ON
  305.   *            @arg PWR_LOWPOWERREGULATOR_ON: STOP mode with low power regulator ON
  306.   * @param STOPEntry specifies if STOP mode in entered with WFI or WFE instruction.
  307.   *          This parameter can be one of the following values:
  308.   *            @arg PWR_STOPENTRY_WFI:Enter STOP mode with WFI instruction
  309.   *            @arg PWR_STOPENTRY_WFE: Enter STOP mode with WFE instruction
  310.   * @retval None
  311.   */
  312. void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
  313. {
  314.   uint32_t tmpreg = 0;
  315.  
  316.   /* Check the parameters */
  317.   assert_param(IS_PWR_REGULATOR(Regulator));
  318.   assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
  319.  
  320.   /* Select the regulator state in STOP mode ---------------------------------*/
  321.   tmpreg = PWR->CR;
  322.  
  323.   /* Clear PDDS and LPDS bits */
  324.   tmpreg &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS);
  325.  
  326.   /* Set LPDS bit according to Regulator value */
  327.   tmpreg |= Regulator;
  328.  
  329.   /* Store the new value */
  330.   PWR->CR = tmpreg;
  331.  
  332.   /* Set SLEEPDEEP bit of Cortex System Control Register */
  333.   SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
  334.  
  335.   /* Select STOP mode entry --------------------------------------------------*/
  336.   if(STOPEntry == PWR_STOPENTRY_WFI)
  337.   {
  338.     /* Request Wait For Interrupt */
  339.     __WFI();
  340.   }
  341.   else
  342.   {
  343.     /* Request Wait For Event */
  344.     __SEV();
  345.     __WFE();
  346.     __WFE();
  347.   }
  348.  
  349.   /* Reset SLEEPDEEP bit of Cortex System Control Register */
  350.   SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
  351. }
  352.  
  353. /**
  354.   * @brief Enters STANDBY mode.
  355.   * @note  In Standby mode, all I/O pins are high impedance except for:
  356.   *          - Reset pad (still available)
  357.   *          - RTC alternate function pins if configured for tamper, time-stamp, RTC
  358.   *            Alarm out, or RTC clock calibration out.
  359.   *          - WKUP pins if enabled.
  360.   *            STM32F0x8 devices, the Stop mode is available, but it is
  361.   *            aningless to distinguish between voltage regulator in Low power
  362.   *            mode and voltage regulator in Run mode because the regulator
  363.   *            not used and the core is supplied directly from an external source.
  364.   *            Consequently, the Standby mode is not available on those devices.
  365.   * @retval None
  366.   */
  367. void HAL_PWR_EnterSTANDBYMode(void)
  368. {
  369.   /* Select STANDBY mode */
  370.   PWR->CR |= (uint32_t)PWR_CR_PDDS;
  371.  
  372.   /* Set SLEEPDEEP bit of Cortex System Control Register */
  373.   SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
  374.  
  375.   /* This option is used to ensure that store operations are completed */
  376. #if defined ( __CC_ARM)
  377.   __force_stores();
  378. #endif
  379.   /* Request Wait For Interrupt */
  380.   __WFI();
  381. }
  382.  
  383. /**
  384.   * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode.
  385.   * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
  386.   *       re-enters SLEEP mode when an interruption handling is over.
  387.   *       Setting this bit is useful when the processor is expected to run only on
  388.   *       interruptions handling.        
  389.   * @retval None
  390.   */
  391. void HAL_PWR_EnableSleepOnExit(void)
  392. {
  393.   /* Set SLEEPONEXIT bit of Cortex System Control Register */
  394.   SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
  395. }
  396.  
  397.  
  398. /**
  399.   * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode.
  400.   * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor
  401.   *       re-enters SLEEP mode when an interruption handling is over.          
  402.   * @retval None
  403.   */
  404. void HAL_PWR_DisableSleepOnExit(void)
  405. {
  406.   /* Clear SLEEPONEXIT bit of Cortex System Control Register */
  407.   CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
  408. }
  409.  
  410.  
  411.  
  412. /**
  413.   * @brief Enables CORTEX M4 SEVONPEND bit.
  414.   * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes
  415.   *       WFE to wake up when an interrupt moves from inactive to pended.
  416.   * @retval None
  417.   */
  418. void HAL_PWR_EnableSEVOnPend(void)
  419. {
  420.   /* Set SEVONPEND bit of Cortex System Control Register */
  421.   SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
  422. }
  423.  
  424.  
  425. /**
  426.   * @brief Disables CORTEX M4 SEVONPEND bit.
  427.   * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes
  428.   *       WFE to wake up when an interrupt moves from inactive to pended.        
  429.   * @retval None
  430.   */
  431. void HAL_PWR_DisableSEVOnPend(void)
  432. {
  433.   /* Clear SEVONPEND bit of Cortex System Control Register */
  434.   CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
  435. }
  436.  
  437. /**
  438.   * @}
  439.   */
  440.  
  441. /**
  442.   * @}
  443.   */
  444.  
  445. #endif /* HAL_PWR_MODULE_ENABLED */
  446. /**
  447.   * @}
  448.   */
  449.  
  450. /**
  451.   * @}
  452.   */
  453.  
  454. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  455.