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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32f0xx_ll_pwr.h
  4.   * @author  MCD Application Team
  5.   * @brief   Header file of PWR LL module.
  6.   ******************************************************************************
  7.   * @attention
  8.   *
  9.   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  10.   * All rights reserved.</center></h2>
  11.   *
  12.   * This software component is licensed by ST under BSD 3-Clause license,
  13.   * the "License"; You may not use this file except in compliance with the
  14.   * License. You may obtain a copy of the License at:
  15.   *                        opensource.org/licenses/BSD-3-Clause
  16.   *
  17.   ******************************************************************************
  18.   */
  19.  
  20. /* Define to prevent recursive inclusion -------------------------------------*/
  21. #ifndef __STM32F0xx_LL_PWR_H
  22. #define __STM32F0xx_LL_PWR_H
  23.  
  24. #ifdef __cplusplus
  25. extern "C" {
  26. #endif
  27.  
  28. /* Includes ------------------------------------------------------------------*/
  29. #include "stm32f0xx.h"
  30.  
  31. /** @addtogroup STM32F0xx_LL_Driver
  32.   * @{
  33.   */
  34.  
  35. #if defined(PWR)
  36.  
  37. /** @defgroup PWR_LL PWR
  38.   * @{
  39.   */
  40.  
  41. /* Private types -------------------------------------------------------------*/
  42. /* Private variables ---------------------------------------------------------*/
  43. /* Private constants ---------------------------------------------------------*/
  44. /* Private macros ------------------------------------------------------------*/
  45. /* Exported types ------------------------------------------------------------*/
  46. /* Exported constants --------------------------------------------------------*/
  47. /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
  48.   * @{
  49.   */
  50.  
  51. /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
  52.   * @brief    Flags defines which can be used with LL_PWR_WriteReg function
  53.   * @{
  54.   */
  55. #define LL_PWR_CR_CSBF                     PWR_CR_CSBF            /*!< Clear standby flag */
  56. #define LL_PWR_CR_CWUF                     PWR_CR_CWUF            /*!< Clear wakeup flag */
  57. /**
  58.   * @}
  59.   */
  60.  
  61. /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
  62.   * @brief    Flags defines which can be used with LL_PWR_ReadReg function
  63.   * @{
  64.   */
  65. #define LL_PWR_CSR_WUF                     PWR_CSR_WUF            /*!< Wakeup flag */
  66. #define LL_PWR_CSR_SBF                     PWR_CSR_SBF            /*!< Standby flag */
  67. #if defined(PWR_PVD_SUPPORT)
  68. #define LL_PWR_CSR_PVDO                    PWR_CSR_PVDO           /*!< Power voltage detector output flag */
  69. #endif /* PWR_PVD_SUPPORT */
  70. #if defined(PWR_CSR_VREFINTRDYF)
  71. #define LL_PWR_CSR_VREFINTRDYF             PWR_CSR_VREFINTRDYF    /*!< VREFINT ready flag */
  72. #endif /* PWR_CSR_VREFINTRDYF */
  73. #define LL_PWR_CSR_EWUP1                   PWR_CSR_EWUP1          /*!< Enable WKUP pin 1 */
  74. #define LL_PWR_CSR_EWUP2                   PWR_CSR_EWUP2          /*!< Enable WKUP pin 2 */
  75. #if defined(PWR_CSR_EWUP3)
  76. #define LL_PWR_CSR_EWUP3                   PWR_CSR_EWUP3          /*!< Enable WKUP pin 3 */
  77. #endif /* PWR_CSR_EWUP3 */
  78. #if defined(PWR_CSR_EWUP4)
  79. #define LL_PWR_CSR_EWUP4                   PWR_CSR_EWUP4          /*!< Enable WKUP pin 4 */
  80. #endif /* PWR_CSR_EWUP4 */
  81. #if defined(PWR_CSR_EWUP5)
  82. #define LL_PWR_CSR_EWUP5                   PWR_CSR_EWUP5          /*!< Enable WKUP pin 5 */
  83. #endif /* PWR_CSR_EWUP5 */
  84. #if defined(PWR_CSR_EWUP6)
  85. #define LL_PWR_CSR_EWUP6                   PWR_CSR_EWUP6          /*!< Enable WKUP pin 6 */
  86. #endif /* PWR_CSR_EWUP6 */
  87. #if defined(PWR_CSR_EWUP7)
  88. #define LL_PWR_CSR_EWUP7                   PWR_CSR_EWUP7          /*!< Enable WKUP pin 7 */
  89. #endif /* PWR_CSR_EWUP7 */
  90. #if defined(PWR_CSR_EWUP8)
  91. #define LL_PWR_CSR_EWUP8                   PWR_CSR_EWUP8          /*!< Enable WKUP pin 8 */
  92. #endif /* PWR_CSR_EWUP8 */
  93. /**
  94.   * @}
  95.   */
  96.  
  97.  
  98. /** @defgroup PWR_LL_EC_MODE_PWR Mode Power
  99.   * @{
  100.   */
  101. #define LL_PWR_MODE_STOP_MAINREGU             0x00000000U                    /*!< Enter Stop mode when the CPU enters deepsleep */
  102. #define LL_PWR_MODE_STOP_LPREGU               (PWR_CR_LPDS)                  /*!< Enter Stop mode (with low power Regulator ON) when the CPU enters deepsleep */
  103. #define LL_PWR_MODE_STANDBY                   (PWR_CR_PDDS)                  /*!< Enter Standby mode when the CPU enters deepsleep */
  104. /**
  105.   * @}
  106.   */
  107.  
  108. #if defined(PWR_CR_LPDS)
  109. /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE  Regulator Mode In Deep Sleep Mode
  110.  * @{
  111.  */
  112. #define LL_PWR_REGU_DSMODE_MAIN        0x00000000U           /*!< Voltage Regulator in main mode during deepsleep mode */
  113. #define LL_PWR_REGU_DSMODE_LOW_POWER   (PWR_CR_LPDS)         /*!< Voltage Regulator in low-power mode during deepsleep mode */
  114. /**
  115.   * @}
  116.   */
  117. #endif /* PWR_CR_LPDS */
  118.  
  119. #if defined(PWR_PVD_SUPPORT)
  120. /** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
  121.   * @{
  122.   */
  123. #define LL_PWR_PVDLEVEL_0                  (PWR_CR_PLS_LEV0)      /*!< Voltage threshold 0 */
  124. #define LL_PWR_PVDLEVEL_1                  (PWR_CR_PLS_LEV1)      /*!< Voltage threshold 1 */
  125. #define LL_PWR_PVDLEVEL_2                  (PWR_CR_PLS_LEV2)      /*!< Voltage threshold 2 */
  126. #define LL_PWR_PVDLEVEL_3                  (PWR_CR_PLS_LEV3)      /*!< Voltage threshold 3 */
  127. #define LL_PWR_PVDLEVEL_4                  (PWR_CR_PLS_LEV4)      /*!< Voltage threshold 4 */
  128. #define LL_PWR_PVDLEVEL_5                  (PWR_CR_PLS_LEV5)      /*!< Voltage threshold 5 */
  129. #define LL_PWR_PVDLEVEL_6                  (PWR_CR_PLS_LEV6)      /*!< Voltage threshold 6 */
  130. #define LL_PWR_PVDLEVEL_7                  (PWR_CR_PLS_LEV7)      /*!< Voltage threshold 7 */
  131. /**
  132.   * @}
  133.   */
  134. #endif /* PWR_PVD_SUPPORT */
  135. /** @defgroup PWR_LL_EC_WAKEUP_PIN  Wakeup Pins
  136.   * @{
  137.   */
  138. #define LL_PWR_WAKEUP_PIN1                 (PWR_CSR_EWUP1)        /*!< WKUP pin 1 : PA0 */
  139. #define LL_PWR_WAKEUP_PIN2                 (PWR_CSR_EWUP2)        /*!< WKUP pin 2 : PC13 */
  140. #if defined(PWR_CSR_EWUP3)
  141. #define LL_PWR_WAKEUP_PIN3                 (PWR_CSR_EWUP3)        /*!< WKUP pin 3 : PE6 or PA2 according to device */
  142. #endif /* PWR_CSR_EWUP3 */
  143. #if defined(PWR_CSR_EWUP4)
  144. #define LL_PWR_WAKEUP_PIN4                 (PWR_CSR_EWUP4)        /*!< WKUP pin 4 : LLG TBD */
  145. #endif /* PWR_CSR_EWUP4 */
  146. #if defined(PWR_CSR_EWUP5)
  147. #define LL_PWR_WAKEUP_PIN5                 (PWR_CSR_EWUP5)        /*!< WKUP pin 5 : LLG TBD */
  148. #endif /* PWR_CSR_EWUP5 */
  149. #if defined(PWR_CSR_EWUP6)
  150. #define LL_PWR_WAKEUP_PIN6                 (PWR_CSR_EWUP6)        /*!< WKUP pin 6 : LLG TBD */
  151. #endif /* PWR_CSR_EWUP6 */
  152. #if defined(PWR_CSR_EWUP7)
  153. #define LL_PWR_WAKEUP_PIN7                 (PWR_CSR_EWUP7)        /*!< WKUP pin 7 : LLG TBD */
  154. #endif /* PWR_CSR_EWUP7 */
  155. #if defined(PWR_CSR_EWUP8)
  156. #define LL_PWR_WAKEUP_PIN8                 (PWR_CSR_EWUP8)        /*!< WKUP pin 8 : LLG TBD */
  157. #endif /* PWR_CSR_EWUP8 */
  158. /**
  159.   * @}
  160.   */
  161.  
  162. /**
  163.   * @}
  164.   */
  165.  
  166.  
  167. /* Exported macro ------------------------------------------------------------*/
  168. /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
  169.   * @{
  170.   */
  171.  
  172. /** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
  173.   * @{
  174.   */
  175.  
  176. /**
  177.   * @brief  Write a value in PWR register
  178.   * @param  __REG__ Register to be written
  179.   * @param  __VALUE__ Value to be written in the register
  180.   * @retval None
  181.   */
  182. #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
  183.  
  184. /**
  185.   * @brief  Read a value in PWR register
  186.   * @param  __REG__ Register to be read
  187.   * @retval Register value
  188.   */
  189. #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
  190. /**
  191.   * @}
  192.   */
  193.  
  194. /**
  195.   * @}
  196.   */
  197.  
  198. /* Exported functions --------------------------------------------------------*/
  199. /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
  200.   * @{
  201.   */
  202.  
  203. /** @defgroup PWR_LL_EF_Configuration Configuration
  204.   * @{
  205.   */
  206.  
  207. /**
  208.   * @brief  Enable access to the backup domain
  209.   * @rmtoll CR    DBP       LL_PWR_EnableBkUpAccess
  210.   * @retval None
  211.   */
  212. __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
  213. {
  214.   SET_BIT(PWR->CR, PWR_CR_DBP);
  215. }
  216.  
  217. /**
  218.   * @brief  Disable access to the backup domain
  219.   * @rmtoll CR    DBP       LL_PWR_DisableBkUpAccess
  220.   * @retval None
  221.   */
  222. __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
  223. {
  224.   CLEAR_BIT(PWR->CR, PWR_CR_DBP);
  225. }
  226.  
  227. /**
  228.   * @brief  Check if the backup domain is enabled
  229.   * @rmtoll CR    DBP       LL_PWR_IsEnabledBkUpAccess
  230.   * @retval State of bit (1 or 0).
  231.   */
  232. __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
  233. {
  234.   return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP));
  235. }
  236.  
  237. #if defined(PWR_CR_LPDS)
  238. /**
  239.   * @brief  Set voltage Regulator mode during deep sleep mode
  240.   * @rmtoll CR    LPDS         LL_PWR_SetRegulModeDS
  241.   * @param  RegulMode This parameter can be one of the following values:
  242.   *         @arg @ref LL_PWR_REGU_DSMODE_MAIN
  243.   *         @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
  244.   * @retval None
  245.   */
  246. __STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
  247. {
  248.   MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
  249. }
  250.  
  251. /**
  252.   * @brief  Get voltage Regulator mode during deep sleep mode
  253.   * @rmtoll CR    LPDS         LL_PWR_GetRegulModeDS
  254.   * @retval Returned value can be one of the following values:
  255.   *         @arg @ref LL_PWR_REGU_DSMODE_MAIN
  256.   *         @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
  257.   */
  258. __STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
  259. {
  260.   return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
  261. }
  262. #endif /* PWR_CR_LPDS */
  263.  
  264. /**
  265.   * @brief  Set Power Down mode when CPU enters deepsleep
  266.   * @rmtoll CR    PDDS         LL_PWR_SetPowerMode\n
  267.   * @rmtoll CR    LPDS         LL_PWR_SetPowerMode
  268.   * @param  PDMode This parameter can be one of the following values:
  269.   *         @arg @ref LL_PWR_MODE_STOP_MAINREGU
  270.   *         @arg @ref LL_PWR_MODE_STOP_LPREGU
  271.   *         @arg @ref LL_PWR_MODE_STANDBY
  272.   * @retval None
  273.   */
  274. __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
  275. {
  276.   MODIFY_REG(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS), PDMode);
  277. }
  278.  
  279. /**
  280.   * @brief  Get Power Down mode when CPU enters deepsleep
  281.   * @rmtoll CR    PDDS         LL_PWR_GetPowerMode\n
  282.   * @rmtoll CR    LPDS         LL_PWR_GetPowerMode
  283.   * @retval Returned value can be one of the following values:
  284.   *         @arg @ref LL_PWR_MODE_STOP_MAINREGU
  285.   *         @arg @ref LL_PWR_MODE_STOP_LPREGU
  286.   *         @arg @ref LL_PWR_MODE_STANDBY
  287.   */
  288. __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
  289. {
  290.   return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS)));
  291. }
  292.  
  293. #if defined(PWR_PVD_SUPPORT)
  294. /**
  295.   * @brief  Configure the voltage threshold detected by the Power Voltage Detector
  296.   * @rmtoll CR    PLS       LL_PWR_SetPVDLevel
  297.   * @param  PVDLevel This parameter can be one of the following values:
  298.   *         @arg @ref LL_PWR_PVDLEVEL_0
  299.   *         @arg @ref LL_PWR_PVDLEVEL_1
  300.   *         @arg @ref LL_PWR_PVDLEVEL_2
  301.   *         @arg @ref LL_PWR_PVDLEVEL_3
  302.   *         @arg @ref LL_PWR_PVDLEVEL_4
  303.   *         @arg @ref LL_PWR_PVDLEVEL_5
  304.   *         @arg @ref LL_PWR_PVDLEVEL_6
  305.   *         @arg @ref LL_PWR_PVDLEVEL_7
  306.   * @retval None
  307.   */
  308. __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
  309. {
  310.   MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
  311. }
  312.  
  313. /**
  314.   * @brief  Get the voltage threshold detection
  315.   * @rmtoll CR    PLS       LL_PWR_GetPVDLevel
  316.   * @retval Returned value can be one of the following values:
  317.   *         @arg @ref LL_PWR_PVDLEVEL_0
  318.   *         @arg @ref LL_PWR_PVDLEVEL_1
  319.   *         @arg @ref LL_PWR_PVDLEVEL_2
  320.   *         @arg @ref LL_PWR_PVDLEVEL_3
  321.   *         @arg @ref LL_PWR_PVDLEVEL_4
  322.   *         @arg @ref LL_PWR_PVDLEVEL_5
  323.   *         @arg @ref LL_PWR_PVDLEVEL_6
  324.   *         @arg @ref LL_PWR_PVDLEVEL_7
  325.   */
  326. __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
  327. {
  328.   return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
  329. }
  330.  
  331. /**
  332.   * @brief  Enable Power Voltage Detector
  333.   * @rmtoll CR    PVDE       LL_PWR_EnablePVD
  334.   * @retval None
  335.   */
  336. __STATIC_INLINE void LL_PWR_EnablePVD(void)
  337. {
  338.   SET_BIT(PWR->CR, PWR_CR_PVDE);
  339. }
  340.  
  341. /**
  342.   * @brief  Disable Power Voltage Detector
  343.   * @rmtoll CR    PVDE       LL_PWR_DisablePVD
  344.   * @retval None
  345.   */
  346. __STATIC_INLINE void LL_PWR_DisablePVD(void)
  347. {
  348.   CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
  349. }
  350.  
  351. /**
  352.   * @brief  Check if Power Voltage Detector is enabled
  353.   * @rmtoll CR    PVDE       LL_PWR_IsEnabledPVD
  354.   * @retval State of bit (1 or 0).
  355.   */
  356. __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
  357. {
  358.   return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE));
  359. }
  360. #endif /* PWR_PVD_SUPPORT */
  361.  
  362. /**
  363.   * @brief  Enable the WakeUp PINx functionality
  364.   * @rmtoll CSR   EWUP1       LL_PWR_EnableWakeUpPin\n
  365.   * @rmtoll CSR   EWUP2       LL_PWR_EnableWakeUpPin\n
  366.   * @rmtoll CSR   EWUP3       LL_PWR_EnableWakeUpPin\n
  367.   * @rmtoll CSR   EWUP4       LL_PWR_EnableWakeUpPin\n
  368.   * @rmtoll CSR   EWUP5       LL_PWR_EnableWakeUpPin\n
  369.   * @rmtoll CSR   EWUP6       LL_PWR_EnableWakeUpPin\n
  370.   * @rmtoll CSR   EWUP7       LL_PWR_EnableWakeUpPin\n
  371.   * @rmtoll CSR   EWUP8       LL_PWR_EnableWakeUpPin
  372.   * @param  WakeUpPin This parameter can be one of the following values:
  373.   *         @arg @ref LL_PWR_WAKEUP_PIN1
  374.   *         @arg @ref LL_PWR_WAKEUP_PIN2
  375.   *         @arg @ref LL_PWR_WAKEUP_PIN3 (*)
  376.   *         @arg @ref LL_PWR_WAKEUP_PIN4 (*)
  377.   *         @arg @ref LL_PWR_WAKEUP_PIN5 (*)
  378.   *         @arg @ref LL_PWR_WAKEUP_PIN6 (*)
  379.   *         @arg @ref LL_PWR_WAKEUP_PIN7 (*)
  380.   *         @arg @ref LL_PWR_WAKEUP_PIN8 (*)
  381.   *
  382.   *         (*) not available on all devices
  383.   * @retval None
  384.   */
  385. __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
  386. {
  387.   SET_BIT(PWR->CSR, WakeUpPin);
  388. }
  389.  
  390. /**
  391.   * @brief  Disable the WakeUp PINx functionality
  392.   * @rmtoll CSR   EWUP1       LL_PWR_DisableWakeUpPin\n
  393.   * @rmtoll CSR   EWUP2       LL_PWR_DisableWakeUpPin\n
  394.   * @rmtoll CSR   EWUP3       LL_PWR_DisableWakeUpPin\n
  395.   * @rmtoll CSR   EWUP4       LL_PWR_DisableWakeUpPin\n
  396.   * @rmtoll CSR   EWUP5       LL_PWR_DisableWakeUpPin\n
  397.   * @rmtoll CSR   EWUP6       LL_PWR_DisableWakeUpPin\n
  398.   * @rmtoll CSR   EWUP7       LL_PWR_DisableWakeUpPin\n
  399.   * @rmtoll CSR   EWUP8       LL_PWR_DisableWakeUpPin
  400.   * @param  WakeUpPin This parameter can be one of the following values:
  401.   *         @arg @ref LL_PWR_WAKEUP_PIN1
  402.   *         @arg @ref LL_PWR_WAKEUP_PIN2
  403.   *         @arg @ref LL_PWR_WAKEUP_PIN3 (*)
  404.   *         @arg @ref LL_PWR_WAKEUP_PIN4 (*)
  405.   *         @arg @ref LL_PWR_WAKEUP_PIN5 (*)
  406.   *         @arg @ref LL_PWR_WAKEUP_PIN6 (*)
  407.   *         @arg @ref LL_PWR_WAKEUP_PIN7 (*)
  408.   *         @arg @ref LL_PWR_WAKEUP_PIN8 (*)
  409.   *
  410.   *         (*) not available on all devices
  411.   * @retval None
  412.   */
  413. __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
  414. {
  415.   CLEAR_BIT(PWR->CSR, WakeUpPin);
  416. }
  417.  
  418. /**
  419.   * @brief  Check if the WakeUp PINx functionality is enabled
  420.   * @rmtoll CSR   EWUP1       LL_PWR_IsEnabledWakeUpPin\n
  421.   * @rmtoll CSR   EWUP2       LL_PWR_IsEnabledWakeUpPin\n
  422.   * @rmtoll CSR   EWUP3       LL_PWR_IsEnabledWakeUpPin\n
  423.   * @rmtoll CSR   EWUP4       LL_PWR_IsEnabledWakeUpPin\n
  424.   * @rmtoll CSR   EWUP5       LL_PWR_IsEnabledWakeUpPin\n
  425.   * @rmtoll CSR   EWUP6       LL_PWR_IsEnabledWakeUpPin\n
  426.   * @rmtoll CSR   EWUP7       LL_PWR_IsEnabledWakeUpPin\n
  427.   * @rmtoll CSR   EWUP8       LL_PWR_IsEnabledWakeUpPin
  428.   * @param  WakeUpPin This parameter can be one of the following values:
  429.   *         @arg @ref LL_PWR_WAKEUP_PIN1
  430.   *         @arg @ref LL_PWR_WAKEUP_PIN2
  431.   *         @arg @ref LL_PWR_WAKEUP_PIN3 (*)
  432.   *         @arg @ref LL_PWR_WAKEUP_PIN4 (*)
  433.   *         @arg @ref LL_PWR_WAKEUP_PIN5 (*)
  434.   *         @arg @ref LL_PWR_WAKEUP_PIN6 (*)
  435.   *         @arg @ref LL_PWR_WAKEUP_PIN7 (*)
  436.   *         @arg @ref LL_PWR_WAKEUP_PIN8 (*)
  437.   *
  438.   *         (*) not available on all devices
  439.   * @retval State of bit (1 or 0).
  440.   */
  441. __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
  442. {
  443.   return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin));
  444. }
  445.  
  446.  
  447. /**
  448.   * @}
  449.   */
  450.  
  451. /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
  452.   * @{
  453.   */
  454.  
  455. /**
  456.   * @brief  Get Wake-up Flag
  457.   * @rmtoll CSR   WUF       LL_PWR_IsActiveFlag_WU
  458.   * @retval State of bit (1 or 0).
  459.   */
  460. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
  461. {
  462.   return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF));
  463. }
  464.  
  465. /**
  466.   * @brief  Get Standby Flag
  467.   * @rmtoll CSR   SBF       LL_PWR_IsActiveFlag_SB
  468.   * @retval State of bit (1 or 0).
  469.   */
  470. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
  471. {
  472.   return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF));
  473. }
  474.  
  475. #if defined(PWR_PVD_SUPPORT)
  476. /**
  477.   * @brief  Indicate whether VDD voltage is below the selected PVD threshold
  478.   * @rmtoll CSR   PVDO       LL_PWR_IsActiveFlag_PVDO
  479.   * @retval State of bit (1 or 0).
  480.   */
  481. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
  482. {
  483.   return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO));
  484. }
  485. #endif /* PWR_PVD_SUPPORT */
  486.  
  487. #if defined(PWR_CSR_VREFINTRDYF)
  488. /**
  489.   * @brief  Get Internal Reference VrefInt Flag
  490.   * @rmtoll CSR   VREFINTRDYF       LL_PWR_IsActiveFlag_VREFINTRDY
  491.   * @retval State of bit (1 or 0).
  492.   */
  493. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VREFINTRDY(void)
  494. {
  495.   return (READ_BIT(PWR->CSR, PWR_CSR_VREFINTRDYF) == (PWR_CSR_VREFINTRDYF));
  496. }
  497. #endif /* PWR_CSR_VREFINTRDYF */
  498. /**
  499.   * @brief  Clear Standby Flag
  500.   * @rmtoll CR   CSBF       LL_PWR_ClearFlag_SB
  501.   * @retval None
  502.   */
  503. __STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
  504. {
  505.   SET_BIT(PWR->CR, PWR_CR_CSBF);
  506. }
  507.  
  508. /**
  509.   * @brief  Clear Wake-up Flags
  510.   * @rmtoll CR   CWUF       LL_PWR_ClearFlag_WU
  511.   * @retval None
  512.   */
  513. __STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
  514. {
  515.   SET_BIT(PWR->CR, PWR_CR_CWUF);
  516. }
  517.  
  518. /**
  519.   * @}
  520.   */
  521.  
  522. #if defined(USE_FULL_LL_DRIVER)
  523. /** @defgroup PWR_LL_EF_Init De-initialization function
  524.   * @{
  525.   */
  526. ErrorStatus LL_PWR_DeInit(void);
  527. /**
  528.   * @}
  529.   */
  530. #endif /* USE_FULL_LL_DRIVER */
  531.  
  532. /**
  533.   * @}
  534.   */
  535.  
  536. /**
  537.   * @}
  538.   */
  539.  
  540. #endif /* defined(PWR) */
  541.  
  542. /**
  543.   * @}
  544.   */
  545.  
  546. #ifdef __cplusplus
  547. }
  548. #endif
  549.  
  550. #endif /* __STM32F0xx_LL_PWR_H */
  551.  
  552. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  553.