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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32f0xx_hal_pcd.h
  4.   * @author  MCD Application Team
  5.   * @brief   Header file of PCD HAL module.
  6.   ******************************************************************************
  7.   * @attention
  8.   *
  9.   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  10.   * All rights reserved.</center></h2>
  11.   *
  12.   * This software component is licensed by ST under BSD 3-Clause license,
  13.   * the "License"; You may not use this file except in compliance with the
  14.   * License. You may obtain a copy of the License at:
  15.   *                        opensource.org/licenses/BSD-3-Clause
  16.   *
  17.   ******************************************************************************
  18.   */
  19.  
  20. /* Define to prevent recursive inclusion -------------------------------------*/
  21. #ifndef STM32F0xx_HAL_PCD_H
  22. #define STM32F0xx_HAL_PCD_H
  23.  
  24. #ifdef __cplusplus
  25. extern "C" {
  26. #endif
  27.  
  28. /* Includes ------------------------------------------------------------------*/
  29. #include "stm32f0xx_ll_usb.h"
  30.  
  31. #if defined (USB)
  32.  
  33. /** @addtogroup STM32F0xx_HAL_Driver
  34.   * @{
  35.   */
  36.  
  37. /** @addtogroup PCD
  38.   * @{
  39.   */
  40.  
  41. /* Exported types ------------------------------------------------------------*/
  42. /** @defgroup PCD_Exported_Types PCD Exported Types
  43.   * @{
  44.   */
  45.  
  46. /**
  47.   * @brief  PCD State structure definition
  48.   */
  49. typedef enum
  50. {
  51.   HAL_PCD_STATE_RESET   = 0x00,
  52.   HAL_PCD_STATE_READY   = 0x01,
  53.   HAL_PCD_STATE_ERROR   = 0x02,
  54.   HAL_PCD_STATE_BUSY    = 0x03,
  55.   HAL_PCD_STATE_TIMEOUT = 0x04
  56. } PCD_StateTypeDef;
  57.  
  58. /* Device LPM suspend state */
  59. typedef enum
  60. {
  61.   LPM_L0 = 0x00, /* on */
  62.   LPM_L1 = 0x01, /* LPM L1 sleep */
  63.   LPM_L2 = 0x02, /* suspend */
  64.   LPM_L3 = 0x03, /* off */
  65. } PCD_LPM_StateTypeDef;
  66.  
  67. typedef enum
  68. {
  69.   PCD_LPM_L0_ACTIVE = 0x00, /* on */
  70.   PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
  71. } PCD_LPM_MsgTypeDef;
  72.  
  73. typedef enum
  74. {
  75.   PCD_BCD_ERROR                     = 0xFF,
  76.   PCD_BCD_CONTACT_DETECTION         = 0xFE,
  77.   PCD_BCD_STD_DOWNSTREAM_PORT       = 0xFD,
  78.   PCD_BCD_CHARGING_DOWNSTREAM_PORT  = 0xFC,
  79.   PCD_BCD_DEDICATED_CHARGING_PORT   = 0xFB,
  80.   PCD_BCD_DISCOVERY_COMPLETED       = 0x00,
  81.  
  82. } PCD_BCD_MsgTypeDef;
  83.  
  84.  
  85.  
  86.  
  87.  
  88. typedef USB_TypeDef        PCD_TypeDef;
  89. typedef USB_CfgTypeDef     PCD_InitTypeDef;
  90. typedef USB_EPTypeDef      PCD_EPTypeDef;
  91.  
  92.  
  93. /**
  94.   * @brief  PCD Handle Structure definition
  95.   */
  96. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  97. typedef struct __PCD_HandleTypeDef
  98. #else
  99. typedef struct
  100. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  101. {
  102.   PCD_TypeDef             *Instance;   /*!< Register base address             */
  103.   PCD_InitTypeDef         Init;        /*!< PCD required parameters           */
  104.   __IO uint8_t            USB_Address; /*!< USB Address                       */
  105.   PCD_EPTypeDef           IN_ep[8];   /*!< IN endpoint parameters             */
  106.   PCD_EPTypeDef           OUT_ep[8];  /*!< OUT endpoint parameters            */
  107.   HAL_LockTypeDef         Lock;        /*!< PCD peripheral status             */
  108.   __IO PCD_StateTypeDef   State;       /*!< PCD communication state           */
  109.   __IO  uint32_t          ErrorCode;   /*!< PCD Error code                    */
  110.   uint32_t                Setup[12];   /*!< Setup packet buffer               */
  111.   PCD_LPM_StateTypeDef    LPM_State;   /*!< LPM State                         */
  112.   uint32_t                BESL;
  113.  
  114.  
  115.   uint32_t lpm_active;                 /*!< Enable or disable the Link Power Management .
  116.                                        This parameter can be set to ENABLE or DISABLE        */
  117.  
  118.   uint32_t battery_charging_active;    /*!< Enable or disable Battery charging.
  119.                                        This parameter can be set to ENABLE or DISABLE        */
  120.   void                    *pData;      /*!< Pointer to upper stack Handler */
  121.  
  122. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  123.   void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd);                              /*!< USB OTG PCD SOF callback                */
  124.   void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Setup Stage callback        */
  125.   void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd);                            /*!< USB OTG PCD Reset callback              */
  126.   void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Suspend callback            */
  127.   void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd);                           /*!< USB OTG PCD Resume callback             */
  128.   void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Connect callback            */
  129.   void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Disconnect callback         */
  130.  
  131.   void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);      /*!< USB OTG PCD Data OUT Stage callback     */
  132.   void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);       /*!< USB OTG PCD Data IN Stage callback      */
  133.   void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);  /*!< USB OTG PCD ISO OUT Incomplete callback */
  134.   void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);   /*!< USB OTG PCD ISO IN Incomplete callback  */
  135.   void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg);      /*!< USB OTG PCD BCD callback                */
  136.   void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg);      /*!< USB OTG PCD LPM callback                */
  137.  
  138.   void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Msp Init callback           */
  139.   void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd);                        /*!< USB OTG PCD Msp DeInit callback         */
  140. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  141. } PCD_HandleTypeDef;
  142.  
  143. /**
  144.   * @}
  145.   */
  146.  
  147. /* Include PCD HAL Extended module */
  148. #include "stm32f0xx_hal_pcd_ex.h"
  149.  
  150. /* Exported constants --------------------------------------------------------*/
  151. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  152.   * @{
  153.   */
  154.  
  155. /** @defgroup PCD_Speed PCD Speed
  156.   * @{
  157.   */
  158. #define PCD_SPEED_FULL               USBD_FS_SPEED
  159. /**
  160.   * @}
  161.   */
  162.  
  163. /** @defgroup PCD_PHY_Module PCD PHY Module
  164.   * @{
  165.   */
  166. #define PCD_PHY_ULPI                 1U
  167. #define PCD_PHY_EMBEDDED             2U
  168. #define PCD_PHY_UTMI                 3U
  169. /**
  170.   * @}
  171.   */
  172.  
  173. /** @defgroup PCD_Error_Code_definition PCD Error Code definition
  174.   * @brief  PCD Error Code definition
  175.   * @{
  176.   */
  177. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  178. #define  HAL_PCD_ERROR_INVALID_CALLBACK                        (0x00000010U)    /*!< Invalid Callback error  */
  179. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  180.  
  181. /**
  182.   * @}
  183.   */
  184.  
  185. /**
  186.   * @}
  187.   */
  188.  
  189. /* Exported macros -----------------------------------------------------------*/
  190. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  191.   *  @brief macros to handle interrupts and specific clock configurations
  192.   * @{
  193.   */
  194.  
  195.  
  196. #define __HAL_PCD_ENABLE(__HANDLE__)                                  (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  197. #define __HAL_PCD_DISABLE(__HANDLE__)                                 (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  198. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)                 ((USB_ReadInterrupts((__HANDLE__)->Instance)\
  199.                                                                         & (__INTERRUPT__)) == (__INTERRUPT__))
  200.  
  201. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)               (((__HANDLE__)->Instance->ISTR)\
  202.                                                                        &= (uint16_t)(~(__INTERRUPT__)))
  203.  
  204. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT()                             EXTI->IMR |= USB_WAKEUP_EXTI_LINE
  205. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT()                            EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
  206.  
  207.  
  208. /**
  209.   * @}
  210.   */
  211.  
  212. /* Exported functions --------------------------------------------------------*/
  213. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  214.   * @{
  215.   */
  216.  
  217. /* Initialization/de-initialization functions  ********************************/
  218. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  219.   * @{
  220.   */
  221. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  222. HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
  223. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  224. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  225.  
  226. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  227. /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
  228.   * @brief  HAL USB OTG PCD Callback ID enumeration definition
  229.   * @{
  230.   */
  231. typedef enum
  232. {
  233.   HAL_PCD_SOF_CB_ID          = 0x01,      /*!< USB PCD SOF callback ID          */
  234.   HAL_PCD_SETUPSTAGE_CB_ID   = 0x02,      /*!< USB PCD Setup Stage callback ID  */
  235.   HAL_PCD_RESET_CB_ID        = 0x03,      /*!< USB PCD Reset callback ID        */
  236.   HAL_PCD_SUSPEND_CB_ID      = 0x04,      /*!< USB PCD Suspend callback ID      */
  237.   HAL_PCD_RESUME_CB_ID       = 0x05,      /*!< USB PCD Resume callback ID       */
  238.   HAL_PCD_CONNECT_CB_ID      = 0x06,      /*!< USB PCD Connect callback ID      */
  239.   HAL_PCD_DISCONNECT_CB_ID   = 0x07,      /*!< USB PCD Disconnect callback ID   */
  240.  
  241.   HAL_PCD_MSPINIT_CB_ID      = 0x08,      /*!< USB PCD MspInit callback ID      */
  242.   HAL_PCD_MSPDEINIT_CB_ID    = 0x09       /*!< USB PCD MspDeInit callback ID    */
  243.  
  244. } HAL_PCD_CallbackIDTypeDef;
  245. /**
  246.   * @}
  247.   */
  248.  
  249. /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
  250.   * @brief  HAL USB OTG PCD Callback pointer definition
  251.   * @{
  252.   */
  253.  
  254. typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd);                                   /*!< pointer to a common USB OTG PCD callback function  */
  255. typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD Data OUT Stage callback     */
  256. typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD Data IN Stage callback      */
  257. typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
  258. typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD ISO IN Incomplete callback  */
  259. typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg);        /*!< pointer to USB OTG PCD LPM callback                */
  260. typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg);        /*!< pointer to USB OTG PCD BCD callback                */
  261.  
  262. /**
  263.   * @}
  264.   */
  265.  
  266. HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd,
  267.                                            HAL_PCD_CallbackIDTypeDef CallbackID,
  268.                                            pPCD_CallbackTypeDef pCallback);
  269.  
  270. HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd,
  271.                                              HAL_PCD_CallbackIDTypeDef CallbackID);
  272.  
  273. HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
  274.                                                        pPCD_DataOutStageCallbackTypeDef pCallback);
  275.  
  276. HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
  277.  
  278. HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
  279.                                                       pPCD_DataInStageCallbackTypeDef pCallback);
  280.  
  281. HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
  282.  
  283. HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
  284.                                                        pPCD_IsoOutIncpltCallbackTypeDef pCallback);
  285.  
  286. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
  287.  
  288. HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
  289.                                                       pPCD_IsoInIncpltCallbackTypeDef pCallback);
  290.  
  291. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
  292.  
  293. HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd,
  294.                                               pPCD_BcdCallbackTypeDef pCallback);
  295.  
  296. HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd);
  297.  
  298. HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd,
  299.                                               pPCD_LpmCallbackTypeDef pCallback);
  300.  
  301. HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd);
  302. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  303. /**
  304.   * @}
  305.   */
  306.  
  307. /* I/O operation functions  ***************************************************/
  308. /* Non-Blocking mode: Interrupt */
  309. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
  310.   * @{
  311.   */
  312. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  313. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  314. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  315.  
  316. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  317. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  318. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  319. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  320. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  321. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  322. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  323.  
  324. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  325. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  326. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  327. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  328. /**
  329.   * @}
  330.   */
  331.  
  332. /* Peripheral Control functions  **********************************************/
  333. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  334.   * @{
  335.   */
  336. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  337. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  338. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  339. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
  340.                                   uint16_t ep_mps, uint8_t ep_type);
  341.  
  342. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  343. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
  344.                                      uint8_t *pBuf, uint32_t len);
  345.  
  346. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
  347.                                       uint8_t *pBuf, uint32_t len);
  348.  
  349.  
  350. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  351. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  352. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  353. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  354. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  355.  
  356. uint32_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  357. /**
  358.   * @}
  359.   */
  360.  
  361. /* Peripheral State functions  ************************************************/
  362. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  363.   * @{
  364.   */
  365. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  366. /**
  367.   * @}
  368.   */
  369.  
  370. /**
  371.   * @}
  372.   */
  373.  
  374. /* Private constants ---------------------------------------------------------*/
  375. /** @defgroup PCD_Private_Constants PCD Private Constants
  376.   * @{
  377.   */
  378. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  379.   * @{
  380.   */
  381.  
  382.  
  383. #define USB_WAKEUP_EXTI_LINE                                          (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
  384.  
  385.  
  386. /**
  387.   * @}
  388.   */
  389.  
  390. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  391.   * @{
  392.   */
  393. #define PCD_EP0MPS_64                                                 EP_MPS_64
  394. #define PCD_EP0MPS_32                                                 EP_MPS_32
  395. #define PCD_EP0MPS_16                                                 EP_MPS_16
  396. #define PCD_EP0MPS_08                                                 EP_MPS_8
  397. /**
  398.   * @}
  399.   */
  400.  
  401. /** @defgroup PCD_ENDP PCD ENDP
  402.   * @{
  403.   */
  404. #define PCD_ENDP0                                                     0U
  405. #define PCD_ENDP1                                                     1U
  406. #define PCD_ENDP2                                                     2U
  407. #define PCD_ENDP3                                                     3U
  408. #define PCD_ENDP4                                                     4U
  409. #define PCD_ENDP5                                                     5U
  410. #define PCD_ENDP6                                                     6U
  411. #define PCD_ENDP7                                                     7U
  412. /**
  413.   * @}
  414.   */
  415.  
  416. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  417.   * @{
  418.   */
  419. #define PCD_SNG_BUF                                                   0U
  420. #define PCD_DBL_BUF                                                   1U
  421. /**
  422.   * @}
  423.   */
  424.  
  425. /**
  426.   * @}
  427.   */
  428.  
  429. /* Private macros ------------------------------------------------------------*/
  430. /** @defgroup PCD_Private_Macros PCD Private Macros
  431.   * @{
  432.   */
  433.  
  434. /********************  Bit definition for USB_COUNTn_RX register  *************/
  435. #define USB_CNTRX_NBLK_MSK                    (0x1FU << 10)
  436. #define USB_CNTRX_BLSIZE                      (0x1U << 15)
  437.  
  438. /* SetENDPOINT */
  439. #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue)  (*(__IO uint16_t *)\
  440.                                                     (&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
  441.  
  442. /* GetENDPOINT */
  443. #define PCD_GET_ENDPOINT(USBx, bEpNum)             (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
  444.  
  445. /* ENDPOINT transfer */
  446. #define USB_EP0StartXfer                           USB_EPStartXfer
  447.  
  448. /**
  449.   * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
  450.   * @param  USBx USB peripheral instance register address.
  451.   * @param  bEpNum Endpoint Number.
  452.   * @param  wType Endpoint Type.
  453.   * @retval None
  454.   */
  455. #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum))\
  456.                                                               & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
  457.  
  458.  
  459. /**
  460.   * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
  461.   * @param  USBx USB peripheral instance register address.
  462.   * @param  bEpNum Endpoint Number.
  463.   * @retval Endpoint Type
  464.   */
  465. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  466.  
  467. /**
  468.   * @brief free buffer used from the application realizing it to the line
  469.   *         toggles bit SW_BUF in the double buffered endpoint register
  470.   * @param USBx USB device.
  471.   * @param   bEpNum, bDir
  472.   * @retval None
  473.   */
  474. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) \
  475.   do { \
  476.     if ((bDir) == 0U) \
  477.     { \
  478.       /* OUT double buffered endpoint */ \
  479.       PCD_TX_DTOG((USBx), (bEpNum)); \
  480.     } \
  481.     else if ((bDir) == 1U) \
  482.     { \
  483.       /* IN double buffered endpoint */ \
  484.       PCD_RX_DTOG((USBx), (bEpNum)); \
  485.     } \
  486.   } while(0)
  487.  
  488. /**
  489.   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
  490.   * @param  USBx USB peripheral instance register address.
  491.   * @param  bEpNum Endpoint Number.
  492.   * @param  wState new state
  493.   * @retval None
  494.   */
  495. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \
  496.   do { \
  497.     uint16_t _wRegVal; \
  498.     \
  499.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
  500.     /* toggle first bit ? */ \
  501.     if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
  502.     { \
  503.       _wRegVal ^= USB_EPTX_DTOG1; \
  504.     } \
  505.     /* toggle second bit ?  */ \
  506.     if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
  507.     { \
  508.       _wRegVal ^= USB_EPTX_DTOG2; \
  509.     } \
  510.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  511.   } while(0) /* PCD_SET_EP_TX_STATUS */
  512.  
  513. /**
  514.   * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
  515.   * @param  USBx USB peripheral instance register address.
  516.   * @param  bEpNum Endpoint Number.
  517.   * @param  wState new state
  518.   * @retval None
  519.   */
  520. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \
  521.   do { \
  522.     uint16_t _wRegVal; \
  523.     \
  524.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
  525.     /* toggle first bit ? */ \
  526.     if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
  527.     { \
  528.       _wRegVal ^= USB_EPRX_DTOG1; \
  529.     } \
  530.     /* toggle second bit ? */ \
  531.     if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
  532.     { \
  533.       _wRegVal ^= USB_EPRX_DTOG2; \
  534.     } \
  535.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  536.   } while(0) /* PCD_SET_EP_RX_STATUS */
  537.  
  538. /**
  539.   * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  540.   * @param  USBx USB peripheral instance register address.
  541.   * @param  bEpNum Endpoint Number.
  542.   * @param  wStaterx new state.
  543.   * @param  wStatetx new state.
  544.   * @retval None
  545.   */
  546. #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \
  547.   do { \
  548.     uint16_t _wRegVal; \
  549.     \
  550.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
  551.     /* toggle first bit ? */ \
  552.     if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
  553.     { \
  554.       _wRegVal ^= USB_EPRX_DTOG1; \
  555.     } \
  556.     /* toggle second bit ? */ \
  557.     if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
  558.     { \
  559.       _wRegVal ^= USB_EPRX_DTOG2; \
  560.     } \
  561.     /* toggle first bit ? */ \
  562.     if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
  563.     { \
  564.       _wRegVal ^= USB_EPTX_DTOG1; \
  565.     } \
  566.     /* toggle second bit ?  */ \
  567.     if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
  568.     { \
  569.       _wRegVal ^= USB_EPTX_DTOG2; \
  570.     } \
  571.     \
  572.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  573.   } while(0) /* PCD_SET_EP_TXRX_STATUS */
  574.  
  575. /**
  576.   * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
  577.   *         /STAT_RX[1:0])
  578.   * @param  USBx USB peripheral instance register address.
  579.   * @param  bEpNum Endpoint Number.
  580.   * @retval status
  581.   */
  582. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  583. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  584.  
  585. /**
  586.   * @brief  sets directly the VALID tx/rx-status into the endpoint register
  587.   * @param  USBx USB peripheral instance register address.
  588.   * @param  bEpNum Endpoint Number.
  589.   * @retval None
  590.   */
  591. #define PCD_SET_EP_TX_VALID(USBx, bEpNum)      (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  592. #define PCD_SET_EP_RX_VALID(USBx, bEpNum)      (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  593.  
  594. /**
  595.   * @brief  checks stall condition in an endpoint.
  596.   * @param  USBx USB peripheral instance register address.
  597.   * @param  bEpNum Endpoint Number.
  598.   * @retval TRUE = endpoint in stall condition.
  599.   */
  600. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL)
  601. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL)
  602.  
  603. /**
  604.   * @brief  set & clear EP_KIND bit.
  605.   * @param  USBx USB peripheral instance register address.
  606.   * @param  bEpNum Endpoint Number.
  607.   * @retval None
  608.   */
  609. #define PCD_SET_EP_KIND(USBx, bEpNum) \
  610.   do { \
  611.     uint16_t _wRegVal; \
  612.     \
  613.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  614.     \
  615.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
  616.   } while(0) /* PCD_SET_EP_KIND */
  617.  
  618. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) \
  619.   do { \
  620.     uint16_t _wRegVal; \
  621.     \
  622.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
  623.     \
  624.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  625.   } while(0) /* PCD_CLEAR_EP_KIND */
  626.  
  627. /**
  628.   * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
  629.   * @param  USBx USB peripheral instance register address.
  630.   * @param  bEpNum Endpoint Number.
  631.   * @retval None
  632.   */
  633. #define PCD_SET_OUT_STATUS(USBx, bEpNum)       PCD_SET_EP_KIND((USBx), (bEpNum))
  634. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)     PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  635.  
  636. /**
  637.   * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
  638.   * @param  USBx USB peripheral instance register address.
  639.   * @param  bEpNum Endpoint Number.
  640.   * @retval None
  641.   */
  642. #define PCD_SET_BULK_EP_DBUF(USBx, bEpNum)     PCD_SET_EP_KIND((USBx), (bEpNum))
  643. #define PCD_CLEAR_BULK_EP_DBUF(USBx, bEpNum)   PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  644.  
  645. /**
  646.   * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
  647.   * @param  USBx USB peripheral instance register address.
  648.   * @param  bEpNum Endpoint Number.
  649.   * @retval None
  650.   */
  651. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \
  652.   do { \
  653.     uint16_t _wRegVal; \
  654.     \
  655.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
  656.     \
  657.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
  658.   } while(0) /* PCD_CLEAR_RX_EP_CTR */
  659.  
  660. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \
  661.   do { \
  662.     uint16_t _wRegVal; \
  663.     \
  664.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
  665.     \
  666.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
  667.   } while(0) /* PCD_CLEAR_TX_EP_CTR */
  668.  
  669. /**
  670.   * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  671.   * @param  USBx USB peripheral instance register address.
  672.   * @param  bEpNum Endpoint Number.
  673.   * @retval None
  674.   */
  675. #define PCD_RX_DTOG(USBx, bEpNum) \
  676.   do { \
  677.     uint16_t _wEPVal; \
  678.     \
  679.     _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  680.     \
  681.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
  682.   } while(0) /* PCD_RX_DTOG */
  683.  
  684. #define PCD_TX_DTOG(USBx, bEpNum) \
  685.   do { \
  686.     uint16_t _wEPVal; \
  687.     \
  688.     _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  689.     \
  690.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
  691.   } while(0) /* PCD_TX_DTOG */
  692. /**
  693.   * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  694.   * @param  USBx USB peripheral instance register address.
  695.   * @param  bEpNum Endpoint Number.
  696.   * @retval None
  697.   */
  698. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \
  699.   do { \
  700.     uint16_t _wRegVal; \
  701.     \
  702.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  703.     \
  704.     if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
  705.     { \
  706.       PCD_RX_DTOG((USBx), (bEpNum)); \
  707.     } \
  708.   } while(0) /* PCD_CLEAR_RX_DTOG */
  709.  
  710. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \
  711.   do { \
  712.     uint16_t _wRegVal; \
  713.     \
  714.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  715.     \
  716.     if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
  717.     { \
  718.       PCD_TX_DTOG((USBx), (bEpNum)); \
  719.     } \
  720.   } while(0) /* PCD_CLEAR_TX_DTOG */
  721.  
  722. /**
  723.   * @brief  Sets address in an endpoint register.
  724.   * @param  USBx USB peripheral instance register address.
  725.   * @param  bEpNum Endpoint Number.
  726.   * @param  bAddr Address.
  727.   * @retval None
  728.   */
  729. #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \
  730.   do { \
  731.     uint16_t _wRegVal; \
  732.     \
  733.     _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
  734.     \
  735.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  736.   } while(0) /* PCD_SET_EP_ADDRESS */
  737.  
  738. /**
  739.   * @brief  Gets address in an endpoint register.
  740.   * @param  USBx USB peripheral instance register address.
  741.   * @param  bEpNum Endpoint Number.
  742.   * @retval None
  743.   */
  744. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  745.  
  746. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\
  747.                                                     + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  748.  
  749. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\
  750.                                                     + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  751.  
  752.  
  753. /**
  754.   * @brief  sets address of the tx/rx buffer.
  755.   * @param  USBx USB peripheral instance register address.
  756.   * @param  bEpNum Endpoint Number.
  757.   * @param  wAddr address to be set (must be word aligned).
  758.   * @retval None
  759.   */
  760. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \
  761.   do { \
  762.     __IO uint16_t *_wRegVal; \
  763.     uint32_t _wRegBase = (uint32_t)USBx; \
  764.     \
  765.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  766.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
  767.     *_wRegVal = ((wAddr) >> 1) << 1; \
  768.   } while(0) /* PCD_SET_EP_TX_ADDRESS */
  769.  
  770. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \
  771.   do { \
  772.     __IO uint16_t *_wRegVal; \
  773.     uint32_t _wRegBase = (uint32_t)USBx; \
  774.     \
  775.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  776.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
  777.     *_wRegVal = ((wAddr) >> 1) << 1; \
  778.   } while(0) /* PCD_SET_EP_RX_ADDRESS */
  779.  
  780. /**
  781.   * @brief  Gets address of the tx/rx buffer.
  782.   * @param  USBx USB peripheral instance register address.
  783.   * @param  bEpNum Endpoint Number.
  784.   * @retval address of the buffer.
  785.   */
  786. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  787. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  788.  
  789. /**
  790.   * @brief  Sets counter of rx buffer with no. of blocks.
  791.   * @param  pdwReg Register pointer
  792.   * @param  wCount Counter.
  793.   * @param  wNBlocks no. of Blocks.
  794.   * @retval None
  795.   */
  796. #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \
  797.   do { \
  798.     (wNBlocks) = (wCount) >> 5; \
  799.     if (((wCount) & 0x1fU) == 0U) \
  800.     { \
  801.       (wNBlocks)--; \
  802.     } \
  803.     *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
  804.   } while(0) /* PCD_CALC_BLK32 */
  805.  
  806. #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \
  807.   do { \
  808.     (wNBlocks) = (wCount) >> 1; \
  809.     if (((wCount) & 0x1U) != 0U) \
  810.     { \
  811.       (wNBlocks)++; \
  812.     } \
  813.     *(pdwReg) = (uint16_t)((wNBlocks) << 10); \
  814.   } while(0) /* PCD_CALC_BLK2 */
  815.  
  816. #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \
  817.   do { \
  818.     uint32_t wNBlocks; \
  819.     if ((wCount) == 0U) \
  820.     { \
  821.       *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \
  822.       *(pdwReg) |= USB_CNTRX_BLSIZE; \
  823.     } \
  824.     else if((wCount) <= 62U) \
  825.     { \
  826.       PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
  827.     } \
  828.     else \
  829.     { \
  830.       PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
  831.     } \
  832.   } while(0) /* PCD_SET_EP_CNT_RX_REG */
  833.  
  834. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \
  835.   do { \
  836.     uint32_t _wRegBase = (uint32_t)(USBx); \
  837.     __IO uint16_t *pdwReg; \
  838.     \
  839.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  840.     pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  841.     PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
  842.   } while(0)
  843.  
  844. /**
  845.   * @brief  sets counter for the tx/rx buffer.
  846.   * @param  USBx USB peripheral instance register address.
  847.   * @param  bEpNum Endpoint Number.
  848.   * @param  wCount Counter value.
  849.   * @retval None
  850.   */
  851. #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \
  852.   do { \
  853.     uint32_t _wRegBase = (uint32_t)(USBx); \
  854.     __IO uint16_t *_wRegVal; \
  855.     \
  856.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  857.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  858.     *_wRegVal = (uint16_t)(wCount); \
  859.   } while(0)
  860.  
  861. #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \
  862.   do { \
  863.     uint32_t _wRegBase = (uint32_t)(USBx); \
  864.     __IO uint16_t *_wRegVal; \
  865.     \
  866.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  867.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  868.     PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
  869.   } while(0)
  870.  
  871. /**
  872.   * @brief  gets counter of the tx buffer.
  873.   * @param  USBx USB peripheral instance register address.
  874.   * @param  bEpNum Endpoint Number.
  875.   * @retval Counter value
  876.   */
  877. #define PCD_GET_EP_TX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
  878. #define PCD_GET_EP_RX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
  879.  
  880. /**
  881.   * @brief  Sets buffer 0/1 address in a double buffer endpoint.
  882.   * @param  USBx USB peripheral instance register address.
  883.   * @param  bEpNum Endpoint Number.
  884.   * @param  wBuf0Addr buffer 0 address.
  885.   * @retval Counter value
  886.   */
  887. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \
  888.   do { \
  889.     PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
  890.   } while(0) /* PCD_SET_EP_DBUF0_ADDR */
  891.  
  892. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \
  893.   do { \
  894.     PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
  895.   } while(0) /* PCD_SET_EP_DBUF1_ADDR */
  896.  
  897. /**
  898.   * @brief  Sets addresses in a double buffer endpoint.
  899.   * @param  USBx USB peripheral instance register address.
  900.   * @param  bEpNum Endpoint Number.
  901.   * @param  wBuf0Addr: buffer 0 address.
  902.   * @param  wBuf1Addr = buffer 1 address.
  903.   * @retval None
  904.   */
  905. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \
  906.   do { \
  907.     PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
  908.     PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
  909.   } while(0) /* PCD_SET_EP_DBUF_ADDR */
  910.  
  911. /**
  912.   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
  913.   * @param  USBx USB peripheral instance register address.
  914.   * @param  bEpNum Endpoint Number.
  915.   * @retval None
  916.   */
  917. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum)    (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  918. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum)    (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  919.  
  920. /**
  921.   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
  922.   * @param  USBx USB peripheral instance register address.
  923.   * @param  bEpNum Endpoint Number.
  924.   * @param  bDir endpoint dir  EP_DBUF_OUT = OUT
  925.   *         EP_DBUF_IN  = IN
  926.   * @param  wCount: Counter value
  927.   * @retval None
  928.   */
  929. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \
  930.   do { \
  931.     if ((bDir) == 0U) \
  932.       /* OUT endpoint */ \
  933.     { \
  934.       PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
  935.     } \
  936.     else \
  937.     { \
  938.       if ((bDir) == 1U) \
  939.       { \
  940.         /* IN endpoint */ \
  941.         PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
  942.       } \
  943.     } \
  944.   } while(0) /* SetEPDblBuf0Count*/
  945.  
  946. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \
  947.   do { \
  948.     uint32_t _wBase = (uint32_t)(USBx); \
  949.     __IO uint16_t *_wEPRegVal; \
  950.     \
  951.     if ((bDir) == 0U) \
  952.     { \
  953.       /* OUT endpoint */ \
  954.       PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
  955.     } \
  956.     else \
  957.     { \
  958.       if ((bDir) == 1U) \
  959.       { \
  960.         /* IN endpoint */ \
  961.         _wBase += (uint32_t)(USBx)->BTABLE; \
  962.         _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  963.         *_wEPRegVal = (uint16_t)(wCount); \
  964.       } \
  965.     } \
  966.   } while(0) /* SetEPDblBuf1Count */
  967.  
  968. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \
  969.   do { \
  970.     PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  971.     PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  972.   } while(0) /* PCD_SET_EP_DBUF_CNT */
  973.  
  974. /**
  975.   * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
  976.   * @param  USBx USB peripheral instance register address.
  977.   * @param  bEpNum Endpoint Number.
  978.   * @retval None
  979.   */
  980. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum)     (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  981. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum)     (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  982.  
  983.  
  984.  
  985. /**
  986.   * @}
  987.   */
  988.  
  989. /**
  990.   * @}
  991.   */
  992.  
  993. /**
  994.   * @}
  995.   */
  996. #endif /* defined (USB) */
  997.  
  998. #ifdef __cplusplus
  999. }
  1000. #endif
  1001.  
  1002. #endif /* STM32F0xx_HAL_PCD_H */
  1003.  
  1004. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  1005.