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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32f0xx_hal_pcd.h
  4.   * @author  MCD Application Team
  5.   * @brief   Header file of PCD HAL module.
  6.   ******************************************************************************
  7.   * @attention
  8.   *
  9.   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  10.   * All rights reserved.</center></h2>
  11.   *
  12.   * This software component is licensed by ST under BSD 3-Clause license,
  13.   * the "License"; You may not use this file except in compliance with the
  14.   * License. You may obtain a copy of the License at:
  15.   *                        opensource.org/licenses/BSD-3-Clause
  16.   *
  17.   ******************************************************************************
  18.   */
  19.  
  20. /* Define to prevent recursive inclusion -------------------------------------*/
  21. #ifndef STM32F0xx_HAL_PCD_H
  22. #define STM32F0xx_HAL_PCD_H
  23.  
  24. #ifdef __cplusplus
  25. extern "C" {
  26. #endif
  27.  
  28. /* Includes ------------------------------------------------------------------*/
  29. #include "stm32f0xx_ll_usb.h"
  30.  
  31. #if defined (USB)
  32.  
  33. /** @addtogroup STM32F0xx_HAL_Driver
  34.   * @{
  35.   */
  36.  
  37. /** @addtogroup PCD
  38.   * @{
  39.   */
  40.  
  41. /* Exported types ------------------------------------------------------------*/
  42. /** @defgroup PCD_Exported_Types PCD Exported Types
  43.   * @{
  44.   */
  45.  
  46. /**
  47.   * @brief  PCD State structure definition
  48.   */
  49. typedef enum
  50. {
  51.   HAL_PCD_STATE_RESET   = 0x00,
  52.   HAL_PCD_STATE_READY   = 0x01,
  53.   HAL_PCD_STATE_ERROR   = 0x02,
  54.   HAL_PCD_STATE_BUSY    = 0x03,
  55.   HAL_PCD_STATE_TIMEOUT = 0x04
  56. } PCD_StateTypeDef;
  57.  
  58. /* Device LPM suspend state */
  59. typedef enum
  60. {
  61.   LPM_L0 = 0x00, /* on */
  62.   LPM_L1 = 0x01, /* LPM L1 sleep */
  63.   LPM_L2 = 0x02, /* suspend */
  64.   LPM_L3 = 0x03, /* off */
  65. } PCD_LPM_StateTypeDef;
  66.  
  67. typedef enum
  68. {
  69.   PCD_LPM_L0_ACTIVE = 0x00, /* on */
  70.   PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
  71. } PCD_LPM_MsgTypeDef;
  72.  
  73. typedef enum
  74. {
  75.   PCD_BCD_ERROR                     = 0xFF,
  76.   PCD_BCD_CONTACT_DETECTION         = 0xFE,
  77.   PCD_BCD_STD_DOWNSTREAM_PORT       = 0xFD,
  78.   PCD_BCD_CHARGING_DOWNSTREAM_PORT  = 0xFC,
  79.   PCD_BCD_DEDICATED_CHARGING_PORT   = 0xFB,
  80.   PCD_BCD_DISCOVERY_COMPLETED       = 0x00,
  81.  
  82. } PCD_BCD_MsgTypeDef;
  83.  
  84.  
  85.  
  86.  
  87.  
  88. typedef USB_TypeDef        PCD_TypeDef;
  89. typedef USB_CfgTypeDef     PCD_InitTypeDef;
  90. typedef USB_EPTypeDef      PCD_EPTypeDef;
  91.  
  92.  
  93. /**
  94.   * @brief  PCD Handle Structure definition
  95.   */
  96. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  97. typedef struct __PCD_HandleTypeDef
  98. #else
  99. typedef struct
  100. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  101. {
  102.   PCD_TypeDef             *Instance;   /*!< Register base address              */
  103.   PCD_InitTypeDef         Init;        /*!< PCD required parameters            */
  104.   __IO uint8_t            USB_Address; /*!< USB Address                        */
  105.   PCD_EPTypeDef           IN_ep[8];   /*!< IN endpoint parameters             */
  106.   PCD_EPTypeDef           OUT_ep[8];  /*!< OUT endpoint parameters            */
  107.   HAL_LockTypeDef         Lock;        /*!< PCD peripheral status              */
  108.   __IO PCD_StateTypeDef   State;       /*!< PCD communication state            */
  109.   __IO  uint32_t          ErrorCode;   /*!< PCD Error code                     */
  110.   uint32_t                Setup[12];   /*!< Setup packet buffer                */
  111.   PCD_LPM_StateTypeDef    LPM_State;   /*!< LPM State                          */
  112.   uint32_t                BESL;
  113.  
  114.  
  115.   uint32_t lpm_active;                 /*!< Enable or disable the Link Power Management .
  116.                                        This parameter can be set to ENABLE or DISABLE        */
  117.  
  118.   uint32_t battery_charging_active;    /*!< Enable or disable Battery charging.
  119.                                        This parameter can be set to ENABLE or DISABLE        */
  120.   void                    *pData;      /*!< Pointer to upper stack Handler */
  121.  
  122. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  123.   void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd);                              /*!< USB OTG PCD SOF callback                */
  124.   void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Setup Stage callback        */
  125.   void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd);                            /*!< USB OTG PCD Reset callback              */
  126.   void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Suspend callback            */
  127.   void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd);                           /*!< USB OTG PCD Resume callback             */
  128.   void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Connect callback            */
  129.   void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Disconnect callback         */
  130.  
  131.   void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);      /*!< USB OTG PCD Data OUT Stage callback     */
  132.   void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);       /*!< USB OTG PCD Data IN Stage callback      */
  133.   void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);  /*!< USB OTG PCD ISO OUT Incomplete callback */
  134.   void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);   /*!< USB OTG PCD ISO IN Incomplete callback  */
  135.   void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg);      /*!< USB OTG PCD BCD callback                */
  136.   void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg);      /*!< USB OTG PCD LPM callback                */
  137.  
  138.   void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Msp Init callback           */
  139.   void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd);                        /*!< USB OTG PCD Msp DeInit callback         */
  140. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  141. } PCD_HandleTypeDef;
  142.  
  143. /**
  144.   * @}
  145.   */
  146.  
  147. /* Include PCD HAL Extended module */
  148. #include "stm32f0xx_hal_pcd_ex.h"
  149.  
  150. /* Exported constants --------------------------------------------------------*/
  151. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  152.   * @{
  153.   */
  154.  
  155. /** @defgroup PCD_Speed PCD Speed
  156.   * @{
  157.   */
  158. #define PCD_SPEED_FULL               USBD_FS_SPEED
  159. /**
  160.   * @}
  161.   */
  162.  
  163. /** @defgroup PCD_PHY_Module PCD PHY Module
  164.   * @{
  165.   */
  166. #define PCD_PHY_ULPI                 1U
  167. #define PCD_PHY_EMBEDDED             2U
  168. #define PCD_PHY_UTMI                 3U
  169. /**
  170.   * @}
  171.   */
  172.  
  173. /** @defgroup PCD_Error_Code_definition PCD Error Code definition
  174.   * @brief  PCD Error Code definition
  175.   * @{
  176.   */
  177. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  178. #define  HAL_PCD_ERROR_INVALID_CALLBACK                        (0x00000010U)    /*!< Invalid Callback error  */
  179. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  180.  
  181. /**
  182.   * @}
  183.   */
  184.  
  185. /**
  186.   * @}
  187.   */
  188.  
  189. /* Exported macros -----------------------------------------------------------*/
  190. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  191.  *  @brief macros to handle interrupts and specific clock configurations
  192.  * @{
  193.  */
  194.  
  195.  
  196. #define __HAL_PCD_ENABLE(__HANDLE__)                                  (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  197. #define __HAL_PCD_DISABLE(__HANDLE__)                                 (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  198. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)                 ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  199. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)               (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
  200.  
  201. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT()                             EXTI->IMR |= USB_WAKEUP_EXTI_LINE
  202. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT()                            EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
  203.  
  204.  
  205. /**
  206.   * @}
  207.   */
  208.  
  209. /* Exported functions --------------------------------------------------------*/
  210. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  211.   * @{
  212.   */
  213.  
  214. /* Initialization/de-initialization functions  ********************************/
  215. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  216.   * @{
  217.   */
  218. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  219. HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
  220. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  221. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  222.  
  223. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  224. /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
  225.   * @brief  HAL USB OTG PCD Callback ID enumeration definition
  226.   * @{
  227.   */
  228. typedef enum
  229. {
  230.   HAL_PCD_SOF_CB_ID          = 0x01,      /*!< USB PCD SOF callback ID          */
  231.   HAL_PCD_SETUPSTAGE_CB_ID   = 0x02,      /*!< USB PCD Setup Stage callback ID  */
  232.   HAL_PCD_RESET_CB_ID        = 0x03,      /*!< USB PCD Reset callback ID        */
  233.   HAL_PCD_SUSPEND_CB_ID      = 0x04,      /*!< USB PCD Suspend callback ID      */
  234.   HAL_PCD_RESUME_CB_ID       = 0x05,      /*!< USB PCD Resume callback ID       */
  235.   HAL_PCD_CONNECT_CB_ID      = 0x06,      /*!< USB PCD Connect callback ID      */
  236.   HAL_PCD_DISCONNECT_CB_ID  = 0x07,      /*!< USB PCD Disconnect callback ID   */
  237.  
  238.   HAL_PCD_MSPINIT_CB_ID      = 0x08,      /*!< USB PCD MspInit callback ID      */
  239.   HAL_PCD_MSPDEINIT_CB_ID    = 0x09       /*!< USB PCD MspDeInit callback ID    */
  240.  
  241. } HAL_PCD_CallbackIDTypeDef;
  242. /**
  243.   * @}
  244.   */
  245.  
  246. /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
  247.   * @brief  HAL USB OTG PCD Callback pointer definition
  248.   * @{
  249.   */
  250.  
  251. typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd);                                   /*!< pointer to a common USB OTG PCD callback function  */
  252. typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD Data OUT Stage callback     */
  253. typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD Data IN Stage callback      */
  254. typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
  255. typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD ISO IN Incomplete callback  */
  256. typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg);        /*!< pointer to USB OTG PCD LPM callback                */
  257. typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg);        /*!< pointer to USB OTG PCD BCD callback                */
  258.  
  259. /**
  260.   * @}
  261.   */
  262.  
  263. HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback);
  264. HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
  265.  
  266. HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback);
  267. HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
  268.  
  269. HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback);
  270. HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
  271.  
  272. HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback);
  273. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
  274.  
  275. HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback);
  276. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
  277.  
  278. HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback);
  279. HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd);
  280.  
  281. HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback);
  282. HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd);
  283. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  284. /**
  285.   * @}
  286.   */
  287.  
  288. /* I/O operation functions  ***************************************************/
  289. /* Non-Blocking mode: Interrupt */
  290. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
  291.   * @{
  292.   */
  293. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  294. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  295. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  296.  
  297. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  298. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  299. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  300. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  301. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  302. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  303. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  304.  
  305. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  306. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  307. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  308. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  309. /**
  310.   * @}
  311.   */
  312.  
  313. /* Peripheral Control functions  **********************************************/
  314. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  315.   * @{
  316.   */
  317. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  318. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  319. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  320. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  321. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  322. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  323. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  324. uint32_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  325. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  326. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  327. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  328. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  329. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  330. /**
  331.   * @}
  332.   */
  333.  
  334. /* Peripheral State functions  ************************************************/
  335. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  336.   * @{
  337.   */
  338. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  339. /**
  340.   * @}
  341.   */
  342.  
  343. /**
  344.   * @}
  345.   */
  346.  
  347. /* Private constants ---------------------------------------------------------*/
  348. /** @defgroup PCD_Private_Constants PCD Private Constants
  349.   * @{
  350.   */
  351. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  352.   * @{
  353.   */
  354.  
  355.  
  356. #define  USB_WAKEUP_EXTI_LINE                                         (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
  357.  
  358.  
  359. /**
  360.   * @}
  361.   */
  362.  
  363. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  364.   * @{
  365.   */
  366. #define PCD_EP0MPS_64                                                 DEP0CTL_MPS_64
  367. #define PCD_EP0MPS_32                                                 DEP0CTL_MPS_32
  368. #define PCD_EP0MPS_16                                                 DEP0CTL_MPS_16
  369. #define PCD_EP0MPS_08                                                 DEP0CTL_MPS_8
  370. /**
  371.   * @}
  372.   */
  373.  
  374. /** @defgroup PCD_ENDP PCD ENDP
  375.   * @{
  376.   */
  377. #define PCD_ENDP0                                                     0U
  378. #define PCD_ENDP1                                                     1U
  379. #define PCD_ENDP2                                                     2U
  380. #define PCD_ENDP3                                                     3U
  381. #define PCD_ENDP4                                                     4U
  382. #define PCD_ENDP5                                                     5U
  383. #define PCD_ENDP6                                                     6U
  384. #define PCD_ENDP7                                                     7U
  385. /**
  386.   * @}
  387.   */
  388.  
  389. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  390.   * @{
  391.   */
  392. #define PCD_SNG_BUF                                                   0U
  393. #define PCD_DBL_BUF                                                   1U
  394. /**
  395.   * @}
  396.   */
  397.  
  398. /**
  399.   * @}
  400.   */
  401.  
  402. /* Private macros ------------------------------------------------------------*/
  403. /** @defgroup PCD_Private_Macros PCD Private Macros
  404.  * @{
  405.  */
  406.  
  407. /********************  Bit definition for USB_COUNTn_RX register  *************/
  408. #define USB_CNTRX_NBLK_MSK                    (0x1FU << 10)
  409. #define USB_CNTRX_BLSIZE                      (0x1U << 15)
  410.  
  411. /* SetENDPOINT */
  412. #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue)  (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
  413.  
  414. /* GetENDPOINT */
  415. #define PCD_GET_ENDPOINT(USBx, bEpNum)            (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
  416.  
  417. /* ENDPOINT transfer */
  418. #define USB_EP0StartXfer                          USB_EPStartXfer
  419.  
  420. /**
  421.   * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
  422.   * @param  USBx USB peripheral instance register address.
  423.   * @param  bEpNum Endpoint Number.
  424.   * @param  wType Endpoint Type.
  425.   * @retval None
  426.   */
  427. #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  428.                                              ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
  429.  
  430. /**
  431.   * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
  432.   * @param  USBx USB peripheral instance register address.
  433.   * @param  bEpNum Endpoint Number.
  434.   * @retval Endpoint Type
  435.   */
  436. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  437.  
  438. /**
  439.   * @brief free buffer used from the application realizing it to the line
  440.   *         toggles bit SW_BUF in the double buffered endpoint register
  441.   * @param USBx USB device.
  442.   * @param   bEpNum, bDir
  443.   * @retval None
  444.   */
  445. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) do { \
  446.   if ((bDir) == 0U) \
  447.   { \
  448.     /* OUT double buffered endpoint */ \
  449.     PCD_TX_DTOG((USBx), (bEpNum)); \
  450.   } \
  451.   else if ((bDir) == 1U) \
  452.   { \
  453.     /* IN double buffered endpoint */ \
  454.     PCD_RX_DTOG((USBx), (bEpNum)); \
  455.   } \
  456. } while(0)
  457.  
  458. /**
  459.   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
  460.   * @param  USBx USB peripheral instance register address.
  461.   * @param  bEpNum Endpoint Number.
  462.   * @param  wState new state
  463.   * @retval None
  464.   */
  465. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do { \
  466.    register uint16_t _wRegVal; \
  467.    \
  468.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
  469.    /* toggle first bit ? */ \
  470.    if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
  471.    { \
  472.       _wRegVal ^= USB_EPTX_DTOG1; \
  473.    } \
  474.    /* toggle second bit ?  */ \
  475.    if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
  476.    { \
  477.       _wRegVal ^= USB_EPTX_DTOG2; \
  478.    } \
  479.    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  480.   } while(0) /* PCD_SET_EP_TX_STATUS */
  481.  
  482. /**
  483.   * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
  484.   * @param  USBx USB peripheral instance register address.
  485.   * @param  bEpNum Endpoint Number.
  486.   * @param  wState new state
  487.   * @retval None
  488.   */
  489. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do { \
  490.     register uint16_t _wRegVal; \
  491.     \
  492.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
  493.     /* toggle first bit ? */ \
  494.     if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
  495.     { \
  496.        _wRegVal ^= USB_EPRX_DTOG1; \
  497.     } \
  498.     /* toggle second bit ? */ \
  499.     if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
  500.     { \
  501.        _wRegVal ^= USB_EPRX_DTOG2; \
  502.     } \
  503.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  504.   } while(0) /* PCD_SET_EP_RX_STATUS */
  505.  
  506. /**
  507.   * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  508.   * @param  USBx USB peripheral instance register address.
  509.   * @param  bEpNum Endpoint Number.
  510.   * @param  wStaterx new state.
  511.   * @param  wStatetx new state.
  512.   * @retval None
  513.   */
  514. #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) do { \
  515.     register uint16_t _wRegVal; \
  516.     \
  517.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
  518.     /* toggle first bit ? */ \
  519.     if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
  520.     { \
  521.       _wRegVal ^= USB_EPRX_DTOG1; \
  522.     } \
  523.     /* toggle second bit ? */ \
  524.     if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
  525.     { \
  526.       _wRegVal ^= USB_EPRX_DTOG2; \
  527.     } \
  528.     /* toggle first bit ? */ \
  529.     if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
  530.     { \
  531.       _wRegVal ^= USB_EPTX_DTOG1; \
  532.     } \
  533.     /* toggle second bit ?  */ \
  534.     if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
  535.     { \
  536.       _wRegVal ^= USB_EPTX_DTOG2; \
  537.     } \
  538.     \
  539.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  540.   } while(0) /* PCD_SET_EP_TXRX_STATUS */
  541.  
  542. /**
  543.   * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
  544.   *         /STAT_RX[1:0])
  545.   * @param  USBx USB peripheral instance register address.
  546.   * @param  bEpNum Endpoint Number.
  547.   * @retval status
  548.   */
  549. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  550. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  551.  
  552. /**
  553.   * @brief  sets directly the VALID tx/rx-status into the endpoint register
  554.   * @param  USBx USB peripheral instance register address.
  555.   * @param  bEpNum Endpoint Number.
  556.   * @retval None
  557.   */
  558. #define PCD_SET_EP_TX_VALID(USBx, bEpNum)      (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  559. #define PCD_SET_EP_RX_VALID(USBx, bEpNum)      (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  560.  
  561. /**
  562.   * @brief  checks stall condition in an endpoint.
  563.   * @param  USBx USB peripheral instance register address.
  564.   * @param  bEpNum Endpoint Number.
  565.   * @retval TRUE = endpoint in stall condition.
  566.   */
  567. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
  568.                                    == USB_EP_TX_STALL)
  569. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
  570.                                    == USB_EP_RX_STALL)
  571.  
  572. /**
  573.   * @brief  set & clear EP_KIND bit.
  574.   * @param  USBx USB peripheral instance register address.
  575.   * @param  bEpNum Endpoint Number.
  576.   * @retval None
  577.   */
  578. #define PCD_SET_EP_KIND(USBx, bEpNum) do { \
  579.     register uint16_t _wRegVal; \
  580.     \
  581.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  582.     \
  583.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
  584.   } while(0) /* PCD_SET_EP_KIND */
  585.  
  586. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) do { \
  587.     register uint16_t _wRegVal; \
  588.     \
  589.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
  590.     \
  591.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  592.   } while(0) /* PCD_CLEAR_EP_KIND */
  593.  
  594. /**
  595.   * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
  596.   * @param  USBx USB peripheral instance register address.
  597.   * @param  bEpNum Endpoint Number.
  598.   * @retval None
  599.   */
  600. #define PCD_SET_OUT_STATUS(USBx, bEpNum)       PCD_SET_EP_KIND((USBx), (bEpNum))
  601. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)     PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  602.  
  603. /**
  604.   * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
  605.   * @param  USBx USB peripheral instance register address.
  606.   * @param  bEpNum Endpoint Number.
  607.   * @retval None
  608.   */
  609. #define PCD_SET_EP_DBUF(USBx, bEpNum)          PCD_SET_EP_KIND((USBx), (bEpNum))
  610. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum)        PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  611.  
  612. /**
  613.   * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
  614.   * @param  USBx USB peripheral instance register address.
  615.   * @param  bEpNum Endpoint Number.
  616.   * @retval None
  617.   */
  618. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) do { \
  619.     register uint16_t _wRegVal; \
  620.     \
  621.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
  622.     \
  623.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
  624.   } while(0) /* PCD_CLEAR_RX_EP_CTR */
  625.  
  626. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) do { \
  627.     register uint16_t _wRegVal; \
  628.     \
  629.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
  630.     \
  631.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
  632.   } while(0) /* PCD_CLEAR_TX_EP_CTR */
  633.  
  634. /**
  635.   * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  636.   * @param  USBx USB peripheral instance register address.
  637.   * @param  bEpNum Endpoint Number.
  638.   * @retval None
  639.   */
  640. #define PCD_RX_DTOG(USBx, bEpNum) do { \
  641.     register uint16_t _wEPVal; \
  642.     \
  643.     _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  644.     \
  645.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
  646.   } while(0) /* PCD_RX_DTOG */
  647.  
  648. #define PCD_TX_DTOG(USBx, bEpNum) do { \
  649.     register uint16_t _wEPVal; \
  650.     \
  651.     _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  652.     \
  653.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
  654.   } while(0) /* PCD_TX_DTOG */
  655. /**
  656.   * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  657.   * @param  USBx USB peripheral instance register address.
  658.   * @param  bEpNum Endpoint Number.
  659.   * @retval None
  660.   */
  661. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) do { \
  662.     register uint16_t _wRegVal; \
  663.     \
  664.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  665.     \
  666.     if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
  667.     { \
  668.       PCD_RX_DTOG((USBx), (bEpNum)); \
  669.     } \
  670.   } while(0) /* PCD_CLEAR_RX_DTOG */
  671.  
  672. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) do { \
  673.     register uint16_t _wRegVal; \
  674.     \
  675.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  676.     \
  677.     if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
  678.     { \
  679.       PCD_TX_DTOG((USBx), (bEpNum)); \
  680.     } \
  681.   } while(0) /* PCD_CLEAR_TX_DTOG */
  682.  
  683. /**
  684.   * @brief  Sets address in an endpoint register.
  685.   * @param  USBx USB peripheral instance register address.
  686.   * @param  bEpNum Endpoint Number.
  687.   * @param  bAddr Address.
  688.   * @retval None
  689.   */
  690. #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) do { \
  691.     register uint16_t _wRegVal; \
  692.     \
  693.     _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
  694.     \
  695.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  696.   } while(0) /* PCD_SET_EP_ADDRESS */
  697.  
  698. /**
  699.   * @brief  Gets address in an endpoint register.
  700.   * @param  USBx USB peripheral instance register address.
  701.   * @param  bEpNum Endpoint Number.
  702.   * @retval None
  703.   */
  704. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  705.  
  706. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  707. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  708.  
  709. /**
  710.   * @brief  sets address of the tx/rx buffer.
  711.   * @param  USBx USB peripheral instance register address.
  712.   * @param  bEpNum Endpoint Number.
  713.   * @param  wAddr address to be set (must be word aligned).
  714.   * @retval None
  715.   */
  716. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) do { \
  717.   register uint16_t *_wRegVal; \
  718.   register uint32_t _wRegBase = (uint32_t)USBx; \
  719.   \
  720.   _wRegBase += (uint32_t)(USBx)->BTABLE; \
  721.   _wRegVal = (uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
  722.   *_wRegVal = ((wAddr) >> 1) << 1; \
  723. } while(0) /* PCD_SET_EP_TX_ADDRESS */
  724.  
  725. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) do { \
  726.   register uint16_t *_wRegVal; \
  727.   register uint32_t _wRegBase = (uint32_t)USBx; \
  728.   \
  729.   _wRegBase += (uint32_t)(USBx)->BTABLE; \
  730.   _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
  731.   *_wRegVal = ((wAddr) >> 1) << 1; \
  732. } while(0) /* PCD_SET_EP_RX_ADDRESS */
  733.  
  734. /**
  735.   * @brief  Gets address of the tx/rx buffer.
  736.   * @param  USBx USB peripheral instance register address.
  737.   * @param  bEpNum Endpoint Number.
  738.   * @retval address of the buffer.
  739.   */
  740. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  741. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  742.  
  743. /**
  744.   * @brief  Sets counter of rx buffer with no. of blocks.
  745.   * @param  pdwReg Register pointer
  746.   * @param  wCount Counter.
  747.   * @param  wNBlocks no. of Blocks.
  748.   * @retval None
  749.   */
  750. #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) do { \
  751.     (wNBlocks) = (wCount) >> 5; \
  752.     if (((wCount) & 0x1fU) == 0U) \
  753.     { \
  754.       (wNBlocks)--; \
  755.     } \
  756.     *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
  757.   } while(0) /* PCD_CALC_BLK32 */
  758.  
  759. #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) do { \
  760.     (wNBlocks) = (wCount) >> 1; \
  761.     if (((wCount) & 0x1U) != 0U) \
  762.     { \
  763.       (wNBlocks)++; \
  764.     } \
  765.     *(pdwReg) = (uint16_t)((wNBlocks) << 10); \
  766.   } while(0) /* PCD_CALC_BLK2 */
  767.  
  768. #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount)  do { \
  769.     uint32_t wNBlocks; \
  770.     if ((wCount) == 0U) \
  771.     { \
  772.       *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \
  773.       *(pdwReg) |= USB_CNTRX_BLSIZE; \
  774.     } \
  775.     else if((wCount) <= 62U) \
  776.     { \
  777.       PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
  778.     } \
  779.     else \
  780.     { \
  781.       PCD_CALC_BLK32((pdwReg),(wCount), wNBlocks); \
  782.     } \
  783.   } while(0) /* PCD_SET_EP_CNT_RX_REG */
  784.  
  785. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) do { \
  786.      register uint32_t _wRegBase = (uint32_t)(USBx); \
  787.      uint16_t *pdwReg; \
  788.      \
  789.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  790.     pdwReg = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  791.     PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
  792.   } while(0)
  793.  
  794. /**
  795.   * @brief  sets counter for the tx/rx buffer.
  796.   * @param  USBx USB peripheral instance register address.
  797.   * @param  bEpNum Endpoint Number.
  798.   * @param  wCount Counter value.
  799.   * @retval None
  800.   */
  801. #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) do { \
  802.     register uint32_t _wRegBase = (uint32_t)(USBx); \
  803.     uint16_t *_wRegVal; \
  804.     \
  805.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  806.     _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  807.     *_wRegVal = (uint16_t)(wCount); \
  808. } while(0)
  809.  
  810. #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) do { \
  811.     register uint32_t _wRegBase = (uint32_t)(USBx); \
  812.     uint16_t *_wRegVal; \
  813.     \
  814.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  815.     _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  816.     PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
  817. } while(0)
  818.  
  819. /**
  820.   * @brief  gets counter of the tx buffer.
  821.   * @param  USBx USB peripheral instance register address.
  822.   * @param  bEpNum Endpoint Number.
  823.   * @retval Counter value
  824.   */
  825. #define PCD_GET_EP_TX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
  826. #define PCD_GET_EP_RX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
  827.  
  828. /**
  829.   * @brief  Sets buffer 0/1 address in a double buffer endpoint.
  830.   * @param  USBx USB peripheral instance register address.
  831.   * @param  bEpNum Endpoint Number.
  832.   * @param  wBuf0Addr buffer 0 address.
  833.   * @retval Counter value
  834.   */
  835. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) do { \
  836.     PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
  837.   } while(0) /* PCD_SET_EP_DBUF0_ADDR */
  838. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) do { \
  839.     PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
  840.   } while(0) /* PCD_SET_EP_DBUF1_ADDR */
  841.  
  842. /**
  843.   * @brief  Sets addresses in a double buffer endpoint.
  844.   * @param  USBx USB peripheral instance register address.
  845.   * @param  bEpNum Endpoint Number.
  846.   * @param  wBuf0Addr: buffer 0 address.
  847.   * @param  wBuf1Addr = buffer 1 address.
  848.   * @retval None
  849.   */
  850. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) do { \
  851.     PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
  852.     PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
  853.   } while(0) /* PCD_SET_EP_DBUF_ADDR */
  854.  
  855. /**
  856.   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
  857.   * @param  USBx USB peripheral instance register address.
  858.   * @param  bEpNum Endpoint Number.
  859.   * @retval None
  860.   */
  861. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum)    (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  862. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum)    (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  863.  
  864. /**
  865.   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
  866.   * @param  USBx USB peripheral instance register address.
  867.   * @param  bEpNum Endpoint Number.
  868.   * @param  bDir endpoint dir  EP_DBUF_OUT = OUT
  869.   *         EP_DBUF_IN  = IN
  870.   * @param  wCount: Counter value
  871.   * @retval None
  872.   */
  873. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) do { \
  874.     if ((bDir) == 0U) \
  875.       /* OUT endpoint */ \
  876.     { \
  877.       PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
  878.     } \
  879.     else \
  880.     { \
  881.       if ((bDir) == 1U) \
  882.       { \
  883.         /* IN endpoint */ \
  884.         PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
  885.       } \
  886.     } \
  887.   } while(0) /* SetEPDblBuf0Count*/
  888.  
  889. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) do { \
  890.     register uint32_t _wBase = (uint32_t)(USBx); \
  891.     uint16_t *_wEPRegVal; \
  892.     \
  893.     if ((bDir) == 0U) \
  894.     { \
  895.       /* OUT endpoint */ \
  896.       PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
  897.     } \
  898.     else \
  899.     { \
  900.       if ((bDir) == 1U) \
  901.       { \
  902.         /* IN endpoint */ \
  903.         _wBase += (uint32_t)(USBx)->BTABLE; \
  904.         _wEPRegVal = (uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  905.         *_wEPRegVal = (uint16_t)(wCount); \
  906.       } \
  907.     } \
  908.   } while(0) /* SetEPDblBuf1Count */
  909.  
  910. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do { \
  911.     PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  912.     PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  913.   } while(0) /* PCD_SET_EP_DBUF_CNT  */
  914.  
  915. /**
  916.   * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
  917.   * @param  USBx USB peripheral instance register address.
  918.   * @param  bEpNum Endpoint Number.
  919.   * @retval None
  920.   */
  921. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum)     (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  922. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum)     (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  923.  
  924.  
  925.  
  926. /**
  927.   * @}
  928.   */
  929.  
  930. /**
  931.   * @}
  932.   */
  933.  
  934. /**
  935.   * @}
  936.   */
  937. #endif /* defined (USB) */
  938.  
  939. #ifdef __cplusplus
  940. }
  941. #endif
  942.  
  943. #endif /* STM32F0xx_HAL_PCD_H */
  944.  
  945. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  946.