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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32_hal_legacy.h
  4.   * @author  MCD Application Team
  5.   * @brief   This file contains aliases definition for the STM32Cube HAL constants
  6.   *          macros and functions maintained for legacy purpose.
  7.   ******************************************************************************
  8.   * @attention
  9.   *
  10.   * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
  11.   * All rights reserved.</center></h2>
  12.   *
  13.   * This software component is licensed by ST under BSD 3-Clause license,
  14.   * the "License"; You may not use this file except in compliance with the
  15.   * License. You may obtain a copy of the License at:
  16.   *                        opensource.org/licenses/BSD-3-Clause
  17.   *
  18.   ******************************************************************************
  19.   */
  20.  
  21. /* Define to prevent recursive inclusion -------------------------------------*/
  22. #ifndef STM32_HAL_LEGACY
  23. #define STM32_HAL_LEGACY
  24.  
  25. #ifdef __cplusplus
  26. extern "C" {
  27. #endif
  28.  
  29. /* Includes ------------------------------------------------------------------*/
  30. /* Exported types ------------------------------------------------------------*/
  31. /* Exported constants --------------------------------------------------------*/
  32.  
  33. /** @defgroup HAL_AES_Aliased_Defines HAL CRYP Aliased Defines maintained for legacy purpose
  34.   * @{
  35.   */
  36. #define AES_FLAG_RDERR                  CRYP_FLAG_RDERR
  37. #define AES_FLAG_WRERR                  CRYP_FLAG_WRERR
  38. #define AES_CLEARFLAG_CCF               CRYP_CLEARFLAG_CCF
  39. #define AES_CLEARFLAG_RDERR             CRYP_CLEARFLAG_RDERR
  40. #define AES_CLEARFLAG_WRERR             CRYP_CLEARFLAG_WRERR
  41. #if defined(STM32U5)
  42. #define CRYP_DATATYPE_32B               CRYP_NO_SWAP
  43. #define CRYP_DATATYPE_16B               CRYP_HALFWORD_SWAP
  44. #define CRYP_DATATYPE_8B                CRYP_BYTE_SWAP
  45. #define CRYP_DATATYPE_1B                CRYP_BIT_SWAP
  46. #define CRYP_CCF_CLEAR                  CRYP_CLEAR_CCF
  47. #define CRYP_ERR_CLEAR                  CRYP_CLEAR_RWEIF
  48. #endif /* STM32U5 */
  49. /**
  50.   * @}
  51.   */
  52.  
  53. /** @defgroup HAL_ADC_Aliased_Defines HAL ADC Aliased Defines maintained for legacy purpose
  54.   * @{
  55.   */
  56. #define ADC_RESOLUTION12b               ADC_RESOLUTION_12B
  57. #define ADC_RESOLUTION10b               ADC_RESOLUTION_10B
  58. #define ADC_RESOLUTION8b                ADC_RESOLUTION_8B
  59. #define ADC_RESOLUTION6b                ADC_RESOLUTION_6B
  60. #define OVR_DATA_OVERWRITTEN            ADC_OVR_DATA_OVERWRITTEN
  61. #define OVR_DATA_PRESERVED              ADC_OVR_DATA_PRESERVED
  62. #define EOC_SINGLE_CONV                 ADC_EOC_SINGLE_CONV
  63. #define EOC_SEQ_CONV                    ADC_EOC_SEQ_CONV
  64. #define EOC_SINGLE_SEQ_CONV             ADC_EOC_SINGLE_SEQ_CONV
  65. #define REGULAR_GROUP                   ADC_REGULAR_GROUP
  66. #define INJECTED_GROUP                  ADC_INJECTED_GROUP
  67. #define REGULAR_INJECTED_GROUP          ADC_REGULAR_INJECTED_GROUP
  68. #define AWD_EVENT                       ADC_AWD_EVENT
  69. #define AWD1_EVENT                      ADC_AWD1_EVENT
  70. #define AWD2_EVENT                      ADC_AWD2_EVENT
  71. #define AWD3_EVENT                      ADC_AWD3_EVENT
  72. #define OVR_EVENT                       ADC_OVR_EVENT
  73. #define JQOVF_EVENT                     ADC_JQOVF_EVENT
  74. #define ALL_CHANNELS                    ADC_ALL_CHANNELS
  75. #define REGULAR_CHANNELS                ADC_REGULAR_CHANNELS
  76. #define INJECTED_CHANNELS               ADC_INJECTED_CHANNELS
  77. #define SYSCFG_FLAG_SENSOR_ADC          ADC_FLAG_SENSOR
  78. #define SYSCFG_FLAG_VREF_ADC            ADC_FLAG_VREFINT
  79. #define ADC_CLOCKPRESCALER_PCLK_DIV1    ADC_CLOCK_SYNC_PCLK_DIV1
  80. #define ADC_CLOCKPRESCALER_PCLK_DIV2    ADC_CLOCK_SYNC_PCLK_DIV2
  81. #define ADC_CLOCKPRESCALER_PCLK_DIV4    ADC_CLOCK_SYNC_PCLK_DIV4
  82. #define ADC_CLOCKPRESCALER_PCLK_DIV6    ADC_CLOCK_SYNC_PCLK_DIV6
  83. #define ADC_CLOCKPRESCALER_PCLK_DIV8    ADC_CLOCK_SYNC_PCLK_DIV8
  84. #define ADC_EXTERNALTRIG0_T6_TRGO       ADC_EXTERNALTRIGCONV_T6_TRGO
  85. #define ADC_EXTERNALTRIG1_T21_CC2       ADC_EXTERNALTRIGCONV_T21_CC2
  86. #define ADC_EXTERNALTRIG2_T2_TRGO       ADC_EXTERNALTRIGCONV_T2_TRGO
  87. #define ADC_EXTERNALTRIG3_T2_CC4        ADC_EXTERNALTRIGCONV_T2_CC4
  88. #define ADC_EXTERNALTRIG4_T22_TRGO      ADC_EXTERNALTRIGCONV_T22_TRGO
  89. #define ADC_EXTERNALTRIG7_EXT_IT11      ADC_EXTERNALTRIGCONV_EXT_IT11
  90. #define ADC_CLOCK_ASYNC                 ADC_CLOCK_ASYNC_DIV1
  91. #define ADC_EXTERNALTRIG_EDGE_NONE      ADC_EXTERNALTRIGCONVEDGE_NONE
  92. #define ADC_EXTERNALTRIG_EDGE_RISING    ADC_EXTERNALTRIGCONVEDGE_RISING
  93. #define ADC_EXTERNALTRIG_EDGE_FALLING   ADC_EXTERNALTRIGCONVEDGE_FALLING
  94. #define ADC_EXTERNALTRIG_EDGE_RISINGFALLING ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING
  95. #define ADC_SAMPLETIME_2CYCLE_5         ADC_SAMPLETIME_2CYCLES_5
  96.  
  97. #define HAL_ADC_STATE_BUSY_REG          HAL_ADC_STATE_REG_BUSY
  98. #define HAL_ADC_STATE_BUSY_INJ          HAL_ADC_STATE_INJ_BUSY
  99. #define HAL_ADC_STATE_EOC_REG           HAL_ADC_STATE_REG_EOC
  100. #define HAL_ADC_STATE_EOC_INJ           HAL_ADC_STATE_INJ_EOC
  101. #define HAL_ADC_STATE_ERROR             HAL_ADC_STATE_ERROR_INTERNAL
  102. #define HAL_ADC_STATE_BUSY              HAL_ADC_STATE_BUSY_INTERNAL
  103. #define HAL_ADC_STATE_AWD               HAL_ADC_STATE_AWD1
  104.  
  105. #if defined(STM32H7)
  106. #define ADC_CHANNEL_VBAT_DIV4           ADC_CHANNEL_VBAT
  107. #endif /* STM32H7 */
  108. /**
  109.   * @}
  110.   */
  111.  
  112. /** @defgroup HAL_CEC_Aliased_Defines HAL CEC Aliased Defines maintained for legacy purpose
  113.   * @{
  114.   */
  115.  
  116. #define __HAL_CEC_GET_IT __HAL_CEC_GET_FLAG
  117.  
  118. /**
  119.   * @}
  120.   */
  121.  
  122. /** @defgroup HAL_COMP_Aliased_Defines HAL COMP Aliased Defines maintained for legacy purpose
  123.   * @{
  124.   */
  125. #define COMP_WINDOWMODE_DISABLED       COMP_WINDOWMODE_DISABLE
  126. #define COMP_WINDOWMODE_ENABLED        COMP_WINDOWMODE_ENABLE
  127. #define COMP_EXTI_LINE_COMP1_EVENT     COMP_EXTI_LINE_COMP1
  128. #define COMP_EXTI_LINE_COMP2_EVENT     COMP_EXTI_LINE_COMP2
  129. #define COMP_EXTI_LINE_COMP3_EVENT     COMP_EXTI_LINE_COMP3
  130. #define COMP_EXTI_LINE_COMP4_EVENT     COMP_EXTI_LINE_COMP4
  131. #define COMP_EXTI_LINE_COMP5_EVENT     COMP_EXTI_LINE_COMP5
  132. #define COMP_EXTI_LINE_COMP6_EVENT     COMP_EXTI_LINE_COMP6
  133. #define COMP_EXTI_LINE_COMP7_EVENT     COMP_EXTI_LINE_COMP7
  134. #if defined(STM32L0)
  135. #define COMP_LPTIMCONNECTION_ENABLED   ((uint32_t)0x00000003U)    /*!< COMPX output generic naming: connected to LPTIM input 1 for COMP1, LPTIM input 2 for COMP2 */
  136. #endif
  137. #define COMP_OUTPUT_COMP6TIM2OCREFCLR  COMP_OUTPUT_COMP6_TIM2OCREFCLR
  138. #if defined(STM32F373xC) || defined(STM32F378xx)
  139. #define COMP_OUTPUT_TIM3IC1            COMP_OUTPUT_COMP1_TIM3IC1
  140. #define COMP_OUTPUT_TIM3OCREFCLR       COMP_OUTPUT_COMP1_TIM3OCREFCLR
  141. #endif /* STM32F373xC || STM32F378xx */
  142.  
  143. #if defined(STM32L0) || defined(STM32L4)
  144. #define COMP_WINDOWMODE_ENABLE         COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON
  145.  
  146. #define COMP_NONINVERTINGINPUT_IO1      COMP_INPUT_PLUS_IO1
  147. #define COMP_NONINVERTINGINPUT_IO2      COMP_INPUT_PLUS_IO2
  148. #define COMP_NONINVERTINGINPUT_IO3      COMP_INPUT_PLUS_IO3
  149. #define COMP_NONINVERTINGINPUT_IO4      COMP_INPUT_PLUS_IO4
  150. #define COMP_NONINVERTINGINPUT_IO5      COMP_INPUT_PLUS_IO5
  151. #define COMP_NONINVERTINGINPUT_IO6      COMP_INPUT_PLUS_IO6
  152.  
  153. #define COMP_INVERTINGINPUT_1_4VREFINT  COMP_INPUT_MINUS_1_4VREFINT
  154. #define COMP_INVERTINGINPUT_1_2VREFINT  COMP_INPUT_MINUS_1_2VREFINT
  155. #define COMP_INVERTINGINPUT_3_4VREFINT  COMP_INPUT_MINUS_3_4VREFINT
  156. #define COMP_INVERTINGINPUT_VREFINT     COMP_INPUT_MINUS_VREFINT
  157. #define COMP_INVERTINGINPUT_DAC1_CH1    COMP_INPUT_MINUS_DAC1_CH1
  158. #define COMP_INVERTINGINPUT_DAC1_CH2    COMP_INPUT_MINUS_DAC1_CH2
  159. #define COMP_INVERTINGINPUT_DAC1        COMP_INPUT_MINUS_DAC1_CH1
  160. #define COMP_INVERTINGINPUT_DAC2        COMP_INPUT_MINUS_DAC1_CH2
  161. #define COMP_INVERTINGINPUT_IO1         COMP_INPUT_MINUS_IO1
  162. #if defined(STM32L0)
  163. /* Issue fixed on STM32L0 COMP driver: only 2 dedicated IO (IO1 and IO2),     */
  164. /* IO2 was wrongly assigned to IO shared with DAC and IO3 was corresponding   */
  165. /* to the second dedicated IO (only for COMP2).                               */
  166. #define COMP_INVERTINGINPUT_IO2         COMP_INPUT_MINUS_DAC1_CH2
  167. #define COMP_INVERTINGINPUT_IO3         COMP_INPUT_MINUS_IO2
  168. #else
  169. #define COMP_INVERTINGINPUT_IO2         COMP_INPUT_MINUS_IO2
  170. #define COMP_INVERTINGINPUT_IO3         COMP_INPUT_MINUS_IO3
  171. #endif
  172. #define COMP_INVERTINGINPUT_IO4         COMP_INPUT_MINUS_IO4
  173. #define COMP_INVERTINGINPUT_IO5         COMP_INPUT_MINUS_IO5
  174.  
  175. #define COMP_OUTPUTLEVEL_LOW            COMP_OUTPUT_LEVEL_LOW
  176. #define COMP_OUTPUTLEVEL_HIGH           COMP_OUTPUT_LEVEL_HIGH
  177.  
  178. /* Note: Literal "COMP_FLAG_LOCK" kept for legacy purpose.                    */
  179. /*       To check COMP lock state, use macro "__HAL_COMP_IS_LOCKED()".        */
  180. #if defined(COMP_CSR_LOCK)
  181. #define COMP_FLAG_LOCK                 COMP_CSR_LOCK
  182. #elif defined(COMP_CSR_COMP1LOCK)
  183. #define COMP_FLAG_LOCK                 COMP_CSR_COMP1LOCK
  184. #elif defined(COMP_CSR_COMPxLOCK)
  185. #define COMP_FLAG_LOCK                 COMP_CSR_COMPxLOCK
  186. #endif
  187.  
  188. #if defined(STM32L4)
  189. #define COMP_BLANKINGSRCE_TIM1OC5        COMP_BLANKINGSRC_TIM1_OC5_COMP1
  190. #define COMP_BLANKINGSRCE_TIM2OC3        COMP_BLANKINGSRC_TIM2_OC3_COMP1
  191. #define COMP_BLANKINGSRCE_TIM3OC3        COMP_BLANKINGSRC_TIM3_OC3_COMP1
  192. #define COMP_BLANKINGSRCE_TIM3OC4        COMP_BLANKINGSRC_TIM3_OC4_COMP2
  193. #define COMP_BLANKINGSRCE_TIM8OC5        COMP_BLANKINGSRC_TIM8_OC5_COMP2
  194. #define COMP_BLANKINGSRCE_TIM15OC1       COMP_BLANKINGSRC_TIM15_OC1_COMP2
  195. #define COMP_BLANKINGSRCE_NONE           COMP_BLANKINGSRC_NONE
  196. #endif
  197.  
  198. #if defined(STM32L0)
  199. #define COMP_MODE_HIGHSPEED              COMP_POWERMODE_MEDIUMSPEED
  200. #define COMP_MODE_LOWSPEED               COMP_POWERMODE_ULTRALOWPOWER
  201. #else
  202. #define COMP_MODE_HIGHSPEED              COMP_POWERMODE_HIGHSPEED
  203. #define COMP_MODE_MEDIUMSPEED            COMP_POWERMODE_MEDIUMSPEED
  204. #define COMP_MODE_LOWPOWER               COMP_POWERMODE_LOWPOWER
  205. #define COMP_MODE_ULTRALOWPOWER          COMP_POWERMODE_ULTRALOWPOWER
  206. #endif
  207.  
  208. #endif
  209. /**
  210.   * @}
  211.   */
  212.  
  213. /** @defgroup HAL_CORTEX_Aliased_Defines HAL CORTEX Aliased Defines maintained for legacy purpose
  214.   * @{
  215.   */
  216. #define __HAL_CORTEX_SYSTICKCLK_CONFIG HAL_SYSTICK_CLKSourceConfig
  217. /**
  218.   * @}
  219.   */
  220.  
  221. /**
  222.   * @}
  223.   */
  224.  
  225. /** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose
  226.   * @{
  227.   */
  228.  
  229. #define CRC_OUTPUTDATA_INVERSION_DISABLED    CRC_OUTPUTDATA_INVERSION_DISABLE
  230. #define CRC_OUTPUTDATA_INVERSION_ENABLED     CRC_OUTPUTDATA_INVERSION_ENABLE
  231.  
  232. /**
  233.   * @}
  234.   */
  235.  
  236. /** @defgroup HAL_DAC_Aliased_Defines HAL DAC Aliased Defines maintained for legacy purpose
  237.   * @{
  238.   */
  239.  
  240. #define DAC1_CHANNEL_1                                  DAC_CHANNEL_1
  241. #define DAC1_CHANNEL_2                                  DAC_CHANNEL_2
  242. #define DAC2_CHANNEL_1                                  DAC_CHANNEL_1
  243. #define DAC_WAVE_NONE                                   0x00000000U
  244. #define DAC_WAVE_NOISE                                  DAC_CR_WAVE1_0
  245. #define DAC_WAVE_TRIANGLE                               DAC_CR_WAVE1_1
  246. #define DAC_WAVEGENERATION_NONE                         DAC_WAVE_NONE
  247. #define DAC_WAVEGENERATION_NOISE                        DAC_WAVE_NOISE
  248. #define DAC_WAVEGENERATION_TRIANGLE                     DAC_WAVE_TRIANGLE
  249.  
  250. #if defined(STM32G4) || defined(STM32H7) || defined (STM32U5)
  251. #define DAC_CHIPCONNECT_DISABLE       DAC_CHIPCONNECT_EXTERNAL
  252. #define DAC_CHIPCONNECT_ENABLE        DAC_CHIPCONNECT_INTERNAL
  253. #endif
  254.  
  255. #if defined(STM32L1) || defined(STM32L4) || defined(STM32G0) || defined(STM32L5) || defined(STM32H7) || defined(STM32F4) || defined(STM32G4)
  256. #define HAL_DAC_MSP_INIT_CB_ID       HAL_DAC_MSPINIT_CB_ID
  257. #define HAL_DAC_MSP_DEINIT_CB_ID     HAL_DAC_MSPDEINIT_CB_ID
  258. #endif
  259.  
  260. /**
  261.   * @}
  262.   */
  263.  
  264. /** @defgroup HAL_DMA_Aliased_Defines HAL DMA Aliased Defines maintained for legacy purpose
  265.   * @{
  266.   */
  267. #define HAL_REMAPDMA_ADC_DMA_CH2                DMA_REMAP_ADC_DMA_CH2
  268. #define HAL_REMAPDMA_USART1_TX_DMA_CH4          DMA_REMAP_USART1_TX_DMA_CH4
  269. #define HAL_REMAPDMA_USART1_RX_DMA_CH5          DMA_REMAP_USART1_RX_DMA_CH5
  270. #define HAL_REMAPDMA_TIM16_DMA_CH4              DMA_REMAP_TIM16_DMA_CH4
  271. #define HAL_REMAPDMA_TIM17_DMA_CH2              DMA_REMAP_TIM17_DMA_CH2
  272. #define HAL_REMAPDMA_USART3_DMA_CH32            DMA_REMAP_USART3_DMA_CH32
  273. #define HAL_REMAPDMA_TIM16_DMA_CH6              DMA_REMAP_TIM16_DMA_CH6
  274. #define HAL_REMAPDMA_TIM17_DMA_CH7              DMA_REMAP_TIM17_DMA_CH7
  275. #define HAL_REMAPDMA_SPI2_DMA_CH67              DMA_REMAP_SPI2_DMA_CH67
  276. #define HAL_REMAPDMA_USART2_DMA_CH67            DMA_REMAP_USART2_DMA_CH67
  277. #define HAL_REMAPDMA_I2C1_DMA_CH76              DMA_REMAP_I2C1_DMA_CH76
  278. #define HAL_REMAPDMA_TIM1_DMA_CH6               DMA_REMAP_TIM1_DMA_CH6
  279. #define HAL_REMAPDMA_TIM2_DMA_CH7               DMA_REMAP_TIM2_DMA_CH7
  280. #define HAL_REMAPDMA_TIM3_DMA_CH6               DMA_REMAP_TIM3_DMA_CH6
  281.  
  282. #define IS_HAL_REMAPDMA                          IS_DMA_REMAP
  283. #define __HAL_REMAPDMA_CHANNEL_ENABLE            __HAL_DMA_REMAP_CHANNEL_ENABLE
  284. #define __HAL_REMAPDMA_CHANNEL_DISABLE           __HAL_DMA_REMAP_CHANNEL_DISABLE
  285.  
  286. #if defined(STM32L4)
  287.  
  288. #define HAL_DMAMUX1_REQUEST_GEN_EXTI0            HAL_DMAMUX1_REQ_GEN_EXTI0
  289. #define HAL_DMAMUX1_REQUEST_GEN_EXTI1            HAL_DMAMUX1_REQ_GEN_EXTI1
  290. #define HAL_DMAMUX1_REQUEST_GEN_EXTI2            HAL_DMAMUX1_REQ_GEN_EXTI2
  291. #define HAL_DMAMUX1_REQUEST_GEN_EXTI3            HAL_DMAMUX1_REQ_GEN_EXTI3
  292. #define HAL_DMAMUX1_REQUEST_GEN_EXTI4            HAL_DMAMUX1_REQ_GEN_EXTI4
  293. #define HAL_DMAMUX1_REQUEST_GEN_EXTI5            HAL_DMAMUX1_REQ_GEN_EXTI5
  294. #define HAL_DMAMUX1_REQUEST_GEN_EXTI6            HAL_DMAMUX1_REQ_GEN_EXTI6
  295. #define HAL_DMAMUX1_REQUEST_GEN_EXTI7            HAL_DMAMUX1_REQ_GEN_EXTI7
  296. #define HAL_DMAMUX1_REQUEST_GEN_EXTI8            HAL_DMAMUX1_REQ_GEN_EXTI8
  297. #define HAL_DMAMUX1_REQUEST_GEN_EXTI9            HAL_DMAMUX1_REQ_GEN_EXTI9
  298. #define HAL_DMAMUX1_REQUEST_GEN_EXTI10           HAL_DMAMUX1_REQ_GEN_EXTI10
  299. #define HAL_DMAMUX1_REQUEST_GEN_EXTI11           HAL_DMAMUX1_REQ_GEN_EXTI11
  300. #define HAL_DMAMUX1_REQUEST_GEN_EXTI12           HAL_DMAMUX1_REQ_GEN_EXTI12
  301. #define HAL_DMAMUX1_REQUEST_GEN_EXTI13           HAL_DMAMUX1_REQ_GEN_EXTI13
  302. #define HAL_DMAMUX1_REQUEST_GEN_EXTI14           HAL_DMAMUX1_REQ_GEN_EXTI14
  303. #define HAL_DMAMUX1_REQUEST_GEN_EXTI15           HAL_DMAMUX1_REQ_GEN_EXTI15
  304. #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT  HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT
  305. #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT  HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT
  306. #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT  HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT
  307. #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH3_EVT  HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH3_EVT
  308. #define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT       HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT
  309. #define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT       HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT
  310. #define HAL_DMAMUX1_REQUEST_GEN_DSI_TE           HAL_DMAMUX1_REQ_GEN_DSI_TE
  311. #define HAL_DMAMUX1_REQUEST_GEN_DSI_EOT          HAL_DMAMUX1_REQ_GEN_DSI_EOT
  312. #define HAL_DMAMUX1_REQUEST_GEN_DMA2D_EOT        HAL_DMAMUX1_REQ_GEN_DMA2D_EOT
  313. #define HAL_DMAMUX1_REQUEST_GEN_LTDC_IT          HAL_DMAMUX1_REQ_GEN_LTDC_IT
  314.  
  315. #define HAL_DMAMUX_REQUEST_GEN_NO_EVENT          HAL_DMAMUX_REQ_GEN_NO_EVENT
  316. #define HAL_DMAMUX_REQUEST_GEN_RISING            HAL_DMAMUX_REQ_GEN_RISING
  317. #define HAL_DMAMUX_REQUEST_GEN_FALLING           HAL_DMAMUX_REQ_GEN_FALLING
  318. #define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING    HAL_DMAMUX_REQ_GEN_RISING_FALLING
  319.  
  320. #if defined(STM32L4R5xx) || defined(STM32L4R9xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  321. #define DMA_REQUEST_DCMI_PSSI                    DMA_REQUEST_DCMI
  322. #endif
  323.  
  324. #endif /* STM32L4 */
  325.  
  326. #if defined(STM32G0)
  327. #define DMA_REQUEST_DAC1_CHANNEL1                DMA_REQUEST_DAC1_CH1
  328. #define DMA_REQUEST_DAC1_CHANNEL2                DMA_REQUEST_DAC1_CH2
  329. #define DMA_REQUEST_TIM16_TRIG_COM               DMA_REQUEST_TIM16_COM
  330. #define DMA_REQUEST_TIM17_TRIG_COM               DMA_REQUEST_TIM17_COM
  331.  
  332. #define LL_DMAMUX_REQ_TIM16_TRIG_COM             LL_DMAMUX_REQ_TIM16_COM
  333. #define LL_DMAMUX_REQ_TIM17_TRIG_COM             LL_DMAMUX_REQ_TIM17_COM
  334. #endif
  335.  
  336. #if defined(STM32H7)
  337.  
  338. #define DMA_REQUEST_DAC1 DMA_REQUEST_DAC1_CH1
  339. #define DMA_REQUEST_DAC2 DMA_REQUEST_DAC1_CH2
  340.  
  341. #define BDMA_REQUEST_LP_UART1_RX BDMA_REQUEST_LPUART1_RX
  342. #define BDMA_REQUEST_LP_UART1_TX BDMA_REQUEST_LPUART1_TX
  343.  
  344. #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT    HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT
  345. #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT    HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT
  346. #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT    HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT
  347. #define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT         HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT
  348. #define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT         HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT
  349. #define HAL_DMAMUX1_REQUEST_GEN_LPTIM3_OUT         HAL_DMAMUX1_REQ_GEN_LPTIM3_OUT
  350. #define HAL_DMAMUX1_REQUEST_GEN_EXTI0              HAL_DMAMUX1_REQ_GEN_EXTI0
  351. #define HAL_DMAMUX1_REQUEST_GEN_TIM12_TRGO         HAL_DMAMUX1_REQ_GEN_TIM12_TRGO
  352.  
  353. #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH0_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH0_EVT
  354. #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH1_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH1_EVT
  355. #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH2_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH2_EVT
  356. #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH3_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH3_EVT
  357. #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH4_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH4_EVT
  358. #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH5_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH5_EVT
  359. #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH6_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH6_EVT
  360. #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_WKUP    HAL_DMAMUX2_REQ_GEN_LPUART1_RX_WKUP
  361. #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_WKUP    HAL_DMAMUX2_REQ_GEN_LPUART1_TX_WKUP
  362. #define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_WKUP        HAL_DMAMUX2_REQ_GEN_LPTIM2_WKUP
  363. #define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_OUT         HAL_DMAMUX2_REQ_GEN_LPTIM2_OUT
  364. #define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_WKUP        HAL_DMAMUX2_REQ_GEN_LPTIM3_WKUP
  365. #define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_OUT         HAL_DMAMUX2_REQ_GEN_LPTIM3_OUT
  366. #define HAL_DMAMUX2_REQUEST_GEN_LPTIM4_WKUP        HAL_DMAMUX2_REQ_GEN_LPTIM4_WKUP
  367. #define HAL_DMAMUX2_REQUEST_GEN_LPTIM5_WKUP        HAL_DMAMUX2_REQ_GEN_LPTIM5_WKUP
  368. #define HAL_DMAMUX2_REQUEST_GEN_I2C4_WKUP          HAL_DMAMUX2_REQ_GEN_I2C4_WKUP
  369. #define HAL_DMAMUX2_REQUEST_GEN_SPI6_WKUP          HAL_DMAMUX2_REQ_GEN_SPI6_WKUP
  370. #define HAL_DMAMUX2_REQUEST_GEN_COMP1_OUT          HAL_DMAMUX2_REQ_GEN_COMP1_OUT
  371. #define HAL_DMAMUX2_REQUEST_GEN_COMP2_OUT          HAL_DMAMUX2_REQ_GEN_COMP2_OUT
  372. #define HAL_DMAMUX2_REQUEST_GEN_RTC_WKUP           HAL_DMAMUX2_REQ_GEN_RTC_WKUP
  373. #define HAL_DMAMUX2_REQUEST_GEN_EXTI0              HAL_DMAMUX2_REQ_GEN_EXTI0
  374. #define HAL_DMAMUX2_REQUEST_GEN_EXTI2              HAL_DMAMUX2_REQ_GEN_EXTI2
  375. #define HAL_DMAMUX2_REQUEST_GEN_I2C4_IT_EVT        HAL_DMAMUX2_REQ_GEN_I2C4_IT_EVT
  376. #define HAL_DMAMUX2_REQUEST_GEN_SPI6_IT            HAL_DMAMUX2_REQ_GEN_SPI6_IT
  377. #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_IT      HAL_DMAMUX2_REQ_GEN_LPUART1_TX_IT
  378. #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_IT      HAL_DMAMUX2_REQ_GEN_LPUART1_RX_IT
  379. #define HAL_DMAMUX2_REQUEST_GEN_ADC3_IT            HAL_DMAMUX2_REQ_GEN_ADC3_IT
  380. #define HAL_DMAMUX2_REQUEST_GEN_ADC3_AWD1_OUT      HAL_DMAMUX2_REQ_GEN_ADC3_AWD1_OUT
  381. #define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH0_IT        HAL_DMAMUX2_REQ_GEN_BDMA_CH0_IT
  382. #define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH1_IT        HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT
  383.  
  384. #define HAL_DMAMUX_REQUEST_GEN_NO_EVENT            HAL_DMAMUX_REQ_GEN_NO_EVENT
  385. #define HAL_DMAMUX_REQUEST_GEN_RISING              HAL_DMAMUX_REQ_GEN_RISING
  386. #define HAL_DMAMUX_REQUEST_GEN_FALLING             HAL_DMAMUX_REQ_GEN_FALLING
  387. #define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING      HAL_DMAMUX_REQ_GEN_RISING_FALLING
  388.  
  389. #define DFSDM_FILTER_EXT_TRIG_LPTIM1               DFSDM_FILTER_EXT_TRIG_LPTIM1_OUT
  390. #define DFSDM_FILTER_EXT_TRIG_LPTIM2               DFSDM_FILTER_EXT_TRIG_LPTIM2_OUT
  391. #define DFSDM_FILTER_EXT_TRIG_LPTIM3               DFSDM_FILTER_EXT_TRIG_LPTIM3_OUT
  392.  
  393. #define DAC_TRIGGER_LP1_OUT                        DAC_TRIGGER_LPTIM1_OUT
  394. #define DAC_TRIGGER_LP2_OUT                        DAC_TRIGGER_LPTIM2_OUT
  395.  
  396. #endif /* STM32H7 */
  397. /**
  398.   * @}
  399.   */
  400.  
  401. /** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose
  402.   * @{
  403.   */
  404.  
  405. #define TYPEPROGRAM_BYTE              FLASH_TYPEPROGRAM_BYTE
  406. #define TYPEPROGRAM_HALFWORD          FLASH_TYPEPROGRAM_HALFWORD
  407. #define TYPEPROGRAM_WORD              FLASH_TYPEPROGRAM_WORD
  408. #define TYPEPROGRAM_DOUBLEWORD        FLASH_TYPEPROGRAM_DOUBLEWORD
  409. #define TYPEERASE_SECTORS             FLASH_TYPEERASE_SECTORS
  410. #define TYPEERASE_PAGES               FLASH_TYPEERASE_PAGES
  411. #define TYPEERASE_PAGEERASE           FLASH_TYPEERASE_PAGES
  412. #define TYPEERASE_MASSERASE           FLASH_TYPEERASE_MASSERASE
  413. #define WRPSTATE_DISABLE              OB_WRPSTATE_DISABLE
  414. #define WRPSTATE_ENABLE               OB_WRPSTATE_ENABLE
  415. #define HAL_FLASH_TIMEOUT_VALUE       FLASH_TIMEOUT_VALUE
  416. #define OBEX_PCROP                    OPTIONBYTE_PCROP
  417. #define OBEX_BOOTCONFIG               OPTIONBYTE_BOOTCONFIG
  418. #define PCROPSTATE_DISABLE            OB_PCROP_STATE_DISABLE
  419. #define PCROPSTATE_ENABLE             OB_PCROP_STATE_ENABLE
  420. #define TYPEERASEDATA_BYTE            FLASH_TYPEERASEDATA_BYTE
  421. #define TYPEERASEDATA_HALFWORD        FLASH_TYPEERASEDATA_HALFWORD
  422. #define TYPEERASEDATA_WORD            FLASH_TYPEERASEDATA_WORD
  423. #define TYPEPROGRAMDATA_BYTE          FLASH_TYPEPROGRAMDATA_BYTE
  424. #define TYPEPROGRAMDATA_HALFWORD      FLASH_TYPEPROGRAMDATA_HALFWORD
  425. #define TYPEPROGRAMDATA_WORD          FLASH_TYPEPROGRAMDATA_WORD
  426. #define TYPEPROGRAMDATA_FASTBYTE      FLASH_TYPEPROGRAMDATA_FASTBYTE
  427. #define TYPEPROGRAMDATA_FASTHALFWORD  FLASH_TYPEPROGRAMDATA_FASTHALFWORD
  428. #define TYPEPROGRAMDATA_FASTWORD      FLASH_TYPEPROGRAMDATA_FASTWORD
  429. #define PAGESIZE                      FLASH_PAGE_SIZE
  430. #define TYPEPROGRAM_FASTBYTE          FLASH_TYPEPROGRAM_BYTE
  431. #define TYPEPROGRAM_FASTHALFWORD      FLASH_TYPEPROGRAM_HALFWORD
  432. #define TYPEPROGRAM_FASTWORD          FLASH_TYPEPROGRAM_WORD
  433. #define VOLTAGE_RANGE_1               FLASH_VOLTAGE_RANGE_1
  434. #define VOLTAGE_RANGE_2               FLASH_VOLTAGE_RANGE_2
  435. #define VOLTAGE_RANGE_3               FLASH_VOLTAGE_RANGE_3
  436. #define VOLTAGE_RANGE_4               FLASH_VOLTAGE_RANGE_4
  437. #define TYPEPROGRAM_FAST              FLASH_TYPEPROGRAM_FAST
  438. #define TYPEPROGRAM_FAST_AND_LAST     FLASH_TYPEPROGRAM_FAST_AND_LAST
  439. #define WRPAREA_BANK1_AREAA           OB_WRPAREA_BANK1_AREAA
  440. #define WRPAREA_BANK1_AREAB           OB_WRPAREA_BANK1_AREAB
  441. #define WRPAREA_BANK2_AREAA           OB_WRPAREA_BANK2_AREAA
  442. #define WRPAREA_BANK2_AREAB           OB_WRPAREA_BANK2_AREAB
  443. #define IWDG_STDBY_FREEZE             OB_IWDG_STDBY_FREEZE
  444. #define IWDG_STDBY_ACTIVE             OB_IWDG_STDBY_RUN
  445. #define IWDG_STOP_FREEZE              OB_IWDG_STOP_FREEZE
  446. #define IWDG_STOP_ACTIVE              OB_IWDG_STOP_RUN
  447. #define FLASH_ERROR_NONE              HAL_FLASH_ERROR_NONE
  448. #define FLASH_ERROR_RD                HAL_FLASH_ERROR_RD
  449. #define FLASH_ERROR_PG                HAL_FLASH_ERROR_PROG
  450. #define FLASH_ERROR_PGP               HAL_FLASH_ERROR_PGS
  451. #define FLASH_ERROR_WRP               HAL_FLASH_ERROR_WRP
  452. #define FLASH_ERROR_OPTV              HAL_FLASH_ERROR_OPTV
  453. #define FLASH_ERROR_OPTVUSR           HAL_FLASH_ERROR_OPTVUSR
  454. #define FLASH_ERROR_PROG              HAL_FLASH_ERROR_PROG
  455. #define FLASH_ERROR_OP                HAL_FLASH_ERROR_OPERATION
  456. #define FLASH_ERROR_PGA               HAL_FLASH_ERROR_PGA
  457. #define FLASH_ERROR_SIZE              HAL_FLASH_ERROR_SIZE
  458. #define FLASH_ERROR_SIZ               HAL_FLASH_ERROR_SIZE
  459. #define FLASH_ERROR_PGS               HAL_FLASH_ERROR_PGS
  460. #define FLASH_ERROR_MIS               HAL_FLASH_ERROR_MIS
  461. #define FLASH_ERROR_FAST              HAL_FLASH_ERROR_FAST
  462. #define FLASH_ERROR_FWWERR            HAL_FLASH_ERROR_FWWERR
  463. #define FLASH_ERROR_NOTZERO           HAL_FLASH_ERROR_NOTZERO
  464. #define FLASH_ERROR_OPERATION         HAL_FLASH_ERROR_OPERATION
  465. #define FLASH_ERROR_ERS               HAL_FLASH_ERROR_ERS
  466. #define OB_WDG_SW                     OB_IWDG_SW
  467. #define OB_WDG_HW                     OB_IWDG_HW
  468. #define OB_SDADC12_VDD_MONITOR_SET    OB_SDACD_VDD_MONITOR_SET
  469. #define OB_SDADC12_VDD_MONITOR_RESET  OB_SDACD_VDD_MONITOR_RESET
  470. #define OB_RAM_PARITY_CHECK_SET       OB_SRAM_PARITY_SET
  471. #define OB_RAM_PARITY_CHECK_RESET     OB_SRAM_PARITY_RESET
  472. #define IS_OB_SDADC12_VDD_MONITOR     IS_OB_SDACD_VDD_MONITOR
  473. #define OB_RDP_LEVEL0                 OB_RDP_LEVEL_0
  474. #define OB_RDP_LEVEL1                 OB_RDP_LEVEL_1
  475. #define OB_RDP_LEVEL2                 OB_RDP_LEVEL_2
  476. #if defined(STM32G0)
  477. #define OB_BOOT_LOCK_DISABLE          OB_BOOT_ENTRY_FORCED_NONE
  478. #define OB_BOOT_LOCK_ENABLE           OB_BOOT_ENTRY_FORCED_FLASH
  479. #else
  480. #define OB_BOOT_ENTRY_FORCED_NONE     OB_BOOT_LOCK_DISABLE
  481. #define OB_BOOT_ENTRY_FORCED_FLASH    OB_BOOT_LOCK_ENABLE
  482. #endif
  483. #if defined(STM32H7)
  484. #define FLASH_FLAG_SNECCE_BANK1RR     FLASH_FLAG_SNECCERR_BANK1
  485. #define FLASH_FLAG_DBECCE_BANK1RR     FLASH_FLAG_DBECCERR_BANK1
  486. #define FLASH_FLAG_STRBER_BANK1R      FLASH_FLAG_STRBERR_BANK1
  487. #define FLASH_FLAG_SNECCE_BANK2RR     FLASH_FLAG_SNECCERR_BANK2
  488. #define FLASH_FLAG_DBECCE_BANK2RR     FLASH_FLAG_DBECCERR_BANK2
  489. #define FLASH_FLAG_STRBER_BANK2R      FLASH_FLAG_STRBERR_BANK2
  490. #define FLASH_FLAG_WDW                FLASH_FLAG_WBNE
  491. #define OB_WRP_SECTOR_All             OB_WRP_SECTOR_ALL
  492. #endif /* STM32H7 */
  493. #if defined(STM32U5)
  494. #define OB_USER_nRST_STOP             OB_USER_NRST_STOP
  495. #define OB_USER_nRST_STDBY            OB_USER_NRST_STDBY
  496. #define OB_USER_nRST_SHDW             OB_USER_NRST_SHDW
  497. #define OB_USER_nSWBOOT0              OB_USER_NSWBOOT0
  498. #define OB_USER_nBOOT0                OB_USER_NBOOT0
  499. #define OB_nBOOT0_RESET               OB_NBOOT0_RESET
  500. #define OB_nBOOT0_SET                 OB_NBOOT0_SET
  501. #endif /* STM32U5 */
  502.  
  503. /**
  504.   * @}
  505.   */
  506.  
  507. /** @defgroup HAL_JPEG_Aliased_Macros HAL JPEG Aliased Macros maintained for legacy purpose
  508.   * @{
  509.   */
  510.  
  511. #if defined(STM32H7)
  512. #define __HAL_RCC_JPEG_CLK_ENABLE               __HAL_RCC_JPGDECEN_CLK_ENABLE
  513. #define __HAL_RCC_JPEG_CLK_DISABLE              __HAL_RCC_JPGDECEN_CLK_DISABLE
  514. #define __HAL_RCC_JPEG_FORCE_RESET              __HAL_RCC_JPGDECRST_FORCE_RESET
  515. #define __HAL_RCC_JPEG_RELEASE_RESET            __HAL_RCC_JPGDECRST_RELEASE_RESET
  516. #define __HAL_RCC_JPEG_CLK_SLEEP_ENABLE         __HAL_RCC_JPGDEC_CLK_SLEEP_ENABLE
  517. #define __HAL_RCC_JPEG_CLK_SLEEP_DISABLE        __HAL_RCC_JPGDEC_CLK_SLEEP_DISABLE
  518. #endif /* STM32H7 */
  519.  
  520. /**
  521.   * @}
  522.   */
  523.  
  524. /** @defgroup HAL_SYSCFG_Aliased_Defines HAL SYSCFG Aliased Defines maintained for legacy purpose
  525.   * @{
  526.   */
  527.  
  528. #define HAL_SYSCFG_FASTMODEPLUS_I2C_PA9    I2C_FASTMODEPLUS_PA9
  529. #define HAL_SYSCFG_FASTMODEPLUS_I2C_PA10   I2C_FASTMODEPLUS_PA10
  530. #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB6    I2C_FASTMODEPLUS_PB6
  531. #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB7    I2C_FASTMODEPLUS_PB7
  532. #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB8    I2C_FASTMODEPLUS_PB8
  533. #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB9    I2C_FASTMODEPLUS_PB9
  534. #define HAL_SYSCFG_FASTMODEPLUS_I2C1       I2C_FASTMODEPLUS_I2C1
  535. #define HAL_SYSCFG_FASTMODEPLUS_I2C2       I2C_FASTMODEPLUS_I2C2
  536. #define HAL_SYSCFG_FASTMODEPLUS_I2C3       I2C_FASTMODEPLUS_I2C3
  537. #if defined(STM32G4)
  538.  
  539. #define HAL_SYSCFG_EnableIOAnalogSwitchBooster    HAL_SYSCFG_EnableIOSwitchBooster
  540. #define HAL_SYSCFG_DisableIOAnalogSwitchBooster   HAL_SYSCFG_DisableIOSwitchBooster
  541. #define HAL_SYSCFG_EnableIOAnalogSwitchVDD        HAL_SYSCFG_EnableIOSwitchVDD
  542. #define HAL_SYSCFG_DisableIOAnalogSwitchVDD       HAL_SYSCFG_DisableIOSwitchVDD
  543. #endif /* STM32G4 */
  544.  
  545. /**
  546.   * @}
  547.   */
  548.  
  549.  
  550. /** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose
  551.   * @{
  552.   */
  553. #if defined(STM32L4) || defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
  554. #define FMC_NAND_PCC_WAIT_FEATURE_DISABLE       FMC_NAND_WAIT_FEATURE_DISABLE
  555. #define FMC_NAND_PCC_WAIT_FEATURE_ENABLE        FMC_NAND_WAIT_FEATURE_ENABLE
  556. #define FMC_NAND_PCC_MEM_BUS_WIDTH_8            FMC_NAND_MEM_BUS_WIDTH_8
  557. #define FMC_NAND_PCC_MEM_BUS_WIDTH_16           FMC_NAND_MEM_BUS_WIDTH_16
  558. #elif defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4)
  559. #define FMC_NAND_WAIT_FEATURE_DISABLE           FMC_NAND_PCC_WAIT_FEATURE_DISABLE
  560. #define FMC_NAND_WAIT_FEATURE_ENABLE            FMC_NAND_PCC_WAIT_FEATURE_ENABLE
  561. #define FMC_NAND_MEM_BUS_WIDTH_8                FMC_NAND_PCC_MEM_BUS_WIDTH_8
  562. #define FMC_NAND_MEM_BUS_WIDTH_16               FMC_NAND_PCC_MEM_BUS_WIDTH_16
  563. #endif
  564. /**
  565.   * @}
  566.   */
  567.  
  568. /** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose
  569.   * @{
  570.   */
  571.  
  572. #define FSMC_NORSRAM_TYPEDEF                      FSMC_NORSRAM_TypeDef
  573. #define FSMC_NORSRAM_EXTENDED_TYPEDEF             FSMC_NORSRAM_EXTENDED_TypeDef
  574. /**
  575.   * @}
  576.   */
  577.  
  578. /** @defgroup HAL_GPIO_Aliased_Macros HAL GPIO Aliased Macros maintained for legacy purpose
  579.   * @{
  580.   */
  581. #define GET_GPIO_SOURCE                           GPIO_GET_INDEX
  582. #define GET_GPIO_INDEX                            GPIO_GET_INDEX
  583.  
  584. #if defined(STM32F4)
  585. #define GPIO_AF12_SDMMC                           GPIO_AF12_SDIO
  586. #define GPIO_AF12_SDMMC1                          GPIO_AF12_SDIO
  587. #endif
  588.  
  589. #if defined(STM32F7)
  590. #define GPIO_AF12_SDIO                            GPIO_AF12_SDMMC1
  591. #define GPIO_AF12_SDMMC                           GPIO_AF12_SDMMC1
  592. #endif
  593.  
  594. #if defined(STM32L4)
  595. #define GPIO_AF12_SDIO                            GPIO_AF12_SDMMC1
  596. #define GPIO_AF12_SDMMC                           GPIO_AF12_SDMMC1
  597. #endif
  598.  
  599. #if defined(STM32H7)
  600. #define GPIO_AF7_SDIO1                            GPIO_AF7_SDMMC1
  601. #define GPIO_AF8_SDIO1                            GPIO_AF8_SDMMC1
  602. #define GPIO_AF12_SDIO1                           GPIO_AF12_SDMMC1
  603. #define GPIO_AF9_SDIO2                            GPIO_AF9_SDMMC2
  604. #define GPIO_AF10_SDIO2                           GPIO_AF10_SDMMC2
  605. #define GPIO_AF11_SDIO2                           GPIO_AF11_SDMMC2
  606.  
  607. #if defined (STM32H743xx) || defined (STM32H753xx)  || defined (STM32H750xx) || defined (STM32H742xx) || \
  608.     defined (STM32H745xx) || defined (STM32H755xx)  || defined (STM32H747xx) || defined (STM32H757xx)
  609. #define GPIO_AF10_OTG2_HS  GPIO_AF10_OTG2_FS
  610. #define GPIO_AF10_OTG1_FS  GPIO_AF10_OTG1_HS
  611. #define GPIO_AF12_OTG2_FS  GPIO_AF12_OTG1_FS
  612. #endif /*STM32H743xx || STM32H753xx || STM32H750xx || STM32H742xx || STM32H745xx || STM32H755xx || STM32H747xx || STM32H757xx */
  613. #endif /* STM32H7 */
  614.  
  615. #define GPIO_AF0_LPTIM                            GPIO_AF0_LPTIM1
  616. #define GPIO_AF1_LPTIM                            GPIO_AF1_LPTIM1
  617. #define GPIO_AF2_LPTIM                            GPIO_AF2_LPTIM1
  618.  
  619. #if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4) || defined(STM32H7) || defined(STM32WB) || defined(STM32U5)
  620. #define  GPIO_SPEED_LOW                           GPIO_SPEED_FREQ_LOW
  621. #define  GPIO_SPEED_MEDIUM                        GPIO_SPEED_FREQ_MEDIUM
  622. #define  GPIO_SPEED_FAST                          GPIO_SPEED_FREQ_HIGH
  623. #define  GPIO_SPEED_HIGH                          GPIO_SPEED_FREQ_VERY_HIGH
  624. #endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 || STM32H7 || STM32WB || STM32U5*/
  625.  
  626. #if defined(STM32L1)
  627. #define  GPIO_SPEED_VERY_LOW    GPIO_SPEED_FREQ_LOW
  628. #define  GPIO_SPEED_LOW         GPIO_SPEED_FREQ_MEDIUM
  629. #define  GPIO_SPEED_MEDIUM      GPIO_SPEED_FREQ_HIGH
  630. #define  GPIO_SPEED_HIGH        GPIO_SPEED_FREQ_VERY_HIGH
  631. #endif /* STM32L1 */
  632.  
  633. #if defined(STM32F0) || defined(STM32F3) || defined(STM32F1)
  634. #define  GPIO_SPEED_LOW    GPIO_SPEED_FREQ_LOW
  635. #define  GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM
  636. #define  GPIO_SPEED_HIGH   GPIO_SPEED_FREQ_HIGH
  637. #endif /* STM32F0 || STM32F3 || STM32F1 */
  638.  
  639. #define GPIO_AF6_DFSDM                            GPIO_AF6_DFSDM1
  640. /**
  641.   * @}
  642.   */
  643.  
  644. /** @defgroup HAL_HRTIM_Aliased_Macros HAL HRTIM Aliased Macros maintained for legacy purpose
  645.   * @{
  646.   */
  647. #define HRTIM_TIMDELAYEDPROTECTION_DISABLED           HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DISABLED
  648. #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68  HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_EEV6
  649. #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_EEV68  HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_EEV6
  650. #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV68  HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV6
  651. #define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68     HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6
  652. #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7
  653. #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7
  654. #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79  HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7
  655. #define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79     HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7
  656.  
  657. #define __HAL_HRTIM_SetCounter        __HAL_HRTIM_SETCOUNTER
  658. #define __HAL_HRTIM_GetCounter        __HAL_HRTIM_GETCOUNTER
  659. #define __HAL_HRTIM_SetPeriod         __HAL_HRTIM_SETPERIOD
  660. #define __HAL_HRTIM_GetPeriod         __HAL_HRTIM_GETPERIOD
  661. #define __HAL_HRTIM_SetClockPrescaler __HAL_HRTIM_SETCLOCKPRESCALER
  662. #define __HAL_HRTIM_GetClockPrescaler __HAL_HRTIM_GETCLOCKPRESCALER
  663. #define __HAL_HRTIM_SetCompare        __HAL_HRTIM_SETCOMPARE
  664. #define __HAL_HRTIM_GetCompare        __HAL_HRTIM_GETCOMPARE
  665.  
  666. #if defined(STM32G4)
  667. #define HAL_HRTIM_ExternalEventCounterConfig    HAL_HRTIM_ExtEventCounterConfig
  668. #define HAL_HRTIM_ExternalEventCounterEnable    HAL_HRTIM_ExtEventCounterEnable
  669. #define HAL_HRTIM_ExternalEventCounterDisable   HAL_HRTIM_ExtEventCounterDisable
  670. #define HAL_HRTIM_ExternalEventCounterReset     HAL_HRTIM_ExtEventCounterReset
  671. #define HRTIM_TIMEEVENT_A                       HRTIM_EVENTCOUNTER_A
  672. #define HRTIM_TIMEEVENT_B                       HRTIM_EVENTCOUNTER_B
  673. #define HRTIM_TIMEEVENTRESETMODE_UNCONDITIONAL  HRTIM_EVENTCOUNTER_RSTMODE_UNCONDITIONAL
  674. #define HRTIM_TIMEEVENTRESETMODE_CONDITIONAL    HRTIM_EVENTCOUNTER_RSTMODE_CONDITIONAL
  675. #endif /* STM32G4 */
  676.  
  677. #if defined(STM32H7)
  678. #define HRTIM_OUTPUTSET_TIMAEV1_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_1
  679. #define HRTIM_OUTPUTSET_TIMAEV2_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_2
  680. #define HRTIM_OUTPUTSET_TIMAEV3_TIMCCMP2 HRTIM_OUTPUTSET_TIMEV_3
  681. #define HRTIM_OUTPUTSET_TIMAEV4_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_4
  682. #define HRTIM_OUTPUTSET_TIMAEV5_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_5
  683. #define HRTIM_OUTPUTSET_TIMAEV6_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_6
  684. #define HRTIM_OUTPUTSET_TIMAEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
  685. #define HRTIM_OUTPUTSET_TIMAEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
  686. #define HRTIM_OUTPUTSET_TIMAEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
  687. #define HRTIM_OUTPUTSET_TIMBEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
  688. #define HRTIM_OUTPUTSET_TIMBEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
  689. #define HRTIM_OUTPUTSET_TIMBEV3_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_3
  690. #define HRTIM_OUTPUTSET_TIMBEV4_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_4
  691. #define HRTIM_OUTPUTSET_TIMBEV5_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_5
  692. #define HRTIM_OUTPUTSET_TIMBEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6
  693. #define HRTIM_OUTPUTSET_TIMBEV7_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_7
  694. #define HRTIM_OUTPUTSET_TIMBEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
  695. #define HRTIM_OUTPUTSET_TIMBEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
  696. #define HRTIM_OUTPUTSET_TIMCEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
  697. #define HRTIM_OUTPUTSET_TIMCEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
  698. #define HRTIM_OUTPUTSET_TIMCEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
  699. #define HRTIM_OUTPUTSET_TIMCEV4_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_4
  700. #define HRTIM_OUTPUTSET_TIMCEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
  701. #define HRTIM_OUTPUTSET_TIMCEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6
  702. #define HRTIM_OUTPUTSET_TIMCEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
  703. #define HRTIM_OUTPUTSET_TIMCEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
  704. #define HRTIM_OUTPUTSET_TIMCEV9_TIMFCMP2 HRTIM_OUTPUTSET_TIMEV_9
  705. #define HRTIM_OUTPUTSET_TIMDEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
  706. #define HRTIM_OUTPUTSET_TIMDEV2_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_2
  707. #define HRTIM_OUTPUTSET_TIMDEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
  708. #define HRTIM_OUTPUTSET_TIMDEV4_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_4
  709. #define HRTIM_OUTPUTSET_TIMDEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
  710. #define HRTIM_OUTPUTSET_TIMDEV6_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_6
  711. #define HRTIM_OUTPUTSET_TIMDEV7_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_7
  712. #define HRTIM_OUTPUTSET_TIMDEV8_TIMFCMP1 HRTIM_OUTPUTSET_TIMEV_8
  713. #define HRTIM_OUTPUTSET_TIMDEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
  714. #define HRTIM_OUTPUTSET_TIMEEV1_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_1
  715. #define HRTIM_OUTPUTSET_TIMEEV2_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_2
  716. #define HRTIM_OUTPUTSET_TIMEEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
  717. #define HRTIM_OUTPUTSET_TIMEEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
  718. #define HRTIM_OUTPUTSET_TIMEEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
  719. #define HRTIM_OUTPUTSET_TIMEEV6_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_6
  720. #define HRTIM_OUTPUTSET_TIMEEV7_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_7
  721. #define HRTIM_OUTPUTSET_TIMEEV8_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_8
  722. #define HRTIM_OUTPUTSET_TIMEEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
  723. #define HRTIM_OUTPUTSET_TIMFEV1_TIMACMP3 HRTIM_OUTPUTSET_TIMEV_1
  724. #define HRTIM_OUTPUTSET_TIMFEV2_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_2
  725. #define HRTIM_OUTPUTSET_TIMFEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
  726. #define HRTIM_OUTPUTSET_TIMFEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
  727. #define HRTIM_OUTPUTSET_TIMFEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
  728. #define HRTIM_OUTPUTSET_TIMFEV6_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_6
  729. #define HRTIM_OUTPUTSET_TIMFEV7_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_7
  730. #define HRTIM_OUTPUTSET_TIMFEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
  731. #define HRTIM_OUTPUTSET_TIMFEV9_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_9
  732.  
  733. #define HRTIM_OUTPUTRESET_TIMAEV1_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_1
  734. #define HRTIM_OUTPUTRESET_TIMAEV2_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_2
  735. #define HRTIM_OUTPUTRESET_TIMAEV3_TIMCCMP2 HRTIM_OUTPUTSET_TIMEV_3
  736. #define HRTIM_OUTPUTRESET_TIMAEV4_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_4
  737. #define HRTIM_OUTPUTRESET_TIMAEV5_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_5
  738. #define HRTIM_OUTPUTRESET_TIMAEV6_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_6
  739. #define HRTIM_OUTPUTRESET_TIMAEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
  740. #define HRTIM_OUTPUTRESET_TIMAEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
  741. #define HRTIM_OUTPUTRESET_TIMAEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
  742. #define HRTIM_OUTPUTRESET_TIMBEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
  743. #define HRTIM_OUTPUTRESET_TIMBEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
  744. #define HRTIM_OUTPUTRESET_TIMBEV3_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_3
  745. #define HRTIM_OUTPUTRESET_TIMBEV4_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_4
  746. #define HRTIM_OUTPUTRESET_TIMBEV5_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_5
  747. #define HRTIM_OUTPUTRESET_TIMBEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6
  748. #define HRTIM_OUTPUTRESET_TIMBEV7_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_7
  749. #define HRTIM_OUTPUTRESET_TIMBEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
  750. #define HRTIM_OUTPUTRESET_TIMBEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
  751. #define HRTIM_OUTPUTRESET_TIMCEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
  752. #define HRTIM_OUTPUTRESET_TIMCEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
  753. #define HRTIM_OUTPUTRESET_TIMCEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
  754. #define HRTIM_OUTPUTRESET_TIMCEV4_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_4
  755. #define HRTIM_OUTPUTRESET_TIMCEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
  756. #define HRTIM_OUTPUTRESET_TIMCEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6
  757. #define HRTIM_OUTPUTRESET_TIMCEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
  758. #define HRTIM_OUTPUTRESET_TIMCEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
  759. #define HRTIM_OUTPUTRESET_TIMCEV9_TIMFCMP2 HRTIM_OUTPUTSET_TIMEV_9
  760. #define HRTIM_OUTPUTRESET_TIMDEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
  761. #define HRTIM_OUTPUTRESET_TIMDEV2_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_2
  762. #define HRTIM_OUTPUTRESET_TIMDEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
  763. #define HRTIM_OUTPUTRESET_TIMDEV4_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_4
  764. #define HRTIM_OUTPUTRESET_TIMDEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
  765. #define HRTIM_OUTPUTRESET_TIMDEV6_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_6
  766. #define HRTIM_OUTPUTRESET_TIMDEV7_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_7
  767. #define HRTIM_OUTPUTRESET_TIMDEV8_TIMFCMP1 HRTIM_OUTPUTSET_TIMEV_8
  768. #define HRTIM_OUTPUTRESET_TIMDEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
  769. #define HRTIM_OUTPUTRESET_TIMEEV1_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_1
  770. #define HRTIM_OUTPUTRESET_TIMEEV2_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_2
  771. #define HRTIM_OUTPUTRESET_TIMEEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
  772. #define HRTIM_OUTPUTRESET_TIMEEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
  773. #define HRTIM_OUTPUTRESET_TIMEEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
  774. #define HRTIM_OUTPUTRESET_TIMEEV6_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_6
  775. #define HRTIM_OUTPUTRESET_TIMEEV7_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_7
  776. #define HRTIM_OUTPUTRESET_TIMEEV8_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_8
  777. #define HRTIM_OUTPUTRESET_TIMEEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
  778. #define HRTIM_OUTPUTRESET_TIMFEV1_TIMACMP3 HRTIM_OUTPUTSET_TIMEV_1
  779. #define HRTIM_OUTPUTRESET_TIMFEV2_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_2
  780. #define HRTIM_OUTPUTRESET_TIMFEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
  781. #define HRTIM_OUTPUTRESET_TIMFEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
  782. #define HRTIM_OUTPUTRESET_TIMFEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
  783. #define HRTIM_OUTPUTRESET_TIMFEV6_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_6
  784. #define HRTIM_OUTPUTRESET_TIMFEV7_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_7
  785. #define HRTIM_OUTPUTRESET_TIMFEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
  786. #define HRTIM_OUTPUTRESET_TIMFEV9_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_9
  787. #endif /* STM32H7 */
  788.  
  789. #if defined(STM32F3)
  790. /** @brief Constants defining available sources associated to external events.
  791.   */
  792. #define HRTIM_EVENTSRC_1              (0x00000000U)
  793. #define HRTIM_EVENTSRC_2              (HRTIM_EECR1_EE1SRC_0)
  794. #define HRTIM_EVENTSRC_3              (HRTIM_EECR1_EE1SRC_1)
  795. #define HRTIM_EVENTSRC_4              (HRTIM_EECR1_EE1SRC_1 | HRTIM_EECR1_EE1SRC_0)
  796.  
  797. /** @brief Constants defining the DLL calibration periods (in micro seconds)
  798.   */
  799. #define HRTIM_CALIBRATIONRATE_7300             0x00000000U
  800. #define HRTIM_CALIBRATIONRATE_910              (HRTIM_DLLCR_CALRTE_0)
  801. #define HRTIM_CALIBRATIONRATE_114              (HRTIM_DLLCR_CALRTE_1)
  802. #define HRTIM_CALIBRATIONRATE_14               (HRTIM_DLLCR_CALRTE_1 | HRTIM_DLLCR_CALRTE_0)
  803.  
  804. #endif /* STM32F3 */
  805. /**
  806.   * @}
  807.   */
  808.  
  809. /** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose
  810.   * @{
  811.   */
  812. #define I2C_DUALADDRESS_DISABLED                I2C_DUALADDRESS_DISABLE
  813. #define I2C_DUALADDRESS_ENABLED                 I2C_DUALADDRESS_ENABLE
  814. #define I2C_GENERALCALL_DISABLED                I2C_GENERALCALL_DISABLE
  815. #define I2C_GENERALCALL_ENABLED                 I2C_GENERALCALL_ENABLE
  816. #define I2C_NOSTRETCH_DISABLED                  I2C_NOSTRETCH_DISABLE
  817. #define I2C_NOSTRETCH_ENABLED                   I2C_NOSTRETCH_ENABLE
  818. #define I2C_ANALOGFILTER_ENABLED                I2C_ANALOGFILTER_ENABLE
  819. #define I2C_ANALOGFILTER_DISABLED               I2C_ANALOGFILTER_DISABLE
  820. #if defined(STM32F0) || defined(STM32F1) || defined(STM32F3) || defined(STM32G0) || defined(STM32L4) || defined(STM32L1) || defined(STM32F7)
  821. #define HAL_I2C_STATE_MEM_BUSY_TX               HAL_I2C_STATE_BUSY_TX
  822. #define HAL_I2C_STATE_MEM_BUSY_RX               HAL_I2C_STATE_BUSY_RX
  823. #define HAL_I2C_STATE_MASTER_BUSY_TX            HAL_I2C_STATE_BUSY_TX
  824. #define HAL_I2C_STATE_MASTER_BUSY_RX            HAL_I2C_STATE_BUSY_RX
  825. #define HAL_I2C_STATE_SLAVE_BUSY_TX             HAL_I2C_STATE_BUSY_TX
  826. #define HAL_I2C_STATE_SLAVE_BUSY_RX             HAL_I2C_STATE_BUSY_RX
  827. #endif
  828. /**
  829.   * @}
  830.   */
  831.  
  832. /** @defgroup HAL_IRDA_Aliased_Defines HAL IRDA Aliased Defines maintained for legacy purpose
  833.   * @{
  834.   */
  835. #define IRDA_ONE_BIT_SAMPLE_DISABLED            IRDA_ONE_BIT_SAMPLE_DISABLE
  836. #define IRDA_ONE_BIT_SAMPLE_ENABLED             IRDA_ONE_BIT_SAMPLE_ENABLE
  837.  
  838. /**
  839.   * @}
  840.   */
  841.  
  842. /** @defgroup HAL_IWDG_Aliased_Defines HAL IWDG Aliased Defines maintained for legacy purpose
  843.   * @{
  844.   */
  845. #define KR_KEY_RELOAD                   IWDG_KEY_RELOAD
  846. #define KR_KEY_ENABLE                   IWDG_KEY_ENABLE
  847. #define KR_KEY_EWA                      IWDG_KEY_WRITE_ACCESS_ENABLE
  848. #define KR_KEY_DWA                      IWDG_KEY_WRITE_ACCESS_DISABLE
  849. /**
  850.   * @}
  851.   */
  852.  
  853. /** @defgroup HAL_LPTIM_Aliased_Defines HAL LPTIM Aliased Defines maintained for legacy purpose
  854.   * @{
  855.   */
  856.  
  857. #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSISTION LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION
  858. #define LPTIM_CLOCKSAMPLETIME_2TRANSISTIONS     LPTIM_CLOCKSAMPLETIME_2TRANSITIONS
  859. #define LPTIM_CLOCKSAMPLETIME_4TRANSISTIONS     LPTIM_CLOCKSAMPLETIME_4TRANSITIONS
  860. #define LPTIM_CLOCKSAMPLETIME_8TRANSISTIONS     LPTIM_CLOCKSAMPLETIME_8TRANSITIONS
  861.  
  862. #define LPTIM_CLOCKPOLARITY_RISINGEDGE          LPTIM_CLOCKPOLARITY_RISING
  863. #define LPTIM_CLOCKPOLARITY_FALLINGEDGE         LPTIM_CLOCKPOLARITY_FALLING
  864. #define LPTIM_CLOCKPOLARITY_BOTHEDGES           LPTIM_CLOCKPOLARITY_RISING_FALLING
  865.  
  866. #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION  LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION
  867. #define LPTIM_TRIGSAMPLETIME_2TRANSISTIONS      LPTIM_TRIGSAMPLETIME_2TRANSITIONS
  868. #define LPTIM_TRIGSAMPLETIME_4TRANSISTIONS      LPTIM_TRIGSAMPLETIME_4TRANSITIONS
  869. #define LPTIM_TRIGSAMPLETIME_8TRANSISTIONS      LPTIM_TRIGSAMPLETIME_8TRANSITIONS
  870.  
  871. /* The following 3 definition have also been present in a temporary version of lptim.h */
  872. /* They need to be renamed also to the right name, just in case */
  873. #define LPTIM_TRIGSAMPLETIME_2TRANSITION        LPTIM_TRIGSAMPLETIME_2TRANSITIONS
  874. #define LPTIM_TRIGSAMPLETIME_4TRANSITION        LPTIM_TRIGSAMPLETIME_4TRANSITIONS
  875. #define LPTIM_TRIGSAMPLETIME_8TRANSITION        LPTIM_TRIGSAMPLETIME_8TRANSITIONS
  876.  
  877. #if defined(STM32U5)
  878. #define LPTIM_ISR_CC1        LPTIM_ISR_CC1IF
  879. #define LPTIM_ISR_CC2        LPTIM_ISR_CC2IF
  880. #endif /* STM32U5 */
  881. /**
  882.   * @}
  883.   */
  884.  
  885. /** @defgroup HAL_NAND_Aliased_Defines HAL NAND Aliased Defines maintained for legacy purpose
  886.   * @{
  887.   */
  888. #define HAL_NAND_Read_Page              HAL_NAND_Read_Page_8b
  889. #define HAL_NAND_Write_Page             HAL_NAND_Write_Page_8b
  890. #define HAL_NAND_Read_SpareArea         HAL_NAND_Read_SpareArea_8b
  891. #define HAL_NAND_Write_SpareArea        HAL_NAND_Write_SpareArea_8b
  892.  
  893. #define NAND_AddressTypedef             NAND_AddressTypeDef
  894.  
  895. #define __ARRAY_ADDRESS                 ARRAY_ADDRESS
  896. #define __ADDR_1st_CYCLE                ADDR_1ST_CYCLE
  897. #define __ADDR_2nd_CYCLE                ADDR_2ND_CYCLE
  898. #define __ADDR_3rd_CYCLE                ADDR_3RD_CYCLE
  899. #define __ADDR_4th_CYCLE                ADDR_4TH_CYCLE
  900. /**
  901.   * @}
  902.   */
  903.  
  904. /** @defgroup HAL_NOR_Aliased_Defines HAL NOR Aliased Defines maintained for legacy purpose
  905.   * @{
  906.   */
  907. #define NOR_StatusTypedef              HAL_NOR_StatusTypeDef
  908. #define NOR_SUCCESS                    HAL_NOR_STATUS_SUCCESS
  909. #define NOR_ONGOING                    HAL_NOR_STATUS_ONGOING
  910. #define NOR_ERROR                      HAL_NOR_STATUS_ERROR
  911. #define NOR_TIMEOUT                    HAL_NOR_STATUS_TIMEOUT
  912.  
  913. #define __NOR_WRITE                    NOR_WRITE
  914. #define __NOR_ADDR_SHIFT               NOR_ADDR_SHIFT
  915. /**
  916.   * @}
  917.   */
  918.  
  919. /** @defgroup HAL_OPAMP_Aliased_Defines HAL OPAMP Aliased Defines maintained for legacy purpose
  920.   * @{
  921.   */
  922.  
  923. #define OPAMP_NONINVERTINGINPUT_VP0           OPAMP_NONINVERTINGINPUT_IO0
  924. #define OPAMP_NONINVERTINGINPUT_VP1           OPAMP_NONINVERTINGINPUT_IO1
  925. #define OPAMP_NONINVERTINGINPUT_VP2           OPAMP_NONINVERTINGINPUT_IO2
  926. #define OPAMP_NONINVERTINGINPUT_VP3           OPAMP_NONINVERTINGINPUT_IO3
  927.  
  928. #define OPAMP_SEC_NONINVERTINGINPUT_VP0       OPAMP_SEC_NONINVERTINGINPUT_IO0
  929. #define OPAMP_SEC_NONINVERTINGINPUT_VP1       OPAMP_SEC_NONINVERTINGINPUT_IO1
  930. #define OPAMP_SEC_NONINVERTINGINPUT_VP2       OPAMP_SEC_NONINVERTINGINPUT_IO2
  931. #define OPAMP_SEC_NONINVERTINGINPUT_VP3       OPAMP_SEC_NONINVERTINGINPUT_IO3
  932.  
  933. #define OPAMP_INVERTINGINPUT_VM0              OPAMP_INVERTINGINPUT_IO0
  934. #define OPAMP_INVERTINGINPUT_VM1              OPAMP_INVERTINGINPUT_IO1
  935.  
  936. #define IOPAMP_INVERTINGINPUT_VM0             OPAMP_INVERTINGINPUT_IO0
  937. #define IOPAMP_INVERTINGINPUT_VM1             OPAMP_INVERTINGINPUT_IO1
  938.  
  939. #define OPAMP_SEC_INVERTINGINPUT_VM0          OPAMP_SEC_INVERTINGINPUT_IO0
  940. #define OPAMP_SEC_INVERTINGINPUT_VM1          OPAMP_SEC_INVERTINGINPUT_IO1
  941.  
  942. #define OPAMP_INVERTINGINPUT_VINM             OPAMP_SEC_INVERTINGINPUT_IO1
  943.  
  944. #define OPAMP_PGACONNECT_NO                   OPAMP_PGA_CONNECT_INVERTINGINPUT_NO
  945. #define OPAMP_PGACONNECT_VM0                  OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0
  946. #define OPAMP_PGACONNECT_VM1                  OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1
  947.  
  948. #if defined(STM32L1) || defined(STM32L4) || defined(STM32L5) || defined(STM32H7) || defined(STM32G4)
  949. #define HAL_OPAMP_MSP_INIT_CB_ID       HAL_OPAMP_MSPINIT_CB_ID
  950. #define HAL_OPAMP_MSP_DEINIT_CB_ID     HAL_OPAMP_MSPDEINIT_CB_ID
  951. #endif
  952.  
  953. #if defined(STM32L4) || defined(STM32L5)
  954. #define OPAMP_POWERMODE_NORMAL                OPAMP_POWERMODE_NORMALPOWER
  955. #elif defined(STM32G4)
  956. #define OPAMP_POWERMODE_NORMAL                OPAMP_POWERMODE_NORMALSPEED
  957. #endif
  958.  
  959. /**
  960.   * @}
  961.   */
  962.  
  963. /** @defgroup HAL_I2S_Aliased_Defines HAL I2S Aliased Defines maintained for legacy purpose
  964.   * @{
  965.   */
  966. #define I2S_STANDARD_PHILLIPS      I2S_STANDARD_PHILIPS
  967.  
  968. #if defined(STM32H7)
  969. #define I2S_IT_TXE               I2S_IT_TXP
  970. #define I2S_IT_RXNE              I2S_IT_RXP
  971.  
  972. #define I2S_FLAG_TXE             I2S_FLAG_TXP
  973. #define I2S_FLAG_RXNE            I2S_FLAG_RXP
  974. #endif
  975.  
  976. #if defined(STM32F7)
  977. #define I2S_CLOCK_SYSCLK           I2S_CLOCK_PLL
  978. #endif
  979. /**
  980.   * @}
  981.   */
  982.  
  983. /** @defgroup HAL_PCCARD_Aliased_Defines HAL PCCARD Aliased Defines maintained for legacy purpose
  984.   * @{
  985.   */
  986.  
  987. /* Compact Flash-ATA registers description */
  988. #define CF_DATA                       ATA_DATA
  989. #define CF_SECTOR_COUNT               ATA_SECTOR_COUNT
  990. #define CF_SECTOR_NUMBER              ATA_SECTOR_NUMBER
  991. #define CF_CYLINDER_LOW               ATA_CYLINDER_LOW
  992. #define CF_CYLINDER_HIGH              ATA_CYLINDER_HIGH
  993. #define CF_CARD_HEAD                  ATA_CARD_HEAD
  994. #define CF_STATUS_CMD                 ATA_STATUS_CMD
  995. #define CF_STATUS_CMD_ALTERNATE       ATA_STATUS_CMD_ALTERNATE
  996. #define CF_COMMON_DATA_AREA           ATA_COMMON_DATA_AREA
  997.  
  998. /* Compact Flash-ATA commands */
  999. #define CF_READ_SECTOR_CMD            ATA_READ_SECTOR_CMD
  1000. #define CF_WRITE_SECTOR_CMD           ATA_WRITE_SECTOR_CMD
  1001. #define CF_ERASE_SECTOR_CMD           ATA_ERASE_SECTOR_CMD
  1002. #define CF_IDENTIFY_CMD               ATA_IDENTIFY_CMD
  1003.  
  1004. #define PCCARD_StatusTypedef          HAL_PCCARD_StatusTypeDef
  1005. #define PCCARD_SUCCESS                HAL_PCCARD_STATUS_SUCCESS
  1006. #define PCCARD_ONGOING                HAL_PCCARD_STATUS_ONGOING
  1007. #define PCCARD_ERROR                  HAL_PCCARD_STATUS_ERROR
  1008. #define PCCARD_TIMEOUT                HAL_PCCARD_STATUS_TIMEOUT
  1009. /**
  1010.   * @}
  1011.   */
  1012.  
  1013. /** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose
  1014.   * @{
  1015.   */
  1016.  
  1017. #define FORMAT_BIN                  RTC_FORMAT_BIN
  1018. #define FORMAT_BCD                  RTC_FORMAT_BCD
  1019.  
  1020. #define RTC_ALARMSUBSECONDMASK_None     RTC_ALARMSUBSECONDMASK_NONE
  1021. #define RTC_TAMPERERASEBACKUP_DISABLED  RTC_TAMPER_ERASE_BACKUP_DISABLE
  1022. #define RTC_TAMPERMASK_FLAG_DISABLED    RTC_TAMPERMASK_FLAG_DISABLE
  1023. #define RTC_TAMPERMASK_FLAG_ENABLED     RTC_TAMPERMASK_FLAG_ENABLE
  1024.  
  1025. #define RTC_MASKTAMPERFLAG_DISABLED     RTC_TAMPERMASK_FLAG_DISABLE
  1026. #define RTC_MASKTAMPERFLAG_ENABLED      RTC_TAMPERMASK_FLAG_ENABLE
  1027. #define RTC_TAMPERERASEBACKUP_ENABLED   RTC_TAMPER_ERASE_BACKUP_ENABLE
  1028. #define RTC_TAMPER1_2_INTERRUPT         RTC_ALL_TAMPER_INTERRUPT
  1029. #define RTC_TAMPER1_2_3_INTERRUPT       RTC_ALL_TAMPER_INTERRUPT
  1030.  
  1031. #define RTC_TIMESTAMPPIN_PC13  RTC_TIMESTAMPPIN_DEFAULT
  1032. #define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1
  1033. #define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1
  1034. #define RTC_TIMESTAMPPIN_PC1   RTC_TIMESTAMPPIN_POS2
  1035.  
  1036. #define RTC_OUTPUT_REMAP_PC13  RTC_OUTPUT_REMAP_NONE
  1037. #define RTC_OUTPUT_REMAP_PB14  RTC_OUTPUT_REMAP_POS1
  1038. #define RTC_OUTPUT_REMAP_PB2   RTC_OUTPUT_REMAP_POS1
  1039.  
  1040. #define RTC_TAMPERPIN_PC13 RTC_TAMPERPIN_DEFAULT
  1041. #define RTC_TAMPERPIN_PA0  RTC_TAMPERPIN_POS1
  1042. #define RTC_TAMPERPIN_PI8  RTC_TAMPERPIN_POS1
  1043.  
  1044. #if defined(STM32H7)
  1045. #define RTC_TAMPCR_TAMPXE          RTC_TAMPER_X
  1046. #define RTC_TAMPCR_TAMPXIE         RTC_TAMPER_X_INTERRUPT
  1047.  
  1048. #define RTC_TAMPER1_INTERRUPT      RTC_IT_TAMP1
  1049. #define RTC_TAMPER2_INTERRUPT      RTC_IT_TAMP2
  1050. #define RTC_TAMPER3_INTERRUPT      RTC_IT_TAMP3
  1051. #define RTC_ALL_TAMPER_INTERRUPT   RTC_IT_TAMPALL
  1052. #endif /* STM32H7 */
  1053.  
  1054. /**
  1055.   * @}
  1056.   */
  1057.  
  1058.  
  1059. /** @defgroup HAL_SMARTCARD_Aliased_Defines HAL SMARTCARD Aliased Defines maintained for legacy purpose
  1060.   * @{
  1061.   */
  1062. #define SMARTCARD_NACK_ENABLED                  SMARTCARD_NACK_ENABLE
  1063. #define SMARTCARD_NACK_DISABLED                 SMARTCARD_NACK_DISABLE
  1064.  
  1065. #define SMARTCARD_ONEBIT_SAMPLING_DISABLED      SMARTCARD_ONE_BIT_SAMPLE_DISABLE
  1066. #define SMARTCARD_ONEBIT_SAMPLING_ENABLED       SMARTCARD_ONE_BIT_SAMPLE_ENABLE
  1067. #define SMARTCARD_ONEBIT_SAMPLING_DISABLE       SMARTCARD_ONE_BIT_SAMPLE_DISABLE
  1068. #define SMARTCARD_ONEBIT_SAMPLING_ENABLE        SMARTCARD_ONE_BIT_SAMPLE_ENABLE
  1069.  
  1070. #define SMARTCARD_TIMEOUT_DISABLED              SMARTCARD_TIMEOUT_DISABLE
  1071. #define SMARTCARD_TIMEOUT_ENABLED               SMARTCARD_TIMEOUT_ENABLE
  1072.  
  1073. #define SMARTCARD_LASTBIT_DISABLED              SMARTCARD_LASTBIT_DISABLE
  1074. #define SMARTCARD_LASTBIT_ENABLED               SMARTCARD_LASTBIT_ENABLE
  1075. /**
  1076.   * @}
  1077.   */
  1078.  
  1079.  
  1080. /** @defgroup HAL_SMBUS_Aliased_Defines HAL SMBUS Aliased Defines maintained for legacy purpose
  1081.   * @{
  1082.   */
  1083. #define SMBUS_DUALADDRESS_DISABLED      SMBUS_DUALADDRESS_DISABLE
  1084. #define SMBUS_DUALADDRESS_ENABLED       SMBUS_DUALADDRESS_ENABLE
  1085. #define SMBUS_GENERALCALL_DISABLED      SMBUS_GENERALCALL_DISABLE
  1086. #define SMBUS_GENERALCALL_ENABLED       SMBUS_GENERALCALL_ENABLE
  1087. #define SMBUS_NOSTRETCH_DISABLED        SMBUS_NOSTRETCH_DISABLE
  1088. #define SMBUS_NOSTRETCH_ENABLED         SMBUS_NOSTRETCH_ENABLE
  1089. #define SMBUS_ANALOGFILTER_ENABLED      SMBUS_ANALOGFILTER_ENABLE
  1090. #define SMBUS_ANALOGFILTER_DISABLED     SMBUS_ANALOGFILTER_DISABLE
  1091. #define SMBUS_PEC_DISABLED              SMBUS_PEC_DISABLE
  1092. #define SMBUS_PEC_ENABLED               SMBUS_PEC_ENABLE
  1093. #define HAL_SMBUS_STATE_SLAVE_LISTEN    HAL_SMBUS_STATE_LISTEN
  1094. /**
  1095.   * @}
  1096.   */
  1097.  
  1098. /** @defgroup HAL_SPI_Aliased_Defines HAL SPI Aliased Defines maintained for legacy purpose
  1099.   * @{
  1100.   */
  1101. #define SPI_TIMODE_DISABLED             SPI_TIMODE_DISABLE
  1102. #define SPI_TIMODE_ENABLED              SPI_TIMODE_ENABLE
  1103.  
  1104. #define SPI_CRCCALCULATION_DISABLED     SPI_CRCCALCULATION_DISABLE
  1105. #define SPI_CRCCALCULATION_ENABLED      SPI_CRCCALCULATION_ENABLE
  1106.  
  1107. #define SPI_NSS_PULSE_DISABLED          SPI_NSS_PULSE_DISABLE
  1108. #define SPI_NSS_PULSE_ENABLED           SPI_NSS_PULSE_ENABLE
  1109.  
  1110. #if defined(STM32H7)
  1111.  
  1112. #define SPI_FLAG_TXE                    SPI_FLAG_TXP
  1113. #define SPI_FLAG_RXNE                   SPI_FLAG_RXP
  1114.  
  1115. #define SPI_IT_TXE                      SPI_IT_TXP
  1116. #define SPI_IT_RXNE                     SPI_IT_RXP
  1117.  
  1118. #define SPI_FRLVL_EMPTY                 SPI_RX_FIFO_0PACKET
  1119. #define SPI_FRLVL_QUARTER_FULL          SPI_RX_FIFO_1PACKET
  1120. #define SPI_FRLVL_HALF_FULL             SPI_RX_FIFO_2PACKET
  1121. #define SPI_FRLVL_FULL                  SPI_RX_FIFO_3PACKET
  1122.  
  1123. #endif /* STM32H7 */
  1124.  
  1125. /**
  1126.   * @}
  1127.   */
  1128.  
  1129. /** @defgroup HAL_TIM_Aliased_Defines HAL TIM Aliased Defines maintained for legacy purpose
  1130.   * @{
  1131.   */
  1132. #define CCER_CCxE_MASK                   TIM_CCER_CCxE_MASK
  1133. #define CCER_CCxNE_MASK                  TIM_CCER_CCxNE_MASK
  1134.  
  1135. #define TIM_DMABase_CR1                  TIM_DMABASE_CR1
  1136. #define TIM_DMABase_CR2                  TIM_DMABASE_CR2
  1137. #define TIM_DMABase_SMCR                 TIM_DMABASE_SMCR
  1138. #define TIM_DMABase_DIER                 TIM_DMABASE_DIER
  1139. #define TIM_DMABase_SR                   TIM_DMABASE_SR
  1140. #define TIM_DMABase_EGR                  TIM_DMABASE_EGR
  1141. #define TIM_DMABase_CCMR1                TIM_DMABASE_CCMR1
  1142. #define TIM_DMABase_CCMR2                TIM_DMABASE_CCMR2
  1143. #define TIM_DMABase_CCER                 TIM_DMABASE_CCER
  1144. #define TIM_DMABase_CNT                  TIM_DMABASE_CNT
  1145. #define TIM_DMABase_PSC                  TIM_DMABASE_PSC
  1146. #define TIM_DMABase_ARR                  TIM_DMABASE_ARR
  1147. #define TIM_DMABase_RCR                  TIM_DMABASE_RCR
  1148. #define TIM_DMABase_CCR1                 TIM_DMABASE_CCR1
  1149. #define TIM_DMABase_CCR2                 TIM_DMABASE_CCR2
  1150. #define TIM_DMABase_CCR3                 TIM_DMABASE_CCR3
  1151. #define TIM_DMABase_CCR4                 TIM_DMABASE_CCR4
  1152. #define TIM_DMABase_BDTR                 TIM_DMABASE_BDTR
  1153. #define TIM_DMABase_DCR                  TIM_DMABASE_DCR
  1154. #define TIM_DMABase_DMAR                 TIM_DMABASE_DMAR
  1155. #define TIM_DMABase_OR1                  TIM_DMABASE_OR1
  1156. #define TIM_DMABase_CCMR3                TIM_DMABASE_CCMR3
  1157. #define TIM_DMABase_CCR5                 TIM_DMABASE_CCR5
  1158. #define TIM_DMABase_CCR6                 TIM_DMABASE_CCR6
  1159. #define TIM_DMABase_OR2                  TIM_DMABASE_OR2
  1160. #define TIM_DMABase_OR3                  TIM_DMABASE_OR3
  1161. #define TIM_DMABase_OR                   TIM_DMABASE_OR
  1162.  
  1163. #define TIM_EventSource_Update           TIM_EVENTSOURCE_UPDATE
  1164. #define TIM_EventSource_CC1              TIM_EVENTSOURCE_CC1
  1165. #define TIM_EventSource_CC2              TIM_EVENTSOURCE_CC2
  1166. #define TIM_EventSource_CC3              TIM_EVENTSOURCE_CC3
  1167. #define TIM_EventSource_CC4              TIM_EVENTSOURCE_CC4
  1168. #define TIM_EventSource_COM              TIM_EVENTSOURCE_COM
  1169. #define TIM_EventSource_Trigger          TIM_EVENTSOURCE_TRIGGER
  1170. #define TIM_EventSource_Break            TIM_EVENTSOURCE_BREAK
  1171. #define TIM_EventSource_Break2           TIM_EVENTSOURCE_BREAK2
  1172.  
  1173. #define TIM_DMABurstLength_1Transfer     TIM_DMABURSTLENGTH_1TRANSFER
  1174. #define TIM_DMABurstLength_2Transfers    TIM_DMABURSTLENGTH_2TRANSFERS
  1175. #define TIM_DMABurstLength_3Transfers    TIM_DMABURSTLENGTH_3TRANSFERS
  1176. #define TIM_DMABurstLength_4Transfers    TIM_DMABURSTLENGTH_4TRANSFERS
  1177. #define TIM_DMABurstLength_5Transfers    TIM_DMABURSTLENGTH_5TRANSFERS
  1178. #define TIM_DMABurstLength_6Transfers    TIM_DMABURSTLENGTH_6TRANSFERS
  1179. #define TIM_DMABurstLength_7Transfers    TIM_DMABURSTLENGTH_7TRANSFERS
  1180. #define TIM_DMABurstLength_8Transfers    TIM_DMABURSTLENGTH_8TRANSFERS
  1181. #define TIM_DMABurstLength_9Transfers    TIM_DMABURSTLENGTH_9TRANSFERS
  1182. #define TIM_DMABurstLength_10Transfers   TIM_DMABURSTLENGTH_10TRANSFERS
  1183. #define TIM_DMABurstLength_11Transfers   TIM_DMABURSTLENGTH_11TRANSFERS
  1184. #define TIM_DMABurstLength_12Transfers   TIM_DMABURSTLENGTH_12TRANSFERS
  1185. #define TIM_DMABurstLength_13Transfers   TIM_DMABURSTLENGTH_13TRANSFERS
  1186. #define TIM_DMABurstLength_14Transfers   TIM_DMABURSTLENGTH_14TRANSFERS
  1187. #define TIM_DMABurstLength_15Transfers   TIM_DMABURSTLENGTH_15TRANSFERS
  1188. #define TIM_DMABurstLength_16Transfers   TIM_DMABURSTLENGTH_16TRANSFERS
  1189. #define TIM_DMABurstLength_17Transfers   TIM_DMABURSTLENGTH_17TRANSFERS
  1190. #define TIM_DMABurstLength_18Transfers   TIM_DMABURSTLENGTH_18TRANSFERS
  1191.  
  1192. #if defined(STM32L0)
  1193. #define TIM22_TI1_GPIO1   TIM22_TI1_GPIO
  1194. #define TIM22_TI1_GPIO2   TIM22_TI1_GPIO
  1195. #endif
  1196.  
  1197. #if defined(STM32F3)
  1198. #define IS_TIM_HALL_INTERFACE_INSTANCE   IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE
  1199. #endif
  1200.  
  1201. #if defined(STM32H7)
  1202. #define TIM_TIM1_ETR_COMP1_OUT        TIM_TIM1_ETR_COMP1
  1203. #define TIM_TIM1_ETR_COMP2_OUT        TIM_TIM1_ETR_COMP2
  1204. #define TIM_TIM8_ETR_COMP1_OUT        TIM_TIM8_ETR_COMP1
  1205. #define TIM_TIM8_ETR_COMP2_OUT        TIM_TIM8_ETR_COMP2
  1206. #define TIM_TIM2_ETR_COMP1_OUT        TIM_TIM2_ETR_COMP1
  1207. #define TIM_TIM2_ETR_COMP2_OUT        TIM_TIM2_ETR_COMP2
  1208. #define TIM_TIM3_ETR_COMP1_OUT        TIM_TIM3_ETR_COMP1
  1209. #define TIM_TIM1_TI1_COMP1_OUT        TIM_TIM1_TI1_COMP1
  1210. #define TIM_TIM8_TI1_COMP2_OUT        TIM_TIM8_TI1_COMP2
  1211. #define TIM_TIM2_TI4_COMP1_OUT        TIM_TIM2_TI4_COMP1
  1212. #define TIM_TIM2_TI4_COMP2_OUT        TIM_TIM2_TI4_COMP2
  1213. #define TIM_TIM2_TI4_COMP1COMP2_OUT   TIM_TIM2_TI4_COMP1_COMP2
  1214. #define TIM_TIM3_TI1_COMP1_OUT        TIM_TIM3_TI1_COMP1
  1215. #define TIM_TIM3_TI1_COMP2_OUT        TIM_TIM3_TI1_COMP2
  1216. #define TIM_TIM3_TI1_COMP1COMP2_OUT   TIM_TIM3_TI1_COMP1_COMP2
  1217. #endif
  1218.  
  1219. /**
  1220.   * @}
  1221.   */
  1222.  
  1223. /** @defgroup HAL_TSC_Aliased_Defines HAL TSC Aliased Defines maintained for legacy purpose
  1224.   * @{
  1225.   */
  1226. #define TSC_SYNC_POL_FALL        TSC_SYNC_POLARITY_FALLING
  1227. #define TSC_SYNC_POL_RISE_HIGH   TSC_SYNC_POLARITY_RISING
  1228. /**
  1229.   * @}
  1230.   */
  1231.  
  1232. /** @defgroup HAL_UART_Aliased_Defines HAL UART Aliased Defines maintained for legacy purpose
  1233.   * @{
  1234.   */
  1235. #define UART_ONEBIT_SAMPLING_DISABLED   UART_ONE_BIT_SAMPLE_DISABLE
  1236. #define UART_ONEBIT_SAMPLING_ENABLED    UART_ONE_BIT_SAMPLE_ENABLE
  1237. #define UART_ONE_BIT_SAMPLE_DISABLED    UART_ONE_BIT_SAMPLE_DISABLE
  1238. #define UART_ONE_BIT_SAMPLE_ENABLED     UART_ONE_BIT_SAMPLE_ENABLE
  1239.  
  1240. #define __HAL_UART_ONEBIT_ENABLE        __HAL_UART_ONE_BIT_SAMPLE_ENABLE
  1241. #define __HAL_UART_ONEBIT_DISABLE       __HAL_UART_ONE_BIT_SAMPLE_DISABLE
  1242.  
  1243. #define __DIV_SAMPLING16                UART_DIV_SAMPLING16
  1244. #define __DIVMANT_SAMPLING16            UART_DIVMANT_SAMPLING16
  1245. #define __DIVFRAQ_SAMPLING16            UART_DIVFRAQ_SAMPLING16
  1246. #define __UART_BRR_SAMPLING16           UART_BRR_SAMPLING16
  1247.  
  1248. #define __DIV_SAMPLING8                 UART_DIV_SAMPLING8
  1249. #define __DIVMANT_SAMPLING8             UART_DIVMANT_SAMPLING8
  1250. #define __DIVFRAQ_SAMPLING8             UART_DIVFRAQ_SAMPLING8
  1251. #define __UART_BRR_SAMPLING8            UART_BRR_SAMPLING8
  1252.  
  1253. #define __DIV_LPUART                    UART_DIV_LPUART
  1254.  
  1255. #define UART_WAKEUPMETHODE_IDLELINE     UART_WAKEUPMETHOD_IDLELINE
  1256. #define UART_WAKEUPMETHODE_ADDRESSMARK  UART_WAKEUPMETHOD_ADDRESSMARK
  1257.  
  1258. /**
  1259.   * @}
  1260.   */
  1261.  
  1262.  
  1263. /** @defgroup HAL_USART_Aliased_Defines HAL USART Aliased Defines maintained for legacy purpose
  1264.   * @{
  1265.   */
  1266.  
  1267. #define USART_CLOCK_DISABLED            USART_CLOCK_DISABLE
  1268. #define USART_CLOCK_ENABLED             USART_CLOCK_ENABLE
  1269.  
  1270. #define USARTNACK_ENABLED               USART_NACK_ENABLE
  1271. #define USARTNACK_DISABLED              USART_NACK_DISABLE
  1272. /**
  1273.   * @}
  1274.   */
  1275.  
  1276. /** @defgroup HAL_WWDG_Aliased_Defines HAL WWDG Aliased Defines maintained for legacy purpose
  1277.   * @{
  1278.   */
  1279. #define CFR_BASE                    WWDG_CFR_BASE
  1280.  
  1281. /**
  1282.   * @}
  1283.   */
  1284.  
  1285. /** @defgroup HAL_CAN_Aliased_Defines HAL CAN Aliased Defines maintained for legacy purpose
  1286.   * @{
  1287.   */
  1288. #define CAN_FilterFIFO0             CAN_FILTER_FIFO0
  1289. #define CAN_FilterFIFO1             CAN_FILTER_FIFO1
  1290. #define CAN_IT_RQCP0                CAN_IT_TME
  1291. #define CAN_IT_RQCP1                CAN_IT_TME
  1292. #define CAN_IT_RQCP2                CAN_IT_TME
  1293. #define INAK_TIMEOUT                CAN_TIMEOUT_VALUE
  1294. #define SLAK_TIMEOUT                CAN_TIMEOUT_VALUE
  1295. #define CAN_TXSTATUS_FAILED         ((uint8_t)0x00U)
  1296. #define CAN_TXSTATUS_OK             ((uint8_t)0x01U)
  1297. #define CAN_TXSTATUS_PENDING        ((uint8_t)0x02U)
  1298.  
  1299. /**
  1300.   * @}
  1301.   */
  1302.  
  1303. /** @defgroup HAL_ETH_Aliased_Defines HAL ETH Aliased Defines maintained for legacy purpose
  1304.   * @{
  1305.   */
  1306.  
  1307. #define VLAN_TAG                ETH_VLAN_TAG
  1308. #define MIN_ETH_PAYLOAD         ETH_MIN_ETH_PAYLOAD
  1309. #define MAX_ETH_PAYLOAD         ETH_MAX_ETH_PAYLOAD
  1310. #define JUMBO_FRAME_PAYLOAD     ETH_JUMBO_FRAME_PAYLOAD
  1311. #define MACMIIAR_CR_MASK        ETH_MACMIIAR_CR_MASK
  1312. #define MACCR_CLEAR_MASK        ETH_MACCR_CLEAR_MASK
  1313. #define MACFCR_CLEAR_MASK       ETH_MACFCR_CLEAR_MASK
  1314. #define DMAOMR_CLEAR_MASK       ETH_DMAOMR_CLEAR_MASK
  1315.  
  1316. #define ETH_MMCCR              0x00000100U
  1317. #define ETH_MMCRIR             0x00000104U
  1318. #define ETH_MMCTIR             0x00000108U
  1319. #define ETH_MMCRIMR            0x0000010CU
  1320. #define ETH_MMCTIMR            0x00000110U
  1321. #define ETH_MMCTGFSCCR         0x0000014CU
  1322. #define ETH_MMCTGFMSCCR        0x00000150U
  1323. #define ETH_MMCTGFCR           0x00000168U
  1324. #define ETH_MMCRFCECR          0x00000194U
  1325. #define ETH_MMCRFAECR          0x00000198U
  1326. #define ETH_MMCRGUFCR          0x000001C4U
  1327.  
  1328. #define ETH_MAC_TXFIFO_FULL                             0x02000000U  /* Tx FIFO full */
  1329. #define ETH_MAC_TXFIFONOT_EMPTY                         0x01000000U  /* Tx FIFO not empty */
  1330. #define ETH_MAC_TXFIFO_WRITE_ACTIVE                     0x00400000U  /* Tx FIFO write active */
  1331. #define ETH_MAC_TXFIFO_IDLE                             0x00000000U  /* Tx FIFO read status: Idle */
  1332. #define ETH_MAC_TXFIFO_READ                             0x00100000U  /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */
  1333. #define ETH_MAC_TXFIFO_WAITING                          0x00200000U  /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */
  1334. #define ETH_MAC_TXFIFO_WRITING                          0x00300000U  /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */
  1335. #define ETH_MAC_TRANSMISSION_PAUSE                      0x00080000U  /* MAC transmitter in pause */
  1336. #define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE            0x00000000U  /* MAC transmit frame controller: Idle */
  1337. #define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING         0x00020000U  /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */
  1338. #define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF   0x00040000U  /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */
  1339. #define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING    0x00060000U  /* MAC transmit frame controller: Transferring input frame for transmission */
  1340. #define ETH_MAC_MII_TRANSMIT_ACTIVE           0x00010000U  /* MAC MII transmit engine active */
  1341. #define ETH_MAC_RXFIFO_EMPTY                  0x00000000U  /* Rx FIFO fill level: empty */
  1342. #define ETH_MAC_RXFIFO_BELOW_THRESHOLD        0x00000100U  /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */
  1343. #define ETH_MAC_RXFIFO_ABOVE_THRESHOLD        0x00000200U  /* Rx FIFO fill level: fill-level above flow-control activate threshold */
  1344. #define ETH_MAC_RXFIFO_FULL                   0x00000300U  /* Rx FIFO fill level: full */
  1345. #if defined(STM32F1)
  1346. #else
  1347. #define ETH_MAC_READCONTROLLER_IDLE           0x00000000U  /* Rx FIFO read controller IDLE state */
  1348. #define ETH_MAC_READCONTROLLER_READING_DATA   0x00000020U  /* Rx FIFO read controller Reading frame data */
  1349. #define ETH_MAC_READCONTROLLER_READING_STATUS 0x00000040U  /* Rx FIFO read controller Reading frame status (or time-stamp) */
  1350. #endif
  1351. #define ETH_MAC_READCONTROLLER_FLUSHING       0x00000060U  /* Rx FIFO read controller Flushing the frame data and status */
  1352. #define ETH_MAC_RXFIFO_WRITE_ACTIVE           0x00000010U  /* Rx FIFO write controller active */
  1353. #define ETH_MAC_SMALL_FIFO_NOTACTIVE          0x00000000U  /* MAC small FIFO read / write controllers not active */
  1354. #define ETH_MAC_SMALL_FIFO_READ_ACTIVE        0x00000002U  /* MAC small FIFO read controller active */
  1355. #define ETH_MAC_SMALL_FIFO_WRITE_ACTIVE       0x00000004U  /* MAC small FIFO write controller active */
  1356. #define ETH_MAC_SMALL_FIFO_RW_ACTIVE          0x00000006U  /* MAC small FIFO read / write controllers active */
  1357. #define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE   0x00000001U  /* MAC MII receive protocol engine active */
  1358.  
  1359. /**
  1360.   * @}
  1361.   */
  1362.  
  1363. /** @defgroup HAL_DCMI_Aliased_Defines HAL DCMI Aliased Defines maintained for legacy purpose
  1364.   * @{
  1365.   */
  1366. #define HAL_DCMI_ERROR_OVF      HAL_DCMI_ERROR_OVR
  1367. #define DCMI_IT_OVF             DCMI_IT_OVR
  1368. #define DCMI_FLAG_OVFRI         DCMI_FLAG_OVRRI
  1369. #define DCMI_FLAG_OVFMI         DCMI_FLAG_OVRMI
  1370.  
  1371. #define HAL_DCMI_ConfigCROP     HAL_DCMI_ConfigCrop
  1372. #define HAL_DCMI_EnableCROP     HAL_DCMI_EnableCrop
  1373. #define HAL_DCMI_DisableCROP    HAL_DCMI_DisableCrop
  1374.  
  1375. /**
  1376.   * @}
  1377.   */
  1378.  
  1379. #if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) \
  1380.   || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) \
  1381.   || defined(STM32H7)
  1382. /** @defgroup HAL_DMA2D_Aliased_Defines HAL DMA2D Aliased Defines maintained for legacy purpose
  1383.   * @{
  1384.   */
  1385. #define DMA2D_ARGB8888          DMA2D_OUTPUT_ARGB8888
  1386. #define DMA2D_RGB888            DMA2D_OUTPUT_RGB888
  1387. #define DMA2D_RGB565            DMA2D_OUTPUT_RGB565
  1388. #define DMA2D_ARGB1555          DMA2D_OUTPUT_ARGB1555
  1389. #define DMA2D_ARGB4444          DMA2D_OUTPUT_ARGB4444
  1390.  
  1391. #define CM_ARGB8888             DMA2D_INPUT_ARGB8888
  1392. #define CM_RGB888               DMA2D_INPUT_RGB888
  1393. #define CM_RGB565               DMA2D_INPUT_RGB565
  1394. #define CM_ARGB1555             DMA2D_INPUT_ARGB1555
  1395. #define CM_ARGB4444             DMA2D_INPUT_ARGB4444
  1396. #define CM_L8                   DMA2D_INPUT_L8
  1397. #define CM_AL44                 DMA2D_INPUT_AL44
  1398. #define CM_AL88                 DMA2D_INPUT_AL88
  1399. #define CM_L4                   DMA2D_INPUT_L4
  1400. #define CM_A8                   DMA2D_INPUT_A8
  1401. #define CM_A4                   DMA2D_INPUT_A4
  1402. /**
  1403.   * @}
  1404.   */
  1405. #endif  /* STM32L4 ||  STM32F7 ||  STM32F4 ||  STM32H7 */
  1406.  
  1407. #if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) \
  1408.   || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) \
  1409.   || defined(STM32H7) || defined(STM32U5)
  1410. /** @defgroup DMA2D_Aliases DMA2D API Aliases
  1411.   * @{
  1412.   */
  1413. #define HAL_DMA2D_DisableCLUT       HAL_DMA2D_CLUTLoading_Abort    /*!< Aliased to HAL_DMA2D_CLUTLoading_Abort
  1414.                                                                         for compatibility with legacy code */
  1415. /**
  1416.   * @}
  1417.   */
  1418.  
  1419. #endif  /* STM32L4 ||  STM32F7 ||  STM32F4 ||  STM32H7 || STM32U5 */
  1420.  
  1421. /** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose
  1422.   * @{
  1423.   */
  1424.  
  1425. /**
  1426.   * @}
  1427.   */
  1428.  
  1429. /* Exported functions --------------------------------------------------------*/
  1430.  
  1431. /** @defgroup HAL_CRYP_Aliased_Functions HAL CRYP Aliased Functions maintained for legacy purpose
  1432.   * @{
  1433.   */
  1434. #define HAL_CRYP_ComputationCpltCallback     HAL_CRYPEx_ComputationCpltCallback
  1435. /**
  1436.   * @}
  1437.   */
  1438.  
  1439. /** @defgroup HAL_DCACHE_Aliased_Functions HAL DCACHE Aliased Functions maintained for legacy purpose
  1440.   * @{
  1441.   */
  1442.  
  1443. #if defined(STM32U5)
  1444. #define HAL_DCACHE_CleanInvalidateByAddr     HAL_DCACHE_CleanInvalidByAddr
  1445. #define HAL_DCACHE_CleanInvalidateByAddr_IT  HAL_DCACHE_CleanInvalidByAddr_IT
  1446. #endif /* STM32U5 */
  1447.  
  1448. /**
  1449.   * @}
  1450.   */
  1451.  
  1452. #if !defined(STM32F2)
  1453. /** @defgroup HASH_alias HASH API alias
  1454.   * @{
  1455.   */
  1456. #define HAL_HASHEx_IRQHandler   HAL_HASH_IRQHandler  /*!< Redirection for compatibility with legacy code */
  1457. /**
  1458.   *
  1459.   * @}
  1460.   */
  1461. #endif /* STM32F2 */
  1462. /** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose
  1463.   * @{
  1464.   */
  1465. #define HAL_HASH_STATETypeDef        HAL_HASH_StateTypeDef
  1466. #define HAL_HASHPhaseTypeDef         HAL_HASH_PhaseTypeDef
  1467. #define HAL_HMAC_MD5_Finish          HAL_HASH_MD5_Finish
  1468. #define HAL_HMAC_SHA1_Finish         HAL_HASH_SHA1_Finish
  1469. #define HAL_HMAC_SHA224_Finish       HAL_HASH_SHA224_Finish
  1470. #define HAL_HMAC_SHA256_Finish       HAL_HASH_SHA256_Finish
  1471.  
  1472. /*HASH Algorithm Selection*/
  1473.  
  1474. #define HASH_AlgoSelection_SHA1      HASH_ALGOSELECTION_SHA1
  1475. #define HASH_AlgoSelection_SHA224    HASH_ALGOSELECTION_SHA224
  1476. #define HASH_AlgoSelection_SHA256    HASH_ALGOSELECTION_SHA256
  1477. #define HASH_AlgoSelection_MD5       HASH_ALGOSELECTION_MD5
  1478.  
  1479. #define HASH_AlgoMode_HASH         HASH_ALGOMODE_HASH
  1480. #define HASH_AlgoMode_HMAC         HASH_ALGOMODE_HMAC
  1481.  
  1482. #define HASH_HMACKeyType_ShortKey  HASH_HMAC_KEYTYPE_SHORTKEY
  1483. #define HASH_HMACKeyType_LongKey   HASH_HMAC_KEYTYPE_LONGKEY
  1484.  
  1485. #if defined(STM32L4) || defined(STM32L5) || defined(STM32F2) || defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
  1486.  
  1487. #define HAL_HASH_MD5_Accumulate                HAL_HASH_MD5_Accmlt
  1488. #define HAL_HASH_MD5_Accumulate_End            HAL_HASH_MD5_Accmlt_End
  1489. #define HAL_HASH_MD5_Accumulate_IT             HAL_HASH_MD5_Accmlt_IT
  1490. #define HAL_HASH_MD5_Accumulate_End_IT         HAL_HASH_MD5_Accmlt_End_IT
  1491.  
  1492. #define HAL_HASH_SHA1_Accumulate               HAL_HASH_SHA1_Accmlt
  1493. #define HAL_HASH_SHA1_Accumulate_End           HAL_HASH_SHA1_Accmlt_End
  1494. #define HAL_HASH_SHA1_Accumulate_IT            HAL_HASH_SHA1_Accmlt_IT
  1495. #define HAL_HASH_SHA1_Accumulate_End_IT        HAL_HASH_SHA1_Accmlt_End_IT
  1496.  
  1497. #define HAL_HASHEx_SHA224_Accumulate           HAL_HASHEx_SHA224_Accmlt
  1498. #define HAL_HASHEx_SHA224_Accumulate_End       HAL_HASHEx_SHA224_Accmlt_End
  1499. #define HAL_HASHEx_SHA224_Accumulate_IT        HAL_HASHEx_SHA224_Accmlt_IT
  1500. #define HAL_HASHEx_SHA224_Accumulate_End_IT    HAL_HASHEx_SHA224_Accmlt_End_IT
  1501.  
  1502. #define HAL_HASHEx_SHA256_Accumulate           HAL_HASHEx_SHA256_Accmlt
  1503. #define HAL_HASHEx_SHA256_Accumulate_End       HAL_HASHEx_SHA256_Accmlt_End
  1504. #define HAL_HASHEx_SHA256_Accumulate_IT        HAL_HASHEx_SHA256_Accmlt_IT
  1505. #define HAL_HASHEx_SHA256_Accumulate_End_IT    HAL_HASHEx_SHA256_Accmlt_End_IT
  1506.  
  1507. #endif  /* STM32L4 || STM32L5 || STM32F2 || STM32F4 || STM32F7 || STM32H7 */
  1508. /**
  1509.   * @}
  1510.   */
  1511.  
  1512. /** @defgroup HAL_Aliased_Functions HAL Generic Aliased Functions maintained for legacy purpose
  1513.   * @{
  1514.   */
  1515. #define HAL_EnableDBGSleepMode HAL_DBGMCU_EnableDBGSleepMode
  1516. #define HAL_DisableDBGSleepMode HAL_DBGMCU_DisableDBGSleepMode
  1517. #define HAL_EnableDBGStopMode HAL_DBGMCU_EnableDBGStopMode
  1518. #define HAL_DisableDBGStopMode HAL_DBGMCU_DisableDBGStopMode
  1519. #define HAL_EnableDBGStandbyMode HAL_DBGMCU_EnableDBGStandbyMode
  1520. #define HAL_DisableDBGStandbyMode HAL_DBGMCU_DisableDBGStandbyMode
  1521. #define HAL_DBG_LowPowerConfig(Periph, cmd) (((cmd\
  1522.                                               )==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph))
  1523. #define HAL_VREFINT_OutputSelect  HAL_SYSCFG_VREFINT_OutputSelect
  1524. #define HAL_Lock_Cmd(cmd) (((cmd)==ENABLE) ? HAL_SYSCFG_Enable_Lock_VREFINT() : HAL_SYSCFG_Disable_Lock_VREFINT())
  1525. #if defined(STM32L0)
  1526. #else
  1527. #define HAL_VREFINT_Cmd(cmd) (((cmd)==ENABLE)? HAL_SYSCFG_EnableVREFINT() : HAL_SYSCFG_DisableVREFINT())
  1528. #endif
  1529. #define HAL_ADC_EnableBuffer_Cmd(cmd)  (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT())
  1530. #define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd\
  1531.                                               )==ENABLE) ?  HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor())
  1532. #if defined(STM32H7A3xx) || defined(STM32H7B3xx) || defined(STM32H7B0xx) || defined(STM32H7A3xxQ) || defined(STM32H7B3xxQ) || defined(STM32H7B0xxQ)
  1533. #define HAL_EnableSRDomainDBGStopMode      HAL_EnableDomain3DBGStopMode
  1534. #define HAL_DisableSRDomainDBGStopMode     HAL_DisableDomain3DBGStopMode
  1535. #define HAL_EnableSRDomainDBGStandbyMode   HAL_EnableDomain3DBGStandbyMode
  1536. #define HAL_DisableSRDomainDBGStandbyMode  HAL_DisableDomain3DBGStandbyMode
  1537. #endif /* STM32H7A3xx || STM32H7B3xx || STM32H7B0xx || STM32H7A3xxQ || STM32H7B3xxQ  || STM32H7B0xxQ */
  1538.  
  1539. /**
  1540.   * @}
  1541.   */
  1542.  
  1543. /** @defgroup HAL_FLASH_Aliased_Functions HAL FLASH Aliased Functions maintained for legacy purpose
  1544.   * @{
  1545.   */
  1546. #define FLASH_HalfPageProgram      HAL_FLASHEx_HalfPageProgram
  1547. #define FLASH_EnableRunPowerDown   HAL_FLASHEx_EnableRunPowerDown
  1548. #define FLASH_DisableRunPowerDown  HAL_FLASHEx_DisableRunPowerDown
  1549. #define HAL_DATA_EEPROMEx_Unlock   HAL_FLASHEx_DATAEEPROM_Unlock
  1550. #define HAL_DATA_EEPROMEx_Lock     HAL_FLASHEx_DATAEEPROM_Lock
  1551. #define HAL_DATA_EEPROMEx_Erase    HAL_FLASHEx_DATAEEPROM_Erase
  1552. #define HAL_DATA_EEPROMEx_Program  HAL_FLASHEx_DATAEEPROM_Program
  1553.  
  1554. /**
  1555.   * @}
  1556.  */
  1557.  
  1558. /** @defgroup HAL_I2C_Aliased_Functions HAL I2C Aliased Functions maintained for legacy purpose
  1559.   * @{
  1560.   */
  1561. #define HAL_I2CEx_AnalogFilter_Config         HAL_I2CEx_ConfigAnalogFilter
  1562. #define HAL_I2CEx_DigitalFilter_Config        HAL_I2CEx_ConfigDigitalFilter
  1563. #define HAL_FMPI2CEx_AnalogFilter_Config      HAL_FMPI2CEx_ConfigAnalogFilter
  1564. #define HAL_FMPI2CEx_DigitalFilter_Config     HAL_FMPI2CEx_ConfigDigitalFilter
  1565.  
  1566. #define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd\
  1567.                                                                  )==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
  1568.  
  1569. #if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4) || defined(STM32L1)
  1570. #define HAL_I2C_Master_Sequential_Transmit_IT  HAL_I2C_Master_Seq_Transmit_IT
  1571. #define HAL_I2C_Master_Sequential_Receive_IT   HAL_I2C_Master_Seq_Receive_IT
  1572. #define HAL_I2C_Slave_Sequential_Transmit_IT   HAL_I2C_Slave_Seq_Transmit_IT
  1573. #define HAL_I2C_Slave_Sequential_Receive_IT    HAL_I2C_Slave_Seq_Receive_IT
  1574. #endif /* STM32H7 || STM32WB  || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 || STM32L1 */
  1575. #if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)|| defined(STM32L1)
  1576. #define HAL_I2C_Master_Sequential_Transmit_DMA HAL_I2C_Master_Seq_Transmit_DMA
  1577. #define HAL_I2C_Master_Sequential_Receive_DMA  HAL_I2C_Master_Seq_Receive_DMA
  1578. #define HAL_I2C_Slave_Sequential_Transmit_DMA  HAL_I2C_Slave_Seq_Transmit_DMA
  1579. #define HAL_I2C_Slave_Sequential_Receive_DMA   HAL_I2C_Slave_Seq_Receive_DMA
  1580. #endif /* STM32H7 || STM32WB  || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 || STM32L1 */
  1581.  
  1582. #if defined(STM32F4)
  1583. #define HAL_FMPI2C_Master_Sequential_Transmit_IT  HAL_FMPI2C_Master_Seq_Transmit_IT
  1584. #define HAL_FMPI2C_Master_Sequential_Receive_IT   HAL_FMPI2C_Master_Seq_Receive_IT
  1585. #define HAL_FMPI2C_Slave_Sequential_Transmit_IT   HAL_FMPI2C_Slave_Seq_Transmit_IT
  1586. #define HAL_FMPI2C_Slave_Sequential_Receive_IT    HAL_FMPI2C_Slave_Seq_Receive_IT
  1587. #define HAL_FMPI2C_Master_Sequential_Transmit_DMA HAL_FMPI2C_Master_Seq_Transmit_DMA
  1588. #define HAL_FMPI2C_Master_Sequential_Receive_DMA  HAL_FMPI2C_Master_Seq_Receive_DMA
  1589. #define HAL_FMPI2C_Slave_Sequential_Transmit_DMA  HAL_FMPI2C_Slave_Seq_Transmit_DMA
  1590. #define HAL_FMPI2C_Slave_Sequential_Receive_DMA   HAL_FMPI2C_Slave_Seq_Receive_DMA
  1591. #endif /* STM32F4 */
  1592. /**
  1593.   * @}
  1594.  */
  1595.  
  1596. /** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose
  1597.   * @{
  1598.   */
  1599.  
  1600. #if defined(STM32G0)
  1601. #define HAL_PWR_ConfigPVD                             HAL_PWREx_ConfigPVD
  1602. #define HAL_PWR_EnablePVD                             HAL_PWREx_EnablePVD
  1603. #define HAL_PWR_DisablePVD                            HAL_PWREx_DisablePVD
  1604. #define HAL_PWR_PVD_IRQHandler                        HAL_PWREx_PVD_IRQHandler
  1605. #endif
  1606. #define HAL_PWR_PVDConfig                             HAL_PWR_ConfigPVD
  1607. #define HAL_PWR_DisableBkUpReg                        HAL_PWREx_DisableBkUpReg
  1608. #define HAL_PWR_DisableFlashPowerDown                 HAL_PWREx_DisableFlashPowerDown
  1609. #define HAL_PWR_DisableVddio2Monitor                  HAL_PWREx_DisableVddio2Monitor
  1610. #define HAL_PWR_EnableBkUpReg                         HAL_PWREx_EnableBkUpReg
  1611. #define HAL_PWR_EnableFlashPowerDown                  HAL_PWREx_EnableFlashPowerDown
  1612. #define HAL_PWR_EnableVddio2Monitor                   HAL_PWREx_EnableVddio2Monitor
  1613. #define HAL_PWR_PVD_PVM_IRQHandler                    HAL_PWREx_PVD_PVM_IRQHandler
  1614. #define HAL_PWR_PVDLevelConfig                        HAL_PWR_ConfigPVD
  1615. #define HAL_PWR_Vddio2Monitor_IRQHandler              HAL_PWREx_Vddio2Monitor_IRQHandler
  1616. #define HAL_PWR_Vddio2MonitorCallback                 HAL_PWREx_Vddio2MonitorCallback
  1617. #define HAL_PWREx_ActivateOverDrive                   HAL_PWREx_EnableOverDrive
  1618. #define HAL_PWREx_DeactivateOverDrive                 HAL_PWREx_DisableOverDrive
  1619. #define HAL_PWREx_DisableSDADCAnalog                  HAL_PWREx_DisableSDADC
  1620. #define HAL_PWREx_EnableSDADCAnalog                   HAL_PWREx_EnableSDADC
  1621. #define HAL_PWREx_PVMConfig                           HAL_PWREx_ConfigPVM
  1622.  
  1623. #define PWR_MODE_NORMAL                               PWR_PVD_MODE_NORMAL
  1624. #define PWR_MODE_IT_RISING                            PWR_PVD_MODE_IT_RISING
  1625. #define PWR_MODE_IT_FALLING                           PWR_PVD_MODE_IT_FALLING
  1626. #define PWR_MODE_IT_RISING_FALLING                    PWR_PVD_MODE_IT_RISING_FALLING
  1627. #define PWR_MODE_EVENT_RISING                         PWR_PVD_MODE_EVENT_RISING
  1628. #define PWR_MODE_EVENT_FALLING                        PWR_PVD_MODE_EVENT_FALLING
  1629. #define PWR_MODE_EVENT_RISING_FALLING                 PWR_PVD_MODE_EVENT_RISING_FALLING
  1630.  
  1631. #define CR_OFFSET_BB                                  PWR_CR_OFFSET_BB
  1632. #define CSR_OFFSET_BB                                 PWR_CSR_OFFSET_BB
  1633. #define PMODE_BIT_NUMBER                              VOS_BIT_NUMBER
  1634. #define CR_PMODE_BB                                   CR_VOS_BB
  1635.  
  1636. #define DBP_BitNumber                                 DBP_BIT_NUMBER
  1637. #define PVDE_BitNumber                                PVDE_BIT_NUMBER
  1638. #define PMODE_BitNumber                               PMODE_BIT_NUMBER
  1639. #define EWUP_BitNumber                                EWUP_BIT_NUMBER
  1640. #define FPDS_BitNumber                                FPDS_BIT_NUMBER
  1641. #define ODEN_BitNumber                                ODEN_BIT_NUMBER
  1642. #define ODSWEN_BitNumber                              ODSWEN_BIT_NUMBER
  1643. #define MRLVDS_BitNumber                              MRLVDS_BIT_NUMBER
  1644. #define LPLVDS_BitNumber                              LPLVDS_BIT_NUMBER
  1645. #define BRE_BitNumber                                 BRE_BIT_NUMBER
  1646.  
  1647. #define PWR_MODE_EVT                                  PWR_PVD_MODE_NORMAL
  1648.  
  1649. /**
  1650.   * @}
  1651.  */
  1652.  
  1653. /** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose
  1654.   * @{
  1655.   */
  1656. #define HAL_SMBUS_Slave_Listen_IT          HAL_SMBUS_EnableListen_IT
  1657. #define HAL_SMBUS_SlaveAddrCallback        HAL_SMBUS_AddrCallback
  1658. #define HAL_SMBUS_SlaveListenCpltCallback  HAL_SMBUS_ListenCpltCallback
  1659. /**
  1660.   * @}
  1661.   */
  1662.  
  1663. /** @defgroup HAL_SPI_Aliased_Functions HAL SPI Aliased Functions maintained for legacy purpose
  1664.   * @{
  1665.   */
  1666. #define HAL_SPI_FlushRxFifo                HAL_SPIEx_FlushRxFifo
  1667. /**
  1668.   * @}
  1669.   */
  1670.  
  1671. /** @defgroup HAL_TIM_Aliased_Functions HAL TIM Aliased Functions maintained for legacy purpose
  1672.   * @{
  1673.   */
  1674. #define HAL_TIM_DMADelayPulseCplt                       TIM_DMADelayPulseCplt
  1675. #define HAL_TIM_DMAError                                TIM_DMAError
  1676. #define HAL_TIM_DMACaptureCplt                          TIM_DMACaptureCplt
  1677. #define HAL_TIMEx_DMACommutationCplt                    TIMEx_DMACommutationCplt
  1678. #if defined(STM32H7) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4)
  1679. #define HAL_TIM_SlaveConfigSynchronization              HAL_TIM_SlaveConfigSynchro
  1680. #define HAL_TIM_SlaveConfigSynchronization_IT           HAL_TIM_SlaveConfigSynchro_IT
  1681. #define HAL_TIMEx_CommutationCallback                   HAL_TIMEx_CommutCallback
  1682. #define HAL_TIMEx_ConfigCommutationEvent                HAL_TIMEx_ConfigCommutEvent
  1683. #define HAL_TIMEx_ConfigCommutationEvent_IT             HAL_TIMEx_ConfigCommutEvent_IT
  1684. #define HAL_TIMEx_ConfigCommutationEvent_DMA            HAL_TIMEx_ConfigCommutEvent_DMA
  1685. #endif /* STM32H7 || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 */
  1686. /**
  1687.   * @}
  1688.   */
  1689.  
  1690. /** @defgroup HAL_UART_Aliased_Functions HAL UART Aliased Functions maintained for legacy purpose
  1691.   * @{
  1692.   */
  1693. #define HAL_UART_WakeupCallback HAL_UARTEx_WakeupCallback
  1694. /**
  1695.   * @}
  1696.   */
  1697.  
  1698. /** @defgroup HAL_LTDC_Aliased_Functions HAL LTDC Aliased Functions maintained for legacy purpose
  1699.   * @{
  1700.   */
  1701. #define HAL_LTDC_LineEvenCallback HAL_LTDC_LineEventCallback
  1702. #define HAL_LTDC_Relaod           HAL_LTDC_Reload
  1703. #define HAL_LTDC_StructInitFromVideoConfig  HAL_LTDCEx_StructInitFromVideoConfig
  1704. #define HAL_LTDC_StructInitFromAdaptedCommandConfig  HAL_LTDCEx_StructInitFromAdaptedCommandConfig
  1705. /**
  1706.   * @}
  1707.   */
  1708.  
  1709.  
  1710. /** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose
  1711.   * @{
  1712.   */
  1713.  
  1714. /**
  1715.   * @}
  1716.   */
  1717.  
  1718. /* Exported macros ------------------------------------------------------------*/
  1719.  
  1720. /** @defgroup HAL_AES_Aliased_Macros HAL CRYP Aliased Macros maintained for legacy purpose
  1721.   * @{
  1722.   */
  1723. #define AES_IT_CC                      CRYP_IT_CC
  1724. #define AES_IT_ERR                     CRYP_IT_ERR
  1725. #define AES_FLAG_CCF                   CRYP_FLAG_CCF
  1726. /**
  1727.   * @}
  1728.   */
  1729.  
  1730. /** @defgroup HAL_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose
  1731.   * @{
  1732.   */
  1733. #define __HAL_GET_BOOT_MODE                   __HAL_SYSCFG_GET_BOOT_MODE
  1734. #define __HAL_REMAPMEMORY_FLASH               __HAL_SYSCFG_REMAPMEMORY_FLASH
  1735. #define __HAL_REMAPMEMORY_SYSTEMFLASH         __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH
  1736. #define __HAL_REMAPMEMORY_SRAM                __HAL_SYSCFG_REMAPMEMORY_SRAM
  1737. #define __HAL_REMAPMEMORY_FMC                 __HAL_SYSCFG_REMAPMEMORY_FMC
  1738. #define __HAL_REMAPMEMORY_FMC_SDRAM           __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM
  1739. #define __HAL_REMAPMEMORY_FSMC                __HAL_SYSCFG_REMAPMEMORY_FSMC
  1740. #define __HAL_REMAPMEMORY_QUADSPI             __HAL_SYSCFG_REMAPMEMORY_QUADSPI
  1741. #define __HAL_FMC_BANK                        __HAL_SYSCFG_FMC_BANK
  1742. #define __HAL_GET_FLAG                        __HAL_SYSCFG_GET_FLAG
  1743. #define __HAL_CLEAR_FLAG                      __HAL_SYSCFG_CLEAR_FLAG
  1744. #define __HAL_VREFINT_OUT_ENABLE              __HAL_SYSCFG_VREFINT_OUT_ENABLE
  1745. #define __HAL_VREFINT_OUT_DISABLE             __HAL_SYSCFG_VREFINT_OUT_DISABLE
  1746. #define __HAL_SYSCFG_SRAM2_WRP_ENABLE         __HAL_SYSCFG_SRAM2_WRP_0_31_ENABLE
  1747.  
  1748. #define SYSCFG_FLAG_VREF_READY                SYSCFG_FLAG_VREFINT_READY
  1749. #define SYSCFG_FLAG_RC48                      RCC_FLAG_HSI48
  1750. #define IS_SYSCFG_FASTMODEPLUS_CONFIG         IS_I2C_FASTMODEPLUS
  1751. #define UFB_MODE_BitNumber                    UFB_MODE_BIT_NUMBER
  1752. #define CMP_PD_BitNumber                      CMP_PD_BIT_NUMBER
  1753.  
  1754. /**
  1755.   * @}
  1756.   */
  1757.  
  1758.  
  1759. /** @defgroup HAL_ADC_Aliased_Macros HAL ADC Aliased Macros maintained for legacy purpose
  1760.   * @{
  1761.   */
  1762. #define __ADC_ENABLE                                     __HAL_ADC_ENABLE
  1763. #define __ADC_DISABLE                                    __HAL_ADC_DISABLE
  1764. #define __HAL_ADC_ENABLING_CONDITIONS                    ADC_ENABLING_CONDITIONS
  1765. #define __HAL_ADC_DISABLING_CONDITIONS                   ADC_DISABLING_CONDITIONS
  1766. #define __HAL_ADC_IS_ENABLED                             ADC_IS_ENABLE
  1767. #define __ADC_IS_ENABLED                                 ADC_IS_ENABLE
  1768. #define __HAL_ADC_IS_SOFTWARE_START_REGULAR              ADC_IS_SOFTWARE_START_REGULAR
  1769. #define __HAL_ADC_IS_SOFTWARE_START_INJECTED             ADC_IS_SOFTWARE_START_INJECTED
  1770. #define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED
  1771. #define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR          ADC_IS_CONVERSION_ONGOING_REGULAR
  1772. #define __HAL_ADC_IS_CONVERSION_ONGOING_INJECTED         ADC_IS_CONVERSION_ONGOING_INJECTED
  1773. #define __HAL_ADC_IS_CONVERSION_ONGOING                  ADC_IS_CONVERSION_ONGOING
  1774. #define __HAL_ADC_CLEAR_ERRORCODE                        ADC_CLEAR_ERRORCODE
  1775.  
  1776. #define __HAL_ADC_GET_RESOLUTION                         ADC_GET_RESOLUTION
  1777. #define __HAL_ADC_JSQR_RK                                ADC_JSQR_RK
  1778. #define __HAL_ADC_CFGR_AWD1CH                            ADC_CFGR_AWD1CH_SHIFT
  1779. #define __HAL_ADC_CFGR_AWD23CR                           ADC_CFGR_AWD23CR
  1780. #define __HAL_ADC_CFGR_INJECT_AUTO_CONVERSION            ADC_CFGR_INJECT_AUTO_CONVERSION
  1781. #define __HAL_ADC_CFGR_INJECT_CONTEXT_QUEUE              ADC_CFGR_INJECT_CONTEXT_QUEUE
  1782. #define __HAL_ADC_CFGR_INJECT_DISCCONTINUOUS             ADC_CFGR_INJECT_DISCCONTINUOUS
  1783. #define __HAL_ADC_CFGR_REG_DISCCONTINUOUS                ADC_CFGR_REG_DISCCONTINUOUS
  1784. #define __HAL_ADC_CFGR_DISCONTINUOUS_NUM                 ADC_CFGR_DISCONTINUOUS_NUM
  1785. #define __HAL_ADC_CFGR_AUTOWAIT                          ADC_CFGR_AUTOWAIT
  1786. #define __HAL_ADC_CFGR_CONTINUOUS                        ADC_CFGR_CONTINUOUS
  1787. #define __HAL_ADC_CFGR_OVERRUN                           ADC_CFGR_OVERRUN
  1788. #define __HAL_ADC_CFGR_DMACONTREQ                        ADC_CFGR_DMACONTREQ
  1789. #define __HAL_ADC_CFGR_EXTSEL                            ADC_CFGR_EXTSEL_SET
  1790. #define __HAL_ADC_JSQR_JEXTSEL                           ADC_JSQR_JEXTSEL_SET
  1791. #define __HAL_ADC_OFR_CHANNEL                            ADC_OFR_CHANNEL
  1792. #define __HAL_ADC_DIFSEL_CHANNEL                         ADC_DIFSEL_CHANNEL
  1793. #define __HAL_ADC_CALFACT_DIFF_SET                       ADC_CALFACT_DIFF_SET
  1794. #define __HAL_ADC_CALFACT_DIFF_GET                       ADC_CALFACT_DIFF_GET
  1795. #define __HAL_ADC_TRX_HIGHTHRESHOLD                      ADC_TRX_HIGHTHRESHOLD
  1796.  
  1797. #define __HAL_ADC_OFFSET_SHIFT_RESOLUTION                ADC_OFFSET_SHIFT_RESOLUTION
  1798. #define __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION         ADC_AWD1THRESHOLD_SHIFT_RESOLUTION
  1799. #define __HAL_ADC_AWD23THRESHOLD_SHIFT_RESOLUTION        ADC_AWD23THRESHOLD_SHIFT_RESOLUTION
  1800. #define __HAL_ADC_COMMON_REGISTER                        ADC_COMMON_REGISTER
  1801. #define __HAL_ADC_COMMON_CCR_MULTI                       ADC_COMMON_CCR_MULTI
  1802. #define __HAL_ADC_MULTIMODE_IS_ENABLED                   ADC_MULTIMODE_IS_ENABLE
  1803. #define __ADC_MULTIMODE_IS_ENABLED                       ADC_MULTIMODE_IS_ENABLE
  1804. #define __HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER        ADC_NONMULTIMODE_OR_MULTIMODEMASTER
  1805. #define __HAL_ADC_COMMON_ADC_OTHER                       ADC_COMMON_ADC_OTHER
  1806. #define __HAL_ADC_MULTI_SLAVE                            ADC_MULTI_SLAVE
  1807.  
  1808. #define __HAL_ADC_SQR1_L                                 ADC_SQR1_L_SHIFT
  1809. #define __HAL_ADC_JSQR_JL                                ADC_JSQR_JL_SHIFT
  1810. #define __HAL_ADC_JSQR_RK_JL                             ADC_JSQR_RK_JL
  1811. #define __HAL_ADC_CR1_DISCONTINUOUS_NUM                  ADC_CR1_DISCONTINUOUS_NUM
  1812. #define __HAL_ADC_CR1_SCAN                               ADC_CR1_SCAN_SET
  1813. #define __HAL_ADC_CONVCYCLES_MAX_RANGE                   ADC_CONVCYCLES_MAX_RANGE
  1814. #define __HAL_ADC_CLOCK_PRESCALER_RANGE                  ADC_CLOCK_PRESCALER_RANGE
  1815. #define __HAL_ADC_GET_CLOCK_PRESCALER                    ADC_GET_CLOCK_PRESCALER
  1816.  
  1817. #define __HAL_ADC_SQR1                                   ADC_SQR1
  1818. #define __HAL_ADC_SMPR1                                  ADC_SMPR1
  1819. #define __HAL_ADC_SMPR2                                  ADC_SMPR2
  1820. #define __HAL_ADC_SQR3_RK                                ADC_SQR3_RK
  1821. #define __HAL_ADC_SQR2_RK                                ADC_SQR2_RK
  1822. #define __HAL_ADC_SQR1_RK                                ADC_SQR1_RK
  1823. #define __HAL_ADC_CR2_CONTINUOUS                         ADC_CR2_CONTINUOUS
  1824. #define __HAL_ADC_CR1_DISCONTINUOUS                      ADC_CR1_DISCONTINUOUS
  1825. #define __HAL_ADC_CR1_SCANCONV                           ADC_CR1_SCANCONV
  1826. #define __HAL_ADC_CR2_EOCSelection                       ADC_CR2_EOCSelection
  1827. #define __HAL_ADC_CR2_DMAContReq                         ADC_CR2_DMAContReq
  1828. #define __HAL_ADC_JSQR                                   ADC_JSQR
  1829.  
  1830. #define __HAL_ADC_CHSELR_CHANNEL                         ADC_CHSELR_CHANNEL
  1831. #define __HAL_ADC_CFGR1_REG_DISCCONTINUOUS               ADC_CFGR1_REG_DISCCONTINUOUS
  1832. #define __HAL_ADC_CFGR1_AUTOOFF                          ADC_CFGR1_AUTOOFF
  1833. #define __HAL_ADC_CFGR1_AUTOWAIT                         ADC_CFGR1_AUTOWAIT
  1834. #define __HAL_ADC_CFGR1_CONTINUOUS                       ADC_CFGR1_CONTINUOUS
  1835. #define __HAL_ADC_CFGR1_OVERRUN                          ADC_CFGR1_OVERRUN
  1836. #define __HAL_ADC_CFGR1_SCANDIR                          ADC_CFGR1_SCANDIR
  1837. #define __HAL_ADC_CFGR1_DMACONTREQ                       ADC_CFGR1_DMACONTREQ
  1838.  
  1839. /**
  1840.   * @}
  1841.   */
  1842.  
  1843. /** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
  1844.   * @{
  1845.   */
  1846. #define __HAL_DHR12R1_ALIGNEMENT                        DAC_DHR12R1_ALIGNMENT
  1847. #define __HAL_DHR12R2_ALIGNEMENT                        DAC_DHR12R2_ALIGNMENT
  1848. #define __HAL_DHR12RD_ALIGNEMENT                        DAC_DHR12RD_ALIGNMENT
  1849. #define IS_DAC_GENERATE_WAVE                            IS_DAC_WAVE
  1850.  
  1851. /**
  1852.   * @}
  1853.   */
  1854.  
  1855. /** @defgroup HAL_DBGMCU_Aliased_Macros HAL DBGMCU Aliased Macros maintained for legacy purpose
  1856.   * @{
  1857.   */
  1858. #define __HAL_FREEZE_TIM1_DBGMCU __HAL_DBGMCU_FREEZE_TIM1
  1859. #define __HAL_UNFREEZE_TIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM1
  1860. #define __HAL_FREEZE_TIM2_DBGMCU __HAL_DBGMCU_FREEZE_TIM2
  1861. #define __HAL_UNFREEZE_TIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM2
  1862. #define __HAL_FREEZE_TIM3_DBGMCU __HAL_DBGMCU_FREEZE_TIM3
  1863. #define __HAL_UNFREEZE_TIM3_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM3
  1864. #define __HAL_FREEZE_TIM4_DBGMCU __HAL_DBGMCU_FREEZE_TIM4
  1865. #define __HAL_UNFREEZE_TIM4_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM4
  1866. #define __HAL_FREEZE_TIM5_DBGMCU __HAL_DBGMCU_FREEZE_TIM5
  1867. #define __HAL_UNFREEZE_TIM5_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM5
  1868. #define __HAL_FREEZE_TIM6_DBGMCU __HAL_DBGMCU_FREEZE_TIM6
  1869. #define __HAL_UNFREEZE_TIM6_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM6
  1870. #define __HAL_FREEZE_TIM7_DBGMCU __HAL_DBGMCU_FREEZE_TIM7
  1871. #define __HAL_UNFREEZE_TIM7_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM7
  1872. #define __HAL_FREEZE_TIM8_DBGMCU __HAL_DBGMCU_FREEZE_TIM8
  1873. #define __HAL_UNFREEZE_TIM8_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM8
  1874.  
  1875. #define __HAL_FREEZE_TIM9_DBGMCU __HAL_DBGMCU_FREEZE_TIM9
  1876. #define __HAL_UNFREEZE_TIM9_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM9
  1877. #define __HAL_FREEZE_TIM10_DBGMCU __HAL_DBGMCU_FREEZE_TIM10
  1878. #define __HAL_UNFREEZE_TIM10_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM10
  1879. #define __HAL_FREEZE_TIM11_DBGMCU __HAL_DBGMCU_FREEZE_TIM11
  1880. #define __HAL_UNFREEZE_TIM11_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM11
  1881. #define __HAL_FREEZE_TIM12_DBGMCU __HAL_DBGMCU_FREEZE_TIM12
  1882. #define __HAL_UNFREEZE_TIM12_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM12
  1883. #define __HAL_FREEZE_TIM13_DBGMCU __HAL_DBGMCU_FREEZE_TIM13
  1884. #define __HAL_UNFREEZE_TIM13_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM13
  1885. #define __HAL_FREEZE_TIM14_DBGMCU __HAL_DBGMCU_FREEZE_TIM14
  1886. #define __HAL_UNFREEZE_TIM14_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM14
  1887. #define __HAL_FREEZE_CAN2_DBGMCU __HAL_DBGMCU_FREEZE_CAN2
  1888. #define __HAL_UNFREEZE_CAN2_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN2
  1889.  
  1890.  
  1891. #define __HAL_FREEZE_TIM15_DBGMCU __HAL_DBGMCU_FREEZE_TIM15
  1892. #define __HAL_UNFREEZE_TIM15_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM15
  1893. #define __HAL_FREEZE_TIM16_DBGMCU __HAL_DBGMCU_FREEZE_TIM16
  1894. #define __HAL_UNFREEZE_TIM16_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM16
  1895. #define __HAL_FREEZE_TIM17_DBGMCU __HAL_DBGMCU_FREEZE_TIM17
  1896. #define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17
  1897. #define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC
  1898. #define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC
  1899. #if defined(STM32H7)
  1900. #define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG1
  1901. #define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UnFreeze_WWDG1
  1902. #define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG1
  1903. #define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UnFreeze_IWDG1
  1904. #else
  1905. #define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG
  1906. #define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG
  1907. #define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG
  1908. #define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG
  1909. #endif /* STM32H7 */
  1910. #define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT
  1911. #define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT
  1912. #define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT
  1913. #define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT
  1914. #define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT
  1915. #define __HAL_UNFREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT
  1916. #define __HAL_FREEZE_CAN1_DBGMCU __HAL_DBGMCU_FREEZE_CAN1
  1917. #define __HAL_UNFREEZE_CAN1_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN1
  1918. #define __HAL_FREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM1
  1919. #define __HAL_UNFREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM1
  1920. #define __HAL_FREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM2
  1921. #define __HAL_UNFREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM2
  1922.  
  1923. /**
  1924.   * @}
  1925.   */
  1926.  
  1927. /** @defgroup HAL_COMP_Aliased_Macros HAL COMP Aliased Macros maintained for legacy purpose
  1928.   * @{
  1929.   */
  1930. #if defined(STM32F3)
  1931. #define COMP_START                                       __HAL_COMP_ENABLE
  1932. #define COMP_STOP                                        __HAL_COMP_DISABLE
  1933. #define COMP_LOCK                                        __HAL_COMP_LOCK
  1934.  
  1935. #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
  1936. #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__)   (((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
  1937.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
  1938.                                                           __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE())
  1939. #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
  1940.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
  1941.                                                           __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE())
  1942. #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
  1943.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
  1944.                                                           __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE())
  1945. #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
  1946.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
  1947.                                                           __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE())
  1948. #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__)          (((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
  1949.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
  1950.                                                           __HAL_COMP_COMP6_EXTI_ENABLE_IT())
  1951. #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__)         (((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
  1952.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
  1953.                                                           __HAL_COMP_COMP6_EXTI_DISABLE_IT())
  1954. #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__)               (((__FLAG__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
  1955.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
  1956.                                                           __HAL_COMP_COMP6_EXTI_GET_FLAG())
  1957. #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__)             (((__FLAG__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
  1958.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
  1959.                                                           __HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
  1960. # endif
  1961. # if defined(STM32F302xE) || defined(STM32F302xC)
  1962. #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__)   (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
  1963.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
  1964.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
  1965.                                                           __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE())
  1966. #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
  1967.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
  1968.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
  1969.                                                           __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE())
  1970. #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
  1971.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
  1972.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
  1973.                                                           __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE())
  1974. #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
  1975.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
  1976.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
  1977.                                                           __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE())
  1978. #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__)          (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
  1979.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
  1980.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
  1981.                                                           __HAL_COMP_COMP6_EXTI_ENABLE_IT())
  1982. #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__)         (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
  1983.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
  1984.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
  1985.                                                           __HAL_COMP_COMP6_EXTI_DISABLE_IT())
  1986. #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__)               (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
  1987.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
  1988.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
  1989.                                                           __HAL_COMP_COMP6_EXTI_GET_FLAG())
  1990. #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__)             (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
  1991.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
  1992.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
  1993.                                                           __HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
  1994. # endif
  1995. # if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx)
  1996. #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__)   (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
  1997.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
  1998.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \
  1999.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
  2000.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE() : \
  2001.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE() : \
  2002.                                                           __HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE())
  2003. #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
  2004.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
  2005.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE() : \
  2006.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
  2007.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE() : \
  2008.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE() : \
  2009.                                                           __HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE())
  2010. #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
  2011.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
  2012.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE() : \
  2013.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
  2014.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE() : \
  2015.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE() : \
  2016.                                                           __HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE())
  2017. #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
  2018.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
  2019.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE() : \
  2020.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
  2021.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE() : \
  2022.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE() : \
  2023.                                                           __HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE())
  2024. #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__)          (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
  2025.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
  2026.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_IT() : \
  2027.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
  2028.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_IT() : \
  2029.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_IT() : \
  2030.                                                           __HAL_COMP_COMP7_EXTI_ENABLE_IT())
  2031. #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__)         (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
  2032.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
  2033.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_IT() : \
  2034.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
  2035.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_IT() : \
  2036.                                                           ((__EXTILINE__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_IT() : \
  2037.                                                           __HAL_COMP_COMP7_EXTI_DISABLE_IT())
  2038. #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__)               (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
  2039.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
  2040.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_GET_FLAG() : \
  2041.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
  2042.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_GET_FLAG() : \
  2043.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_GET_FLAG() : \
  2044.                                                           __HAL_COMP_COMP7_EXTI_GET_FLAG())
  2045. #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__)             (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
  2046.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
  2047.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_CLEAR_FLAG() : \
  2048.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
  2049.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \
  2050.                                                           ((__FLAG__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \
  2051.                                                           __HAL_COMP_COMP7_EXTI_CLEAR_FLAG())
  2052. # endif
  2053. # if defined(STM32F373xC) ||defined(STM32F378xx)
  2054. #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__)   (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
  2055.                                                           __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
  2056. #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
  2057.                                                           __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE())
  2058. #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
  2059.                                                           __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE())
  2060. #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
  2061.                                                           __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE())
  2062. #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__)          (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
  2063.                                                           __HAL_COMP_COMP2_EXTI_ENABLE_IT())
  2064. #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__)         (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
  2065.                                                           __HAL_COMP_COMP2_EXTI_DISABLE_IT())
  2066. #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__)               (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
  2067.                                                           __HAL_COMP_COMP2_EXTI_GET_FLAG())
  2068. #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__)             (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
  2069.                                                           __HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
  2070. # endif
  2071. #else
  2072. #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__)   (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
  2073.                                                           __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
  2074. #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
  2075.                                                           __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE())
  2076. #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
  2077.                                                           __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE())
  2078. #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
  2079.                                                           __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE())
  2080. #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__)          (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
  2081.                                                           __HAL_COMP_COMP2_EXTI_ENABLE_IT())
  2082. #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__)         (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
  2083.                                                           __HAL_COMP_COMP2_EXTI_DISABLE_IT())
  2084. #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__)               (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
  2085.                                                           __HAL_COMP_COMP2_EXTI_GET_FLAG())
  2086. #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__)             (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
  2087.                                                           __HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
  2088. #endif
  2089.  
  2090. #define __HAL_COMP_GET_EXTI_LINE  COMP_GET_EXTI_LINE
  2091.  
  2092. #if defined(STM32L0) || defined(STM32L4)
  2093. /* Note: On these STM32 families, the only argument of this macro             */
  2094. /*       is COMP_FLAG_LOCK.                                                   */
  2095. /*       This macro is replaced by __HAL_COMP_IS_LOCKED with only HAL handle  */
  2096. /*       argument.                                                            */
  2097. #define __HAL_COMP_GET_FLAG(__HANDLE__, __FLAG__)  (__HAL_COMP_IS_LOCKED(__HANDLE__))
  2098. #endif
  2099. /**
  2100.   * @}
  2101.   */
  2102.  
  2103. #if defined(STM32L0) || defined(STM32L4)
  2104. /** @defgroup HAL_COMP_Aliased_Functions HAL COMP Aliased Functions maintained for legacy purpose
  2105.   * @{
  2106.   */
  2107. #define HAL_COMP_Start_IT       HAL_COMP_Start /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */
  2108. #define HAL_COMP_Stop_IT        HAL_COMP_Stop  /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */
  2109. /**
  2110.   * @}
  2111.   */
  2112. #endif
  2113.  
  2114. /** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
  2115.   * @{
  2116.   */
  2117.  
  2118. #define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_WAVE_NONE) || \
  2119.                            ((WAVE) == DAC_WAVE_NOISE)|| \
  2120.                            ((WAVE) == DAC_WAVE_TRIANGLE))
  2121.  
  2122. /**
  2123.   * @}
  2124.   */
  2125.  
  2126. /** @defgroup HAL_FLASH_Aliased_Macros HAL FLASH Aliased Macros maintained for legacy purpose
  2127.   * @{
  2128.   */
  2129.  
  2130. #define IS_WRPAREA          IS_OB_WRPAREA
  2131. #define IS_TYPEPROGRAM      IS_FLASH_TYPEPROGRAM
  2132. #define IS_TYPEPROGRAMFLASH IS_FLASH_TYPEPROGRAM
  2133. #define IS_TYPEERASE        IS_FLASH_TYPEERASE
  2134. #define IS_NBSECTORS        IS_FLASH_NBSECTORS
  2135. #define IS_OB_WDG_SOURCE    IS_OB_IWDG_SOURCE
  2136.  
  2137. /**
  2138.   * @}
  2139.   */
  2140.  
  2141. /** @defgroup HAL_I2C_Aliased_Macros HAL I2C Aliased Macros maintained for legacy purpose
  2142.   * @{
  2143.   */
  2144.  
  2145. #define __HAL_I2C_RESET_CR2             I2C_RESET_CR2
  2146. #define __HAL_I2C_GENERATE_START        I2C_GENERATE_START
  2147. #if defined(STM32F1)
  2148. #define __HAL_I2C_FREQ_RANGE            I2C_FREQRANGE
  2149. #else
  2150. #define __HAL_I2C_FREQ_RANGE            I2C_FREQ_RANGE
  2151. #endif /* STM32F1 */
  2152. #define __HAL_I2C_RISE_TIME             I2C_RISE_TIME
  2153. #define __HAL_I2C_SPEED_STANDARD        I2C_SPEED_STANDARD
  2154. #define __HAL_I2C_SPEED_FAST            I2C_SPEED_FAST
  2155. #define __HAL_I2C_SPEED                 I2C_SPEED
  2156. #define __HAL_I2C_7BIT_ADD_WRITE        I2C_7BIT_ADD_WRITE
  2157. #define __HAL_I2C_7BIT_ADD_READ         I2C_7BIT_ADD_READ
  2158. #define __HAL_I2C_10BIT_ADDRESS         I2C_10BIT_ADDRESS
  2159. #define __HAL_I2C_10BIT_HEADER_WRITE    I2C_10BIT_HEADER_WRITE
  2160. #define __HAL_I2C_10BIT_HEADER_READ     I2C_10BIT_HEADER_READ
  2161. #define __HAL_I2C_MEM_ADD_MSB           I2C_MEM_ADD_MSB
  2162. #define __HAL_I2C_MEM_ADD_LSB           I2C_MEM_ADD_LSB
  2163. #define __HAL_I2C_FREQRANGE             I2C_FREQRANGE
  2164. /**
  2165.   * @}
  2166.   */
  2167.  
  2168. /** @defgroup HAL_I2S_Aliased_Macros HAL I2S Aliased Macros maintained for legacy purpose
  2169.   * @{
  2170.   */
  2171.  
  2172. #define IS_I2S_INSTANCE                 IS_I2S_ALL_INSTANCE
  2173. #define IS_I2S_INSTANCE_EXT             IS_I2S_ALL_INSTANCE_EXT
  2174.  
  2175. #if defined(STM32H7)
  2176. #define __HAL_I2S_CLEAR_FREFLAG       __HAL_I2S_CLEAR_TIFREFLAG
  2177. #endif
  2178.  
  2179. /**
  2180.   * @}
  2181.   */
  2182.  
  2183. /** @defgroup HAL_IRDA_Aliased_Macros HAL IRDA Aliased Macros maintained for legacy purpose
  2184.   * @{
  2185.   */
  2186.  
  2187. #define __IRDA_DISABLE                  __HAL_IRDA_DISABLE
  2188. #define __IRDA_ENABLE                   __HAL_IRDA_ENABLE
  2189.  
  2190. #define __HAL_IRDA_GETCLOCKSOURCE       IRDA_GETCLOCKSOURCE
  2191. #define __HAL_IRDA_MASK_COMPUTATION     IRDA_MASK_COMPUTATION
  2192. #define __IRDA_GETCLOCKSOURCE           IRDA_GETCLOCKSOURCE
  2193. #define __IRDA_MASK_COMPUTATION         IRDA_MASK_COMPUTATION
  2194.  
  2195. #define IS_IRDA_ONEBIT_SAMPLE           IS_IRDA_ONE_BIT_SAMPLE
  2196.  
  2197.  
  2198. /**
  2199.   * @}
  2200.   */
  2201.  
  2202.  
  2203. /** @defgroup HAL_IWDG_Aliased_Macros HAL IWDG Aliased Macros maintained for legacy purpose
  2204.   * @{
  2205.   */
  2206. #define __HAL_IWDG_ENABLE_WRITE_ACCESS  IWDG_ENABLE_WRITE_ACCESS
  2207. #define __HAL_IWDG_DISABLE_WRITE_ACCESS IWDG_DISABLE_WRITE_ACCESS
  2208. /**
  2209.   * @}
  2210.   */
  2211.  
  2212.  
  2213. /** @defgroup HAL_LPTIM_Aliased_Macros HAL LPTIM Aliased Macros maintained for legacy purpose
  2214.   * @{
  2215.   */
  2216.  
  2217. #define __HAL_LPTIM_ENABLE_INTERRUPT    __HAL_LPTIM_ENABLE_IT
  2218. #define __HAL_LPTIM_DISABLE_INTERRUPT   __HAL_LPTIM_DISABLE_IT
  2219. #define __HAL_LPTIM_GET_ITSTATUS        __HAL_LPTIM_GET_IT_SOURCE
  2220.  
  2221. /**
  2222.   * @}
  2223.   */
  2224.  
  2225.  
  2226. /** @defgroup HAL_OPAMP_Aliased_Macros HAL OPAMP Aliased Macros maintained for legacy purpose
  2227.   * @{
  2228.   */
  2229. #define __OPAMP_CSR_OPAXPD                OPAMP_CSR_OPAXPD
  2230. #define __OPAMP_CSR_S3SELX                OPAMP_CSR_S3SELX
  2231. #define __OPAMP_CSR_S4SELX                OPAMP_CSR_S4SELX
  2232. #define __OPAMP_CSR_S5SELX                OPAMP_CSR_S5SELX
  2233. #define __OPAMP_CSR_S6SELX                OPAMP_CSR_S6SELX
  2234. #define __OPAMP_CSR_OPAXCAL_L             OPAMP_CSR_OPAXCAL_L
  2235. #define __OPAMP_CSR_OPAXCAL_H             OPAMP_CSR_OPAXCAL_H
  2236. #define __OPAMP_CSR_OPAXLPM               OPAMP_CSR_OPAXLPM
  2237. #define __OPAMP_CSR_ALL_SWITCHES          OPAMP_CSR_ALL_SWITCHES
  2238. #define __OPAMP_CSR_ANAWSELX              OPAMP_CSR_ANAWSELX
  2239. #define __OPAMP_CSR_OPAXCALOUT            OPAMP_CSR_OPAXCALOUT
  2240. #define __OPAMP_OFFSET_TRIM_BITSPOSITION  OPAMP_OFFSET_TRIM_BITSPOSITION
  2241. #define __OPAMP_OFFSET_TRIM_SET           OPAMP_OFFSET_TRIM_SET
  2242.  
  2243. /**
  2244.   * @}
  2245.   */
  2246.  
  2247.  
  2248. /** @defgroup HAL_PWR_Aliased_Macros HAL PWR Aliased Macros maintained for legacy purpose
  2249.   * @{
  2250.   */
  2251. #define __HAL_PVD_EVENT_DISABLE                                  __HAL_PWR_PVD_EXTI_DISABLE_EVENT
  2252. #define __HAL_PVD_EVENT_ENABLE                                   __HAL_PWR_PVD_EXTI_ENABLE_EVENT
  2253. #define __HAL_PVD_EXTI_FALLINGTRIGGER_DISABLE                    __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
  2254. #define __HAL_PVD_EXTI_FALLINGTRIGGER_ENABLE                     __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
  2255. #define __HAL_PVD_EXTI_RISINGTRIGGER_DISABLE                     __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
  2256. #define __HAL_PVD_EXTI_RISINGTRIGGER_ENABLE                      __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
  2257. #define __HAL_PVM_EVENT_DISABLE                                  __HAL_PWR_PVM_EVENT_DISABLE
  2258. #define __HAL_PVM_EVENT_ENABLE                                   __HAL_PWR_PVM_EVENT_ENABLE
  2259. #define __HAL_PVM_EXTI_FALLINGTRIGGER_DISABLE                    __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_DISABLE
  2260. #define __HAL_PVM_EXTI_FALLINGTRIGGER_ENABLE                     __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_ENABLE
  2261. #define __HAL_PVM_EXTI_RISINGTRIGGER_DISABLE                     __HAL_PWR_PVM_EXTI_RISINGTRIGGER_DISABLE
  2262. #define __HAL_PVM_EXTI_RISINGTRIGGER_ENABLE                      __HAL_PWR_PVM_EXTI_RISINGTRIGGER_ENABLE
  2263. #define __HAL_PWR_INTERNALWAKEUP_DISABLE                         HAL_PWREx_DisableInternalWakeUpLine
  2264. #define __HAL_PWR_INTERNALWAKEUP_ENABLE                          HAL_PWREx_EnableInternalWakeUpLine
  2265. #define __HAL_PWR_PULL_UP_DOWN_CONFIG_DISABLE                    HAL_PWREx_DisablePullUpPullDownConfig
  2266. #define __HAL_PWR_PULL_UP_DOWN_CONFIG_ENABLE                     HAL_PWREx_EnablePullUpPullDownConfig
  2267. #define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER()                  do { __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); } while(0)
  2268. #define __HAL_PWR_PVD_EXTI_EVENT_DISABLE                         __HAL_PWR_PVD_EXTI_DISABLE_EVENT
  2269. #define __HAL_PWR_PVD_EXTI_EVENT_ENABLE                          __HAL_PWR_PVD_EXTI_ENABLE_EVENT
  2270. #define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_DISABLE                __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
  2271. #define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_ENABLE                 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
  2272. #define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_DISABLE                 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
  2273. #define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_ENABLE                  __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
  2274. #define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER              __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
  2275. #define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER               __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
  2276. #define __HAL_PWR_PVM_DISABLE()                                  do { HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2();HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4(); } while(0)
  2277. #define __HAL_PWR_PVM_ENABLE()                                   do { HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2();HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4(); } while(0)
  2278. #define __HAL_PWR_SRAM2CONTENT_PRESERVE_DISABLE                  HAL_PWREx_DisableSRAM2ContentRetention
  2279. #define __HAL_PWR_SRAM2CONTENT_PRESERVE_ENABLE                   HAL_PWREx_EnableSRAM2ContentRetention
  2280. #define __HAL_PWR_VDDIO2_DISABLE                                 HAL_PWREx_DisableVddIO2
  2281. #define __HAL_PWR_VDDIO2_ENABLE                                  HAL_PWREx_EnableVddIO2
  2282. #define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER                 __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE
  2283. #define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER           __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE
  2284. #define __HAL_PWR_VDDUSB_DISABLE                                 HAL_PWREx_DisableVddUSB
  2285. #define __HAL_PWR_VDDUSB_ENABLE                                  HAL_PWREx_EnableVddUSB
  2286.  
  2287. #if defined (STM32F4)
  2288. #define __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD)         __HAL_PWR_PVD_EXTI_ENABLE_IT()
  2289. #define __HAL_PVD_EXTI_DISABLE_IT(PWR_EXTI_LINE_PVD)        __HAL_PWR_PVD_EXTI_DISABLE_IT()
  2290. #define __HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD)          __HAL_PWR_PVD_EXTI_GET_FLAG()
  2291. #define __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD)        __HAL_PWR_PVD_EXTI_CLEAR_FLAG()
  2292. #define __HAL_PVD_EXTI_GENERATE_SWIT(PWR_EXTI_LINE_PVD)     __HAL_PWR_PVD_EXTI_GENERATE_SWIT()
  2293. #else
  2294. #define __HAL_PVD_EXTI_CLEAR_FLAG                                __HAL_PWR_PVD_EXTI_CLEAR_FLAG
  2295. #define __HAL_PVD_EXTI_DISABLE_IT                                __HAL_PWR_PVD_EXTI_DISABLE_IT
  2296. #define __HAL_PVD_EXTI_ENABLE_IT                                 __HAL_PWR_PVD_EXTI_ENABLE_IT
  2297. #define __HAL_PVD_EXTI_GENERATE_SWIT                             __HAL_PWR_PVD_EXTI_GENERATE_SWIT
  2298. #define __HAL_PVD_EXTI_GET_FLAG                                  __HAL_PWR_PVD_EXTI_GET_FLAG
  2299. #endif /* STM32F4 */
  2300. /**
  2301.   * @}
  2302.   */
  2303.  
  2304.  
  2305. /** @defgroup HAL_RCC_Aliased HAL RCC Aliased maintained for legacy purpose
  2306.   * @{
  2307.   */
  2308.  
  2309. #define RCC_StopWakeUpClock_MSI     RCC_STOP_WAKEUPCLOCK_MSI
  2310. #define RCC_StopWakeUpClock_HSI     RCC_STOP_WAKEUPCLOCK_HSI
  2311.  
  2312. #define HAL_RCC_CCSCallback HAL_RCC_CSSCallback
  2313. #define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd\
  2314.                                          )==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())
  2315.  
  2316. #define __ADC_CLK_DISABLE          __HAL_RCC_ADC_CLK_DISABLE
  2317. #define __ADC_CLK_ENABLE           __HAL_RCC_ADC_CLK_ENABLE
  2318. #define __ADC_CLK_SLEEP_DISABLE    __HAL_RCC_ADC_CLK_SLEEP_DISABLE
  2319. #define __ADC_CLK_SLEEP_ENABLE     __HAL_RCC_ADC_CLK_SLEEP_ENABLE
  2320. #define __ADC_FORCE_RESET          __HAL_RCC_ADC_FORCE_RESET
  2321. #define __ADC_RELEASE_RESET        __HAL_RCC_ADC_RELEASE_RESET
  2322. #define __ADC1_CLK_DISABLE         __HAL_RCC_ADC1_CLK_DISABLE
  2323. #define __ADC1_CLK_ENABLE          __HAL_RCC_ADC1_CLK_ENABLE
  2324. #define __ADC1_FORCE_RESET         __HAL_RCC_ADC1_FORCE_RESET
  2325. #define __ADC1_RELEASE_RESET       __HAL_RCC_ADC1_RELEASE_RESET
  2326. #define __ADC1_CLK_SLEEP_ENABLE    __HAL_RCC_ADC1_CLK_SLEEP_ENABLE
  2327. #define __ADC1_CLK_SLEEP_DISABLE   __HAL_RCC_ADC1_CLK_SLEEP_DISABLE
  2328. #define __ADC2_CLK_DISABLE         __HAL_RCC_ADC2_CLK_DISABLE
  2329. #define __ADC2_CLK_ENABLE          __HAL_RCC_ADC2_CLK_ENABLE
  2330. #define __ADC2_FORCE_RESET __HAL_RCC_ADC2_FORCE_RESET
  2331. #define __ADC2_RELEASE_RESET __HAL_RCC_ADC2_RELEASE_RESET
  2332. #define __ADC3_CLK_DISABLE __HAL_RCC_ADC3_CLK_DISABLE
  2333. #define __ADC3_CLK_ENABLE __HAL_RCC_ADC3_CLK_ENABLE
  2334. #define __ADC3_FORCE_RESET __HAL_RCC_ADC3_FORCE_RESET
  2335. #define __ADC3_RELEASE_RESET __HAL_RCC_ADC3_RELEASE_RESET
  2336. #define __AES_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE
  2337. #define __AES_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE
  2338. #define __AES_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE
  2339. #define __AES_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE
  2340. #define __AES_FORCE_RESET __HAL_RCC_AES_FORCE_RESET
  2341. #define __AES_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET
  2342. #define __CRYP_CLK_SLEEP_ENABLE      __HAL_RCC_CRYP_CLK_SLEEP_ENABLE
  2343. #define __CRYP_CLK_SLEEP_DISABLE  __HAL_RCC_CRYP_CLK_SLEEP_DISABLE
  2344. #define __CRYP_CLK_ENABLE  __HAL_RCC_CRYP_CLK_ENABLE
  2345. #define __CRYP_CLK_DISABLE  __HAL_RCC_CRYP_CLK_DISABLE
  2346. #define __CRYP_FORCE_RESET       __HAL_RCC_CRYP_FORCE_RESET
  2347. #define __CRYP_RELEASE_RESET  __HAL_RCC_CRYP_RELEASE_RESET
  2348. #define __AFIO_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE
  2349. #define __AFIO_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE
  2350. #define __AFIO_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET
  2351. #define __AFIO_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET
  2352. #define __AHB_FORCE_RESET __HAL_RCC_AHB_FORCE_RESET
  2353. #define __AHB_RELEASE_RESET __HAL_RCC_AHB_RELEASE_RESET
  2354. #define __AHB1_FORCE_RESET __HAL_RCC_AHB1_FORCE_RESET
  2355. #define __AHB1_RELEASE_RESET __HAL_RCC_AHB1_RELEASE_RESET
  2356. #define __AHB2_FORCE_RESET __HAL_RCC_AHB2_FORCE_RESET
  2357. #define __AHB2_RELEASE_RESET __HAL_RCC_AHB2_RELEASE_RESET
  2358. #define __AHB3_FORCE_RESET __HAL_RCC_AHB3_FORCE_RESET
  2359. #define __AHB3_RELEASE_RESET __HAL_RCC_AHB3_RELEASE_RESET
  2360. #define __APB1_FORCE_RESET __HAL_RCC_APB1_FORCE_RESET
  2361. #define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
  2362. #define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
  2363. #define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
  2364. #define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
  2365. #define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
  2366. #define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
  2367. #define __BKP_RELEASE_RESET __HAL_RCC_BKP_RELEASE_RESET
  2368. #define __CAN1_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE
  2369. #define __CAN1_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE
  2370. #define __CAN1_CLK_SLEEP_DISABLE __HAL_RCC_CAN1_CLK_SLEEP_DISABLE
  2371. #define __CAN1_CLK_SLEEP_ENABLE __HAL_RCC_CAN1_CLK_SLEEP_ENABLE
  2372. #define __CAN1_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET
  2373. #define __CAN1_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET
  2374. #define __CAN_CLK_DISABLE         __HAL_RCC_CAN1_CLK_DISABLE
  2375. #define __CAN_CLK_ENABLE          __HAL_RCC_CAN1_CLK_ENABLE
  2376. #define __CAN_FORCE_RESET         __HAL_RCC_CAN1_FORCE_RESET
  2377. #define __CAN_RELEASE_RESET       __HAL_RCC_CAN1_RELEASE_RESET
  2378. #define __CAN2_CLK_DISABLE __HAL_RCC_CAN2_CLK_DISABLE
  2379. #define __CAN2_CLK_ENABLE __HAL_RCC_CAN2_CLK_ENABLE
  2380. #define __CAN2_FORCE_RESET __HAL_RCC_CAN2_FORCE_RESET
  2381. #define __CAN2_RELEASE_RESET __HAL_RCC_CAN2_RELEASE_RESET
  2382. #define __CEC_CLK_DISABLE __HAL_RCC_CEC_CLK_DISABLE
  2383. #define __CEC_CLK_ENABLE __HAL_RCC_CEC_CLK_ENABLE
  2384. #define __COMP_CLK_DISABLE        __HAL_RCC_COMP_CLK_DISABLE
  2385. #define __COMP_CLK_ENABLE         __HAL_RCC_COMP_CLK_ENABLE
  2386. #define __COMP_FORCE_RESET        __HAL_RCC_COMP_FORCE_RESET
  2387. #define __COMP_RELEASE_RESET      __HAL_RCC_COMP_RELEASE_RESET
  2388. #define __COMP_CLK_SLEEP_ENABLE   __HAL_RCC_COMP_CLK_SLEEP_ENABLE
  2389. #define __COMP_CLK_SLEEP_DISABLE  __HAL_RCC_COMP_CLK_SLEEP_DISABLE
  2390. #define __CEC_FORCE_RESET __HAL_RCC_CEC_FORCE_RESET
  2391. #define __CEC_RELEASE_RESET __HAL_RCC_CEC_RELEASE_RESET
  2392. #define __CRC_CLK_DISABLE __HAL_RCC_CRC_CLK_DISABLE
  2393. #define __CRC_CLK_ENABLE __HAL_RCC_CRC_CLK_ENABLE
  2394. #define __CRC_CLK_SLEEP_DISABLE __HAL_RCC_CRC_CLK_SLEEP_DISABLE
  2395. #define __CRC_CLK_SLEEP_ENABLE __HAL_RCC_CRC_CLK_SLEEP_ENABLE
  2396. #define __CRC_FORCE_RESET __HAL_RCC_CRC_FORCE_RESET
  2397. #define __CRC_RELEASE_RESET __HAL_RCC_CRC_RELEASE_RESET
  2398. #define __DAC_CLK_DISABLE __HAL_RCC_DAC_CLK_DISABLE
  2399. #define __DAC_CLK_ENABLE __HAL_RCC_DAC_CLK_ENABLE
  2400. #define __DAC_FORCE_RESET __HAL_RCC_DAC_FORCE_RESET
  2401. #define __DAC_RELEASE_RESET __HAL_RCC_DAC_RELEASE_RESET
  2402. #define __DAC1_CLK_DISABLE __HAL_RCC_DAC1_CLK_DISABLE
  2403. #define __DAC1_CLK_ENABLE __HAL_RCC_DAC1_CLK_ENABLE
  2404. #define __DAC1_CLK_SLEEP_DISABLE __HAL_RCC_DAC1_CLK_SLEEP_DISABLE
  2405. #define __DAC1_CLK_SLEEP_ENABLE __HAL_RCC_DAC1_CLK_SLEEP_ENABLE
  2406. #define __DAC1_FORCE_RESET __HAL_RCC_DAC1_FORCE_RESET
  2407. #define __DAC1_RELEASE_RESET __HAL_RCC_DAC1_RELEASE_RESET
  2408. #define __DBGMCU_CLK_ENABLE     __HAL_RCC_DBGMCU_CLK_ENABLE
  2409. #define __DBGMCU_CLK_DISABLE     __HAL_RCC_DBGMCU_CLK_DISABLE
  2410. #define __DBGMCU_FORCE_RESET    __HAL_RCC_DBGMCU_FORCE_RESET
  2411. #define __DBGMCU_RELEASE_RESET  __HAL_RCC_DBGMCU_RELEASE_RESET
  2412. #define __DFSDM_CLK_DISABLE __HAL_RCC_DFSDM_CLK_DISABLE
  2413. #define __DFSDM_CLK_ENABLE __HAL_RCC_DFSDM_CLK_ENABLE
  2414. #define __DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE
  2415. #define __DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE
  2416. #define __DFSDM_FORCE_RESET __HAL_RCC_DFSDM_FORCE_RESET
  2417. #define __DFSDM_RELEASE_RESET __HAL_RCC_DFSDM_RELEASE_RESET
  2418. #define __DMA1_CLK_DISABLE __HAL_RCC_DMA1_CLK_DISABLE
  2419. #define __DMA1_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE
  2420. #define __DMA1_CLK_SLEEP_DISABLE __HAL_RCC_DMA1_CLK_SLEEP_DISABLE
  2421. #define __DMA1_CLK_SLEEP_ENABLE __HAL_RCC_DMA1_CLK_SLEEP_ENABLE
  2422. #define __DMA1_FORCE_RESET __HAL_RCC_DMA1_FORCE_RESET
  2423. #define __DMA1_RELEASE_RESET __HAL_RCC_DMA1_RELEASE_RESET
  2424. #define __DMA2_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE
  2425. #define __DMA2_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
  2426. #define __DMA2_CLK_SLEEP_DISABLE __HAL_RCC_DMA2_CLK_SLEEP_DISABLE
  2427. #define __DMA2_CLK_SLEEP_ENABLE __HAL_RCC_DMA2_CLK_SLEEP_ENABLE
  2428. #define __DMA2_FORCE_RESET __HAL_RCC_DMA2_FORCE_RESET
  2429. #define __DMA2_RELEASE_RESET __HAL_RCC_DMA2_RELEASE_RESET
  2430. #define __ETHMAC_CLK_DISABLE __HAL_RCC_ETHMAC_CLK_DISABLE
  2431. #define __ETHMAC_CLK_ENABLE __HAL_RCC_ETHMAC_CLK_ENABLE
  2432. #define __ETHMAC_FORCE_RESET __HAL_RCC_ETHMAC_FORCE_RESET
  2433. #define __ETHMAC_RELEASE_RESET __HAL_RCC_ETHMAC_RELEASE_RESET
  2434. #define __ETHMACRX_CLK_DISABLE __HAL_RCC_ETHMACRX_CLK_DISABLE
  2435. #define __ETHMACRX_CLK_ENABLE __HAL_RCC_ETHMACRX_CLK_ENABLE
  2436. #define __ETHMACTX_CLK_DISABLE __HAL_RCC_ETHMACTX_CLK_DISABLE
  2437. #define __ETHMACTX_CLK_ENABLE __HAL_RCC_ETHMACTX_CLK_ENABLE
  2438. #define __FIREWALL_CLK_DISABLE __HAL_RCC_FIREWALL_CLK_DISABLE
  2439. #define __FIREWALL_CLK_ENABLE __HAL_RCC_FIREWALL_CLK_ENABLE
  2440. #define __FLASH_CLK_DISABLE __HAL_RCC_FLASH_CLK_DISABLE
  2441. #define __FLASH_CLK_ENABLE __HAL_RCC_FLASH_CLK_ENABLE
  2442. #define __FLASH_CLK_SLEEP_DISABLE __HAL_RCC_FLASH_CLK_SLEEP_DISABLE
  2443. #define __FLASH_CLK_SLEEP_ENABLE __HAL_RCC_FLASH_CLK_SLEEP_ENABLE
  2444. #define __FLASH_FORCE_RESET __HAL_RCC_FLASH_FORCE_RESET
  2445. #define __FLASH_RELEASE_RESET __HAL_RCC_FLASH_RELEASE_RESET
  2446. #define __FLITF_CLK_DISABLE       __HAL_RCC_FLITF_CLK_DISABLE
  2447. #define __FLITF_CLK_ENABLE        __HAL_RCC_FLITF_CLK_ENABLE
  2448. #define __FLITF_FORCE_RESET       __HAL_RCC_FLITF_FORCE_RESET
  2449. #define __FLITF_RELEASE_RESET     __HAL_RCC_FLITF_RELEASE_RESET
  2450. #define __FLITF_CLK_SLEEP_ENABLE  __HAL_RCC_FLITF_CLK_SLEEP_ENABLE
  2451. #define __FLITF_CLK_SLEEP_DISABLE __HAL_RCC_FLITF_CLK_SLEEP_DISABLE
  2452. #define __FMC_CLK_DISABLE __HAL_RCC_FMC_CLK_DISABLE
  2453. #define __FMC_CLK_ENABLE __HAL_RCC_FMC_CLK_ENABLE
  2454. #define __FMC_CLK_SLEEP_DISABLE __HAL_RCC_FMC_CLK_SLEEP_DISABLE
  2455. #define __FMC_CLK_SLEEP_ENABLE __HAL_RCC_FMC_CLK_SLEEP_ENABLE
  2456. #define __FMC_FORCE_RESET __HAL_RCC_FMC_FORCE_RESET
  2457. #define __FMC_RELEASE_RESET __HAL_RCC_FMC_RELEASE_RESET
  2458. #define __FSMC_CLK_DISABLE __HAL_RCC_FSMC_CLK_DISABLE
  2459. #define __FSMC_CLK_ENABLE __HAL_RCC_FSMC_CLK_ENABLE
  2460. #define __GPIOA_CLK_DISABLE __HAL_RCC_GPIOA_CLK_DISABLE
  2461. #define __GPIOA_CLK_ENABLE __HAL_RCC_GPIOA_CLK_ENABLE
  2462. #define __GPIOA_CLK_SLEEP_DISABLE __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE
  2463. #define __GPIOA_CLK_SLEEP_ENABLE __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE
  2464. #define __GPIOA_FORCE_RESET __HAL_RCC_GPIOA_FORCE_RESET
  2465. #define __GPIOA_RELEASE_RESET __HAL_RCC_GPIOA_RELEASE_RESET
  2466. #define __GPIOB_CLK_DISABLE __HAL_RCC_GPIOB_CLK_DISABLE
  2467. #define __GPIOB_CLK_ENABLE __HAL_RCC_GPIOB_CLK_ENABLE
  2468. #define __GPIOB_CLK_SLEEP_DISABLE __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE
  2469. #define __GPIOB_CLK_SLEEP_ENABLE __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE
  2470. #define __GPIOB_FORCE_RESET __HAL_RCC_GPIOB_FORCE_RESET
  2471. #define __GPIOB_RELEASE_RESET __HAL_RCC_GPIOB_RELEASE_RESET
  2472. #define __GPIOC_CLK_DISABLE __HAL_RCC_GPIOC_CLK_DISABLE
  2473. #define __GPIOC_CLK_ENABLE __HAL_RCC_GPIOC_CLK_ENABLE
  2474. #define __GPIOC_CLK_SLEEP_DISABLE __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE
  2475. #define __GPIOC_CLK_SLEEP_ENABLE __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE
  2476. #define __GPIOC_FORCE_RESET __HAL_RCC_GPIOC_FORCE_RESET
  2477. #define __GPIOC_RELEASE_RESET __HAL_RCC_GPIOC_RELEASE_RESET
  2478. #define __GPIOD_CLK_DISABLE __HAL_RCC_GPIOD_CLK_DISABLE
  2479. #define __GPIOD_CLK_ENABLE __HAL_RCC_GPIOD_CLK_ENABLE
  2480. #define __GPIOD_CLK_SLEEP_DISABLE __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE
  2481. #define __GPIOD_CLK_SLEEP_ENABLE __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE
  2482. #define __GPIOD_FORCE_RESET __HAL_RCC_GPIOD_FORCE_RESET
  2483. #define __GPIOD_RELEASE_RESET __HAL_RCC_GPIOD_RELEASE_RESET
  2484. #define __GPIOE_CLK_DISABLE __HAL_RCC_GPIOE_CLK_DISABLE
  2485. #define __GPIOE_CLK_ENABLE __HAL_RCC_GPIOE_CLK_ENABLE
  2486. #define __GPIOE_CLK_SLEEP_DISABLE __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE
  2487. #define __GPIOE_CLK_SLEEP_ENABLE __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE
  2488. #define __GPIOE_FORCE_RESET __HAL_RCC_GPIOE_FORCE_RESET
  2489. #define __GPIOE_RELEASE_RESET __HAL_RCC_GPIOE_RELEASE_RESET
  2490. #define __GPIOF_CLK_DISABLE __HAL_RCC_GPIOF_CLK_DISABLE
  2491. #define __GPIOF_CLK_ENABLE __HAL_RCC_GPIOF_CLK_ENABLE
  2492. #define __GPIOF_CLK_SLEEP_DISABLE __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE
  2493. #define __GPIOF_CLK_SLEEP_ENABLE __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE
  2494. #define __GPIOF_FORCE_RESET __HAL_RCC_GPIOF_FORCE_RESET
  2495. #define __GPIOF_RELEASE_RESET __HAL_RCC_GPIOF_RELEASE_RESET
  2496. #define __GPIOG_CLK_DISABLE __HAL_RCC_GPIOG_CLK_DISABLE
  2497. #define __GPIOG_CLK_ENABLE __HAL_RCC_GPIOG_CLK_ENABLE
  2498. #define __GPIOG_CLK_SLEEP_DISABLE __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE
  2499. #define __GPIOG_CLK_SLEEP_ENABLE __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE
  2500. #define __GPIOG_FORCE_RESET __HAL_RCC_GPIOG_FORCE_RESET
  2501. #define __GPIOG_RELEASE_RESET __HAL_RCC_GPIOG_RELEASE_RESET
  2502. #define __GPIOH_CLK_DISABLE __HAL_RCC_GPIOH_CLK_DISABLE
  2503. #define __GPIOH_CLK_ENABLE __HAL_RCC_GPIOH_CLK_ENABLE
  2504. #define __GPIOH_CLK_SLEEP_DISABLE __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE
  2505. #define __GPIOH_CLK_SLEEP_ENABLE __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE
  2506. #define __GPIOH_FORCE_RESET __HAL_RCC_GPIOH_FORCE_RESET
  2507. #define __GPIOH_RELEASE_RESET __HAL_RCC_GPIOH_RELEASE_RESET
  2508. #define __I2C1_CLK_DISABLE __HAL_RCC_I2C1_CLK_DISABLE
  2509. #define __I2C1_CLK_ENABLE __HAL_RCC_I2C1_CLK_ENABLE
  2510. #define __I2C1_CLK_SLEEP_DISABLE __HAL_RCC_I2C1_CLK_SLEEP_DISABLE
  2511. #define __I2C1_CLK_SLEEP_ENABLE __HAL_RCC_I2C1_CLK_SLEEP_ENABLE
  2512. #define __I2C1_FORCE_RESET __HAL_RCC_I2C1_FORCE_RESET
  2513. #define __I2C1_RELEASE_RESET __HAL_RCC_I2C1_RELEASE_RESET
  2514. #define __I2C2_CLK_DISABLE __HAL_RCC_I2C2_CLK_DISABLE
  2515. #define __I2C2_CLK_ENABLE __HAL_RCC_I2C2_CLK_ENABLE
  2516. #define __I2C2_CLK_SLEEP_DISABLE __HAL_RCC_I2C2_CLK_SLEEP_DISABLE
  2517. #define __I2C2_CLK_SLEEP_ENABLE __HAL_RCC_I2C2_CLK_SLEEP_ENABLE
  2518. #define __I2C2_FORCE_RESET __HAL_RCC_I2C2_FORCE_RESET
  2519. #define __I2C2_RELEASE_RESET __HAL_RCC_I2C2_RELEASE_RESET
  2520. #define __I2C3_CLK_DISABLE __HAL_RCC_I2C3_CLK_DISABLE
  2521. #define __I2C3_CLK_ENABLE __HAL_RCC_I2C3_CLK_ENABLE
  2522. #define __I2C3_CLK_SLEEP_DISABLE __HAL_RCC_I2C3_CLK_SLEEP_DISABLE
  2523. #define __I2C3_CLK_SLEEP_ENABLE __HAL_RCC_I2C3_CLK_SLEEP_ENABLE
  2524. #define __I2C3_FORCE_RESET __HAL_RCC_I2C3_FORCE_RESET
  2525. #define __I2C3_RELEASE_RESET __HAL_RCC_I2C3_RELEASE_RESET
  2526. #define __LCD_CLK_DISABLE __HAL_RCC_LCD_CLK_DISABLE
  2527. #define __LCD_CLK_ENABLE __HAL_RCC_LCD_CLK_ENABLE
  2528. #define __LCD_CLK_SLEEP_DISABLE __HAL_RCC_LCD_CLK_SLEEP_DISABLE
  2529. #define __LCD_CLK_SLEEP_ENABLE __HAL_RCC_LCD_CLK_SLEEP_ENABLE
  2530. #define __LCD_FORCE_RESET __HAL_RCC_LCD_FORCE_RESET
  2531. #define __LCD_RELEASE_RESET __HAL_RCC_LCD_RELEASE_RESET
  2532. #define __LPTIM1_CLK_DISABLE __HAL_RCC_LPTIM1_CLK_DISABLE
  2533. #define __LPTIM1_CLK_ENABLE __HAL_RCC_LPTIM1_CLK_ENABLE
  2534. #define __LPTIM1_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE
  2535. #define __LPTIM1_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE
  2536. #define __LPTIM1_FORCE_RESET __HAL_RCC_LPTIM1_FORCE_RESET
  2537. #define __LPTIM1_RELEASE_RESET __HAL_RCC_LPTIM1_RELEASE_RESET
  2538. #define __LPTIM2_CLK_DISABLE __HAL_RCC_LPTIM2_CLK_DISABLE
  2539. #define __LPTIM2_CLK_ENABLE __HAL_RCC_LPTIM2_CLK_ENABLE
  2540. #define __LPTIM2_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE
  2541. #define __LPTIM2_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE
  2542. #define __LPTIM2_FORCE_RESET __HAL_RCC_LPTIM2_FORCE_RESET
  2543. #define __LPTIM2_RELEASE_RESET __HAL_RCC_LPTIM2_RELEASE_RESET
  2544. #define __LPUART1_CLK_DISABLE __HAL_RCC_LPUART1_CLK_DISABLE
  2545. #define __LPUART1_CLK_ENABLE __HAL_RCC_LPUART1_CLK_ENABLE
  2546. #define __LPUART1_CLK_SLEEP_DISABLE __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE
  2547. #define __LPUART1_CLK_SLEEP_ENABLE __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE
  2548. #define __LPUART1_FORCE_RESET __HAL_RCC_LPUART1_FORCE_RESET
  2549. #define __LPUART1_RELEASE_RESET __HAL_RCC_LPUART1_RELEASE_RESET
  2550. #define __OPAMP_CLK_DISABLE __HAL_RCC_OPAMP_CLK_DISABLE
  2551. #define __OPAMP_CLK_ENABLE __HAL_RCC_OPAMP_CLK_ENABLE
  2552. #define __OPAMP_CLK_SLEEP_DISABLE __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE
  2553. #define __OPAMP_CLK_SLEEP_ENABLE __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE
  2554. #define __OPAMP_FORCE_RESET __HAL_RCC_OPAMP_FORCE_RESET
  2555. #define __OPAMP_RELEASE_RESET __HAL_RCC_OPAMP_RELEASE_RESET
  2556. #define __OTGFS_CLK_DISABLE __HAL_RCC_OTGFS_CLK_DISABLE
  2557. #define __OTGFS_CLK_ENABLE __HAL_RCC_OTGFS_CLK_ENABLE
  2558. #define __OTGFS_CLK_SLEEP_DISABLE __HAL_RCC_OTGFS_CLK_SLEEP_DISABLE
  2559. #define __OTGFS_CLK_SLEEP_ENABLE __HAL_RCC_OTGFS_CLK_SLEEP_ENABLE
  2560. #define __OTGFS_FORCE_RESET __HAL_RCC_OTGFS_FORCE_RESET
  2561. #define __OTGFS_RELEASE_RESET __HAL_RCC_OTGFS_RELEASE_RESET
  2562. #define __PWR_CLK_DISABLE __HAL_RCC_PWR_CLK_DISABLE
  2563. #define __PWR_CLK_ENABLE __HAL_RCC_PWR_CLK_ENABLE
  2564. #define __PWR_CLK_SLEEP_DISABLE __HAL_RCC_PWR_CLK_SLEEP_DISABLE
  2565. #define __PWR_CLK_SLEEP_ENABLE __HAL_RCC_PWR_CLK_SLEEP_ENABLE
  2566. #define __PWR_FORCE_RESET __HAL_RCC_PWR_FORCE_RESET
  2567. #define __PWR_RELEASE_RESET __HAL_RCC_PWR_RELEASE_RESET
  2568. #define __QSPI_CLK_DISABLE __HAL_RCC_QSPI_CLK_DISABLE
  2569. #define __QSPI_CLK_ENABLE __HAL_RCC_QSPI_CLK_ENABLE
  2570. #define __QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QSPI_CLK_SLEEP_DISABLE
  2571. #define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE
  2572. #define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET
  2573. #define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET
  2574.  
  2575. #if defined(STM32WB)
  2576. #define __HAL_RCC_QSPI_CLK_DISABLE            __HAL_RCC_QUADSPI_CLK_DISABLE
  2577. #define __HAL_RCC_QSPI_CLK_ENABLE             __HAL_RCC_QUADSPI_CLK_ENABLE
  2578. #define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE      __HAL_RCC_QUADSPI_CLK_SLEEP_DISABLE
  2579. #define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE       __HAL_RCC_QUADSPI_CLK_SLEEP_ENABLE
  2580. #define __HAL_RCC_QSPI_FORCE_RESET            __HAL_RCC_QUADSPI_FORCE_RESET
  2581. #define __HAL_RCC_QSPI_RELEASE_RESET          __HAL_RCC_QUADSPI_RELEASE_RESET
  2582. #define __HAL_RCC_QSPI_IS_CLK_ENABLED         __HAL_RCC_QUADSPI_IS_CLK_ENABLED
  2583. #define __HAL_RCC_QSPI_IS_CLK_DISABLED        __HAL_RCC_QUADSPI_IS_CLK_DISABLED
  2584. #define __HAL_RCC_QSPI_IS_CLK_SLEEP_ENABLED   __HAL_RCC_QUADSPI_IS_CLK_SLEEP_ENABLED
  2585. #define __HAL_RCC_QSPI_IS_CLK_SLEEP_DISABLED  __HAL_RCC_QUADSPI_IS_CLK_SLEEP_DISABLED
  2586. #define QSPI_IRQHandler QUADSPI_IRQHandler
  2587. #endif /* __HAL_RCC_QUADSPI_CLK_ENABLE */
  2588.  
  2589. #define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE
  2590. #define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE
  2591. #define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE
  2592. #define __RNG_CLK_SLEEP_ENABLE __HAL_RCC_RNG_CLK_SLEEP_ENABLE
  2593. #define __RNG_FORCE_RESET __HAL_RCC_RNG_FORCE_RESET
  2594. #define __RNG_RELEASE_RESET __HAL_RCC_RNG_RELEASE_RESET
  2595. #define __SAI1_CLK_DISABLE __HAL_RCC_SAI1_CLK_DISABLE
  2596. #define __SAI1_CLK_ENABLE __HAL_RCC_SAI1_CLK_ENABLE
  2597. #define __SAI1_CLK_SLEEP_DISABLE __HAL_RCC_SAI1_CLK_SLEEP_DISABLE
  2598. #define __SAI1_CLK_SLEEP_ENABLE __HAL_RCC_SAI1_CLK_SLEEP_ENABLE
  2599. #define __SAI1_FORCE_RESET __HAL_RCC_SAI1_FORCE_RESET
  2600. #define __SAI1_RELEASE_RESET __HAL_RCC_SAI1_RELEASE_RESET
  2601. #define __SAI2_CLK_DISABLE __HAL_RCC_SAI2_CLK_DISABLE
  2602. #define __SAI2_CLK_ENABLE __HAL_RCC_SAI2_CLK_ENABLE
  2603. #define __SAI2_CLK_SLEEP_DISABLE __HAL_RCC_SAI2_CLK_SLEEP_DISABLE
  2604. #define __SAI2_CLK_SLEEP_ENABLE __HAL_RCC_SAI2_CLK_SLEEP_ENABLE
  2605. #define __SAI2_FORCE_RESET __HAL_RCC_SAI2_FORCE_RESET
  2606. #define __SAI2_RELEASE_RESET __HAL_RCC_SAI2_RELEASE_RESET
  2607. #define __SDIO_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
  2608. #define __SDIO_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
  2609. #define __SDMMC_CLK_DISABLE __HAL_RCC_SDMMC_CLK_DISABLE
  2610. #define __SDMMC_CLK_ENABLE __HAL_RCC_SDMMC_CLK_ENABLE
  2611. #define __SDMMC_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC_CLK_SLEEP_DISABLE
  2612. #define __SDMMC_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC_CLK_SLEEP_ENABLE
  2613. #define __SDMMC_FORCE_RESET __HAL_RCC_SDMMC_FORCE_RESET
  2614. #define __SDMMC_RELEASE_RESET __HAL_RCC_SDMMC_RELEASE_RESET
  2615. #define __SPI1_CLK_DISABLE __HAL_RCC_SPI1_CLK_DISABLE
  2616. #define __SPI1_CLK_ENABLE __HAL_RCC_SPI1_CLK_ENABLE
  2617. #define __SPI1_CLK_SLEEP_DISABLE __HAL_RCC_SPI1_CLK_SLEEP_DISABLE
  2618. #define __SPI1_CLK_SLEEP_ENABLE __HAL_RCC_SPI1_CLK_SLEEP_ENABLE
  2619. #define __SPI1_FORCE_RESET __HAL_RCC_SPI1_FORCE_RESET
  2620. #define __SPI1_RELEASE_RESET __HAL_RCC_SPI1_RELEASE_RESET
  2621. #define __SPI2_CLK_DISABLE __HAL_RCC_SPI2_CLK_DISABLE
  2622. #define __SPI2_CLK_ENABLE __HAL_RCC_SPI2_CLK_ENABLE
  2623. #define __SPI2_CLK_SLEEP_DISABLE __HAL_RCC_SPI2_CLK_SLEEP_DISABLE
  2624. #define __SPI2_CLK_SLEEP_ENABLE __HAL_RCC_SPI2_CLK_SLEEP_ENABLE
  2625. #define __SPI2_FORCE_RESET __HAL_RCC_SPI2_FORCE_RESET
  2626. #define __SPI2_RELEASE_RESET __HAL_RCC_SPI2_RELEASE_RESET
  2627. #define __SPI3_CLK_DISABLE __HAL_RCC_SPI3_CLK_DISABLE
  2628. #define __SPI3_CLK_ENABLE __HAL_RCC_SPI3_CLK_ENABLE
  2629. #define __SPI3_CLK_SLEEP_DISABLE __HAL_RCC_SPI3_CLK_SLEEP_DISABLE
  2630. #define __SPI3_CLK_SLEEP_ENABLE __HAL_RCC_SPI3_CLK_SLEEP_ENABLE
  2631. #define __SPI3_FORCE_RESET __HAL_RCC_SPI3_FORCE_RESET
  2632. #define __SPI3_RELEASE_RESET __HAL_RCC_SPI3_RELEASE_RESET
  2633. #define __SRAM_CLK_DISABLE __HAL_RCC_SRAM_CLK_DISABLE
  2634. #define __SRAM_CLK_ENABLE __HAL_RCC_SRAM_CLK_ENABLE
  2635. #define __SRAM1_CLK_SLEEP_DISABLE __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE
  2636. #define __SRAM1_CLK_SLEEP_ENABLE __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE
  2637. #define __SRAM2_CLK_SLEEP_DISABLE __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE
  2638. #define __SRAM2_CLK_SLEEP_ENABLE __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE
  2639. #define __SWPMI1_CLK_DISABLE __HAL_RCC_SWPMI1_CLK_DISABLE
  2640. #define __SWPMI1_CLK_ENABLE __HAL_RCC_SWPMI1_CLK_ENABLE
  2641. #define __SWPMI1_CLK_SLEEP_DISABLE __HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE
  2642. #define __SWPMI1_CLK_SLEEP_ENABLE __HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE
  2643. #define __SWPMI1_FORCE_RESET __HAL_RCC_SWPMI1_FORCE_RESET
  2644. #define __SWPMI1_RELEASE_RESET __HAL_RCC_SWPMI1_RELEASE_RESET
  2645. #define __SYSCFG_CLK_DISABLE __HAL_RCC_SYSCFG_CLK_DISABLE
  2646. #define __SYSCFG_CLK_ENABLE __HAL_RCC_SYSCFG_CLK_ENABLE
  2647. #define __SYSCFG_CLK_SLEEP_DISABLE __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE
  2648. #define __SYSCFG_CLK_SLEEP_ENABLE __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE
  2649. #define __SYSCFG_FORCE_RESET __HAL_RCC_SYSCFG_FORCE_RESET
  2650. #define __SYSCFG_RELEASE_RESET __HAL_RCC_SYSCFG_RELEASE_RESET
  2651. #define __TIM1_CLK_DISABLE __HAL_RCC_TIM1_CLK_DISABLE
  2652. #define __TIM1_CLK_ENABLE __HAL_RCC_TIM1_CLK_ENABLE
  2653. #define __TIM1_CLK_SLEEP_DISABLE __HAL_RCC_TIM1_CLK_SLEEP_DISABLE
  2654. #define __TIM1_CLK_SLEEP_ENABLE __HAL_RCC_TIM1_CLK_SLEEP_ENABLE
  2655. #define __TIM1_FORCE_RESET __HAL_RCC_TIM1_FORCE_RESET
  2656. #define __TIM1_RELEASE_RESET __HAL_RCC_TIM1_RELEASE_RESET
  2657. #define __TIM10_CLK_DISABLE __HAL_RCC_TIM10_CLK_DISABLE
  2658. #define __TIM10_CLK_ENABLE __HAL_RCC_TIM10_CLK_ENABLE
  2659. #define __TIM10_FORCE_RESET __HAL_RCC_TIM10_FORCE_RESET
  2660. #define __TIM10_RELEASE_RESET __HAL_RCC_TIM10_RELEASE_RESET
  2661. #define __TIM11_CLK_DISABLE __HAL_RCC_TIM11_CLK_DISABLE
  2662. #define __TIM11_CLK_ENABLE __HAL_RCC_TIM11_CLK_ENABLE
  2663. #define __TIM11_FORCE_RESET __HAL_RCC_TIM11_FORCE_RESET
  2664. #define __TIM11_RELEASE_RESET __HAL_RCC_TIM11_RELEASE_RESET
  2665. #define __TIM12_CLK_DISABLE __HAL_RCC_TIM12_CLK_DISABLE
  2666. #define __TIM12_CLK_ENABLE __HAL_RCC_TIM12_CLK_ENABLE
  2667. #define __TIM12_FORCE_RESET __HAL_RCC_TIM12_FORCE_RESET
  2668. #define __TIM12_RELEASE_RESET __HAL_RCC_TIM12_RELEASE_RESET
  2669. #define __TIM13_CLK_DISABLE __HAL_RCC_TIM13_CLK_DISABLE
  2670. #define __TIM13_CLK_ENABLE __HAL_RCC_TIM13_CLK_ENABLE
  2671. #define __TIM13_FORCE_RESET __HAL_RCC_TIM13_FORCE_RESET
  2672. #define __TIM13_RELEASE_RESET __HAL_RCC_TIM13_RELEASE_RESET
  2673. #define __TIM14_CLK_DISABLE __HAL_RCC_TIM14_CLK_DISABLE
  2674. #define __TIM14_CLK_ENABLE __HAL_RCC_TIM14_CLK_ENABLE
  2675. #define __TIM14_FORCE_RESET __HAL_RCC_TIM14_FORCE_RESET
  2676. #define __TIM14_RELEASE_RESET __HAL_RCC_TIM14_RELEASE_RESET
  2677. #define __TIM15_CLK_DISABLE __HAL_RCC_TIM15_CLK_DISABLE
  2678. #define __TIM15_CLK_ENABLE __HAL_RCC_TIM15_CLK_ENABLE
  2679. #define __TIM15_CLK_SLEEP_DISABLE __HAL_RCC_TIM15_CLK_SLEEP_DISABLE
  2680. #define __TIM15_CLK_SLEEP_ENABLE __HAL_RCC_TIM15_CLK_SLEEP_ENABLE
  2681. #define __TIM15_FORCE_RESET __HAL_RCC_TIM15_FORCE_RESET
  2682. #define __TIM15_RELEASE_RESET __HAL_RCC_TIM15_RELEASE_RESET
  2683. #define __TIM16_CLK_DISABLE __HAL_RCC_TIM16_CLK_DISABLE
  2684. #define __TIM16_CLK_ENABLE __HAL_RCC_TIM16_CLK_ENABLE
  2685. #define __TIM16_CLK_SLEEP_DISABLE __HAL_RCC_TIM16_CLK_SLEEP_DISABLE
  2686. #define __TIM16_CLK_SLEEP_ENABLE __HAL_RCC_TIM16_CLK_SLEEP_ENABLE
  2687. #define __TIM16_FORCE_RESET __HAL_RCC_TIM16_FORCE_RESET
  2688. #define __TIM16_RELEASE_RESET __HAL_RCC_TIM16_RELEASE_RESET
  2689. #define __TIM17_CLK_DISABLE __HAL_RCC_TIM17_CLK_DISABLE
  2690. #define __TIM17_CLK_ENABLE __HAL_RCC_TIM17_CLK_ENABLE
  2691. #define __TIM17_CLK_SLEEP_DISABLE __HAL_RCC_TIM17_CLK_SLEEP_DISABLE
  2692. #define __TIM17_CLK_SLEEP_ENABLE __HAL_RCC_TIM17_CLK_SLEEP_ENABLE
  2693. #define __TIM17_FORCE_RESET __HAL_RCC_TIM17_FORCE_RESET
  2694. #define __TIM17_RELEASE_RESET __HAL_RCC_TIM17_RELEASE_RESET
  2695. #define __TIM2_CLK_DISABLE __HAL_RCC_TIM2_CLK_DISABLE
  2696. #define __TIM2_CLK_ENABLE __HAL_RCC_TIM2_CLK_ENABLE
  2697. #define __TIM2_CLK_SLEEP_DISABLE __HAL_RCC_TIM2_CLK_SLEEP_DISABLE
  2698. #define __TIM2_CLK_SLEEP_ENABLE __HAL_RCC_TIM2_CLK_SLEEP_ENABLE
  2699. #define __TIM2_FORCE_RESET __HAL_RCC_TIM2_FORCE_RESET
  2700. #define __TIM2_RELEASE_RESET __HAL_RCC_TIM2_RELEASE_RESET
  2701. #define __TIM3_CLK_DISABLE __HAL_RCC_TIM3_CLK_DISABLE
  2702. #define __TIM3_CLK_ENABLE __HAL_RCC_TIM3_CLK_ENABLE
  2703. #define __TIM3_CLK_SLEEP_DISABLE __HAL_RCC_TIM3_CLK_SLEEP_DISABLE
  2704. #define __TIM3_CLK_SLEEP_ENABLE __HAL_RCC_TIM3_CLK_SLEEP_ENABLE
  2705. #define __TIM3_FORCE_RESET __HAL_RCC_TIM3_FORCE_RESET
  2706. #define __TIM3_RELEASE_RESET __HAL_RCC_TIM3_RELEASE_RESET
  2707. #define __TIM4_CLK_DISABLE __HAL_RCC_TIM4_CLK_DISABLE
  2708. #define __TIM4_CLK_ENABLE __HAL_RCC_TIM4_CLK_ENABLE
  2709. #define __TIM4_CLK_SLEEP_DISABLE __HAL_RCC_TIM4_CLK_SLEEP_DISABLE
  2710. #define __TIM4_CLK_SLEEP_ENABLE __HAL_RCC_TIM4_CLK_SLEEP_ENABLE
  2711. #define __TIM4_FORCE_RESET __HAL_RCC_TIM4_FORCE_RESET
  2712. #define __TIM4_RELEASE_RESET __HAL_RCC_TIM4_RELEASE_RESET
  2713. #define __TIM5_CLK_DISABLE __HAL_RCC_TIM5_CLK_DISABLE
  2714. #define __TIM5_CLK_ENABLE __HAL_RCC_TIM5_CLK_ENABLE
  2715. #define __TIM5_CLK_SLEEP_DISABLE __HAL_RCC_TIM5_CLK_SLEEP_DISABLE
  2716. #define __TIM5_CLK_SLEEP_ENABLE __HAL_RCC_TIM5_CLK_SLEEP_ENABLE
  2717. #define __TIM5_FORCE_RESET __HAL_RCC_TIM5_FORCE_RESET
  2718. #define __TIM5_RELEASE_RESET __HAL_RCC_TIM5_RELEASE_RESET
  2719. #define __TIM6_CLK_DISABLE __HAL_RCC_TIM6_CLK_DISABLE
  2720. #define __TIM6_CLK_ENABLE __HAL_RCC_TIM6_CLK_ENABLE
  2721. #define __TIM6_CLK_SLEEP_DISABLE __HAL_RCC_TIM6_CLK_SLEEP_DISABLE
  2722. #define __TIM6_CLK_SLEEP_ENABLE __HAL_RCC_TIM6_CLK_SLEEP_ENABLE
  2723. #define __TIM6_FORCE_RESET __HAL_RCC_TIM6_FORCE_RESET
  2724. #define __TIM6_RELEASE_RESET __HAL_RCC_TIM6_RELEASE_RESET
  2725. #define __TIM7_CLK_DISABLE __HAL_RCC_TIM7_CLK_DISABLE
  2726. #define __TIM7_CLK_ENABLE __HAL_RCC_TIM7_CLK_ENABLE
  2727. #define __TIM7_CLK_SLEEP_DISABLE __HAL_RCC_TIM7_CLK_SLEEP_DISABLE
  2728. #define __TIM7_CLK_SLEEP_ENABLE __HAL_RCC_TIM7_CLK_SLEEP_ENABLE
  2729. #define __TIM7_FORCE_RESET __HAL_RCC_TIM7_FORCE_RESET
  2730. #define __TIM7_RELEASE_RESET __HAL_RCC_TIM7_RELEASE_RESET
  2731. #define __TIM8_CLK_DISABLE __HAL_RCC_TIM8_CLK_DISABLE
  2732. #define __TIM8_CLK_ENABLE __HAL_RCC_TIM8_CLK_ENABLE
  2733. #define __TIM8_CLK_SLEEP_DISABLE __HAL_RCC_TIM8_CLK_SLEEP_DISABLE
  2734. #define __TIM8_CLK_SLEEP_ENABLE __HAL_RCC_TIM8_CLK_SLEEP_ENABLE
  2735. #define __TIM8_FORCE_RESET __HAL_RCC_TIM8_FORCE_RESET
  2736. #define __TIM8_RELEASE_RESET __HAL_RCC_TIM8_RELEASE_RESET
  2737. #define __TIM9_CLK_DISABLE __HAL_RCC_TIM9_CLK_DISABLE
  2738. #define __TIM9_CLK_ENABLE __HAL_RCC_TIM9_CLK_ENABLE
  2739. #define __TIM9_FORCE_RESET __HAL_RCC_TIM9_FORCE_RESET
  2740. #define __TIM9_RELEASE_RESET __HAL_RCC_TIM9_RELEASE_RESET
  2741. #define __TSC_CLK_DISABLE __HAL_RCC_TSC_CLK_DISABLE
  2742. #define __TSC_CLK_ENABLE __HAL_RCC_TSC_CLK_ENABLE
  2743. #define __TSC_CLK_SLEEP_DISABLE __HAL_RCC_TSC_CLK_SLEEP_DISABLE
  2744. #define __TSC_CLK_SLEEP_ENABLE __HAL_RCC_TSC_CLK_SLEEP_ENABLE
  2745. #define __TSC_FORCE_RESET __HAL_RCC_TSC_FORCE_RESET
  2746. #define __TSC_RELEASE_RESET __HAL_RCC_TSC_RELEASE_RESET
  2747. #define __UART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE
  2748. #define __UART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE
  2749. #define __UART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE
  2750. #define __UART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE
  2751. #define __UART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET
  2752. #define __UART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET
  2753. #define __UART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE
  2754. #define __UART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE
  2755. #define __UART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE
  2756. #define __UART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE
  2757. #define __UART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET
  2758. #define __UART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET
  2759. #define __USART1_CLK_DISABLE __HAL_RCC_USART1_CLK_DISABLE
  2760. #define __USART1_CLK_ENABLE __HAL_RCC_USART1_CLK_ENABLE
  2761. #define __USART1_CLK_SLEEP_DISABLE __HAL_RCC_USART1_CLK_SLEEP_DISABLE
  2762. #define __USART1_CLK_SLEEP_ENABLE __HAL_RCC_USART1_CLK_SLEEP_ENABLE
  2763. #define __USART1_FORCE_RESET __HAL_RCC_USART1_FORCE_RESET
  2764. #define __USART1_RELEASE_RESET __HAL_RCC_USART1_RELEASE_RESET
  2765. #define __USART2_CLK_DISABLE __HAL_RCC_USART2_CLK_DISABLE
  2766. #define __USART2_CLK_ENABLE __HAL_RCC_USART2_CLK_ENABLE
  2767. #define __USART2_CLK_SLEEP_DISABLE __HAL_RCC_USART2_CLK_SLEEP_DISABLE
  2768. #define __USART2_CLK_SLEEP_ENABLE __HAL_RCC_USART2_CLK_SLEEP_ENABLE
  2769. #define __USART2_FORCE_RESET __HAL_RCC_USART2_FORCE_RESET
  2770. #define __USART2_RELEASE_RESET __HAL_RCC_USART2_RELEASE_RESET
  2771. #define __USART3_CLK_DISABLE __HAL_RCC_USART3_CLK_DISABLE
  2772. #define __USART3_CLK_ENABLE __HAL_RCC_USART3_CLK_ENABLE
  2773. #define __USART3_CLK_SLEEP_DISABLE __HAL_RCC_USART3_CLK_SLEEP_DISABLE
  2774. #define __USART3_CLK_SLEEP_ENABLE __HAL_RCC_USART3_CLK_SLEEP_ENABLE
  2775. #define __USART3_FORCE_RESET __HAL_RCC_USART3_FORCE_RESET
  2776. #define __USART3_RELEASE_RESET __HAL_RCC_USART3_RELEASE_RESET
  2777. #define __USART4_CLK_DISABLE        __HAL_RCC_UART4_CLK_DISABLE
  2778. #define __USART4_CLK_ENABLE         __HAL_RCC_UART4_CLK_ENABLE
  2779. #define __USART4_CLK_SLEEP_ENABLE   __HAL_RCC_UART4_CLK_SLEEP_ENABLE
  2780. #define __USART4_CLK_SLEEP_DISABLE  __HAL_RCC_UART4_CLK_SLEEP_DISABLE
  2781. #define __USART4_FORCE_RESET        __HAL_RCC_UART4_FORCE_RESET
  2782. #define __USART4_RELEASE_RESET      __HAL_RCC_UART4_RELEASE_RESET
  2783. #define __USART5_CLK_DISABLE        __HAL_RCC_UART5_CLK_DISABLE
  2784. #define __USART5_CLK_ENABLE         __HAL_RCC_UART5_CLK_ENABLE
  2785. #define __USART5_CLK_SLEEP_ENABLE   __HAL_RCC_UART5_CLK_SLEEP_ENABLE
  2786. #define __USART5_CLK_SLEEP_DISABLE  __HAL_RCC_UART5_CLK_SLEEP_DISABLE
  2787. #define __USART5_FORCE_RESET        __HAL_RCC_UART5_FORCE_RESET
  2788. #define __USART5_RELEASE_RESET      __HAL_RCC_UART5_RELEASE_RESET
  2789. #define __USART7_CLK_DISABLE        __HAL_RCC_UART7_CLK_DISABLE
  2790. #define __USART7_CLK_ENABLE         __HAL_RCC_UART7_CLK_ENABLE
  2791. #define __USART7_FORCE_RESET        __HAL_RCC_UART7_FORCE_RESET
  2792. #define __USART7_RELEASE_RESET      __HAL_RCC_UART7_RELEASE_RESET
  2793. #define __USART8_CLK_DISABLE        __HAL_RCC_UART8_CLK_DISABLE
  2794. #define __USART8_CLK_ENABLE         __HAL_RCC_UART8_CLK_ENABLE
  2795. #define __USART8_FORCE_RESET        __HAL_RCC_UART8_FORCE_RESET
  2796. #define __USART8_RELEASE_RESET      __HAL_RCC_UART8_RELEASE_RESET
  2797. #define __USB_CLK_DISABLE         __HAL_RCC_USB_CLK_DISABLE
  2798. #define __USB_CLK_ENABLE          __HAL_RCC_USB_CLK_ENABLE
  2799. #define __USB_FORCE_RESET         __HAL_RCC_USB_FORCE_RESET
  2800. #define __USB_CLK_SLEEP_ENABLE    __HAL_RCC_USB_CLK_SLEEP_ENABLE
  2801. #define __USB_CLK_SLEEP_DISABLE   __HAL_RCC_USB_CLK_SLEEP_DISABLE
  2802. #define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE
  2803. #define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE
  2804. #define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET
  2805.  
  2806. #if defined(STM32H7)
  2807. #define __HAL_RCC_WWDG_CLK_DISABLE   __HAL_RCC_WWDG1_CLK_DISABLE
  2808. #define __HAL_RCC_WWDG_CLK_ENABLE   __HAL_RCC_WWDG1_CLK_ENABLE
  2809. #define __HAL_RCC_WWDG_CLK_SLEEP_DISABLE  __HAL_RCC_WWDG1_CLK_SLEEP_DISABLE
  2810. #define __HAL_RCC_WWDG_CLK_SLEEP_ENABLE  __HAL_RCC_WWDG1_CLK_SLEEP_ENABLE
  2811.  
  2812. #define __HAL_RCC_WWDG_FORCE_RESET    ((void)0U)  /* Not available on the STM32H7*/
  2813. #define __HAL_RCC_WWDG_RELEASE_RESET ((void)0U) /* Not available on the STM32H7*/
  2814.  
  2815.  
  2816. #define  __HAL_RCC_WWDG_IS_CLK_ENABLED    __HAL_RCC_WWDG1_IS_CLK_ENABLED
  2817. #define  __HAL_RCC_WWDG_IS_CLK_DISABLED  __HAL_RCC_WWDG1_IS_CLK_DISABLED
  2818. #endif
  2819.  
  2820. #define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE
  2821. #define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE
  2822. #define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE
  2823. #define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE
  2824. #define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET
  2825. #define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET
  2826.  
  2827. #define __TIM21_CLK_ENABLE   __HAL_RCC_TIM21_CLK_ENABLE
  2828. #define __TIM21_CLK_DISABLE   __HAL_RCC_TIM21_CLK_DISABLE
  2829. #define __TIM21_FORCE_RESET   __HAL_RCC_TIM21_FORCE_RESET
  2830. #define __TIM21_RELEASE_RESET  __HAL_RCC_TIM21_RELEASE_RESET
  2831. #define __TIM21_CLK_SLEEP_ENABLE   __HAL_RCC_TIM21_CLK_SLEEP_ENABLE
  2832. #define __TIM21_CLK_SLEEP_DISABLE   __HAL_RCC_TIM21_CLK_SLEEP_DISABLE
  2833. #define __TIM22_CLK_ENABLE   __HAL_RCC_TIM22_CLK_ENABLE
  2834. #define __TIM22_CLK_DISABLE   __HAL_RCC_TIM22_CLK_DISABLE
  2835. #define __TIM22_FORCE_RESET   __HAL_RCC_TIM22_FORCE_RESET
  2836. #define __TIM22_RELEASE_RESET  __HAL_RCC_TIM22_RELEASE_RESET
  2837. #define __TIM22_CLK_SLEEP_ENABLE   __HAL_RCC_TIM22_CLK_SLEEP_ENABLE
  2838. #define __TIM22_CLK_SLEEP_DISABLE   __HAL_RCC_TIM22_CLK_SLEEP_DISABLE
  2839. #define __CRS_CLK_DISABLE __HAL_RCC_CRS_CLK_DISABLE
  2840. #define __CRS_CLK_ENABLE __HAL_RCC_CRS_CLK_ENABLE
  2841. #define __CRS_CLK_SLEEP_DISABLE __HAL_RCC_CRS_CLK_SLEEP_DISABLE
  2842. #define __CRS_CLK_SLEEP_ENABLE __HAL_RCC_CRS_CLK_SLEEP_ENABLE
  2843. #define __CRS_FORCE_RESET __HAL_RCC_CRS_FORCE_RESET
  2844. #define __CRS_RELEASE_RESET __HAL_RCC_CRS_RELEASE_RESET
  2845. #define __RCC_BACKUPRESET_FORCE __HAL_RCC_BACKUPRESET_FORCE
  2846. #define __RCC_BACKUPRESET_RELEASE __HAL_RCC_BACKUPRESET_RELEASE
  2847.  
  2848. #define __USB_OTG_FS_FORCE_RESET  __HAL_RCC_USB_OTG_FS_FORCE_RESET
  2849. #define __USB_OTG_FS_RELEASE_RESET  __HAL_RCC_USB_OTG_FS_RELEASE_RESET
  2850. #define __USB_OTG_FS_CLK_SLEEP_ENABLE  __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE
  2851. #define __USB_OTG_FS_CLK_SLEEP_DISABLE  __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE
  2852. #define __USB_OTG_HS_CLK_DISABLE  __HAL_RCC_USB_OTG_HS_CLK_DISABLE
  2853. #define __USB_OTG_HS_CLK_ENABLE          __HAL_RCC_USB_OTG_HS_CLK_ENABLE
  2854. #define __USB_OTG_HS_ULPI_CLK_ENABLE  __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE
  2855. #define __USB_OTG_HS_ULPI_CLK_DISABLE  __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE
  2856. #define __TIM9_CLK_SLEEP_ENABLE          __HAL_RCC_TIM9_CLK_SLEEP_ENABLE
  2857. #define __TIM9_CLK_SLEEP_DISABLE  __HAL_RCC_TIM9_CLK_SLEEP_DISABLE
  2858. #define __TIM10_CLK_SLEEP_ENABLE  __HAL_RCC_TIM10_CLK_SLEEP_ENABLE
  2859. #define __TIM10_CLK_SLEEP_DISABLE  __HAL_RCC_TIM10_CLK_SLEEP_DISABLE
  2860. #define __TIM11_CLK_SLEEP_ENABLE  __HAL_RCC_TIM11_CLK_SLEEP_ENABLE
  2861. #define __TIM11_CLK_SLEEP_DISABLE  __HAL_RCC_TIM11_CLK_SLEEP_DISABLE
  2862. #define __ETHMACPTP_CLK_SLEEP_ENABLE  __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE
  2863. #define __ETHMACPTP_CLK_SLEEP_DISABLE  __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE
  2864. #define __ETHMACPTP_CLK_ENABLE          __HAL_RCC_ETHMACPTP_CLK_ENABLE
  2865. #define __ETHMACPTP_CLK_DISABLE          __HAL_RCC_ETHMACPTP_CLK_DISABLE
  2866. #define __HASH_CLK_ENABLE          __HAL_RCC_HASH_CLK_ENABLE
  2867. #define __HASH_FORCE_RESET          __HAL_RCC_HASH_FORCE_RESET
  2868. #define __HASH_RELEASE_RESET          __HAL_RCC_HASH_RELEASE_RESET
  2869. #define __HASH_CLK_SLEEP_ENABLE          __HAL_RCC_HASH_CLK_SLEEP_ENABLE
  2870. #define __HASH_CLK_SLEEP_DISABLE  __HAL_RCC_HASH_CLK_SLEEP_DISABLE
  2871. #define __HASH_CLK_DISABLE            __HAL_RCC_HASH_CLK_DISABLE
  2872. #define __SPI5_CLK_ENABLE          __HAL_RCC_SPI5_CLK_ENABLE
  2873. #define __SPI5_CLK_DISABLE              __HAL_RCC_SPI5_CLK_DISABLE
  2874. #define __SPI5_FORCE_RESET          __HAL_RCC_SPI5_FORCE_RESET
  2875. #define __SPI5_RELEASE_RESET          __HAL_RCC_SPI5_RELEASE_RESET
  2876. #define __SPI5_CLK_SLEEP_ENABLE          __HAL_RCC_SPI5_CLK_SLEEP_ENABLE
  2877. #define __SPI5_CLK_SLEEP_DISABLE  __HAL_RCC_SPI5_CLK_SLEEP_DISABLE
  2878. #define __SPI6_CLK_ENABLE          __HAL_RCC_SPI6_CLK_ENABLE
  2879. #define __SPI6_CLK_DISABLE          __HAL_RCC_SPI6_CLK_DISABLE
  2880. #define __SPI6_FORCE_RESET          __HAL_RCC_SPI6_FORCE_RESET
  2881. #define __SPI6_RELEASE_RESET         __HAL_RCC_SPI6_RELEASE_RESET
  2882. #define __SPI6_CLK_SLEEP_ENABLE          __HAL_RCC_SPI6_CLK_SLEEP_ENABLE
  2883. #define __SPI6_CLK_SLEEP_DISABLE  __HAL_RCC_SPI6_CLK_SLEEP_DISABLE
  2884. #define __LTDC_CLK_ENABLE          __HAL_RCC_LTDC_CLK_ENABLE
  2885. #define __LTDC_CLK_DISABLE          __HAL_RCC_LTDC_CLK_DISABLE
  2886. #define __LTDC_FORCE_RESET          __HAL_RCC_LTDC_FORCE_RESET
  2887. #define __LTDC_RELEASE_RESET          __HAL_RCC_LTDC_RELEASE_RESET
  2888. #define __LTDC_CLK_SLEEP_ENABLE          __HAL_RCC_LTDC_CLK_SLEEP_ENABLE
  2889. #define __ETHMAC_CLK_SLEEP_ENABLE  __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE
  2890. #define __ETHMAC_CLK_SLEEP_DISABLE  __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE
  2891. #define __ETHMACTX_CLK_SLEEP_ENABLE  __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE
  2892. #define __ETHMACTX_CLK_SLEEP_DISABLE  __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE
  2893. #define __ETHMACRX_CLK_SLEEP_ENABLE  __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE
  2894. #define __ETHMACRX_CLK_SLEEP_DISABLE  __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE
  2895. #define __TIM12_CLK_SLEEP_ENABLE  __HAL_RCC_TIM12_CLK_SLEEP_ENABLE
  2896. #define __TIM12_CLK_SLEEP_DISABLE  __HAL_RCC_TIM12_CLK_SLEEP_DISABLE
  2897. #define __TIM13_CLK_SLEEP_ENABLE  __HAL_RCC_TIM13_CLK_SLEEP_ENABLE
  2898. #define __TIM13_CLK_SLEEP_DISABLE  __HAL_RCC_TIM13_CLK_SLEEP_DISABLE
  2899. #define __TIM14_CLK_SLEEP_ENABLE  __HAL_RCC_TIM14_CLK_SLEEP_ENABLE
  2900. #define __TIM14_CLK_SLEEP_DISABLE  __HAL_RCC_TIM14_CLK_SLEEP_DISABLE
  2901. #define __BKPSRAM_CLK_ENABLE          __HAL_RCC_BKPSRAM_CLK_ENABLE
  2902. #define __BKPSRAM_CLK_DISABLE          __HAL_RCC_BKPSRAM_CLK_DISABLE
  2903. #define __BKPSRAM_CLK_SLEEP_ENABLE  __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE
  2904. #define __BKPSRAM_CLK_SLEEP_DISABLE  __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE
  2905. #define __CCMDATARAMEN_CLK_ENABLE  __HAL_RCC_CCMDATARAMEN_CLK_ENABLE
  2906. #define __CCMDATARAMEN_CLK_DISABLE  __HAL_RCC_CCMDATARAMEN_CLK_DISABLE
  2907. #define __USART6_CLK_ENABLE          __HAL_RCC_USART6_CLK_ENABLE
  2908. #define __USART6_CLK_DISABLE          __HAL_RCC_USART6_CLK_DISABLE
  2909. #define __USART6_FORCE_RESET        __HAL_RCC_USART6_FORCE_RESET
  2910. #define __USART6_RELEASE_RESET        __HAL_RCC_USART6_RELEASE_RESET
  2911. #define __USART6_CLK_SLEEP_ENABLE  __HAL_RCC_USART6_CLK_SLEEP_ENABLE
  2912. #define __USART6_CLK_SLEEP_DISABLE  __HAL_RCC_USART6_CLK_SLEEP_DISABLE
  2913. #define __SPI4_CLK_ENABLE          __HAL_RCC_SPI4_CLK_ENABLE
  2914. #define __SPI4_CLK_DISABLE          __HAL_RCC_SPI4_CLK_DISABLE
  2915. #define __SPI4_FORCE_RESET          __HAL_RCC_SPI4_FORCE_RESET
  2916. #define __SPI4_RELEASE_RESET        __HAL_RCC_SPI4_RELEASE_RESET
  2917. #define __SPI4_CLK_SLEEP_ENABLE   __HAL_RCC_SPI4_CLK_SLEEP_ENABLE
  2918. #define __SPI4_CLK_SLEEP_DISABLE  __HAL_RCC_SPI4_CLK_SLEEP_DISABLE
  2919. #define __GPIOI_CLK_ENABLE          __HAL_RCC_GPIOI_CLK_ENABLE
  2920. #define __GPIOI_CLK_DISABLE          __HAL_RCC_GPIOI_CLK_DISABLE
  2921. #define __GPIOI_FORCE_RESET          __HAL_RCC_GPIOI_FORCE_RESET
  2922. #define __GPIOI_RELEASE_RESET          __HAL_RCC_GPIOI_RELEASE_RESET
  2923. #define __GPIOI_CLK_SLEEP_ENABLE  __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE
  2924. #define __GPIOI_CLK_SLEEP_DISABLE  __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE
  2925. #define __GPIOJ_CLK_ENABLE          __HAL_RCC_GPIOJ_CLK_ENABLE
  2926. #define __GPIOJ_CLK_DISABLE          __HAL_RCC_GPIOJ_CLK_DISABLE
  2927. #define __GPIOJ_FORCE_RESET         __HAL_RCC_GPIOJ_FORCE_RESET
  2928. #define __GPIOJ_RELEASE_RESET          __HAL_RCC_GPIOJ_RELEASE_RESET
  2929. #define __GPIOJ_CLK_SLEEP_ENABLE  __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE
  2930. #define __GPIOJ_CLK_SLEEP_DISABLE  __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE
  2931. #define __GPIOK_CLK_ENABLE          __HAL_RCC_GPIOK_CLK_ENABLE
  2932. #define __GPIOK_CLK_DISABLE          __HAL_RCC_GPIOK_CLK_DISABLE
  2933. #define __GPIOK_RELEASE_RESET          __HAL_RCC_GPIOK_RELEASE_RESET
  2934. #define __GPIOK_CLK_SLEEP_ENABLE  __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE
  2935. #define __GPIOK_CLK_SLEEP_DISABLE  __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE
  2936. #define __ETH_CLK_ENABLE          __HAL_RCC_ETH_CLK_ENABLE
  2937. #define __ETH_CLK_DISABLE          __HAL_RCC_ETH_CLK_DISABLE
  2938. #define __DCMI_CLK_ENABLE          __HAL_RCC_DCMI_CLK_ENABLE
  2939. #define __DCMI_CLK_DISABLE          __HAL_RCC_DCMI_CLK_DISABLE
  2940. #define __DCMI_FORCE_RESET          __HAL_RCC_DCMI_FORCE_RESET
  2941. #define __DCMI_RELEASE_RESET          __HAL_RCC_DCMI_RELEASE_RESET
  2942. #define __DCMI_CLK_SLEEP_ENABLE   __HAL_RCC_DCMI_CLK_SLEEP_ENABLE
  2943. #define __DCMI_CLK_SLEEP_DISABLE  __HAL_RCC_DCMI_CLK_SLEEP_DISABLE
  2944. #define __UART7_CLK_ENABLE          __HAL_RCC_UART7_CLK_ENABLE
  2945. #define __UART7_CLK_DISABLE          __HAL_RCC_UART7_CLK_DISABLE
  2946. #define __UART7_RELEASE_RESET       __HAL_RCC_UART7_RELEASE_RESET
  2947. #define __UART7_FORCE_RESET       __HAL_RCC_UART7_FORCE_RESET
  2948. #define __UART7_CLK_SLEEP_ENABLE  __HAL_RCC_UART7_CLK_SLEEP_ENABLE
  2949. #define __UART7_CLK_SLEEP_DISABLE  __HAL_RCC_UART7_CLK_SLEEP_DISABLE
  2950. #define __UART8_CLK_ENABLE          __HAL_RCC_UART8_CLK_ENABLE
  2951. #define __UART8_CLK_DISABLE          __HAL_RCC_UART8_CLK_DISABLE
  2952. #define __UART8_FORCE_RESET          __HAL_RCC_UART8_FORCE_RESET
  2953. #define __UART8_RELEASE_RESET          __HAL_RCC_UART8_RELEASE_RESET
  2954. #define __UART8_CLK_SLEEP_ENABLE  __HAL_RCC_UART8_CLK_SLEEP_ENABLE
  2955. #define __UART8_CLK_SLEEP_DISABLE  __HAL_RCC_UART8_CLK_SLEEP_DISABLE
  2956. #define __OTGHS_CLK_SLEEP_ENABLE  __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
  2957. #define __OTGHS_CLK_SLEEP_DISABLE  __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
  2958. #define __OTGHS_FORCE_RESET          __HAL_RCC_USB_OTG_HS_FORCE_RESET
  2959. #define __OTGHS_RELEASE_RESET          __HAL_RCC_USB_OTG_HS_RELEASE_RESET
  2960. #define __OTGHSULPI_CLK_SLEEP_ENABLE  __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
  2961. #define __OTGHSULPI_CLK_SLEEP_DISABLE  __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
  2962. #define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE  __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
  2963. #define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE  __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
  2964. #define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED
  2965. #define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED
  2966. #define __HAL_RCC_OTGHS_FORCE_RESET          __HAL_RCC_USB_OTG_HS_FORCE_RESET
  2967. #define __HAL_RCC_OTGHS_RELEASE_RESET          __HAL_RCC_USB_OTG_HS_RELEASE_RESET
  2968. #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE      __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
  2969. #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE     __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
  2970. #define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED  __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED
  2971. #define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED
  2972. #define __SRAM3_CLK_SLEEP_ENABLE       __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE
  2973. #define __CAN2_CLK_SLEEP_ENABLE        __HAL_RCC_CAN2_CLK_SLEEP_ENABLE
  2974. #define __CAN2_CLK_SLEEP_DISABLE       __HAL_RCC_CAN2_CLK_SLEEP_DISABLE
  2975. #define __DAC_CLK_SLEEP_ENABLE         __HAL_RCC_DAC_CLK_SLEEP_ENABLE
  2976. #define __DAC_CLK_SLEEP_DISABLE        __HAL_RCC_DAC_CLK_SLEEP_DISABLE
  2977. #define __ADC2_CLK_SLEEP_ENABLE        __HAL_RCC_ADC2_CLK_SLEEP_ENABLE
  2978. #define __ADC2_CLK_SLEEP_DISABLE       __HAL_RCC_ADC2_CLK_SLEEP_DISABLE
  2979. #define __ADC3_CLK_SLEEP_ENABLE        __HAL_RCC_ADC3_CLK_SLEEP_ENABLE
  2980. #define __ADC3_CLK_SLEEP_DISABLE       __HAL_RCC_ADC3_CLK_SLEEP_DISABLE
  2981. #define __FSMC_FORCE_RESET             __HAL_RCC_FSMC_FORCE_RESET
  2982. #define __FSMC_RELEASE_RESET           __HAL_RCC_FSMC_RELEASE_RESET
  2983. #define __FSMC_CLK_SLEEP_ENABLE        __HAL_RCC_FSMC_CLK_SLEEP_ENABLE
  2984. #define __FSMC_CLK_SLEEP_DISABLE       __HAL_RCC_FSMC_CLK_SLEEP_DISABLE
  2985. #define __SDIO_FORCE_RESET             __HAL_RCC_SDIO_FORCE_RESET
  2986. #define __SDIO_RELEASE_RESET           __HAL_RCC_SDIO_RELEASE_RESET
  2987. #define __SDIO_CLK_SLEEP_DISABLE       __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
  2988. #define __SDIO_CLK_SLEEP_ENABLE        __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
  2989. #define __DMA2D_CLK_ENABLE             __HAL_RCC_DMA2D_CLK_ENABLE
  2990. #define __DMA2D_CLK_DISABLE            __HAL_RCC_DMA2D_CLK_DISABLE
  2991. #define __DMA2D_FORCE_RESET            __HAL_RCC_DMA2D_FORCE_RESET
  2992. #define __DMA2D_RELEASE_RESET          __HAL_RCC_DMA2D_RELEASE_RESET
  2993. #define __DMA2D_CLK_SLEEP_ENABLE       __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE
  2994. #define __DMA2D_CLK_SLEEP_DISABLE      __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE
  2995.  
  2996. /* alias define maintained for legacy */
  2997. #define __HAL_RCC_OTGFS_FORCE_RESET    __HAL_RCC_USB_OTG_FS_FORCE_RESET
  2998. #define __HAL_RCC_OTGFS_RELEASE_RESET  __HAL_RCC_USB_OTG_FS_RELEASE_RESET
  2999.  
  3000. #define __ADC12_CLK_ENABLE          __HAL_RCC_ADC12_CLK_ENABLE
  3001. #define __ADC12_CLK_DISABLE         __HAL_RCC_ADC12_CLK_DISABLE
  3002. #define __ADC34_CLK_ENABLE          __HAL_RCC_ADC34_CLK_ENABLE
  3003. #define __ADC34_CLK_DISABLE         __HAL_RCC_ADC34_CLK_DISABLE
  3004. #define __DAC2_CLK_ENABLE           __HAL_RCC_DAC2_CLK_ENABLE
  3005. #define __DAC2_CLK_DISABLE          __HAL_RCC_DAC2_CLK_DISABLE
  3006. #define __TIM18_CLK_ENABLE          __HAL_RCC_TIM18_CLK_ENABLE
  3007. #define __TIM18_CLK_DISABLE         __HAL_RCC_TIM18_CLK_DISABLE
  3008. #define __TIM19_CLK_ENABLE          __HAL_RCC_TIM19_CLK_ENABLE
  3009. #define __TIM19_CLK_DISABLE         __HAL_RCC_TIM19_CLK_DISABLE
  3010. #define __TIM20_CLK_ENABLE          __HAL_RCC_TIM20_CLK_ENABLE
  3011. #define __TIM20_CLK_DISABLE         __HAL_RCC_TIM20_CLK_DISABLE
  3012. #define __HRTIM1_CLK_ENABLE         __HAL_RCC_HRTIM1_CLK_ENABLE
  3013. #define __HRTIM1_CLK_DISABLE        __HAL_RCC_HRTIM1_CLK_DISABLE
  3014. #define __SDADC1_CLK_ENABLE         __HAL_RCC_SDADC1_CLK_ENABLE
  3015. #define __SDADC2_CLK_ENABLE         __HAL_RCC_SDADC2_CLK_ENABLE
  3016. #define __SDADC3_CLK_ENABLE         __HAL_RCC_SDADC3_CLK_ENABLE
  3017. #define __SDADC1_CLK_DISABLE        __HAL_RCC_SDADC1_CLK_DISABLE
  3018. #define __SDADC2_CLK_DISABLE        __HAL_RCC_SDADC2_CLK_DISABLE
  3019. #define __SDADC3_CLK_DISABLE        __HAL_RCC_SDADC3_CLK_DISABLE
  3020.  
  3021. #define __ADC12_FORCE_RESET         __HAL_RCC_ADC12_FORCE_RESET
  3022. #define __ADC12_RELEASE_RESET       __HAL_RCC_ADC12_RELEASE_RESET
  3023. #define __ADC34_FORCE_RESET         __HAL_RCC_ADC34_FORCE_RESET
  3024. #define __ADC34_RELEASE_RESET       __HAL_RCC_ADC34_RELEASE_RESET
  3025. #define __DAC2_FORCE_RESET          __HAL_RCC_DAC2_FORCE_RESET
  3026. #define __DAC2_RELEASE_RESET        __HAL_RCC_DAC2_RELEASE_RESET
  3027. #define __TIM18_FORCE_RESET         __HAL_RCC_TIM18_FORCE_RESET
  3028. #define __TIM18_RELEASE_RESET       __HAL_RCC_TIM18_RELEASE_RESET
  3029. #define __TIM19_FORCE_RESET         __HAL_RCC_TIM19_FORCE_RESET
  3030. #define __TIM19_RELEASE_RESET       __HAL_RCC_TIM19_RELEASE_RESET
  3031. #define __TIM20_FORCE_RESET         __HAL_RCC_TIM20_FORCE_RESET
  3032. #define __TIM20_RELEASE_RESET       __HAL_RCC_TIM20_RELEASE_RESET
  3033. #define __HRTIM1_FORCE_RESET        __HAL_RCC_HRTIM1_FORCE_RESET
  3034. #define __HRTIM1_RELEASE_RESET      __HAL_RCC_HRTIM1_RELEASE_RESET
  3035. #define __SDADC1_FORCE_RESET        __HAL_RCC_SDADC1_FORCE_RESET
  3036. #define __SDADC2_FORCE_RESET        __HAL_RCC_SDADC2_FORCE_RESET
  3037. #define __SDADC3_FORCE_RESET        __HAL_RCC_SDADC3_FORCE_RESET
  3038. #define __SDADC1_RELEASE_RESET      __HAL_RCC_SDADC1_RELEASE_RESET
  3039. #define __SDADC2_RELEASE_RESET      __HAL_RCC_SDADC2_RELEASE_RESET
  3040. #define __SDADC3_RELEASE_RESET      __HAL_RCC_SDADC3_RELEASE_RESET
  3041.  
  3042. #define __ADC1_IS_CLK_ENABLED       __HAL_RCC_ADC1_IS_CLK_ENABLED
  3043. #define __ADC1_IS_CLK_DISABLED      __HAL_RCC_ADC1_IS_CLK_DISABLED
  3044. #define __ADC12_IS_CLK_ENABLED      __HAL_RCC_ADC12_IS_CLK_ENABLED
  3045. #define __ADC12_IS_CLK_DISABLED     __HAL_RCC_ADC12_IS_CLK_DISABLED
  3046. #define __ADC34_IS_CLK_ENABLED      __HAL_RCC_ADC34_IS_CLK_ENABLED
  3047. #define __ADC34_IS_CLK_DISABLED     __HAL_RCC_ADC34_IS_CLK_DISABLED
  3048. #define __CEC_IS_CLK_ENABLED        __HAL_RCC_CEC_IS_CLK_ENABLED
  3049. #define __CEC_IS_CLK_DISABLED       __HAL_RCC_CEC_IS_CLK_DISABLED
  3050. #define __CRC_IS_CLK_ENABLED        __HAL_RCC_CRC_IS_CLK_ENABLED
  3051. #define __CRC_IS_CLK_DISABLED       __HAL_RCC_CRC_IS_CLK_DISABLED
  3052. #define __DAC1_IS_CLK_ENABLED       __HAL_RCC_DAC1_IS_CLK_ENABLED
  3053. #define __DAC1_IS_CLK_DISABLED      __HAL_RCC_DAC1_IS_CLK_DISABLED
  3054. #define __DAC2_IS_CLK_ENABLED       __HAL_RCC_DAC2_IS_CLK_ENABLED
  3055. #define __DAC2_IS_CLK_DISABLED      __HAL_RCC_DAC2_IS_CLK_DISABLED
  3056. #define __DMA1_IS_CLK_ENABLED       __HAL_RCC_DMA1_IS_CLK_ENABLED
  3057. #define __DMA1_IS_CLK_DISABLED      __HAL_RCC_DMA1_IS_CLK_DISABLED
  3058. #define __DMA2_IS_CLK_ENABLED       __HAL_RCC_DMA2_IS_CLK_ENABLED
  3059. #define __DMA2_IS_CLK_DISABLED      __HAL_RCC_DMA2_IS_CLK_DISABLED
  3060. #define __FLITF_IS_CLK_ENABLED      __HAL_RCC_FLITF_IS_CLK_ENABLED
  3061. #define __FLITF_IS_CLK_DISABLED     __HAL_RCC_FLITF_IS_CLK_DISABLED
  3062. #define __FMC_IS_CLK_ENABLED        __HAL_RCC_FMC_IS_CLK_ENABLED
  3063. #define __FMC_IS_CLK_DISABLED       __HAL_RCC_FMC_IS_CLK_DISABLED
  3064. #define __GPIOA_IS_CLK_ENABLED      __HAL_RCC_GPIOA_IS_CLK_ENABLED
  3065. #define __GPIOA_IS_CLK_DISABLED     __HAL_RCC_GPIOA_IS_CLK_DISABLED
  3066. #define __GPIOB_IS_CLK_ENABLED      __HAL_RCC_GPIOB_IS_CLK_ENABLED
  3067. #define __GPIOB_IS_CLK_DISABLED     __HAL_RCC_GPIOB_IS_CLK_DISABLED
  3068. #define __GPIOC_IS_CLK_ENABLED      __HAL_RCC_GPIOC_IS_CLK_ENABLED
  3069. #define __GPIOC_IS_CLK_DISABLED     __HAL_RCC_GPIOC_IS_CLK_DISABLED
  3070. #define __GPIOD_IS_CLK_ENABLED      __HAL_RCC_GPIOD_IS_CLK_ENABLED
  3071. #define __GPIOD_IS_CLK_DISABLED     __HAL_RCC_GPIOD_IS_CLK_DISABLED
  3072. #define __GPIOE_IS_CLK_ENABLED      __HAL_RCC_GPIOE_IS_CLK_ENABLED
  3073. #define __GPIOE_IS_CLK_DISABLED     __HAL_RCC_GPIOE_IS_CLK_DISABLED
  3074. #define __GPIOF_IS_CLK_ENABLED      __HAL_RCC_GPIOF_IS_CLK_ENABLED
  3075. #define __GPIOF_IS_CLK_DISABLED     __HAL_RCC_GPIOF_IS_CLK_DISABLED
  3076. #define __GPIOG_IS_CLK_ENABLED      __HAL_RCC_GPIOG_IS_CLK_ENABLED
  3077. #define __GPIOG_IS_CLK_DISABLED     __HAL_RCC_GPIOG_IS_CLK_DISABLED
  3078. #define __GPIOH_IS_CLK_ENABLED      __HAL_RCC_GPIOH_IS_CLK_ENABLED
  3079. #define __GPIOH_IS_CLK_DISABLED     __HAL_RCC_GPIOH_IS_CLK_DISABLED
  3080. #define __HRTIM1_IS_CLK_ENABLED     __HAL_RCC_HRTIM1_IS_CLK_ENABLED
  3081. #define __HRTIM1_IS_CLK_DISABLED    __HAL_RCC_HRTIM1_IS_CLK_DISABLED
  3082. #define __I2C1_IS_CLK_ENABLED       __HAL_RCC_I2C1_IS_CLK_ENABLED
  3083. #define __I2C1_IS_CLK_DISABLED      __HAL_RCC_I2C1_IS_CLK_DISABLED
  3084. #define __I2C2_IS_CLK_ENABLED       __HAL_RCC_I2C2_IS_CLK_ENABLED
  3085. #define __I2C2_IS_CLK_DISABLED      __HAL_RCC_I2C2_IS_CLK_DISABLED
  3086. #define __I2C3_IS_CLK_ENABLED       __HAL_RCC_I2C3_IS_CLK_ENABLED
  3087. #define __I2C3_IS_CLK_DISABLED      __HAL_RCC_I2C3_IS_CLK_DISABLED
  3088. #define __PWR_IS_CLK_ENABLED        __HAL_RCC_PWR_IS_CLK_ENABLED
  3089. #define __PWR_IS_CLK_DISABLED       __HAL_RCC_PWR_IS_CLK_DISABLED
  3090. #define __SYSCFG_IS_CLK_ENABLED     __HAL_RCC_SYSCFG_IS_CLK_ENABLED
  3091. #define __SYSCFG_IS_CLK_DISABLED    __HAL_RCC_SYSCFG_IS_CLK_DISABLED
  3092. #define __SPI1_IS_CLK_ENABLED       __HAL_RCC_SPI1_IS_CLK_ENABLED
  3093. #define __SPI1_IS_CLK_DISABLED      __HAL_RCC_SPI1_IS_CLK_DISABLED
  3094. #define __SPI2_IS_CLK_ENABLED       __HAL_RCC_SPI2_IS_CLK_ENABLED
  3095. #define __SPI2_IS_CLK_DISABLED      __HAL_RCC_SPI2_IS_CLK_DISABLED
  3096. #define __SPI3_IS_CLK_ENABLED       __HAL_RCC_SPI3_IS_CLK_ENABLED
  3097. #define __SPI3_IS_CLK_DISABLED      __HAL_RCC_SPI3_IS_CLK_DISABLED
  3098. #define __SPI4_IS_CLK_ENABLED       __HAL_RCC_SPI4_IS_CLK_ENABLED
  3099. #define __SPI4_IS_CLK_DISABLED      __HAL_RCC_SPI4_IS_CLK_DISABLED
  3100. #define __SDADC1_IS_CLK_ENABLED     __HAL_RCC_SDADC1_IS_CLK_ENABLED
  3101. #define __SDADC1_IS_CLK_DISABLED    __HAL_RCC_SDADC1_IS_CLK_DISABLED
  3102. #define __SDADC2_IS_CLK_ENABLED     __HAL_RCC_SDADC2_IS_CLK_ENABLED
  3103. #define __SDADC2_IS_CLK_DISABLED    __HAL_RCC_SDADC2_IS_CLK_DISABLED
  3104. #define __SDADC3_IS_CLK_ENABLED     __HAL_RCC_SDADC3_IS_CLK_ENABLED
  3105. #define __SDADC3_IS_CLK_DISABLED    __HAL_RCC_SDADC3_IS_CLK_DISABLED
  3106. #define __SRAM_IS_CLK_ENABLED       __HAL_RCC_SRAM_IS_CLK_ENABLED
  3107. #define __SRAM_IS_CLK_DISABLED      __HAL_RCC_SRAM_IS_CLK_DISABLED
  3108. #define __TIM1_IS_CLK_ENABLED       __HAL_RCC_TIM1_IS_CLK_ENABLED
  3109. #define __TIM1_IS_CLK_DISABLED      __HAL_RCC_TIM1_IS_CLK_DISABLED
  3110. #define __TIM2_IS_CLK_ENABLED       __HAL_RCC_TIM2_IS_CLK_ENABLED
  3111. #define __TIM2_IS_CLK_DISABLED      __HAL_RCC_TIM2_IS_CLK_DISABLED
  3112. #define __TIM3_IS_CLK_ENABLED       __HAL_RCC_TIM3_IS_CLK_ENABLED
  3113. #define __TIM3_IS_CLK_DISABLED      __HAL_RCC_TIM3_IS_CLK_DISABLED
  3114. #define __TIM4_IS_CLK_ENABLED       __HAL_RCC_TIM4_IS_CLK_ENABLED
  3115. #define __TIM4_IS_CLK_DISABLED      __HAL_RCC_TIM4_IS_CLK_DISABLED
  3116. #define __TIM5_IS_CLK_ENABLED       __HAL_RCC_TIM5_IS_CLK_ENABLED
  3117. #define __TIM5_IS_CLK_DISABLED      __HAL_RCC_TIM5_IS_CLK_DISABLED
  3118. #define __TIM6_IS_CLK_ENABLED       __HAL_RCC_TIM6_IS_CLK_ENABLED
  3119. #define __TIM6_IS_CLK_DISABLED      __HAL_RCC_TIM6_IS_CLK_DISABLED
  3120. #define __TIM7_IS_CLK_ENABLED       __HAL_RCC_TIM7_IS_CLK_ENABLED
  3121. #define __TIM7_IS_CLK_DISABLED      __HAL_RCC_TIM7_IS_CLK_DISABLED
  3122. #define __TIM8_IS_CLK_ENABLED       __HAL_RCC_TIM8_IS_CLK_ENABLED
  3123. #define __TIM8_IS_CLK_DISABLED      __HAL_RCC_TIM8_IS_CLK_DISABLED
  3124. #define __TIM12_IS_CLK_ENABLED      __HAL_RCC_TIM12_IS_CLK_ENABLED
  3125. #define __TIM12_IS_CLK_DISABLED     __HAL_RCC_TIM12_IS_CLK_DISABLED
  3126. #define __TIM13_IS_CLK_ENABLED      __HAL_RCC_TIM13_IS_CLK_ENABLED
  3127. #define __TIM13_IS_CLK_DISABLED     __HAL_RCC_TIM13_IS_CLK_DISABLED
  3128. #define __TIM14_IS_CLK_ENABLED      __HAL_RCC_TIM14_IS_CLK_ENABLED
  3129. #define __TIM14_IS_CLK_DISABLED     __HAL_RCC_TIM14_IS_CLK_DISABLED
  3130. #define __TIM15_IS_CLK_ENABLED      __HAL_RCC_TIM15_IS_CLK_ENABLED
  3131. #define __TIM15_IS_CLK_DISABLED     __HAL_RCC_TIM15_IS_CLK_DISABLED
  3132. #define __TIM16_IS_CLK_ENABLED      __HAL_RCC_TIM16_IS_CLK_ENABLED
  3133. #define __TIM16_IS_CLK_DISABLED     __HAL_RCC_TIM16_IS_CLK_DISABLED
  3134. #define __TIM17_IS_CLK_ENABLED      __HAL_RCC_TIM17_IS_CLK_ENABLED
  3135. #define __TIM17_IS_CLK_DISABLED     __HAL_RCC_TIM17_IS_CLK_DISABLED
  3136. #define __TIM18_IS_CLK_ENABLED      __HAL_RCC_TIM18_IS_CLK_ENABLED
  3137. #define __TIM18_IS_CLK_DISABLED     __HAL_RCC_TIM18_IS_CLK_DISABLED
  3138. #define __TIM19_IS_CLK_ENABLED      __HAL_RCC_TIM19_IS_CLK_ENABLED
  3139. #define __TIM19_IS_CLK_DISABLED     __HAL_RCC_TIM19_IS_CLK_DISABLED
  3140. #define __TIM20_IS_CLK_ENABLED      __HAL_RCC_TIM20_IS_CLK_ENABLED
  3141. #define __TIM20_IS_CLK_DISABLED     __HAL_RCC_TIM20_IS_CLK_DISABLED
  3142. #define __TSC_IS_CLK_ENABLED        __HAL_RCC_TSC_IS_CLK_ENABLED
  3143. #define __TSC_IS_CLK_DISABLED       __HAL_RCC_TSC_IS_CLK_DISABLED
  3144. #define __UART4_IS_CLK_ENABLED      __HAL_RCC_UART4_IS_CLK_ENABLED
  3145. #define __UART4_IS_CLK_DISABLED     __HAL_RCC_UART4_IS_CLK_DISABLED
  3146. #define __UART5_IS_CLK_ENABLED      __HAL_RCC_UART5_IS_CLK_ENABLED
  3147. #define __UART5_IS_CLK_DISABLED     __HAL_RCC_UART5_IS_CLK_DISABLED
  3148. #define __USART1_IS_CLK_ENABLED     __HAL_RCC_USART1_IS_CLK_ENABLED
  3149. #define __USART1_IS_CLK_DISABLED    __HAL_RCC_USART1_IS_CLK_DISABLED
  3150. #define __USART2_IS_CLK_ENABLED     __HAL_RCC_USART2_IS_CLK_ENABLED
  3151. #define __USART2_IS_CLK_DISABLED    __HAL_RCC_USART2_IS_CLK_DISABLED
  3152. #define __USART3_IS_CLK_ENABLED     __HAL_RCC_USART3_IS_CLK_ENABLED
  3153. #define __USART3_IS_CLK_DISABLED    __HAL_RCC_USART3_IS_CLK_DISABLED
  3154. #define __USB_IS_CLK_ENABLED        __HAL_RCC_USB_IS_CLK_ENABLED
  3155. #define __USB_IS_CLK_DISABLED       __HAL_RCC_USB_IS_CLK_DISABLED
  3156. #define __WWDG_IS_CLK_ENABLED       __HAL_RCC_WWDG_IS_CLK_ENABLED
  3157. #define __WWDG_IS_CLK_DISABLED      __HAL_RCC_WWDG_IS_CLK_DISABLED
  3158.  
  3159. #if defined(STM32L1)
  3160. #define __HAL_RCC_CRYP_CLK_DISABLE         __HAL_RCC_AES_CLK_DISABLE
  3161. #define __HAL_RCC_CRYP_CLK_ENABLE          __HAL_RCC_AES_CLK_ENABLE
  3162. #define __HAL_RCC_CRYP_CLK_SLEEP_DISABLE   __HAL_RCC_AES_CLK_SLEEP_DISABLE
  3163. #define __HAL_RCC_CRYP_CLK_SLEEP_ENABLE    __HAL_RCC_AES_CLK_SLEEP_ENABLE
  3164. #define __HAL_RCC_CRYP_FORCE_RESET         __HAL_RCC_AES_FORCE_RESET
  3165. #define __HAL_RCC_CRYP_RELEASE_RESET       __HAL_RCC_AES_RELEASE_RESET
  3166. #endif /* STM32L1 */
  3167.  
  3168. #if defined(STM32F4)
  3169. #define __HAL_RCC_SDMMC1_FORCE_RESET       __HAL_RCC_SDIO_FORCE_RESET
  3170. #define __HAL_RCC_SDMMC1_RELEASE_RESET     __HAL_RCC_SDIO_RELEASE_RESET
  3171. #define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE  __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
  3172. #define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
  3173. #define __HAL_RCC_SDMMC1_CLK_ENABLE        __HAL_RCC_SDIO_CLK_ENABLE
  3174. #define __HAL_RCC_SDMMC1_CLK_DISABLE       __HAL_RCC_SDIO_CLK_DISABLE
  3175. #define __HAL_RCC_SDMMC1_IS_CLK_ENABLED    __HAL_RCC_SDIO_IS_CLK_ENABLED
  3176. #define __HAL_RCC_SDMMC1_IS_CLK_DISABLED   __HAL_RCC_SDIO_IS_CLK_DISABLED
  3177. #define Sdmmc1ClockSelection               SdioClockSelection
  3178. #define RCC_PERIPHCLK_SDMMC1               RCC_PERIPHCLK_SDIO
  3179. #define RCC_SDMMC1CLKSOURCE_CLK48          RCC_SDIOCLKSOURCE_CK48
  3180. #define RCC_SDMMC1CLKSOURCE_SYSCLK         RCC_SDIOCLKSOURCE_SYSCLK
  3181. #define __HAL_RCC_SDMMC1_CONFIG            __HAL_RCC_SDIO_CONFIG
  3182. #define __HAL_RCC_GET_SDMMC1_SOURCE        __HAL_RCC_GET_SDIO_SOURCE
  3183. #endif
  3184.  
  3185. #if defined(STM32F7) || defined(STM32L4)
  3186. #define __HAL_RCC_SDIO_FORCE_RESET         __HAL_RCC_SDMMC1_FORCE_RESET
  3187. #define __HAL_RCC_SDIO_RELEASE_RESET       __HAL_RCC_SDMMC1_RELEASE_RESET
  3188. #define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE    __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE
  3189. #define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE   __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE
  3190. #define __HAL_RCC_SDIO_CLK_ENABLE          __HAL_RCC_SDMMC1_CLK_ENABLE
  3191. #define __HAL_RCC_SDIO_CLK_DISABLE         __HAL_RCC_SDMMC1_CLK_DISABLE
  3192. #define __HAL_RCC_SDIO_IS_CLK_ENABLED      __HAL_RCC_SDMMC1_IS_CLK_ENABLED
  3193. #define __HAL_RCC_SDIO_IS_CLK_DISABLED     __HAL_RCC_SDMMC1_IS_CLK_DISABLED
  3194. #define SdioClockSelection                 Sdmmc1ClockSelection
  3195. #define RCC_PERIPHCLK_SDIO                 RCC_PERIPHCLK_SDMMC1
  3196. #define __HAL_RCC_SDIO_CONFIG              __HAL_RCC_SDMMC1_CONFIG
  3197. #define __HAL_RCC_GET_SDIO_SOURCE          __HAL_RCC_GET_SDMMC1_SOURCE
  3198. #endif
  3199.  
  3200. #if defined(STM32F7)
  3201. #define RCC_SDIOCLKSOURCE_CLK48             RCC_SDMMC1CLKSOURCE_CLK48
  3202. #define RCC_SDIOCLKSOURCE_SYSCLK           RCC_SDMMC1CLKSOURCE_SYSCLK
  3203. #endif
  3204.  
  3205. #if defined(STM32H7)
  3206. #define __HAL_RCC_USB_OTG_HS_CLK_ENABLE()              __HAL_RCC_USB1_OTG_HS_CLK_ENABLE()
  3207. #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE()         __HAL_RCC_USB1_OTG_HS_ULPI_CLK_ENABLE()
  3208. #define __HAL_RCC_USB_OTG_HS_CLK_DISABLE()             __HAL_RCC_USB1_OTG_HS_CLK_DISABLE()
  3209. #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE()        __HAL_RCC_USB1_OTG_HS_ULPI_CLK_DISABLE()
  3210. #define __HAL_RCC_USB_OTG_HS_FORCE_RESET()             __HAL_RCC_USB1_OTG_HS_FORCE_RESET()
  3211. #define __HAL_RCC_USB_OTG_HS_RELEASE_RESET()           __HAL_RCC_USB1_OTG_HS_RELEASE_RESET()
  3212. #define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE()        __HAL_RCC_USB1_OTG_HS_CLK_SLEEP_ENABLE()
  3213. #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE()   __HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_ENABLE()
  3214. #define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE()       __HAL_RCC_USB1_OTG_HS_CLK_SLEEP_DISABLE()
  3215. #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE()  __HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_DISABLE()
  3216.  
  3217. #define __HAL_RCC_USB_OTG_FS_CLK_ENABLE()             __HAL_RCC_USB2_OTG_FS_CLK_ENABLE()
  3218. #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_ENABLE()        __HAL_RCC_USB2_OTG_FS_ULPI_CLK_ENABLE()
  3219. #define __HAL_RCC_USB_OTG_FS_CLK_DISABLE()            __HAL_RCC_USB2_OTG_FS_CLK_DISABLE()
  3220. #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_DISABLE()       __HAL_RCC_USB2_OTG_FS_ULPI_CLK_DISABLE()
  3221. #define __HAL_RCC_USB_OTG_FS_FORCE_RESET()            __HAL_RCC_USB2_OTG_FS_FORCE_RESET()
  3222. #define __HAL_RCC_USB_OTG_FS_RELEASE_RESET()          __HAL_RCC_USB2_OTG_FS_RELEASE_RESET()
  3223. #define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE()       __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_ENABLE()
  3224. #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_ENABLE()  __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_ENABLE()
  3225. #define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE()      __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_DISABLE()
  3226. #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE()
  3227. #endif
  3228.  
  3229. #define __HAL_RCC_I2SCLK            __HAL_RCC_I2S_CONFIG
  3230. #define __HAL_RCC_I2SCLK_CONFIG     __HAL_RCC_I2S_CONFIG
  3231.  
  3232. #define __RCC_PLLSRC                RCC_GET_PLL_OSCSOURCE
  3233.  
  3234. #define IS_RCC_MSIRANGE             IS_RCC_MSI_CLOCK_RANGE
  3235. #define IS_RCC_RTCCLK_SOURCE        IS_RCC_RTCCLKSOURCE
  3236. #define IS_RCC_SYSCLK_DIV           IS_RCC_HCLK
  3237. #define IS_RCC_HCLK_DIV             IS_RCC_PCLK
  3238. #define IS_RCC_PERIPHCLK            IS_RCC_PERIPHCLOCK
  3239.  
  3240. #define RCC_IT_HSI14                RCC_IT_HSI14RDY
  3241.  
  3242. #define RCC_IT_CSSLSE               RCC_IT_LSECSS
  3243. #define RCC_IT_CSSHSE               RCC_IT_CSS
  3244.  
  3245. #define RCC_PLLMUL_3                RCC_PLL_MUL3
  3246. #define RCC_PLLMUL_4                RCC_PLL_MUL4
  3247. #define RCC_PLLMUL_6                RCC_PLL_MUL6
  3248. #define RCC_PLLMUL_8                RCC_PLL_MUL8
  3249. #define RCC_PLLMUL_12               RCC_PLL_MUL12
  3250. #define RCC_PLLMUL_16               RCC_PLL_MUL16
  3251. #define RCC_PLLMUL_24               RCC_PLL_MUL24
  3252. #define RCC_PLLMUL_32               RCC_PLL_MUL32
  3253. #define RCC_PLLMUL_48               RCC_PLL_MUL48
  3254.  
  3255. #define RCC_PLLDIV_2                RCC_PLL_DIV2
  3256. #define RCC_PLLDIV_3                RCC_PLL_DIV3
  3257. #define RCC_PLLDIV_4                RCC_PLL_DIV4
  3258.  
  3259. #define IS_RCC_MCOSOURCE            IS_RCC_MCO1SOURCE
  3260. #define __HAL_RCC_MCO_CONFIG        __HAL_RCC_MCO1_CONFIG
  3261. #define RCC_MCO_NODIV               RCC_MCODIV_1
  3262. #define RCC_MCO_DIV1                RCC_MCODIV_1
  3263. #define RCC_MCO_DIV2                RCC_MCODIV_2
  3264. #define RCC_MCO_DIV4                RCC_MCODIV_4
  3265. #define RCC_MCO_DIV8                RCC_MCODIV_8
  3266. #define RCC_MCO_DIV16               RCC_MCODIV_16
  3267. #define RCC_MCO_DIV32               RCC_MCODIV_32
  3268. #define RCC_MCO_DIV64               RCC_MCODIV_64
  3269. #define RCC_MCO_DIV128              RCC_MCODIV_128
  3270. #define RCC_MCOSOURCE_NONE          RCC_MCO1SOURCE_NOCLOCK
  3271. #define RCC_MCOSOURCE_LSI           RCC_MCO1SOURCE_LSI
  3272. #define RCC_MCOSOURCE_LSE           RCC_MCO1SOURCE_LSE
  3273. #define RCC_MCOSOURCE_SYSCLK        RCC_MCO1SOURCE_SYSCLK
  3274. #define RCC_MCOSOURCE_HSI           RCC_MCO1SOURCE_HSI
  3275. #define RCC_MCOSOURCE_HSI14         RCC_MCO1SOURCE_HSI14
  3276. #define RCC_MCOSOURCE_HSI48         RCC_MCO1SOURCE_HSI48
  3277. #define RCC_MCOSOURCE_HSE           RCC_MCO1SOURCE_HSE
  3278. #define RCC_MCOSOURCE_PLLCLK_DIV1   RCC_MCO1SOURCE_PLLCLK
  3279. #define RCC_MCOSOURCE_PLLCLK_NODIV  RCC_MCO1SOURCE_PLLCLK
  3280. #define RCC_MCOSOURCE_PLLCLK_DIV2   RCC_MCO1SOURCE_PLLCLK_DIV2
  3281.  
  3282. #if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || defined(STM32WL)
  3283. #define RCC_RTCCLKSOURCE_NO_CLK     RCC_RTCCLKSOURCE_NONE
  3284. #else
  3285. #define RCC_RTCCLKSOURCE_NONE       RCC_RTCCLKSOURCE_NO_CLK
  3286. #endif
  3287.  
  3288. #define RCC_USBCLK_PLLSAI1          RCC_USBCLKSOURCE_PLLSAI1
  3289. #define RCC_USBCLK_PLL              RCC_USBCLKSOURCE_PLL
  3290. #define RCC_USBCLK_MSI              RCC_USBCLKSOURCE_MSI
  3291. #define RCC_USBCLKSOURCE_PLLCLK     RCC_USBCLKSOURCE_PLL
  3292. #define RCC_USBPLLCLK_DIV1          RCC_USBCLKSOURCE_PLL
  3293. #define RCC_USBPLLCLK_DIV1_5        RCC_USBCLKSOURCE_PLL_DIV1_5
  3294. #define RCC_USBPLLCLK_DIV2          RCC_USBCLKSOURCE_PLL_DIV2
  3295. #define RCC_USBPLLCLK_DIV3          RCC_USBCLKSOURCE_PLL_DIV3
  3296.  
  3297. #define HSION_BitNumber        RCC_HSION_BIT_NUMBER
  3298. #define HSION_BITNUMBER        RCC_HSION_BIT_NUMBER
  3299. #define HSEON_BitNumber        RCC_HSEON_BIT_NUMBER
  3300. #define HSEON_BITNUMBER        RCC_HSEON_BIT_NUMBER
  3301. #define MSION_BITNUMBER        RCC_MSION_BIT_NUMBER
  3302. #define CSSON_BitNumber        RCC_CSSON_BIT_NUMBER
  3303. #define CSSON_BITNUMBER        RCC_CSSON_BIT_NUMBER
  3304. #define PLLON_BitNumber        RCC_PLLON_BIT_NUMBER
  3305. #define PLLON_BITNUMBER        RCC_PLLON_BIT_NUMBER
  3306. #define PLLI2SON_BitNumber     RCC_PLLI2SON_BIT_NUMBER
  3307. #define I2SSRC_BitNumber       RCC_I2SSRC_BIT_NUMBER
  3308. #define RTCEN_BitNumber        RCC_RTCEN_BIT_NUMBER
  3309. #define RTCEN_BITNUMBER        RCC_RTCEN_BIT_NUMBER
  3310. #define BDRST_BitNumber        RCC_BDRST_BIT_NUMBER
  3311. #define BDRST_BITNUMBER        RCC_BDRST_BIT_NUMBER
  3312. #define RTCRST_BITNUMBER       RCC_RTCRST_BIT_NUMBER
  3313. #define LSION_BitNumber        RCC_LSION_BIT_NUMBER
  3314. #define LSION_BITNUMBER        RCC_LSION_BIT_NUMBER
  3315. #define LSEON_BitNumber        RCC_LSEON_BIT_NUMBER
  3316. #define LSEON_BITNUMBER        RCC_LSEON_BIT_NUMBER
  3317. #define LSEBYP_BITNUMBER       RCC_LSEBYP_BIT_NUMBER
  3318. #define PLLSAION_BitNumber     RCC_PLLSAION_BIT_NUMBER
  3319. #define TIMPRE_BitNumber       RCC_TIMPRE_BIT_NUMBER
  3320. #define RMVF_BitNumber         RCC_RMVF_BIT_NUMBER
  3321. #define RMVF_BITNUMBER         RCC_RMVF_BIT_NUMBER
  3322. #define RCC_CR2_HSI14TRIM_BitNumber RCC_HSI14TRIM_BIT_NUMBER
  3323. #define CR_BYTE2_ADDRESS       RCC_CR_BYTE2_ADDRESS
  3324. #define CIR_BYTE1_ADDRESS      RCC_CIR_BYTE1_ADDRESS
  3325. #define CIR_BYTE2_ADDRESS      RCC_CIR_BYTE2_ADDRESS
  3326. #define BDCR_BYTE0_ADDRESS     RCC_BDCR_BYTE0_ADDRESS
  3327. #define DBP_TIMEOUT_VALUE      RCC_DBP_TIMEOUT_VALUE
  3328. #define LSE_TIMEOUT_VALUE      RCC_LSE_TIMEOUT_VALUE
  3329.  
  3330. #define CR_HSION_BB            RCC_CR_HSION_BB
  3331. #define CR_CSSON_BB            RCC_CR_CSSON_BB
  3332. #define CR_PLLON_BB            RCC_CR_PLLON_BB
  3333. #define CR_PLLI2SON_BB         RCC_CR_PLLI2SON_BB
  3334. #define CR_MSION_BB            RCC_CR_MSION_BB
  3335. #define CSR_LSION_BB           RCC_CSR_LSION_BB
  3336. #define CSR_LSEON_BB           RCC_CSR_LSEON_BB
  3337. #define CSR_LSEBYP_BB          RCC_CSR_LSEBYP_BB
  3338. #define CSR_RTCEN_BB           RCC_CSR_RTCEN_BB
  3339. #define CSR_RTCRST_BB          RCC_CSR_RTCRST_BB
  3340. #define CFGR_I2SSRC_BB         RCC_CFGR_I2SSRC_BB
  3341. #define BDCR_RTCEN_BB          RCC_BDCR_RTCEN_BB
  3342. #define BDCR_BDRST_BB          RCC_BDCR_BDRST_BB
  3343. #define CR_HSEON_BB            RCC_CR_HSEON_BB
  3344. #define CSR_RMVF_BB            RCC_CSR_RMVF_BB
  3345. #define CR_PLLSAION_BB         RCC_CR_PLLSAION_BB
  3346. #define DCKCFGR_TIMPRE_BB      RCC_DCKCFGR_TIMPRE_BB
  3347.  
  3348. #define __HAL_RCC_CRS_ENABLE_FREQ_ERROR_COUNTER     __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE
  3349. #define __HAL_RCC_CRS_DISABLE_FREQ_ERROR_COUNTER    __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE
  3350. #define __HAL_RCC_CRS_ENABLE_AUTOMATIC_CALIB        __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE
  3351. #define __HAL_RCC_CRS_DISABLE_AUTOMATIC_CALIB       __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE
  3352. #define __HAL_RCC_CRS_CALCULATE_RELOADVALUE         __HAL_RCC_CRS_RELOADVALUE_CALCULATE
  3353.  
  3354. #define __HAL_RCC_GET_IT_SOURCE                     __HAL_RCC_GET_IT
  3355.  
  3356. #define RCC_CRS_SYNCWARM       RCC_CRS_SYNCWARN
  3357. #define RCC_CRS_TRIMOV         RCC_CRS_TRIMOVF
  3358.  
  3359. #define RCC_PERIPHCLK_CK48               RCC_PERIPHCLK_CLK48
  3360. #define RCC_CK48CLKSOURCE_PLLQ           RCC_CLK48CLKSOURCE_PLLQ
  3361. #define RCC_CK48CLKSOURCE_PLLSAIP        RCC_CLK48CLKSOURCE_PLLSAIP
  3362. #define RCC_CK48CLKSOURCE_PLLI2SQ        RCC_CLK48CLKSOURCE_PLLI2SQ
  3363. #define IS_RCC_CK48CLKSOURCE             IS_RCC_CLK48CLKSOURCE
  3364. #define RCC_SDIOCLKSOURCE_CK48           RCC_SDIOCLKSOURCE_CLK48
  3365.  
  3366. #define __HAL_RCC_DFSDM_CLK_ENABLE             __HAL_RCC_DFSDM1_CLK_ENABLE
  3367. #define __HAL_RCC_DFSDM_CLK_DISABLE            __HAL_RCC_DFSDM1_CLK_DISABLE
  3368. #define __HAL_RCC_DFSDM_IS_CLK_ENABLED         __HAL_RCC_DFSDM1_IS_CLK_ENABLED
  3369. #define __HAL_RCC_DFSDM_IS_CLK_DISABLED        __HAL_RCC_DFSDM1_IS_CLK_DISABLED
  3370. #define __HAL_RCC_DFSDM_FORCE_RESET            __HAL_RCC_DFSDM1_FORCE_RESET
  3371. #define __HAL_RCC_DFSDM_RELEASE_RESET          __HAL_RCC_DFSDM1_RELEASE_RESET
  3372. #define __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE       __HAL_RCC_DFSDM1_CLK_SLEEP_ENABLE
  3373. #define __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE      __HAL_RCC_DFSDM1_CLK_SLEEP_DISABLE
  3374. #define __HAL_RCC_DFSDM_IS_CLK_SLEEP_ENABLED   __HAL_RCC_DFSDM1_IS_CLK_SLEEP_ENABLED
  3375. #define __HAL_RCC_DFSDM_IS_CLK_SLEEP_DISABLED  __HAL_RCC_DFSDM1_IS_CLK_SLEEP_DISABLED
  3376. #define DfsdmClockSelection         Dfsdm1ClockSelection
  3377. #define RCC_PERIPHCLK_DFSDM         RCC_PERIPHCLK_DFSDM1
  3378. #define RCC_DFSDMCLKSOURCE_PCLK     RCC_DFSDM1CLKSOURCE_PCLK2
  3379. #define RCC_DFSDMCLKSOURCE_SYSCLK   RCC_DFSDM1CLKSOURCE_SYSCLK
  3380. #define __HAL_RCC_DFSDM_CONFIG      __HAL_RCC_DFSDM1_CONFIG
  3381. #define __HAL_RCC_GET_DFSDM_SOURCE  __HAL_RCC_GET_DFSDM1_SOURCE
  3382. #define RCC_DFSDM1CLKSOURCE_PCLK    RCC_DFSDM1CLKSOURCE_PCLK2
  3383. #define RCC_SWPMI1CLKSOURCE_PCLK    RCC_SWPMI1CLKSOURCE_PCLK1
  3384. #define RCC_LPTIM1CLKSOURCE_PCLK    RCC_LPTIM1CLKSOURCE_PCLK1
  3385. #define RCC_LPTIM2CLKSOURCE_PCLK    RCC_LPTIM2CLKSOURCE_PCLK1
  3386.  
  3387. #define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1    RCC_DFSDM1AUDIOCLKSOURCE_I2S1
  3388. #define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2    RCC_DFSDM1AUDIOCLKSOURCE_I2S2
  3389. #define RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB1    RCC_DFSDM2AUDIOCLKSOURCE_I2S1
  3390. #define RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB2    RCC_DFSDM2AUDIOCLKSOURCE_I2S2
  3391. #define RCC_DFSDM1CLKSOURCE_APB2            RCC_DFSDM1CLKSOURCE_PCLK2
  3392. #define RCC_DFSDM2CLKSOURCE_APB2            RCC_DFSDM2CLKSOURCE_PCLK2
  3393. #define RCC_FMPI2C1CLKSOURCE_APB            RCC_FMPI2C1CLKSOURCE_PCLK1
  3394. #if defined(STM32U5)
  3395. #define MSIKPLLModeSEL  RCC_MSIKPLL_MODE_SEL
  3396. #define MSISPLLModeSEL  RCC_MSISPLL_MODE_SEL
  3397. #define __HAL_RCC_AHB21_CLK_DISABLE           __HAL_RCC_AHB2_1_CLK_DISABLE
  3398. #define __HAL_RCC_AHB22_CLK_DISABLE           __HAL_RCC_AHB2_2_CLK_DISABLE
  3399. #define __HAL_RCC_AHB1_CLK_Disable_Clear      __HAL_RCC_AHB1_CLK_ENABLE
  3400. #define __HAL_RCC_AHB21_CLK_Disable_Clear     __HAL_RCC_AHB2_1_CLK_ENABLE
  3401. #define __HAL_RCC_AHB22_CLK_Disable_Clear     __HAL_RCC_AHB2_2_CLK_ENABLE
  3402. #define __HAL_RCC_AHB3_CLK_Disable_Clear      __HAL_RCC_AHB3_CLK_ENABLE
  3403. #define __HAL_RCC_APB1_CLK_Disable_Clear      __HAL_RCC_APB1_CLK_ENABLE
  3404. #define __HAL_RCC_APB2_CLK_Disable_Clear      __HAL_RCC_APB2_CLK_ENABLE
  3405. #define __HAL_RCC_APB3_CLK_Disable_Clear      __HAL_RCC_APB3_CLK_ENABLE
  3406. #define IS_RCC_MSIPLLModeSelection            IS_RCC_MSIPLLMODE_SELECT
  3407. #endif
  3408. /**
  3409.   * @}
  3410.   */
  3411.  
  3412. /** @defgroup HAL_RNG_Aliased_Macros HAL RNG Aliased Macros maintained for legacy purpose
  3413.   * @{
  3414.   */
  3415. #define  HAL_RNG_ReadyCallback(__HANDLE__)  HAL_RNG_ReadyDataCallback((__HANDLE__), uint32_t random32bit)
  3416.  
  3417. /**
  3418.   * @}
  3419.   */
  3420.  
  3421. /** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
  3422.   * @{
  3423.   */
  3424. #if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5)
  3425. #else
  3426. #define __HAL_RTC_CLEAR_FLAG                      __HAL_RTC_EXTI_CLEAR_FLAG
  3427. #endif
  3428. #define __HAL_RTC_DISABLE_IT                      __HAL_RTC_EXTI_DISABLE_IT
  3429. #define __HAL_RTC_ENABLE_IT                       __HAL_RTC_EXTI_ENABLE_IT
  3430.  
  3431. #if defined (STM32F1)
  3432. #define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT)  __HAL_RTC_ALARM_EXTI_CLEAR_FLAG()
  3433.  
  3434. #define __HAL_RTC_EXTI_ENABLE_IT(RTC_EXTI_LINE_ALARM_EVENT)   __HAL_RTC_ALARM_EXTI_ENABLE_IT()
  3435.  
  3436. #define __HAL_RTC_EXTI_DISABLE_IT(RTC_EXTI_LINE_ALARM_EVENT)  __HAL_RTC_ALARM_EXTI_DISABLE_IT()
  3437.  
  3438. #define __HAL_RTC_EXTI_GET_FLAG(RTC_EXTI_LINE_ALARM_EVENT)    __HAL_RTC_ALARM_EXTI_GET_FLAG()
  3439.  
  3440. #define __HAL_RTC_EXTI_GENERATE_SWIT(RTC_EXTI_LINE_ALARM_EVENT)   __HAL_RTC_ALARM_EXTI_GENERATE_SWIT()
  3441. #else
  3442. #define __HAL_RTC_EXTI_CLEAR_FLAG(__EXTI_LINE__)  (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() : \
  3443.                                                    (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() : \
  3444.                                                     __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG()))
  3445. #define __HAL_RTC_EXTI_ENABLE_IT(__EXTI_LINE__)   (((__EXTI_LINE__)  == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_ENABLE_IT() : \
  3446.                                                    (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() : \
  3447.                                                     __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT()))
  3448. #define __HAL_RTC_EXTI_DISABLE_IT(__EXTI_LINE__)  (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_DISABLE_IT() : \
  3449.                                                    (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() : \
  3450.                                                     __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT()))
  3451. #define __HAL_RTC_EXTI_GET_FLAG(__EXTI_LINE__)    (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GET_FLAG() : \
  3452.                                                    (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() : \
  3453.                                                     __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG()))
  3454. #define __HAL_RTC_EXTI_GENERATE_SWIT(__EXTI_LINE__)   (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() : \
  3455.                                                        (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() :  \
  3456.                                                         __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT()))
  3457. #endif   /* STM32F1 */
  3458.  
  3459. #define IS_ALARM                                  IS_RTC_ALARM
  3460. #define IS_ALARM_MASK                             IS_RTC_ALARM_MASK
  3461. #define IS_TAMPER                                 IS_RTC_TAMPER
  3462. #define IS_TAMPER_ERASE_MODE                      IS_RTC_TAMPER_ERASE_MODE
  3463. #define IS_TAMPER_FILTER                          IS_RTC_TAMPER_FILTER
  3464. #define IS_TAMPER_INTERRUPT                       IS_RTC_TAMPER_INTERRUPT
  3465. #define IS_TAMPER_MASKFLAG_STATE                  IS_RTC_TAMPER_MASKFLAG_STATE
  3466. #define IS_TAMPER_PRECHARGE_DURATION              IS_RTC_TAMPER_PRECHARGE_DURATION
  3467. #define IS_TAMPER_PULLUP_STATE                    IS_RTC_TAMPER_PULLUP_STATE
  3468. #define IS_TAMPER_SAMPLING_FREQ                   IS_RTC_TAMPER_SAMPLING_FREQ
  3469. #define IS_TAMPER_TIMESTAMPONTAMPER_DETECTION     IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION
  3470. #define IS_TAMPER_TRIGGER                         IS_RTC_TAMPER_TRIGGER
  3471. #define IS_WAKEUP_CLOCK                           IS_RTC_WAKEUP_CLOCK
  3472. #define IS_WAKEUP_COUNTER                         IS_RTC_WAKEUP_COUNTER
  3473.  
  3474. #define __RTC_WRITEPROTECTION_ENABLE  __HAL_RTC_WRITEPROTECTION_ENABLE
  3475. #define __RTC_WRITEPROTECTION_DISABLE  __HAL_RTC_WRITEPROTECTION_DISABLE
  3476.  
  3477. /**
  3478.   * @}
  3479.   */
  3480.  
  3481. /** @defgroup HAL_SD_Aliased_Macros HAL SD/MMC Aliased Macros maintained for legacy purpose
  3482.   * @{
  3483.   */
  3484.  
  3485. #define SD_OCR_CID_CSD_OVERWRIETE   SD_OCR_CID_CSD_OVERWRITE
  3486. #define SD_CMD_SD_APP_STAUS         SD_CMD_SD_APP_STATUS
  3487.  
  3488. #if !defined(STM32F1) && !defined(STM32F2) && !defined(STM32F4) && !defined(STM32F7) && !defined(STM32L1)
  3489. #define eMMC_HIGH_VOLTAGE_RANGE     EMMC_HIGH_VOLTAGE_RANGE
  3490. #define eMMC_DUAL_VOLTAGE_RANGE     EMMC_DUAL_VOLTAGE_RANGE
  3491. #define eMMC_LOW_VOLTAGE_RANGE      EMMC_LOW_VOLTAGE_RANGE
  3492.  
  3493. #define SDMMC_NSpeed_CLK_DIV        SDMMC_NSPEED_CLK_DIV
  3494. #define SDMMC_HSpeed_CLK_DIV        SDMMC_HSPEED_CLK_DIV
  3495. #endif
  3496.  
  3497. #if defined(STM32F4) || defined(STM32F2)
  3498. #define  SD_SDMMC_DISABLED          SD_SDIO_DISABLED
  3499. #define  SD_SDMMC_FUNCTION_BUSY     SD_SDIO_FUNCTION_BUSY
  3500. #define  SD_SDMMC_FUNCTION_FAILED   SD_SDIO_FUNCTION_FAILED
  3501. #define  SD_SDMMC_UNKNOWN_FUNCTION  SD_SDIO_UNKNOWN_FUNCTION
  3502. #define  SD_CMD_SDMMC_SEN_OP_COND   SD_CMD_SDIO_SEN_OP_COND
  3503. #define  SD_CMD_SDMMC_RW_DIRECT     SD_CMD_SDIO_RW_DIRECT
  3504. #define  SD_CMD_SDMMC_RW_EXTENDED   SD_CMD_SDIO_RW_EXTENDED
  3505. #define  __HAL_SD_SDMMC_ENABLE      __HAL_SD_SDIO_ENABLE
  3506. #define  __HAL_SD_SDMMC_DISABLE     __HAL_SD_SDIO_DISABLE
  3507. #define  __HAL_SD_SDMMC_DMA_ENABLE  __HAL_SD_SDIO_DMA_ENABLE
  3508. #define  __HAL_SD_SDMMC_DMA_DISABLE __HAL_SD_SDIO_DMA_DISABL
  3509. #define  __HAL_SD_SDMMC_ENABLE_IT   __HAL_SD_SDIO_ENABLE_IT
  3510. #define  __HAL_SD_SDMMC_DISABLE_IT  __HAL_SD_SDIO_DISABLE_IT
  3511. #define  __HAL_SD_SDMMC_GET_FLAG    __HAL_SD_SDIO_GET_FLAG
  3512. #define  __HAL_SD_SDMMC_CLEAR_FLAG  __HAL_SD_SDIO_CLEAR_FLAG
  3513. #define  __HAL_SD_SDMMC_GET_IT      __HAL_SD_SDIO_GET_IT
  3514. #define  __HAL_SD_SDMMC_CLEAR_IT    __HAL_SD_SDIO_CLEAR_IT
  3515. #define  SDMMC_STATIC_FLAGS         SDIO_STATIC_FLAGS
  3516. #define  SDMMC_CMD0TIMEOUT          SDIO_CMD0TIMEOUT
  3517. #define  SD_SDMMC_SEND_IF_COND      SD_SDIO_SEND_IF_COND
  3518. /* alias CMSIS */
  3519. #define  SDMMC1_IRQn                SDIO_IRQn
  3520. #define  SDMMC1_IRQHandler          SDIO_IRQHandler
  3521. #endif
  3522.  
  3523. #if defined(STM32F7) || defined(STM32L4)
  3524. #define  SD_SDIO_DISABLED           SD_SDMMC_DISABLED
  3525. #define  SD_SDIO_FUNCTION_BUSY      SD_SDMMC_FUNCTION_BUSY
  3526. #define  SD_SDIO_FUNCTION_FAILED    SD_SDMMC_FUNCTION_FAILED
  3527. #define  SD_SDIO_UNKNOWN_FUNCTION   SD_SDMMC_UNKNOWN_FUNCTION
  3528. #define  SD_CMD_SDIO_SEN_OP_COND    SD_CMD_SDMMC_SEN_OP_COND
  3529. #define  SD_CMD_SDIO_RW_DIRECT      SD_CMD_SDMMC_RW_DIRECT
  3530. #define  SD_CMD_SDIO_RW_EXTENDED    SD_CMD_SDMMC_RW_EXTENDED
  3531. #define  __HAL_SD_SDIO_ENABLE       __HAL_SD_SDMMC_ENABLE
  3532. #define  __HAL_SD_SDIO_DISABLE      __HAL_SD_SDMMC_DISABLE
  3533. #define  __HAL_SD_SDIO_DMA_ENABLE   __HAL_SD_SDMMC_DMA_ENABLE
  3534. #define  __HAL_SD_SDIO_DMA_DISABL   __HAL_SD_SDMMC_DMA_DISABLE
  3535. #define  __HAL_SD_SDIO_ENABLE_IT    __HAL_SD_SDMMC_ENABLE_IT
  3536. #define  __HAL_SD_SDIO_DISABLE_IT   __HAL_SD_SDMMC_DISABLE_IT
  3537. #define  __HAL_SD_SDIO_GET_FLAG     __HAL_SD_SDMMC_GET_FLAG
  3538. #define  __HAL_SD_SDIO_CLEAR_FLAG   __HAL_SD_SDMMC_CLEAR_FLAG
  3539. #define  __HAL_SD_SDIO_GET_IT       __HAL_SD_SDMMC_GET_IT
  3540. #define  __HAL_SD_SDIO_CLEAR_IT     __HAL_SD_SDMMC_CLEAR_IT
  3541. #define  SDIO_STATIC_FLAGS          SDMMC_STATIC_FLAGS
  3542. #define  SDIO_CMD0TIMEOUT           SDMMC_CMD0TIMEOUT
  3543. #define  SD_SDIO_SEND_IF_COND       SD_SDMMC_SEND_IF_COND
  3544. /* alias CMSIS for compatibilities */
  3545. #define  SDIO_IRQn                  SDMMC1_IRQn
  3546. #define  SDIO_IRQHandler            SDMMC1_IRQHandler
  3547. #endif
  3548.  
  3549. #if defined(STM32F7) || defined(STM32F4) || defined(STM32F2) || defined(STM32L4) || defined(STM32H7)
  3550. #define  HAL_SD_CardCIDTypedef       HAL_SD_CardCIDTypeDef
  3551. #define  HAL_SD_CardCSDTypedef       HAL_SD_CardCSDTypeDef
  3552. #define  HAL_SD_CardStatusTypedef    HAL_SD_CardStatusTypeDef
  3553. #define  HAL_SD_CardStateTypedef     HAL_SD_CardStateTypeDef
  3554. #endif
  3555.  
  3556. #if defined(STM32H7) || defined(STM32L5)
  3557. #define HAL_MMCEx_Read_DMADoubleBuffer0CpltCallback   HAL_MMCEx_Read_DMADoubleBuf0CpltCallback
  3558. #define HAL_MMCEx_Read_DMADoubleBuffer1CpltCallback   HAL_MMCEx_Read_DMADoubleBuf1CpltCallback
  3559. #define HAL_MMCEx_Write_DMADoubleBuffer0CpltCallback  HAL_MMCEx_Write_DMADoubleBuf0CpltCallback
  3560. #define HAL_MMCEx_Write_DMADoubleBuffer1CpltCallback  HAL_MMCEx_Write_DMADoubleBuf1CpltCallback
  3561. #define HAL_SDEx_Read_DMADoubleBuffer0CpltCallback    HAL_SDEx_Read_DMADoubleBuf0CpltCallback
  3562. #define HAL_SDEx_Read_DMADoubleBuffer1CpltCallback    HAL_SDEx_Read_DMADoubleBuf1CpltCallback
  3563. #define HAL_SDEx_Write_DMADoubleBuffer0CpltCallback   HAL_SDEx_Write_DMADoubleBuf0CpltCallback
  3564. #define HAL_SDEx_Write_DMADoubleBuffer1CpltCallback   HAL_SDEx_Write_DMADoubleBuf1CpltCallback
  3565. #define HAL_SD_DriveTransciver_1_8V_Callback          HAL_SD_DriveTransceiver_1_8V_Callback
  3566. #endif
  3567. /**
  3568.   * @}
  3569.   */
  3570.  
  3571. /** @defgroup HAL_SMARTCARD_Aliased_Macros HAL SMARTCARD Aliased Macros maintained for legacy purpose
  3572.   * @{
  3573.   */
  3574.  
  3575. #define __SMARTCARD_ENABLE_IT           __HAL_SMARTCARD_ENABLE_IT
  3576. #define __SMARTCARD_DISABLE_IT          __HAL_SMARTCARD_DISABLE_IT
  3577. #define __SMARTCARD_ENABLE              __HAL_SMARTCARD_ENABLE
  3578. #define __SMARTCARD_DISABLE             __HAL_SMARTCARD_DISABLE
  3579. #define __SMARTCARD_DMA_REQUEST_ENABLE  __HAL_SMARTCARD_DMA_REQUEST_ENABLE
  3580. #define __SMARTCARD_DMA_REQUEST_DISABLE __HAL_SMARTCARD_DMA_REQUEST_DISABLE
  3581.  
  3582. #define __HAL_SMARTCARD_GETCLOCKSOURCE  SMARTCARD_GETCLOCKSOURCE
  3583. #define __SMARTCARD_GETCLOCKSOURCE      SMARTCARD_GETCLOCKSOURCE
  3584.  
  3585. #define IS_SMARTCARD_ONEBIT_SAMPLING    IS_SMARTCARD_ONE_BIT_SAMPLE
  3586.  
  3587. /**
  3588.   * @}
  3589.   */
  3590.  
  3591. /** @defgroup HAL_SMBUS_Aliased_Macros HAL SMBUS Aliased Macros maintained for legacy purpose
  3592.   * @{
  3593.   */
  3594. #define __HAL_SMBUS_RESET_CR1           SMBUS_RESET_CR1
  3595. #define __HAL_SMBUS_RESET_CR2           SMBUS_RESET_CR2
  3596. #define __HAL_SMBUS_GENERATE_START      SMBUS_GENERATE_START
  3597. #define __HAL_SMBUS_GET_ADDR_MATCH      SMBUS_GET_ADDR_MATCH
  3598. #define __HAL_SMBUS_GET_DIR             SMBUS_GET_DIR
  3599. #define __HAL_SMBUS_GET_STOP_MODE       SMBUS_GET_STOP_MODE
  3600. #define __HAL_SMBUS_GET_PEC_MODE        SMBUS_GET_PEC_MODE
  3601. #define __HAL_SMBUS_GET_ALERT_ENABLED   SMBUS_GET_ALERT_ENABLED
  3602. /**
  3603.   * @}
  3604.   */
  3605.  
  3606. /** @defgroup HAL_SPI_Aliased_Macros HAL SPI Aliased Macros maintained for legacy purpose
  3607.   * @{
  3608.   */
  3609.  
  3610. #define __HAL_SPI_1LINE_TX              SPI_1LINE_TX
  3611. #define __HAL_SPI_1LINE_RX              SPI_1LINE_RX
  3612. #define __HAL_SPI_RESET_CRC             SPI_RESET_CRC
  3613.  
  3614. /**
  3615.   * @}
  3616.   */
  3617.  
  3618. /** @defgroup HAL_UART_Aliased_Macros HAL UART Aliased Macros maintained for legacy purpose
  3619.   * @{
  3620.   */
  3621.  
  3622. #define __HAL_UART_GETCLOCKSOURCE       UART_GETCLOCKSOURCE
  3623. #define __HAL_UART_MASK_COMPUTATION     UART_MASK_COMPUTATION
  3624. #define __UART_GETCLOCKSOURCE           UART_GETCLOCKSOURCE
  3625. #define __UART_MASK_COMPUTATION         UART_MASK_COMPUTATION
  3626.  
  3627. #define IS_UART_WAKEUPMETHODE           IS_UART_WAKEUPMETHOD
  3628.  
  3629. #define IS_UART_ONEBIT_SAMPLE           IS_UART_ONE_BIT_SAMPLE
  3630. #define IS_UART_ONEBIT_SAMPLING         IS_UART_ONE_BIT_SAMPLE
  3631.  
  3632. /**
  3633.   * @}
  3634.   */
  3635.  
  3636.  
  3637. /** @defgroup HAL_USART_Aliased_Macros HAL USART Aliased Macros maintained for legacy purpose
  3638.   * @{
  3639.   */
  3640.  
  3641. #define __USART_ENABLE_IT               __HAL_USART_ENABLE_IT
  3642. #define __USART_DISABLE_IT              __HAL_USART_DISABLE_IT
  3643. #define __USART_ENABLE                  __HAL_USART_ENABLE
  3644. #define __USART_DISABLE                 __HAL_USART_DISABLE
  3645.  
  3646. #define __HAL_USART_GETCLOCKSOURCE      USART_GETCLOCKSOURCE
  3647. #define __USART_GETCLOCKSOURCE          USART_GETCLOCKSOURCE
  3648.  
  3649. #if defined(STM32F0) || defined(STM32F3) || defined(STM32F7)
  3650. #define USART_OVERSAMPLING_16               0x00000000U
  3651. #define USART_OVERSAMPLING_8                USART_CR1_OVER8
  3652.  
  3653. #define IS_USART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == USART_OVERSAMPLING_16) || \
  3654.                                              ((__SAMPLING__) == USART_OVERSAMPLING_8))
  3655. #endif /* STM32F0 || STM32F3 || STM32F7 */
  3656. /**
  3657.   * @}
  3658.   */
  3659.  
  3660. /** @defgroup HAL_USB_Aliased_Macros HAL USB Aliased Macros maintained for legacy purpose
  3661.   * @{
  3662.   */
  3663. #define USB_EXTI_LINE_WAKEUP                               USB_WAKEUP_EXTI_LINE
  3664.  
  3665. #define USB_FS_EXTI_TRIGGER_RISING_EDGE                    USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE
  3666. #define USB_FS_EXTI_TRIGGER_FALLING_EDGE                   USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE
  3667. #define USB_FS_EXTI_TRIGGER_BOTH_EDGE                      USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE
  3668. #define USB_FS_EXTI_LINE_WAKEUP                            USB_OTG_FS_WAKEUP_EXTI_LINE
  3669.  
  3670. #define USB_HS_EXTI_TRIGGER_RISING_EDGE                    USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE
  3671. #define USB_HS_EXTI_TRIGGER_FALLING_EDGE                   USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE
  3672. #define USB_HS_EXTI_TRIGGER_BOTH_EDGE                      USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE
  3673. #define USB_HS_EXTI_LINE_WAKEUP                            USB_OTG_HS_WAKEUP_EXTI_LINE
  3674.  
  3675. #define __HAL_USB_EXTI_ENABLE_IT                           __HAL_USB_WAKEUP_EXTI_ENABLE_IT
  3676. #define __HAL_USB_EXTI_DISABLE_IT                          __HAL_USB_WAKEUP_EXTI_DISABLE_IT
  3677. #define __HAL_USB_EXTI_GET_FLAG                            __HAL_USB_WAKEUP_EXTI_GET_FLAG
  3678. #define __HAL_USB_EXTI_CLEAR_FLAG                          __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG
  3679. #define __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER             __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE
  3680. #define __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER            __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE
  3681. #define __HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER           __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
  3682.  
  3683. #define __HAL_USB_FS_EXTI_ENABLE_IT                        __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT
  3684. #define __HAL_USB_FS_EXTI_DISABLE_IT                       __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT
  3685. #define __HAL_USB_FS_EXTI_GET_FLAG                         __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG
  3686. #define __HAL_USB_FS_EXTI_CLEAR_FLAG                       __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG
  3687. #define __HAL_USB_FS_EXTI_SET_RISING_EGDE_TRIGGER          __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE
  3688. #define __HAL_USB_FS_EXTI_SET_FALLING_EGDE_TRIGGER         __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
  3689. #define __HAL_USB_FS_EXTI_SET_FALLINGRISING_TRIGGER        __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
  3690. #define __HAL_USB_FS_EXTI_GENERATE_SWIT                    __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT
  3691.  
  3692. #define __HAL_USB_HS_EXTI_ENABLE_IT                        __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT
  3693. #define __HAL_USB_HS_EXTI_DISABLE_IT                       __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT
  3694. #define __HAL_USB_HS_EXTI_GET_FLAG                         __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG
  3695. #define __HAL_USB_HS_EXTI_CLEAR_FLAG                       __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG
  3696. #define __HAL_USB_HS_EXTI_SET_RISING_EGDE_TRIGGER          __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE
  3697. #define __HAL_USB_HS_EXTI_SET_FALLING_EGDE_TRIGGER         __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
  3698. #define __HAL_USB_HS_EXTI_SET_FALLINGRISING_TRIGGER        __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
  3699. #define __HAL_USB_HS_EXTI_GENERATE_SWIT                    __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT
  3700.  
  3701. #define HAL_PCD_ActiveRemoteWakeup                         HAL_PCD_ActivateRemoteWakeup
  3702. #define HAL_PCD_DeActiveRemoteWakeup                       HAL_PCD_DeActivateRemoteWakeup
  3703.  
  3704. #define HAL_PCD_SetTxFiFo                                  HAL_PCDEx_SetTxFiFo
  3705. #define HAL_PCD_SetRxFiFo                                  HAL_PCDEx_SetRxFiFo
  3706. /**
  3707.   * @}
  3708.   */
  3709.  
  3710. /** @defgroup HAL_TIM_Aliased_Macros HAL TIM Aliased Macros maintained for legacy purpose
  3711.   * @{
  3712.   */
  3713. #define __HAL_TIM_SetICPrescalerValue   TIM_SET_ICPRESCALERVALUE
  3714. #define __HAL_TIM_ResetICPrescalerValue TIM_RESET_ICPRESCALERVALUE
  3715.  
  3716. #define TIM_GET_ITSTATUS                __HAL_TIM_GET_IT_SOURCE
  3717. #define TIM_GET_CLEAR_IT                __HAL_TIM_CLEAR_IT
  3718.  
  3719. #define __HAL_TIM_GET_ITSTATUS          __HAL_TIM_GET_IT_SOURCE
  3720.  
  3721. #define __HAL_TIM_DIRECTION_STATUS      __HAL_TIM_IS_TIM_COUNTING_DOWN
  3722. #define __HAL_TIM_PRESCALER             __HAL_TIM_SET_PRESCALER
  3723. #define __HAL_TIM_SetCounter            __HAL_TIM_SET_COUNTER
  3724. #define __HAL_TIM_GetCounter            __HAL_TIM_GET_COUNTER
  3725. #define __HAL_TIM_SetAutoreload         __HAL_TIM_SET_AUTORELOAD
  3726. #define __HAL_TIM_GetAutoreload         __HAL_TIM_GET_AUTORELOAD
  3727. #define __HAL_TIM_SetClockDivision      __HAL_TIM_SET_CLOCKDIVISION
  3728. #define __HAL_TIM_GetClockDivision      __HAL_TIM_GET_CLOCKDIVISION
  3729. #define __HAL_TIM_SetICPrescaler        __HAL_TIM_SET_ICPRESCALER
  3730. #define __HAL_TIM_GetICPrescaler        __HAL_TIM_GET_ICPRESCALER
  3731. #define __HAL_TIM_SetCompare            __HAL_TIM_SET_COMPARE
  3732. #define __HAL_TIM_GetCompare            __HAL_TIM_GET_COMPARE
  3733.  
  3734. #define TIM_BREAKINPUTSOURCE_DFSDM  TIM_BREAKINPUTSOURCE_DFSDM1
  3735. /**
  3736.   * @}
  3737.   */
  3738.  
  3739. /** @defgroup HAL_ETH_Aliased_Macros HAL ETH Aliased Macros maintained for legacy purpose
  3740.   * @{
  3741.   */
  3742.  
  3743. #define __HAL_ETH_EXTI_ENABLE_IT                   __HAL_ETH_WAKEUP_EXTI_ENABLE_IT
  3744. #define __HAL_ETH_EXTI_DISABLE_IT                  __HAL_ETH_WAKEUP_EXTI_DISABLE_IT
  3745. #define __HAL_ETH_EXTI_GET_FLAG                    __HAL_ETH_WAKEUP_EXTI_GET_FLAG
  3746. #define __HAL_ETH_EXTI_CLEAR_FLAG                  __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG
  3747. #define __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER     __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER
  3748. #define __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER    __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER
  3749. #define __HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER   __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER
  3750.  
  3751. #define ETH_PROMISCIOUSMODE_ENABLE   ETH_PROMISCUOUS_MODE_ENABLE
  3752. #define ETH_PROMISCIOUSMODE_DISABLE  ETH_PROMISCUOUS_MODE_DISABLE
  3753. #define IS_ETH_PROMISCIOUS_MODE      IS_ETH_PROMISCUOUS_MODE
  3754. /**
  3755.   * @}
  3756.   */
  3757.  
  3758. /** @defgroup HAL_LTDC_Aliased_Macros HAL LTDC Aliased Macros maintained for legacy purpose
  3759.   * @{
  3760.   */
  3761. #define __HAL_LTDC_LAYER LTDC_LAYER
  3762. #define __HAL_LTDC_RELOAD_CONFIG  __HAL_LTDC_RELOAD_IMMEDIATE_CONFIG
  3763. /**
  3764.   * @}
  3765.   */
  3766.  
  3767. /** @defgroup HAL_SAI_Aliased_Macros HAL SAI Aliased Macros maintained for legacy purpose
  3768.   * @{
  3769.   */
  3770. #define SAI_OUTPUTDRIVE_DISABLED          SAI_OUTPUTDRIVE_DISABLE
  3771. #define SAI_OUTPUTDRIVE_ENABLED           SAI_OUTPUTDRIVE_ENABLE
  3772. #define SAI_MASTERDIVIDER_ENABLED         SAI_MASTERDIVIDER_ENABLE
  3773. #define SAI_MASTERDIVIDER_DISABLED        SAI_MASTERDIVIDER_DISABLE
  3774. #define SAI_STREOMODE                     SAI_STEREOMODE
  3775. #define SAI_FIFOStatus_Empty              SAI_FIFOSTATUS_EMPTY
  3776. #define SAI_FIFOStatus_Less1QuarterFull   SAI_FIFOSTATUS_LESS1QUARTERFULL
  3777. #define SAI_FIFOStatus_1QuarterFull       SAI_FIFOSTATUS_1QUARTERFULL
  3778. #define SAI_FIFOStatus_HalfFull           SAI_FIFOSTATUS_HALFFULL
  3779. #define SAI_FIFOStatus_3QuartersFull      SAI_FIFOSTATUS_3QUARTERFULL
  3780. #define SAI_FIFOStatus_Full               SAI_FIFOSTATUS_FULL
  3781. #define IS_SAI_BLOCK_MONO_STREO_MODE      IS_SAI_BLOCK_MONO_STEREO_MODE
  3782. #define SAI_SYNCHRONOUS_EXT               SAI_SYNCHRONOUS_EXT_SAI1
  3783. #define SAI_SYNCEXT_IN_ENABLE             SAI_SYNCEXT_OUTBLOCKA_ENABLE
  3784. /**
  3785.   * @}
  3786.   */
  3787.  
  3788. /** @defgroup HAL_SPDIFRX_Aliased_Macros HAL SPDIFRX Aliased Macros maintained for legacy purpose
  3789.   * @{
  3790.   */
  3791. #if defined(STM32H7)
  3792. #define HAL_SPDIFRX_ReceiveControlFlow      HAL_SPDIFRX_ReceiveCtrlFlow
  3793. #define HAL_SPDIFRX_ReceiveControlFlow_IT   HAL_SPDIFRX_ReceiveCtrlFlow_IT
  3794. #define HAL_SPDIFRX_ReceiveControlFlow_DMA  HAL_SPDIFRX_ReceiveCtrlFlow_DMA
  3795. #endif
  3796. /**
  3797.   * @}
  3798.   */
  3799.  
  3800. /** @defgroup HAL_HRTIM_Aliased_Functions HAL HRTIM Aliased Functions maintained for legacy purpose
  3801.   * @{
  3802.   */
  3803. #if defined (STM32H7) || defined (STM32G4) || defined (STM32F3)
  3804. #define HAL_HRTIM_WaveformCounterStart_IT      HAL_HRTIM_WaveformCountStart_IT
  3805. #define HAL_HRTIM_WaveformCounterStart_DMA     HAL_HRTIM_WaveformCountStart_DMA
  3806. #define HAL_HRTIM_WaveformCounterStart         HAL_HRTIM_WaveformCountStart
  3807. #define HAL_HRTIM_WaveformCounterStop_IT       HAL_HRTIM_WaveformCountStop_IT
  3808. #define HAL_HRTIM_WaveformCounterStop_DMA      HAL_HRTIM_WaveformCountStop_DMA
  3809. #define HAL_HRTIM_WaveformCounterStop          HAL_HRTIM_WaveformCountStop
  3810. #endif
  3811. /**
  3812.   * @}
  3813.   */
  3814.  
  3815. /** @defgroup HAL_QSPI_Aliased_Macros HAL QSPI Aliased Macros maintained for legacy purpose
  3816.   * @{
  3817.   */
  3818. #if defined (STM32L4) || defined (STM32F4) || defined (STM32F7) || defined(STM32H7)
  3819. #define HAL_QPSI_TIMEOUT_DEFAULT_VALUE HAL_QSPI_TIMEOUT_DEFAULT_VALUE
  3820. #endif /* STM32L4 || STM32F4 || STM32F7 */
  3821. /**
  3822.   * @}
  3823.   */
  3824.  
  3825. /** @defgroup HAL_Generic_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose
  3826.   * @{
  3827.   */
  3828. #if defined (STM32F7)
  3829. #define ART_ACCLERATOR_ENABLE ART_ACCELERATOR_ENABLE
  3830. #endif /* STM32F7 */
  3831. /**
  3832.   * @}
  3833.   */
  3834.  
  3835. /** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
  3836.   * @{
  3837.   */
  3838.  
  3839. /**
  3840.   * @}
  3841.   */
  3842.  
  3843. #ifdef __cplusplus
  3844. }
  3845. #endif
  3846.  
  3847. #endif /* STM32_HAL_LEGACY */
  3848.  
  3849. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  3850.  
  3851.