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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2018 Arm Limited. All rights reserved.
  3. *
  4. *
  5. * Project:       CMSIS NN Library
  6. * Title:         arm_nnexamples_cifar10.cpp
  7. *
  8. * Description:   Convolutional Neural Network Example
  9. *
  10. * Target Processor: Cortex-M4/Cortex-M7
  11. *
  12. * Redistribution and use in source and binary forms, with or without
  13. * modification, are permitted provided that the following conditions
  14. * are met:
  15. *   - Redistributions of source code must retain the above copyright
  16. *     notice, this list of conditions and the following disclaimer.
  17. *   - Redistributions in binary form must reproduce the above copyright
  18. *     notice, this list of conditions and the following disclaimer in
  19. *     the documentation and/or other materials provided with the
  20. *     distribution.
  21. *   - Neither the name of Arm LIMITED nor the names of its contributors
  22. *     may be used to endorse or promote products derived from this
  23. *     software without specific prior written permission.
  24. *
  25. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  26. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  27. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  28. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  29. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  30. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  31. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  32. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  33. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  34. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  35. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  36. * POSSIBILITY OF SUCH DAMAGE.
  37. * -------------------------------------------------------------------- */
  38.  
  39. /**
  40.  * @ingroup groupExamples
  41.  */
  42.  
  43. /**
  44.  * @defgroup CNNExample Convolutional Neural Network Example
  45.  *
  46.  * \par Description:
  47.  * \par
  48.  * Demonstrates a convolutional neural network (CNN) example with the use of convolution,
  49.  * ReLU activation, pooling and fully-connected functions.
  50.  *
  51.  * \par Model definition:
  52.  * \par
  53.  * The CNN used in this example is based on CIFAR-10 example from Caffe [1].
  54.  * The neural network consists
  55.  * of 3 convolution layers interspersed by ReLU activation and max pooling layers, followed by a
  56.  * fully-connected layer at the end. The input to the network is a 32x32 pixel color image, which will
  57.  * be classified into one of the 10 output classes.
  58.  * This example model implementation needs 32.3 KB to store weights, 40 KB for activations and
  59.  * 3.1 KB for storing the \c im2col data.
  60.  *
  61.  * \image html CIFAR10_CNN.gif "Neural Network model definition"
  62.  *
  63.  * \par Variables Description:
  64.  * \par
  65.  * \li \c conv1_wt, \c conv2_wt, \c conv3_wt are convolution layer weight matrices
  66.  * \li \c conv1_bias, \c conv2_bias, \c conv3_bias are convolution layer bias arrays
  67.  * \li \c ip1_wt, ip1_bias point to fully-connected layer weights and biases
  68.  * \li \c input_data points to the input image data
  69.  * \li \c output_data points to the classification output
  70.  * \li \c col_buffer is a buffer to store the \c im2col output
  71.  * \li \c scratch_buffer is used to store the activation data (intermediate layer outputs)
  72.  *
  73.  * \par CMSIS DSP Software Library Functions Used:
  74.  * \par
  75.  * - arm_convolve_HWC_q7_RGB()
  76.  * - arm_convolve_HWC_q7_fast()
  77.  * - arm_relu_q7()
  78.  * - arm_maxpool_q7_HWC()
  79.  * - arm_avepool_q7_HWC()
  80.  * - arm_fully_connected_q7_opt()
  81.  * - arm_fully_connected_q7()
  82.  *
  83.  * <b> Refer  </b>
  84.  * \link arm_nnexamples_cifar10.cpp \endlink
  85.  *
  86.  * \par [1] https://github.com/BVLC/caffe
  87.  */
  88.  
  89. #include <stdint.h>
  90. #include <stdio.h>
  91. #include "arm_math.h"
  92. #include "arm_nnexamples_cifar10_parameter.h"
  93. #include "arm_nnexamples_cifar10_weights.h"
  94.  
  95. #include "arm_nnfunctions.h"
  96. #include "arm_nnexamples_cifar10_inputs.h"
  97.  
  98. #ifdef _RTE_
  99. #include "RTE_Components.h"
  100. #ifdef RTE_Compiler_EventRecorder
  101. #include "EventRecorder.h"
  102. #endif
  103. #endif
  104.  
  105. // include the input and weights
  106.  
  107. static q7_t conv1_wt[CONV1_IM_CH * CONV1_KER_DIM * CONV1_KER_DIM * CONV1_OUT_CH] = CONV1_WT;
  108. static q7_t conv1_bias[CONV1_OUT_CH] = CONV1_BIAS;
  109.  
  110. static q7_t conv2_wt[CONV2_IM_CH * CONV2_KER_DIM * CONV2_KER_DIM * CONV2_OUT_CH] = CONV2_WT;
  111. static q7_t conv2_bias[CONV2_OUT_CH] = CONV2_BIAS;
  112.  
  113. static q7_t conv3_wt[CONV3_IM_CH * CONV3_KER_DIM * CONV3_KER_DIM * CONV3_OUT_CH] = CONV3_WT;
  114. static q7_t conv3_bias[CONV3_OUT_CH] = CONV3_BIAS;
  115.  
  116. static q7_t ip1_wt[IP1_DIM * IP1_OUT] = IP1_WT;
  117. static q7_t ip1_bias[IP1_OUT] = IP1_BIAS;
  118.  
  119. /* Here the image_data should be the raw uint8 type RGB image in [RGB, RGB, RGB ... RGB] format */
  120. uint8_t   image_data[CONV1_IM_CH * CONV1_IM_DIM * CONV1_IM_DIM] = IMG_DATA;
  121. q7_t      output_data[IP1_OUT];
  122.  
  123. //vector buffer: max(im2col buffer,average pool buffer, fully connected buffer)
  124. q7_t      col_buffer[2 * 5 * 5 * 32 * 2];
  125.  
  126. q7_t      scratch_buffer[32 * 32 * 10 * 4];
  127.  
  128. int main()
  129. {
  130.   #ifdef RTE_Compiler_EventRecorder
  131.   EventRecorderInitialize (EventRecordAll, 1);  // initialize and start Event Recorder
  132.   #endif
  133.  
  134.   printf("start execution\n");
  135.   /* start the execution */
  136.  
  137.   q7_t     *img_buffer1 = scratch_buffer;
  138.   q7_t     *img_buffer2 = img_buffer1 + 32 * 32 * 32;
  139.  
  140.   /* input pre-processing */
  141.   int mean_data[3] = INPUT_MEAN_SHIFT;
  142.   unsigned int scale_data[3] = INPUT_RIGHT_SHIFT;
  143.   for (int i=0;i<32*32*3; i+=3) {
  144.     img_buffer2[i] =   (q7_t)__SSAT( ((((int)image_data[i]   - mean_data[0])<<7) + (0x1<<(scale_data[0]-1)))
  145.                              >> scale_data[0], 8);
  146.     img_buffer2[i+1] = (q7_t)__SSAT( ((((int)image_data[i+1] - mean_data[1])<<7) + (0x1<<(scale_data[1]-1)))
  147.                              >> scale_data[1], 8);
  148.     img_buffer2[i+2] = (q7_t)__SSAT( ((((int)image_data[i+2] - mean_data[2])<<7) + (0x1<<(scale_data[2]-1)))
  149.                              >> scale_data[2], 8);
  150.   }
  151.  
  152.   // conv1 img_buffer2 -> img_buffer1
  153.   arm_convolve_HWC_q7_RGB(img_buffer2, CONV1_IM_DIM, CONV1_IM_CH, conv1_wt, CONV1_OUT_CH, CONV1_KER_DIM, CONV1_PADDING,
  154.                           CONV1_STRIDE, conv1_bias, CONV1_BIAS_LSHIFT, CONV1_OUT_RSHIFT, img_buffer1, CONV1_OUT_DIM,
  155.                           (q15_t *) col_buffer, NULL);
  156.  
  157.   arm_relu_q7(img_buffer1, CONV1_OUT_DIM * CONV1_OUT_DIM * CONV1_OUT_CH);
  158.  
  159.   // pool1 img_buffer1 -> img_buffer2
  160.   arm_maxpool_q7_HWC(img_buffer1, CONV1_OUT_DIM, CONV1_OUT_CH, POOL1_KER_DIM,
  161.                      POOL1_PADDING, POOL1_STRIDE, POOL1_OUT_DIM, NULL, img_buffer2);
  162.  
  163.   // conv2 img_buffer2 -> img_buffer1
  164.   arm_convolve_HWC_q7_fast(img_buffer2, CONV2_IM_DIM, CONV2_IM_CH, conv2_wt, CONV2_OUT_CH, CONV2_KER_DIM,
  165.                            CONV2_PADDING, CONV2_STRIDE, conv2_bias, CONV2_BIAS_LSHIFT, CONV2_OUT_RSHIFT, img_buffer1,
  166.                            CONV2_OUT_DIM, (q15_t *) col_buffer, NULL);
  167.  
  168.   arm_relu_q7(img_buffer1, CONV2_OUT_DIM * CONV2_OUT_DIM * CONV2_OUT_CH);
  169.  
  170.   // pool2 img_buffer1 -> img_buffer2
  171.   arm_maxpool_q7_HWC(img_buffer1, CONV2_OUT_DIM, CONV2_OUT_CH, POOL2_KER_DIM,
  172.                      POOL2_PADDING, POOL2_STRIDE, POOL2_OUT_DIM, col_buffer, img_buffer2);
  173.  
  174. // conv3 img_buffer2 -> img_buffer1
  175.   arm_convolve_HWC_q7_fast(img_buffer2, CONV3_IM_DIM, CONV3_IM_CH, conv3_wt, CONV3_OUT_CH, CONV3_KER_DIM,
  176.                            CONV3_PADDING, CONV3_STRIDE, conv3_bias, CONV3_BIAS_LSHIFT, CONV3_OUT_RSHIFT, img_buffer1,
  177.                            CONV3_OUT_DIM, (q15_t *) col_buffer, NULL);
  178.  
  179.   arm_relu_q7(img_buffer1, CONV3_OUT_DIM * CONV3_OUT_DIM * CONV3_OUT_CH);
  180.  
  181.   // pool3 img_buffer-> img_buffer2
  182.   arm_maxpool_q7_HWC(img_buffer1, CONV3_OUT_DIM, CONV3_OUT_CH, POOL3_KER_DIM,
  183.                      POOL3_PADDING, POOL3_STRIDE, POOL3_OUT_DIM, col_buffer, img_buffer2);
  184.  
  185.   arm_fully_connected_q7_opt(img_buffer2, ip1_wt, IP1_DIM, IP1_OUT, IP1_BIAS_LSHIFT, IP1_OUT_RSHIFT, ip1_bias,
  186.                              output_data, (q15_t *) img_buffer1);
  187.  
  188.   arm_softmax_q7(output_data, 10, output_data);
  189.  
  190.   for (int i = 0; i < 10; i++)
  191.   {
  192.       printf("%d: %d\n", i, output_data[i]);
  193.   }
  194.  
  195.   return 0;
  196. }
  197.