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  1. /* ----------------------------------------------------------------------    
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
  3. *    
  4. * $Date:        19. March 2015
  5. * $Revision:    V.1.4.5  
  6. *    
  7. * Project:          CMSIS DSP Library    
  8. * Title:                arm_power_f32.c    
  9. *    
  10. * Description:  Sum of the squares of the elements of a floating-point vector.    
  11. *    
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *  
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. *   - Redistributions of source code must retain the above copyright
  18. *     notice, this list of conditions and the following disclaimer.
  19. *   - Redistributions in binary form must reproduce the above copyright
  20. *     notice, this list of conditions and the following disclaimer in
  21. *     the documentation and/or other materials provided with the
  22. *     distribution.
  23. *   - Neither the name of ARM LIMITED nor the names of its contributors
  24. *     may be used to endorse or promote products derived from this
  25. *     software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.    
  39. * ---------------------------------------------------------------------------- */
  40.  
  41. #include "arm_math.h"
  42.  
  43. /**    
  44.  * @ingroup groupStats    
  45.  */
  46.  
  47. /**    
  48.  * @defgroup power Power    
  49.  *    
  50.  * Calculates the sum of the squares of the elements in the input vector.    
  51.  * The underlying algorithm is used:    
  52.  *    
  53.  * <pre>    
  54.  *      Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];    
  55.  * </pre>    
  56.  *  
  57.  * There are separate functions for floating point, Q31, Q15, and Q7 data types.    
  58.  */
  59.  
  60. /**    
  61.  * @addtogroup power    
  62.  * @{    
  63.  */
  64.  
  65.  
  66. /**    
  67.  * @brief Sum of the squares of the elements of a floating-point vector.    
  68.  * @param[in]       *pSrc points to the input vector    
  69.  * @param[in]       blockSize length of the input vector    
  70.  * @param[out]      *pResult sum of the squares value returned here    
  71.  * @return none.    
  72.  *    
  73.  */
  74.  
  75.  
  76. void arm_power_f32(
  77.   float32_t * pSrc,
  78.   uint32_t blockSize,
  79.   float32_t * pResult)
  80. {
  81.   float32_t sum = 0.0f;                          /* accumulator */
  82.   float32_t in;                                  /* Temporary variable to store input value */
  83.   uint32_t blkCnt;                               /* loop counter */
  84.  
  85. #ifndef ARM_MATH_CM0_FAMILY
  86.  
  87.   /* Run the below code for Cortex-M4 and Cortex-M3 */
  88.  
  89.   /*loop Unrolling */
  90.   blkCnt = blockSize >> 2u;
  91.  
  92.   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
  93.    ** a second loop below computes the remaining 1 to 3 samples. */
  94.   while(blkCnt > 0u)
  95.   {
  96.     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
  97.     /* Compute Power and then store the result in a temporary variable, sum. */
  98.     in = *pSrc++;
  99.     sum += in * in;
  100.     in = *pSrc++;
  101.     sum += in * in;
  102.     in = *pSrc++;
  103.     sum += in * in;
  104.     in = *pSrc++;
  105.     sum += in * in;
  106.  
  107.     /* Decrement the loop counter */
  108.     blkCnt--;
  109.   }
  110.  
  111.   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
  112.    ** No loop unrolling is used. */
  113.   blkCnt = blockSize % 0x4u;
  114.  
  115.  
  116. #else
  117.  
  118.   /* Run the below code for Cortex-M0 */
  119.  
  120.   /* Loop over blockSize number of values */
  121.   blkCnt = blockSize;
  122.  
  123. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  124.  
  125.  
  126.   while(blkCnt > 0u)
  127.   {
  128.     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
  129.     /* compute power and then store the result in a temporary variable, sum. */
  130.     in = *pSrc++;
  131.     sum += in * in;
  132.  
  133.     /* Decrement the loop counter */
  134.     blkCnt--;
  135.   }
  136.  
  137.   /* Store the result to the destination */
  138.   *pResult = sum;
  139. }
  140.  
  141. /**    
  142.  * @} end of power group    
  143.  */
  144.