/*
* $Id: print_ucf.c,v 1.1.1.1 2003/11/04 23:34:57 mjames Exp $
*
* $Log: print_ucf.c,v $
* Revision 1.1.1.1 2003/11/04 23:34:57 mjames
* Imported into local repositrory
*
* Revision 1.5 2003/01/02 21:37:16 mjames
* Experiment on creating NOT_ROUTABLE_H and NOT_ROUTABLE_L
* properties on the nets so that pin jumpers can be made without a problem.
*
* Still need to sort out pin assignments made to these not_routable nets
* which will become legal in some cases so that pullups and pulldown
* pins can be used on the FPGA.
*
* Revision 1.4 2002/10/02 18:38:26 MJAMES
* Added semicolons to strings
*
* Revision 1.3 2002/09/16 11:03:31 mjames
* Made the output compatible with Xilinx expectation, after testing with
* Xilinx Alliance
*
* Revision 1.2 2002/09/09 10:12:02 mjames
* Moved pin remapping function to pin ident editing function from
* sorting pin name routine.
*
* Revision 1.1 2002/08/19 14:30:03 mjames
* Added the 'write UCF' command for
* listing pin assignments in Xilinx UCF file format
*
*
*
* This file contains routines for listing UCF files out for Xilinx Virtex
* (and CoolRunner!)
*
* **********************************************************************
* this file generates a list like this
#Pin location constraints for sheet X1, X2, X3 & X13
NET "IOdata_out(1051)" LOC = "AW22";
NET "IOdata_out(1052)" LOC = "AW24";
NET "IOdata_out(1053)" LOC = "AW23";
NET "IOdata_out(1054)" LOC = "AL21";
*/
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <ctype.h>
#include <time.h>
#include <regex.h>
#include "vertcl_main.h"
#include "expression.h"
#include "generic.h"
#include "database.h"
#include "printout.h"
#include "print_ucf.h"
#include "sorting.h"
#include "cmdparse.h"
#include "cmdlog.h"
#define MAXWIDTH 60
#ident "$RCSId$"
/* ********************************************************************** */
/* VHDL output of the entities */
/* ********************************************************************** */
static char illegal[]="-+:|/.\\$ ";
static char replace[]="NPCxxxxS_";
char * make_UCF_name(char * buffer,char * str)
{
int i,l,j;
{
l += 1;
sprintf(buffer
,"\%s",str
); /* might as well use the verilog quotation method in this case */
}
else
/* spot illegal strings in the net name */
for(i=0;i<l;i++){
for(j=0;j<sizeof(illegal);j++)
if (buffer[i]==illegal[j])
buffer[i]=replace[j];
}
i=l-1;
/* convert pin indices back from Altera form if we are looking at FIT files */
if(l){
/* name ends in underscore, this forces mapping name_nn_ --> name(nn) */
if(buffer[i] =='_'){
buffer[i--]=']';
while(i>=0 && buffer[i] != '_')
i--;
if(i>=0)
buffer[i] = '[';
}
}
return buffer;
}
/* ********************************************************************** */
/* decodes the 'vector' part of a bus , if known */
int decode_UCF_bus(FILE * f,vhdl_t * vhdl) {
if(!vhdl)
vhdl=default_vhdl_datatype;
if(vhdl->is_vector) {
int bus_high,bus_low;
bus_high=0;
bus_low =0;
eval_vhdl_expression(vhdl->expr,&bus_high,&bus_low);
if(bus_high==bus_low)
return fprintf(f
,"[%d]", bus_high
);
else
return fprintf(f
,"[%d:%d]", bus_high
, bus_low
);
}
return 0;
}
/* ********************************************************************** */
/* Printout an instance of a component */
/* ********************************************************************** */
void print_UCF_instance(FILE * f,socket_t * dev, int All)
{
node_t * n;
int pass;
char nam[MAXIDLEN],id[MAXIDLEN];
/* generic_info_t * g_list= dev->generics;*/
make_UCF_name(nam,check_null_str(dev->type));
make_UCF_name(id ,check_null_str(dev->identifier));
fprintf(f
,"\n\n# Component instance\n");
fprintf(f
,"# device name = %s\n# device identifier =%s\n\n",nam
,id
);
sort_nodes(dev,NO_EXTRACT_XY);
/* do this in 2 passes, the second lists unused pins together */
for(pass=0;pass<1;pass++)
{
n=dev->nodes;
while(n)
{
char nam1[MAXIDLEN] , nam2[MAXIDLEN];
/* is there need to add a buffer signal prefix */
/* routable case is checked here */
if(n->net && IS_ROUTABLE(n->net->how_routed) ){
if(n->net_assigned /*&& n->in_use*/ && !ISNULLSTR(n->identifier) ) {
if(pass==0)
{
make_UCF_name(nam2,check_null_str(n->net->name))); /* was identifier */
decode_UCF_bus(f,n->vhdltype);
fprintf(f
,"\" LOC = \"%s\"; # Named net used \n",make_UCF_name
(nam1
,check_null_str
(n
->identifier
)));
}
}
else
{
/* No assigned net : pin exists */
if(pass==1)
{
make_UCF_name(nam2,check_null_str(n->net->identifier))); /* was identifier */
decode_UCF_bus(f,n->vhdltype);
fprintf(f
,"\" LOC = \"%s\"; # Unnamed net used \n",make_UCF_name
(nam1
,check_null_str
(n
->identifier
)));
}
}
}
n=n->sktnext; /* traverse to next pin on socket */
};
}
}