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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32f1xx_hal_pcd.h
  4.   * @author  MCD Application Team
  5.   * @brief   Header file of PCD HAL module.
  6.   ******************************************************************************
  7.   * @attention
  8.   *
  9.   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  10.   * All rights reserved.</center></h2>
  11.   *
  12.   * This software component is licensed by ST under BSD 3-Clause license,
  13.   * the "License"; You may not use this file except in compliance with the
  14.   * License. You may obtain a copy of the License at:
  15.   *                        opensource.org/licenses/BSD-3-Clause
  16.   *
  17.   ******************************************************************************
  18.   */
  19.  
  20. /* Define to prevent recursive inclusion -------------------------------------*/
  21. #ifndef STM32F1xx_HAL_PCD_H
  22. #define STM32F1xx_HAL_PCD_H
  23.  
  24. #ifdef __cplusplus
  25. extern "C" {
  26. #endif
  27.  
  28. /* Includes ------------------------------------------------------------------*/
  29. #include "stm32f1xx_ll_usb.h"
  30.  
  31. #if defined (USB) || defined (USB_OTG_FS)
  32.  
  33. /** @addtogroup STM32F1xx_HAL_Driver
  34.   * @{
  35.   */
  36.  
  37. /** @addtogroup PCD
  38.   * @{
  39.   */
  40.  
  41. /* Exported types ------------------------------------------------------------*/
  42. /** @defgroup PCD_Exported_Types PCD Exported Types
  43.   * @{
  44.   */
  45.  
  46. /**
  47.   * @brief  PCD State structure definition
  48.   */
  49. typedef enum
  50. {
  51.   HAL_PCD_STATE_RESET   = 0x00,
  52.   HAL_PCD_STATE_READY   = 0x01,
  53.   HAL_PCD_STATE_ERROR   = 0x02,
  54.   HAL_PCD_STATE_BUSY    = 0x03,
  55.   HAL_PCD_STATE_TIMEOUT = 0x04
  56. } PCD_StateTypeDef;
  57.  
  58. /* Device LPM suspend state */
  59. typedef enum
  60. {
  61.   LPM_L0 = 0x00, /* on */
  62.   LPM_L1 = 0x01, /* LPM L1 sleep */
  63.   LPM_L2 = 0x02, /* suspend */
  64.   LPM_L3 = 0x03, /* off */
  65. } PCD_LPM_StateTypeDef;
  66.  
  67. typedef enum
  68. {
  69.   PCD_LPM_L0_ACTIVE = 0x00, /* on */
  70.   PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
  71. } PCD_LPM_MsgTypeDef;
  72.  
  73. typedef enum
  74. {
  75.   PCD_BCD_ERROR                     = 0xFF,
  76.   PCD_BCD_CONTACT_DETECTION         = 0xFE,
  77.   PCD_BCD_STD_DOWNSTREAM_PORT       = 0xFD,
  78.   PCD_BCD_CHARGING_DOWNSTREAM_PORT  = 0xFC,
  79.   PCD_BCD_DEDICATED_CHARGING_PORT   = 0xFB,
  80.   PCD_BCD_DISCOVERY_COMPLETED       = 0x00,
  81.  
  82. } PCD_BCD_MsgTypeDef;
  83.  
  84. #if defined (USB)
  85.  
  86. #endif /* defined (USB) */
  87. #if defined (USB_OTG_FS)
  88. typedef USB_OTG_GlobalTypeDef  PCD_TypeDef;
  89. typedef USB_OTG_CfgTypeDef     PCD_InitTypeDef;
  90. typedef USB_OTG_EPTypeDef      PCD_EPTypeDef;
  91. #endif /* defined (USB_OTG_FS) */
  92. #if defined (USB)
  93. typedef USB_TypeDef        PCD_TypeDef;
  94. typedef USB_CfgTypeDef     PCD_InitTypeDef;
  95. typedef USB_EPTypeDef      PCD_EPTypeDef;
  96. #endif /* defined (USB) */
  97.  
  98. /**
  99.   * @brief  PCD Handle Structure definition
  100.   */
  101. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  102. typedef struct __PCD_HandleTypeDef
  103. #else
  104. typedef struct
  105. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  106. {
  107.   PCD_TypeDef             *Instance;   /*!< Register base address              */
  108.   PCD_InitTypeDef         Init;        /*!< PCD required parameters            */
  109.   __IO uint8_t            USB_Address; /*!< USB Address                        */
  110. #if defined (USB_OTG_FS)
  111.   PCD_EPTypeDef           IN_ep[16];   /*!< IN endpoint parameters             */
  112.   PCD_EPTypeDef           OUT_ep[16];  /*!< OUT endpoint parameters            */
  113. #endif /* defined (USB_OTG_FS) */
  114. #if defined (USB)
  115.   PCD_EPTypeDef           IN_ep[8];   /*!< IN endpoint parameters             */
  116.   PCD_EPTypeDef           OUT_ep[8];  /*!< OUT endpoint parameters            */
  117. #endif /* defined (USB) */
  118.   HAL_LockTypeDef         Lock;        /*!< PCD peripheral status              */
  119.   __IO PCD_StateTypeDef   State;       /*!< PCD communication state            */
  120.   __IO  uint32_t          ErrorCode;   /*!< PCD Error code                     */
  121.   uint32_t                Setup[12];   /*!< Setup packet buffer                */
  122.   PCD_LPM_StateTypeDef    LPM_State;   /*!< LPM State                          */
  123.   uint32_t                BESL;
  124.  
  125.   void                    *pData;      /*!< Pointer to upper stack Handler */
  126.  
  127. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  128.   void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd);                              /*!< USB OTG PCD SOF callback                */
  129.   void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Setup Stage callback        */
  130.   void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd);                            /*!< USB OTG PCD Reset callback              */
  131.   void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Suspend callback            */
  132.   void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd);                           /*!< USB OTG PCD Resume callback             */
  133.   void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Connect callback            */
  134.   void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Disconnect callback         */
  135.  
  136.   void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);      /*!< USB OTG PCD Data OUT Stage callback     */
  137.   void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);       /*!< USB OTG PCD Data IN Stage callback      */
  138.   void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);  /*!< USB OTG PCD ISO OUT Incomplete callback */
  139.   void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);   /*!< USB OTG PCD ISO IN Incomplete callback  */
  140.  
  141.   void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Msp Init callback           */
  142.   void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd);                        /*!< USB OTG PCD Msp DeInit callback         */
  143. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  144. } PCD_HandleTypeDef;
  145.  
  146. /**
  147.   * @}
  148.   */
  149.  
  150. /* Include PCD HAL Extended module */
  151. #include "stm32f1xx_hal_pcd_ex.h"
  152.  
  153. /* Exported constants --------------------------------------------------------*/
  154. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  155.   * @{
  156.   */
  157.  
  158. /** @defgroup PCD_Speed PCD Speed
  159.   * @{
  160.   */
  161. #define PCD_SPEED_FULL               USBD_FS_SPEED
  162. /**
  163.   * @}
  164.   */
  165.  
  166. /** @defgroup PCD_PHY_Module PCD PHY Module
  167.   * @{
  168.   */
  169. #define PCD_PHY_ULPI                 1U
  170. #define PCD_PHY_EMBEDDED             2U
  171. #define PCD_PHY_UTMI                 3U
  172. /**
  173.   * @}
  174.   */
  175.  
  176. /** @defgroup PCD_Error_Code_definition PCD Error Code definition
  177.   * @brief  PCD Error Code definition
  178.   * @{
  179.   */
  180. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  181. #define  HAL_PCD_ERROR_INVALID_CALLBACK                        (0x00000010U)    /*!< Invalid Callback error  */
  182. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  183.  
  184. /**
  185.   * @}
  186.   */
  187.  
  188. /**
  189.   * @}
  190.   */
  191.  
  192. /* Exported macros -----------------------------------------------------------*/
  193. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  194.  *  @brief macros to handle interrupts and specific clock configurations
  195.  * @{
  196.  */
  197. #if defined (USB_OTG_FS)
  198. #define __HAL_PCD_ENABLE(__HANDLE__)                       (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  199. #define __HAL_PCD_DISABLE(__HANDLE__)                      (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  200.  
  201. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)      ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  202. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)    (((__HANDLE__)->Instance->GINTSTS) &=  (__INTERRUPT__))
  203. #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__)         (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
  204.  
  205.  
  206. #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__)             *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \
  207.                                                           ~(USB_OTG_PCGCCTL_STOPCLK)
  208.  
  209. #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__)               *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
  210.  
  211. #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__)            ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
  212.  
  213. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT()    EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE
  214. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT()   EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
  215. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG()     EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
  216. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG()   EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
  217.  
  218. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  219.                         do { \
  220.                              EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
  221.                              EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
  222.                            } while(0U)
  223. #endif /* defined (USB_OTG_FS) */
  224.  
  225. #if defined (USB)
  226. #define __HAL_PCD_ENABLE(__HANDLE__)                                  (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  227. #define __HAL_PCD_DISABLE(__HANDLE__)                                 (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  228. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)                 ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  229. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)               (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
  230.  
  231. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT()                             EXTI->IMR |= USB_WAKEUP_EXTI_LINE
  232. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT()                            EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
  233. #define __HAL_USB_WAKEUP_EXTI_GET_FLAG()                              EXTI->PR & (USB_WAKEUP_EXTI_LINE)
  234. #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG()                            EXTI->PR = USB_WAKEUP_EXTI_LINE
  235.  
  236. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE()                 \
  237.                         do {                                        \
  238.                              EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  239.                              EXTI->RTSR |= USB_WAKEUP_EXTI_LINE;    \
  240.                            } while(0U)
  241.  
  242. #endif /* defined (USB) */
  243.  
  244. /**
  245.   * @}
  246.   */
  247.  
  248. /* Exported functions --------------------------------------------------------*/
  249. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  250.   * @{
  251.   */
  252.  
  253. /* Initialization/de-initialization functions  ********************************/
  254. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  255.   * @{
  256.   */
  257. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  258. HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
  259. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  260. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  261.  
  262. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  263. /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
  264.   * @brief  HAL USB OTG PCD Callback ID enumeration definition
  265.   * @{
  266.   */
  267. typedef enum
  268. {
  269.   HAL_PCD_SOF_CB_ID          = 0x01,      /*!< USB PCD SOF callback ID          */
  270.   HAL_PCD_SETUPSTAGE_CB_ID   = 0x02,      /*!< USB PCD Setup Stage callback ID  */
  271.   HAL_PCD_RESET_CB_ID        = 0x03,      /*!< USB PCD Reset callback ID        */
  272.   HAL_PCD_SUSPEND_CB_ID      = 0x04,      /*!< USB PCD Suspend callback ID      */
  273.   HAL_PCD_RESUME_CB_ID       = 0x05,      /*!< USB PCD Resume callback ID       */
  274.   HAL_PCD_CONNECT_CB_ID      = 0x06,      /*!< USB PCD Connect callback ID      */
  275.   HAL_PCD_DISCONNECT_CB_ID  = 0x07,      /*!< USB PCD Disconnect callback ID   */
  276.  
  277.   HAL_PCD_MSPINIT_CB_ID      = 0x08,      /*!< USB PCD MspInit callback ID      */
  278.   HAL_PCD_MSPDEINIT_CB_ID    = 0x09       /*!< USB PCD MspDeInit callback ID    */
  279.  
  280. } HAL_PCD_CallbackIDTypeDef;
  281. /**
  282.   * @}
  283.   */
  284.  
  285. /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
  286.   * @brief  HAL USB OTG PCD Callback pointer definition
  287.   * @{
  288.   */
  289.  
  290. typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd);                                   /*!< pointer to a common USB OTG PCD callback function  */
  291. typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD Data OUT Stage callback     */
  292. typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD Data IN Stage callback      */
  293. typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
  294. typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD ISO IN Incomplete callback  */
  295.  
  296. /**
  297.   * @}
  298.   */
  299.  
  300. HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback);
  301. HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
  302.  
  303. HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback);
  304. HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
  305.  
  306. HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback);
  307. HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
  308.  
  309. HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback);
  310. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
  311.  
  312. HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback);
  313. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
  314.  
  315. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  316. /**
  317.   * @}
  318.   */
  319.  
  320. /* I/O operation functions  ***************************************************/
  321. /* Non-Blocking mode: Interrupt */
  322. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
  323.   * @{
  324.   */
  325. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  326. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  327. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  328.  
  329. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  330. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  331. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  332. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  333. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  334. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  335. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  336.  
  337. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  338. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  339. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  340. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  341. /**
  342.   * @}
  343.   */
  344.  
  345. /* Peripheral Control functions  **********************************************/
  346. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  347.   * @{
  348.   */
  349. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  350. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  351. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  352. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  353. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  354. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  355. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  356. uint32_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  357. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  358. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  359. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  360. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  361. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  362. /**
  363.   * @}
  364.   */
  365.  
  366. /* Peripheral State functions  ************************************************/
  367. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  368.   * @{
  369.   */
  370. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  371. /**
  372.   * @}
  373.   */
  374.  
  375. /**
  376.   * @}
  377.   */
  378.  
  379. /* Private constants ---------------------------------------------------------*/
  380. /** @defgroup PCD_Private_Constants PCD Private Constants
  381.   * @{
  382.   */
  383. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  384.   * @{
  385.   */
  386. #if defined (USB_OTG_FS)
  387. #define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE                            0x08U
  388. #define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE                           0x0CU
  389. #define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE                    0x10U
  390.  
  391. #define USB_OTG_FS_WAKEUP_EXTI_LINE                                   (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
  392. #endif /* defined (USB_OTG_FS) */
  393.  
  394. #if defined (USB)
  395. #define  USB_WAKEUP_EXTI_LINE                                         (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
  396. #endif /* defined (USB) */
  397.  
  398. /**
  399.   * @}
  400.   */
  401. #if defined (USB)
  402. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  403.   * @{
  404.   */
  405. #define PCD_EP0MPS_64                                                 DEP0CTL_MPS_64
  406. #define PCD_EP0MPS_32                                                 DEP0CTL_MPS_32
  407. #define PCD_EP0MPS_16                                                 DEP0CTL_MPS_16
  408. #define PCD_EP0MPS_08                                                 DEP0CTL_MPS_8
  409. /**
  410.   * @}
  411.   */
  412.  
  413. /** @defgroup PCD_ENDP PCD ENDP
  414.   * @{
  415.   */
  416. #define PCD_ENDP0                                                     0U
  417. #define PCD_ENDP1                                                     1U
  418. #define PCD_ENDP2                                                     2U
  419. #define PCD_ENDP3                                                     3U
  420. #define PCD_ENDP4                                                     4U
  421. #define PCD_ENDP5                                                     5U
  422. #define PCD_ENDP6                                                     6U
  423. #define PCD_ENDP7                                                     7U
  424. /**
  425.   * @}
  426.   */
  427.  
  428. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  429.   * @{
  430.   */
  431. #define PCD_SNG_BUF                                                   0U
  432. #define PCD_DBL_BUF                                                   1U
  433. /**
  434.   * @}
  435.   */
  436. #endif /* defined (USB) */
  437. /**
  438.   * @}
  439.   */
  440.  
  441. #if defined (USB_OTG_FS)
  442. #ifndef USB_OTG_DOEPINT_OTEPSPR
  443. #define USB_OTG_DOEPINT_OTEPSPR                (0x1UL << 5)      /*!< Status Phase Received interrupt */
  444. #endif
  445.  
  446. #ifndef USB_OTG_DOEPMSK_OTEPSPRM
  447. #define USB_OTG_DOEPMSK_OTEPSPRM               (0x1UL << 5)      /*!< Setup Packet Received interrupt mask */
  448. #endif
  449.  
  450. #ifndef USB_OTG_DOEPINT_NAK
  451. #define USB_OTG_DOEPINT_NAK                    (0x1UL << 13)      /*!< NAK interrupt */
  452. #endif
  453.  
  454. #ifndef USB_OTG_DOEPMSK_NAKM
  455. #define USB_OTG_DOEPMSK_NAKM                   (0x1UL << 13)      /*!< OUT Packet NAK interrupt mask */
  456. #endif
  457.  
  458. #ifndef USB_OTG_DOEPINT_STPKTRX
  459. #define USB_OTG_DOEPINT_STPKTRX                (0x1UL << 15)      /*!< Setup Packet Received interrupt */
  460. #endif
  461.  
  462. #ifndef USB_OTG_DOEPMSK_NYETM
  463. #define USB_OTG_DOEPMSK_NYETM                  (0x1UL << 14)      /*!< Setup Packet Received interrupt mask */
  464. #endif
  465. #endif /* defined (USB_OTG_FS) */
  466.  
  467. /* Private macros ------------------------------------------------------------*/
  468. /** @defgroup PCD_Private_Macros PCD Private Macros
  469.  * @{
  470.  */
  471. #if defined (USB)
  472. /********************  Bit definition for USB_COUNTn_RX register  *************/
  473. #define USB_CNTRX_NBLK_MSK                    (0x1FU << 10)
  474. #define USB_CNTRX_BLSIZE                      (0x1U << 15)
  475.  
  476. /* SetENDPOINT */
  477. #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue)  (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
  478.  
  479. /* GetENDPOINT */
  480. #define PCD_GET_ENDPOINT(USBx, bEpNum)            (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
  481.  
  482. /* ENDPOINT transfer */
  483. #define USB_EP0StartXfer                          USB_EPStartXfer
  484.  
  485. /**
  486.   * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
  487.   * @param  USBx USB peripheral instance register address.
  488.   * @param  bEpNum Endpoint Number.
  489.   * @param  wType Endpoint Type.
  490.   * @retval None
  491.   */
  492. #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  493.                                              ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
  494.  
  495. /**
  496.   * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
  497.   * @param  USBx USB peripheral instance register address.
  498.   * @param  bEpNum Endpoint Number.
  499.   * @retval Endpoint Type
  500.   */
  501. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  502.  
  503. /**
  504.   * @brief free buffer used from the application realizing it to the line
  505.   *         toggles bit SW_BUF in the double buffered endpoint register
  506.   * @param USBx USB device.
  507.   * @param   bEpNum, bDir
  508.   * @retval None
  509.   */
  510. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) do { \
  511.   if ((bDir) == 0U) \
  512.   { \
  513.     /* OUT double buffered endpoint */ \
  514.     PCD_TX_DTOG((USBx), (bEpNum)); \
  515.   } \
  516.   else if ((bDir) == 1U) \
  517.   { \
  518.     /* IN double buffered endpoint */ \
  519.     PCD_RX_DTOG((USBx), (bEpNum)); \
  520.   } \
  521. } while(0)
  522.  
  523. /**
  524.   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
  525.   * @param  USBx USB peripheral instance register address.
  526.   * @param  bEpNum Endpoint Number.
  527.   * @param  wState new state
  528.   * @retval None
  529.   */
  530. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do { \
  531.    register uint16_t _wRegVal; \
  532.    \
  533.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
  534.    /* toggle first bit ? */ \
  535.    if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
  536.    { \
  537.       _wRegVal ^= USB_EPTX_DTOG1; \
  538.    } \
  539.    /* toggle second bit ?  */ \
  540.    if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
  541.    { \
  542.       _wRegVal ^= USB_EPTX_DTOG2; \
  543.    } \
  544.    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  545.   } while(0) /* PCD_SET_EP_TX_STATUS */
  546.  
  547. /**
  548.   * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
  549.   * @param  USBx USB peripheral instance register address.
  550.   * @param  bEpNum Endpoint Number.
  551.   * @param  wState new state
  552.   * @retval None
  553.   */
  554. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do { \
  555.     register uint16_t _wRegVal; \
  556.     \
  557.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
  558.     /* toggle first bit ? */ \
  559.     if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
  560.     { \
  561.        _wRegVal ^= USB_EPRX_DTOG1; \
  562.     } \
  563.     /* toggle second bit ? */ \
  564.     if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
  565.     { \
  566.        _wRegVal ^= USB_EPRX_DTOG2; \
  567.     } \
  568.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  569.   } while(0) /* PCD_SET_EP_RX_STATUS */
  570.  
  571. /**
  572.   * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  573.   * @param  USBx USB peripheral instance register address.
  574.   * @param  bEpNum Endpoint Number.
  575.   * @param  wStaterx new state.
  576.   * @param  wStatetx new state.
  577.   * @retval None
  578.   */
  579. #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) do { \
  580.     register uint16_t _wRegVal; \
  581.     \
  582.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
  583.     /* toggle first bit ? */ \
  584.     if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
  585.     { \
  586.       _wRegVal ^= USB_EPRX_DTOG1; \
  587.     } \
  588.     /* toggle second bit ? */ \
  589.     if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
  590.     { \
  591.       _wRegVal ^= USB_EPRX_DTOG2; \
  592.     } \
  593.     /* toggle first bit ? */ \
  594.     if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
  595.     { \
  596.       _wRegVal ^= USB_EPTX_DTOG1; \
  597.     } \
  598.     /* toggle second bit ?  */ \
  599.     if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
  600.     { \
  601.       _wRegVal ^= USB_EPTX_DTOG2; \
  602.     } \
  603.     \
  604.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  605.   } while(0) /* PCD_SET_EP_TXRX_STATUS */
  606.  
  607. /**
  608.   * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
  609.   *         /STAT_RX[1:0])
  610.   * @param  USBx USB peripheral instance register address.
  611.   * @param  bEpNum Endpoint Number.
  612.   * @retval status
  613.   */
  614. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  615. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  616.  
  617. /**
  618.   * @brief  sets directly the VALID tx/rx-status into the endpoint register
  619.   * @param  USBx USB peripheral instance register address.
  620.   * @param  bEpNum Endpoint Number.
  621.   * @retval None
  622.   */
  623. #define PCD_SET_EP_TX_VALID(USBx, bEpNum)      (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  624. #define PCD_SET_EP_RX_VALID(USBx, bEpNum)      (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  625.  
  626. /**
  627.   * @brief  checks stall condition in an endpoint.
  628.   * @param  USBx USB peripheral instance register address.
  629.   * @param  bEpNum Endpoint Number.
  630.   * @retval TRUE = endpoint in stall condition.
  631.   */
  632. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
  633.                                    == USB_EP_TX_STALL)
  634. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
  635.                                    == USB_EP_RX_STALL)
  636.  
  637. /**
  638.   * @brief  set & clear EP_KIND bit.
  639.   * @param  USBx USB peripheral instance register address.
  640.   * @param  bEpNum Endpoint Number.
  641.   * @retval None
  642.   */
  643. #define PCD_SET_EP_KIND(USBx, bEpNum) do { \
  644.     register uint16_t _wRegVal; \
  645.     \
  646.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  647.     \
  648.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
  649.   } while(0) /* PCD_SET_EP_KIND */
  650.  
  651. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) do { \
  652.     register uint16_t _wRegVal; \
  653.     \
  654.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
  655.     \
  656.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  657.   } while(0) /* PCD_CLEAR_EP_KIND */
  658.  
  659. /**
  660.   * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
  661.   * @param  USBx USB peripheral instance register address.
  662.   * @param  bEpNum Endpoint Number.
  663.   * @retval None
  664.   */
  665. #define PCD_SET_OUT_STATUS(USBx, bEpNum)       PCD_SET_EP_KIND((USBx), (bEpNum))
  666. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)     PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  667.  
  668. /**
  669.   * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
  670.   * @param  USBx USB peripheral instance register address.
  671.   * @param  bEpNum Endpoint Number.
  672.   * @retval None
  673.   */
  674. #define PCD_SET_EP_DBUF(USBx, bEpNum)          PCD_SET_EP_KIND((USBx), (bEpNum))
  675. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum)        PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  676.  
  677. /**
  678.   * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
  679.   * @param  USBx USB peripheral instance register address.
  680.   * @param  bEpNum Endpoint Number.
  681.   * @retval None
  682.   */
  683. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) do { \
  684.     register uint16_t _wRegVal; \
  685.     \
  686.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
  687.     \
  688.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
  689.   } while(0) /* PCD_CLEAR_RX_EP_CTR */
  690.  
  691. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) do { \
  692.     register uint16_t _wRegVal; \
  693.     \
  694.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
  695.     \
  696.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
  697.   } while(0) /* PCD_CLEAR_TX_EP_CTR */
  698.  
  699. /**
  700.   * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  701.   * @param  USBx USB peripheral instance register address.
  702.   * @param  bEpNum Endpoint Number.
  703.   * @retval None
  704.   */
  705. #define PCD_RX_DTOG(USBx, bEpNum) do { \
  706.     register uint16_t _wEPVal; \
  707.     \
  708.     _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  709.     \
  710.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
  711.   } while(0) /* PCD_RX_DTOG */
  712.  
  713. #define PCD_TX_DTOG(USBx, bEpNum) do { \
  714.     register uint16_t _wEPVal; \
  715.     \
  716.     _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  717.     \
  718.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
  719.   } while(0) /* PCD_TX_DTOG */
  720. /**
  721.   * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  722.   * @param  USBx USB peripheral instance register address.
  723.   * @param  bEpNum Endpoint Number.
  724.   * @retval None
  725.   */
  726. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) do { \
  727.     register uint16_t _wRegVal; \
  728.     \
  729.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  730.     \
  731.     if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
  732.     { \
  733.       PCD_RX_DTOG((USBx), (bEpNum)); \
  734.     } \
  735.   } while(0) /* PCD_CLEAR_RX_DTOG */
  736.  
  737. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) do { \
  738.     register uint16_t _wRegVal; \
  739.     \
  740.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  741.     \
  742.     if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
  743.     { \
  744.       PCD_TX_DTOG((USBx), (bEpNum)); \
  745.     } \
  746.   } while(0) /* PCD_CLEAR_TX_DTOG */
  747.  
  748. /**
  749.   * @brief  Sets address in an endpoint register.
  750.   * @param  USBx USB peripheral instance register address.
  751.   * @param  bEpNum Endpoint Number.
  752.   * @param  bAddr Address.
  753.   * @retval None
  754.   */
  755. #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) do { \
  756.     register uint16_t _wRegVal; \
  757.     \
  758.     _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
  759.     \
  760.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  761.   } while(0) /* PCD_SET_EP_ADDRESS */
  762.  
  763. /**
  764.   * @brief  Gets address in an endpoint register.
  765.   * @param  USBx USB peripheral instance register address.
  766.   * @param  bEpNum Endpoint Number.
  767.   * @retval None
  768.   */
  769. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  770.  
  771. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  772. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  773.  
  774. /**
  775.   * @brief  sets address of the tx/rx buffer.
  776.   * @param  USBx USB peripheral instance register address.
  777.   * @param  bEpNum Endpoint Number.
  778.   * @param  wAddr address to be set (must be word aligned).
  779.   * @retval None
  780.   */
  781. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) do { \
  782.   register __IO uint16_t *_wRegVal; \
  783.   register uint32_t _wRegBase = (uint32_t)USBx; \
  784.   \
  785.   _wRegBase += (uint32_t)(USBx)->BTABLE; \
  786.   _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
  787.   *_wRegVal = ((wAddr) >> 1) << 1; \
  788. } while(0) /* PCD_SET_EP_TX_ADDRESS */
  789.  
  790. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) do { \
  791.   register __IO uint16_t *_wRegVal; \
  792.   register uint32_t _wRegBase = (uint32_t)USBx; \
  793.   \
  794.   _wRegBase += (uint32_t)(USBx)->BTABLE; \
  795.   _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
  796.   *_wRegVal = ((wAddr) >> 1) << 1; \
  797. } while(0) /* PCD_SET_EP_RX_ADDRESS */
  798.  
  799. /**
  800.   * @brief  Gets address of the tx/rx buffer.
  801.   * @param  USBx USB peripheral instance register address.
  802.   * @param  bEpNum Endpoint Number.
  803.   * @retval address of the buffer.
  804.   */
  805. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  806. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  807.  
  808. /**
  809.   * @brief  Sets counter of rx buffer with no. of blocks.
  810.   * @param  pdwReg Register pointer
  811.   * @param  wCount Counter.
  812.   * @param  wNBlocks no. of Blocks.
  813.   * @retval None
  814.   */
  815. #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) do { \
  816.     (wNBlocks) = (wCount) >> 5; \
  817.     if (((wCount) & 0x1fU) == 0U) \
  818.     { \
  819.       (wNBlocks)--; \
  820.     } \
  821.     *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
  822.   } while(0) /* PCD_CALC_BLK32 */
  823.  
  824. #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) do { \
  825.     (wNBlocks) = (wCount) >> 1; \
  826.     if (((wCount) & 0x1U) != 0U) \
  827.     { \
  828.       (wNBlocks)++; \
  829.     } \
  830.     *(pdwReg) = (uint16_t)((wNBlocks) << 10); \
  831.   } while(0) /* PCD_CALC_BLK2 */
  832.  
  833. #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount)  do { \
  834.     uint32_t wNBlocks; \
  835.     if ((wCount) == 0U) \
  836.     { \
  837.       *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \
  838.       *(pdwReg) |= USB_CNTRX_BLSIZE; \
  839.     } \
  840.     else if((wCount) <= 62U) \
  841.     { \
  842.       PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
  843.     } \
  844.     else \
  845.     { \
  846.       PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
  847.     } \
  848.   } while(0) /* PCD_SET_EP_CNT_RX_REG */
  849.  
  850. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) do { \
  851.      register uint32_t _wRegBase = (uint32_t)(USBx); \
  852.      register __IO uint16_t *pdwReg; \
  853.      \
  854.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  855.     pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  856.     PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
  857.   } while(0)
  858.  
  859. /**
  860.   * @brief  sets counter for the tx/rx buffer.
  861.   * @param  USBx USB peripheral instance register address.
  862.   * @param  bEpNum Endpoint Number.
  863.   * @param  wCount Counter value.
  864.   * @retval None
  865.   */
  866. #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) do { \
  867.     register uint32_t _wRegBase = (uint32_t)(USBx); \
  868.     register __IO uint16_t *_wRegVal; \
  869.     \
  870.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  871.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  872.     *_wRegVal = (uint16_t)(wCount); \
  873. } while(0)
  874.  
  875. #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) do { \
  876.     register uint32_t _wRegBase = (uint32_t)(USBx); \
  877.     register __IO uint16_t *_wRegVal; \
  878.     \
  879.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  880.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  881.     PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
  882. } while(0)
  883.  
  884. /**
  885.   * @brief  gets counter of the tx buffer.
  886.   * @param  USBx USB peripheral instance register address.
  887.   * @param  bEpNum Endpoint Number.
  888.   * @retval Counter value
  889.   */
  890. #define PCD_GET_EP_TX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
  891. #define PCD_GET_EP_RX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
  892.  
  893. /**
  894.   * @brief  Sets buffer 0/1 address in a double buffer endpoint.
  895.   * @param  USBx USB peripheral instance register address.
  896.   * @param  bEpNum Endpoint Number.
  897.   * @param  wBuf0Addr buffer 0 address.
  898.   * @retval Counter value
  899.   */
  900. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) do { \
  901.     PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
  902.   } while(0) /* PCD_SET_EP_DBUF0_ADDR */
  903. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) do { \
  904.     PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
  905.   } while(0) /* PCD_SET_EP_DBUF1_ADDR */
  906.  
  907. /**
  908.   * @brief  Sets addresses in a double buffer endpoint.
  909.   * @param  USBx USB peripheral instance register address.
  910.   * @param  bEpNum Endpoint Number.
  911.   * @param  wBuf0Addr: buffer 0 address.
  912.   * @param  wBuf1Addr = buffer 1 address.
  913.   * @retval None
  914.   */
  915. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) do { \
  916.     PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
  917.     PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
  918.   } while(0) /* PCD_SET_EP_DBUF_ADDR */
  919.  
  920. /**
  921.   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
  922.   * @param  USBx USB peripheral instance register address.
  923.   * @param  bEpNum Endpoint Number.
  924.   * @retval None
  925.   */
  926. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum)    (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  927. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum)    (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  928.  
  929. /**
  930.   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
  931.   * @param  USBx USB peripheral instance register address.
  932.   * @param  bEpNum Endpoint Number.
  933.   * @param  bDir endpoint dir  EP_DBUF_OUT = OUT
  934.   *         EP_DBUF_IN  = IN
  935.   * @param  wCount: Counter value
  936.   * @retval None
  937.   */
  938. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) do { \
  939.     if ((bDir) == 0U) \
  940.       /* OUT endpoint */ \
  941.     { \
  942.       PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
  943.     } \
  944.     else \
  945.     { \
  946.       if ((bDir) == 1U) \
  947.       { \
  948.         /* IN endpoint */ \
  949.         PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
  950.       } \
  951.     } \
  952.   } while(0) /* SetEPDblBuf0Count*/
  953.  
  954. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) do { \
  955.     register uint32_t _wBase = (uint32_t)(USBx); \
  956.     __IO uint16_t *_wEPRegVal; \
  957.     \
  958.     if ((bDir) == 0U) \
  959.     { \
  960.       /* OUT endpoint */ \
  961.       PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
  962.     } \
  963.     else \
  964.     { \
  965.       if ((bDir) == 1U) \
  966.       { \
  967.         /* IN endpoint */ \
  968.         _wBase += (uint32_t)(USBx)->BTABLE; \
  969.         _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  970.         *_wEPRegVal = (uint16_t)(wCount); \
  971.       } \
  972.     } \
  973.   } while(0) /* SetEPDblBuf1Count */
  974.  
  975. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do { \
  976.     PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  977.     PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  978.   } while(0) /* PCD_SET_EP_DBUF_CNT  */
  979.  
  980. /**
  981.   * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
  982.   * @param  USBx USB peripheral instance register address.
  983.   * @param  bEpNum Endpoint Number.
  984.   * @retval None
  985.   */
  986. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum)     (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  987. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum)     (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  988.  
  989. #endif /* defined (USB) */
  990.  
  991. /**
  992.   * @}
  993.   */
  994.  
  995. /**
  996.   * @}
  997.   */
  998.  
  999. /**
  1000.   * @}
  1001.   */
  1002. #endif /* defined (USB) || defined (USB_OTG_FS) */
  1003.  
  1004. #ifdef __cplusplus
  1005. }
  1006. #endif
  1007.  
  1008. #endif /* STM32F1xx_HAL_PCD_H */
  1009.  
  1010. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  1011.