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  1. /* ----------------------------------------------------------------------
  2.  * Project:      CMSIS DSP Library
  3.  * Title:        arm_cmplx_dot_prod_q15.c
  4.  * Description:  Processing function for the Q15 Complex Dot product
  5.  *
  6.  * $Date:        27. January 2017
  7.  * $Revision:    V.1.5.1
  8.  *
  9.  * Target Processor: Cortex-M cores
  10.  * -------------------------------------------------------------------- */
  11. /*
  12.  * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
  13.  *
  14.  * SPDX-License-Identifier: Apache-2.0
  15.  *
  16.  * Licensed under the Apache License, Version 2.0 (the License); you may
  17.  * not use this file except in compliance with the License.
  18.  * You may obtain a copy of the License at
  19.  *
  20.  * www.apache.org/licenses/LICENSE-2.0
  21.  *
  22.  * Unless required by applicable law or agreed to in writing, software
  23.  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  24.  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  25.  * See the License for the specific language governing permissions and
  26.  * limitations under the License.
  27.  */
  28.  
  29. #include "arm_math.h"
  30.  
  31. /**
  32.  * @ingroup groupCmplxMath
  33.  */
  34.  
  35. /**
  36.  * @addtogroup cmplx_dot_prod
  37.  * @{
  38.  */
  39.  
  40. /**
  41.  * @brief  Q15 complex dot product
  42.  * @param  *pSrcA points to the first input vector
  43.  * @param  *pSrcB points to the second input vector
  44.  * @param  numSamples number of complex samples in each vector
  45.  * @param  *realResult real part of the result returned here
  46.  * @param  *imagResult imaginary part of the result returned here
  47.  * @return none.
  48.  *
  49.  * <b>Scaling and Overflow Behavior:</b>
  50.  * \par
  51.  * The function is implemented using an internal 64-bit accumulator.
  52.  * The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result.
  53.  * These are accumulated in a 64-bit accumulator with 34.30 precision.
  54.  * As a final step, the accumulators are converted to 8.24 format.
  55.  * The return results <code>realResult</code> and <code>imagResult</code> are in 8.24 format.
  56.  */
  57.  
  58. void arm_cmplx_dot_prod_q15(
  59.   q15_t * pSrcA,
  60.   q15_t * pSrcB,
  61.   uint32_t numSamples,
  62.   q31_t * realResult,
  63.   q31_t * imagResult)
  64. {
  65.   q63_t real_sum = 0, imag_sum = 0;              /* Temporary result storage */
  66.   q15_t a0,b0,c0,d0;
  67.  
  68. #if defined (ARM_MATH_DSP)
  69.  
  70.   /* Run the below code for Cortex-M4 and Cortex-M3 */
  71.   uint32_t blkCnt;                               /* loop counter */
  72.  
  73.  
  74.   /*loop Unrolling */
  75.   blkCnt = numSamples >> 2U;
  76.  
  77.   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
  78.    ** a second loop below computes the remaining 1 to 3 samples. */
  79.   while (blkCnt > 0U)
  80.   {
  81.       a0 = *pSrcA++;
  82.       b0 = *pSrcA++;
  83.       c0 = *pSrcB++;
  84.       d0 = *pSrcB++;
  85.  
  86.       real_sum += (q31_t)a0 * c0;
  87.       imag_sum += (q31_t)a0 * d0;
  88.       real_sum -= (q31_t)b0 * d0;
  89.       imag_sum += (q31_t)b0 * c0;
  90.  
  91.       a0 = *pSrcA++;
  92.       b0 = *pSrcA++;
  93.       c0 = *pSrcB++;
  94.       d0 = *pSrcB++;
  95.  
  96.       real_sum += (q31_t)a0 * c0;
  97.       imag_sum += (q31_t)a0 * d0;
  98.       real_sum -= (q31_t)b0 * d0;
  99.       imag_sum += (q31_t)b0 * c0;
  100.  
  101.       a0 = *pSrcA++;
  102.       b0 = *pSrcA++;
  103.       c0 = *pSrcB++;
  104.       d0 = *pSrcB++;
  105.  
  106.       real_sum += (q31_t)a0 * c0;
  107.       imag_sum += (q31_t)a0 * d0;
  108.       real_sum -= (q31_t)b0 * d0;
  109.       imag_sum += (q31_t)b0 * c0;
  110.  
  111.       a0 = *pSrcA++;
  112.       b0 = *pSrcA++;
  113.       c0 = *pSrcB++;
  114.       d0 = *pSrcB++;
  115.  
  116.       real_sum += (q31_t)a0 * c0;
  117.       imag_sum += (q31_t)a0 * d0;
  118.       real_sum -= (q31_t)b0 * d0;
  119.       imag_sum += (q31_t)b0 * c0;
  120.  
  121.       /* Decrement the loop counter */
  122.       blkCnt--;
  123.   }
  124.  
  125.   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
  126.    ** No loop unrolling is used. */
  127.   blkCnt = numSamples % 0x4U;
  128.  
  129.   while (blkCnt > 0U)
  130.   {
  131.       a0 = *pSrcA++;
  132.       b0 = *pSrcA++;
  133.       c0 = *pSrcB++;
  134.       d0 = *pSrcB++;
  135.  
  136.       real_sum += (q31_t)a0 * c0;
  137.       imag_sum += (q31_t)a0 * d0;
  138.       real_sum -= (q31_t)b0 * d0;
  139.       imag_sum += (q31_t)b0 * c0;
  140.  
  141.       /* Decrement the loop counter */
  142.       blkCnt--;
  143.   }
  144.  
  145. #else
  146.  
  147.   /* Run the below code for Cortex-M0 */
  148.  
  149.   while (numSamples > 0U)
  150.   {
  151.       a0 = *pSrcA++;
  152.       b0 = *pSrcA++;
  153.       c0 = *pSrcB++;
  154.       d0 = *pSrcB++;
  155.  
  156.       real_sum += a0 * c0;
  157.       imag_sum += a0 * d0;
  158.       real_sum -= b0 * d0;
  159.       imag_sum += b0 * c0;
  160.  
  161.  
  162.       /* Decrement the loop counter */
  163.       numSamples--;
  164.   }
  165.  
  166. #endif /* #if defined (ARM_MATH_DSP) */
  167.  
  168.   /* Store the real and imaginary results in 8.24 format  */
  169.   /* Convert real data in 34.30 to 8.24 by 6 right shifts */
  170.   *realResult = (q31_t) (real_sum >> 6);
  171.   /* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */
  172.   *imagResult = (q31_t) (imag_sum >> 6);
  173. }
  174.  
  175. /**
  176.  * @} end of cmplx_dot_prod group
  177.  */
  178.