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  1. /* ----------------------------------------------------------------------
  2.  * Project:      CMSIS DSP Library
  3.  * Title:        arm_add_q7.c
  4.  * Description:  Q7 vector addition
  5.  *
  6.  * $Date:        27. January 2017
  7.  * $Revision:    V.1.5.1
  8.  *
  9.  * Target Processor: Cortex-M cores
  10.  * -------------------------------------------------------------------- */
  11. /*
  12.  * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
  13.  *
  14.  * SPDX-License-Identifier: Apache-2.0
  15.  *
  16.  * Licensed under the Apache License, Version 2.0 (the License); you may
  17.  * not use this file except in compliance with the License.
  18.  * You may obtain a copy of the License at
  19.  *
  20.  * www.apache.org/licenses/LICENSE-2.0
  21.  *
  22.  * Unless required by applicable law or agreed to in writing, software
  23.  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  24.  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  25.  * See the License for the specific language governing permissions and
  26.  * limitations under the License.
  27.  */
  28.  
  29. #include "arm_math.h"
  30.  
  31. /**
  32.  * @ingroup groupMath
  33.  */
  34.  
  35. /**
  36.  * @addtogroup BasicAdd
  37.  * @{
  38.  */
  39.  
  40. /**
  41.  * @brief Q7 vector addition.
  42.  * @param[in]       *pSrcA points to the first input vector
  43.  * @param[in]       *pSrcB points to the second input vector
  44.  * @param[out]      *pDst points to the output vector
  45.  * @param[in]       blockSize number of samples in each vector
  46.  * @return none.
  47.  *
  48.  * <b>Scaling and Overflow Behavior:</b>
  49.  * \par
  50.  * The function uses saturating arithmetic.
  51.  * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
  52.  */
  53.  
  54. void arm_add_q7(
  55.   q7_t * pSrcA,
  56.   q7_t * pSrcB,
  57.   q7_t * pDst,
  58.   uint32_t blockSize)
  59. {
  60.   uint32_t blkCnt;                               /* loop counter */
  61.  
  62. #if defined (ARM_MATH_DSP)
  63.  
  64. /* Run the below code for Cortex-M4 and Cortex-M3 */
  65.  
  66.  
  67.   /*loop Unrolling */
  68.   blkCnt = blockSize >> 2U;
  69.  
  70.   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
  71.    ** a second loop below computes the remaining 1 to 3 samples. */
  72.   while (blkCnt > 0U)
  73.   {
  74.     /* C = A + B */
  75.     /* Add and then store the results in the destination buffer. */
  76.     *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
  77.  
  78.     /* Decrement the loop counter */
  79.     blkCnt--;
  80.   }
  81.  
  82.   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  83.    ** No loop unrolling is used. */
  84.   blkCnt = blockSize % 0x4U;
  85.  
  86.   while (blkCnt > 0U)
  87.   {
  88.     /* C = A + B */
  89.     /* Add and then store the results in the destination buffer. */
  90.     *pDst++ = (q7_t) __SSAT(*pSrcA++ + *pSrcB++, 8);
  91.  
  92.     /* Decrement the loop counter */
  93.     blkCnt--;
  94.   }
  95.  
  96. #else
  97.  
  98.   /* Run the below code for Cortex-M0 */
  99.  
  100.  
  101.  
  102.   /* Initialize blkCnt with number of samples */
  103.   blkCnt = blockSize;
  104.  
  105.   while (blkCnt > 0U)
  106.   {
  107.     /* C = A + B */
  108.     /* Add and then store the results in the destination buffer. */
  109.     *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ + *pSrcB++, 8);
  110.  
  111.     /* Decrement the loop counter */
  112.     blkCnt--;
  113.   }
  114.  
  115. #endif /* #if defined (ARM_MATH_DSP) */
  116.  
  117.  
  118. }
  119.  
  120. /**
  121.  * @} end of BasicAdd group
  122.  */
  123.