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  1. /* ----------------------------------------------------------------------    
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
  3. *    
  4. * $Date:        19. March 2015
  5. * $Revision:    V.1.4.5
  6. *    
  7. * Project:          CMSIS DSP Library    
  8. * Title:                arm_scale_q7.c    
  9. *    
  10. * Description:  Multiplies a Q7 vector by a scalar.    
  11. *    
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *  
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. *   - Redistributions of source code must retain the above copyright
  18. *     notice, this list of conditions and the following disclaimer.
  19. *   - Redistributions in binary form must reproduce the above copyright
  20. *     notice, this list of conditions and the following disclaimer in
  21. *     the documentation and/or other materials provided with the
  22. *     distribution.
  23. *   - Neither the name of ARM LIMITED nor the names of its contributors
  24. *     may be used to endorse or promote products derived from this
  25. *     software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.  
  39. * -------------------------------------------------------------------- */
  40.  
  41. #include "arm_math.h"
  42.  
  43. /**    
  44.  * @ingroup groupMath    
  45.  */
  46.  
  47. /**    
  48.  * @addtogroup scale    
  49.  * @{    
  50.  */
  51.  
  52. /**    
  53.  * @brief Multiplies a Q7 vector by a scalar.    
  54.  * @param[in]       *pSrc points to the input vector    
  55.  * @param[in]       scaleFract fractional portion of the scale value    
  56.  * @param[in]       shift number of bits to shift the result by    
  57.  * @param[out]      *pDst points to the output vector    
  58.  * @param[in]       blockSize number of samples in the vector    
  59.  * @return none.    
  60.  *    
  61.  * <b>Scaling and Overflow Behavior:</b>    
  62.  * \par    
  63.  * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.7 format.    
  64.  * These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format.    
  65.  */
  66.  
  67. void arm_scale_q7(
  68.   q7_t * pSrc,
  69.   q7_t scaleFract,
  70.   int8_t shift,
  71.   q7_t * pDst,
  72.   uint32_t blockSize)
  73. {
  74.   int8_t kShift = 7 - shift;                     /* shift to apply after scaling */
  75.   uint32_t blkCnt;                               /* loop counter */
  76.  
  77. #ifndef ARM_MATH_CM0_FAMILY
  78.  
  79. /* Run the below code for Cortex-M4 and Cortex-M3 */
  80.   q7_t in1, in2, in3, in4, out1, out2, out3, out4;      /* Temporary variables to store input & output */
  81.  
  82.  
  83.   /*loop Unrolling */
  84.   blkCnt = blockSize >> 2u;
  85.  
  86.  
  87.   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
  88.    ** a second loop below computes the remaining 1 to 3 samples. */
  89.   while(blkCnt > 0u)
  90.   {
  91.     /* Reading 4 inputs from memory */
  92.     in1 = *pSrc++;
  93.     in2 = *pSrc++;
  94.     in3 = *pSrc++;
  95.     in4 = *pSrc++;
  96.  
  97.     /* C = A * scale */
  98.     /* Scale the inputs and then store the results in the temporary variables. */
  99.     out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8));
  100.     out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8));
  101.     out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8));
  102.     out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8));
  103.  
  104.     /* Packing the individual outputs into 32bit and storing in    
  105.      * destination buffer in single write */
  106.     *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
  107.  
  108.     /* Decrement the loop counter */
  109.     blkCnt--;
  110.   }
  111.  
  112.   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
  113.    ** No loop unrolling is used. */
  114.   blkCnt = blockSize % 0x4u;
  115.  
  116.   while(blkCnt > 0u)
  117.   {
  118.     /* C = A * scale */
  119.     /* Scale the input and then store the result in the destination buffer. */
  120.     *pDst++ = (q7_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 8));
  121.  
  122.     /* Decrement the loop counter */
  123.     blkCnt--;
  124.   }
  125.  
  126. #else
  127.  
  128.   /* Run the below code for Cortex-M0 */
  129.  
  130.   /* Initialize blkCnt with number of samples */
  131.   blkCnt = blockSize;
  132.  
  133.   while(blkCnt > 0u)
  134.   {
  135.     /* C = A * scale */
  136.     /* Scale the input and then store the result in the destination buffer. */
  137.     *pDst++ = (q7_t) (__SSAT((((q15_t) * pSrc++ * scaleFract) >> kShift), 8));
  138.  
  139.     /* Decrement the loop counter */
  140.     blkCnt--;
  141.   }
  142.  
  143. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  144.  
  145. }
  146.  
  147. /**    
  148.  * @} end of scale group    
  149.  */
  150.