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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32l1xx_ll_pwr.h
  4.   * @author  MCD Application Team
  5.   * @brief   Header file of PWR LL module.
  6.   ******************************************************************************
  7.   * @attention
  8.   *
  9.   * Copyright (c) 2017 STMicroelectronics.
  10.   * All rights reserved.
  11.   *
  12.   * This software is licensed under terms that can be found in the LICENSE file
  13.   * in the root directory of this software component.
  14.   * If no LICENSE file comes with this software, it is provided AS-IS.
  15.   *
  16.   ******************************************************************************
  17.   */
  18.  
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef __STM32L1xx_LL_PWR_H
  21. #define __STM32L1xx_LL_PWR_H
  22.  
  23. #ifdef __cplusplus
  24. extern "C" {
  25. #endif
  26.  
  27. /* Includes ------------------------------------------------------------------*/
  28. #include "stm32l1xx.h"
  29.  
  30. /** @addtogroup STM32L1xx_LL_Driver
  31.   * @{
  32.   */
  33.  
  34. #if defined(PWR)
  35.  
  36. /** @defgroup PWR_LL PWR
  37.   * @{
  38.   */
  39.  
  40. /* Private types -------------------------------------------------------------*/
  41. /* Private variables ---------------------------------------------------------*/
  42. /* Private constants ---------------------------------------------------------*/
  43. /* Private macros ------------------------------------------------------------*/
  44. /* Exported types ------------------------------------------------------------*/
  45. /* Exported constants --------------------------------------------------------*/
  46. /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
  47.   * @{
  48.   */
  49.  
  50. /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
  51.   * @brief    Flags defines which can be used with LL_PWR_WriteReg function
  52.   * @{
  53.   */
  54. #define LL_PWR_CR_CSBF                     PWR_CR_CSBF            /*!< Clear standby flag */
  55. #define LL_PWR_CR_CWUF                     PWR_CR_CWUF            /*!< Clear wakeup flag */
  56. /**
  57.   * @}
  58.   */
  59.  
  60. /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
  61.   * @brief    Flags defines which can be used with LL_PWR_ReadReg function
  62.   * @{
  63.   */
  64. #define LL_PWR_CSR_WUF                     PWR_CSR_WUF            /*!< Wakeup flag */
  65. #define LL_PWR_CSR_SBF                     PWR_CSR_SBF            /*!< Standby flag */
  66. #if defined(PWR_PVD_SUPPORT)
  67. #define LL_PWR_CSR_PVDO                    PWR_CSR_PVDO           /*!< Power voltage detector output flag */
  68. #endif /* PWR_PVD_SUPPORT */
  69. #if defined(PWR_CSR_VREFINTRDYF)
  70. #define LL_PWR_CSR_VREFINTRDYF             PWR_CSR_VREFINTRDYF    /*!< VREFINT ready flag */
  71. #endif /* PWR_CSR_VREFINTRDYF */
  72. #define LL_PWR_CSR_VOS                     PWR_CSR_VOSF           /*!< Voltage scaling select flag */
  73. #define LL_PWR_CSR_REGLPF                  PWR_CSR_REGLPF         /*!< Regulator low power flag */
  74. #define LL_PWR_CSR_EWUP1                   PWR_CSR_EWUP1          /*!< Enable WKUP pin 1 */
  75. #define LL_PWR_CSR_EWUP2                   PWR_CSR_EWUP2          /*!< Enable WKUP pin 2 */
  76. #if defined(PWR_CSR_EWUP3)
  77. #define LL_PWR_CSR_EWUP3                   PWR_CSR_EWUP3          /*!< Enable WKUP pin 3 */
  78. #endif /* PWR_CSR_EWUP3 */
  79. /**
  80.   * @}
  81.   */
  82.  
  83. /** @defgroup PWR_LL_EC_REGU_VOLTAGE Regulator Voltage
  84.   * @{
  85.   */
  86. #define LL_PWR_REGU_VOLTAGE_SCALE1         (PWR_CR_VOS_0)                   /*!< 1.8V (range 1) */
  87. #define LL_PWR_REGU_VOLTAGE_SCALE2         (PWR_CR_VOS_1)                   /*!< 1.5V (range 2) */
  88. #define LL_PWR_REGU_VOLTAGE_SCALE3         (PWR_CR_VOS_0 | PWR_CR_VOS_1)    /*!< 1.2V (range 3) */
  89. /**
  90.   * @}
  91.   */
  92.  
  93. /** @defgroup PWR_LL_EC_MODE_PWR Mode Power
  94.   * @{
  95.   */
  96. #define LL_PWR_MODE_STOP                      0x00000000U                    /*!< Enter Stop mode when the CPU enters deepsleep */
  97. #define LL_PWR_MODE_STANDBY                   (PWR_CR_PDDS)                  /*!< Enter Standby mode when the CPU enters deepsleep */
  98. /**
  99.   * @}
  100.   */
  101.  
  102. /** @defgroup PWR_LL_EC_REGU_MODE_LP_MODES  Regulator Mode In Low Power Modes
  103.   * @{
  104.   */
  105. #define LL_PWR_REGU_LPMODES_MAIN           0x00000000U        /*!< Voltage Regulator in main mode during deepsleep/sleep/low-power run mode */
  106. #define LL_PWR_REGU_LPMODES_LOW_POWER      (PWR_CR_LPSDSR)    /*!< Voltage Regulator in low-power mode during deepsleep/sleep/low-power run mode */
  107. /**
  108.   * @}
  109.   */
  110. #if defined(PWR_CR_LPDS)
  111. /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE  Regulator Mode In Deep Sleep Mode
  112.  * @{
  113.  */
  114. #define LL_PWR_REGU_DSMODE_MAIN        0x00000000U           /*!< Voltage Regulator in main mode during deepsleep mode */
  115. #define LL_PWR_REGU_DSMODE_LOW_POWER   (PWR_CR_LPDS)         /*!< Voltage Regulator in low-power mode during deepsleep mode */
  116. /**
  117.   * @}
  118.   */
  119. #endif /* PWR_CR_LPDS */
  120.  
  121. #if defined(PWR_PVD_SUPPORT)
  122. /** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
  123.   * @{
  124.   */
  125. #define LL_PWR_PVDLEVEL_0                  (PWR_CR_PLS_LEV0)      /*!< Voltage threshold detected by PVD 1.9 V */
  126. #define LL_PWR_PVDLEVEL_1                  (PWR_CR_PLS_LEV1)      /*!< Voltage threshold detected by PVD 2.1 V */
  127. #define LL_PWR_PVDLEVEL_2                  (PWR_CR_PLS_LEV2)      /*!< Voltage threshold detected by PVD 2.3 V */
  128. #define LL_PWR_PVDLEVEL_3                  (PWR_CR_PLS_LEV3)      /*!< Voltage threshold detected by PVD 2.5 V */
  129. #define LL_PWR_PVDLEVEL_4                  (PWR_CR_PLS_LEV4)      /*!< Voltage threshold detected by PVD 2.7 V */
  130. #define LL_PWR_PVDLEVEL_5                  (PWR_CR_PLS_LEV5)      /*!< Voltage threshold detected by PVD 2.9 V */
  131. #define LL_PWR_PVDLEVEL_6                  (PWR_CR_PLS_LEV6)      /*!< Voltage threshold detected by PVD 3.1 V */
  132. #define LL_PWR_PVDLEVEL_7                  (PWR_CR_PLS_LEV7)      /*!< External input analog voltage   (Compare internally to VREFINT) */
  133. /**
  134.   * @}
  135.   */
  136. #endif /* PWR_PVD_SUPPORT */
  137. /** @defgroup PWR_LL_EC_WAKEUP_PIN  Wakeup Pins
  138.   * @{
  139.   */
  140. #define LL_PWR_WAKEUP_PIN1                 (PWR_CSR_EWUP1)        /*!< WKUP pin 1 : PA0 */
  141. #define LL_PWR_WAKEUP_PIN2                 (PWR_CSR_EWUP2)        /*!< WKUP pin 2 : PC13 */
  142. #if defined(PWR_CSR_EWUP3)
  143. #define LL_PWR_WAKEUP_PIN3                 (PWR_CSR_EWUP3)        /*!< WKUP pin 3 : PE6 or PA2 according to device */
  144. #endif /* PWR_CSR_EWUP3 */
  145. /**
  146.   * @}
  147.   */
  148.  
  149. /**
  150.   * @}
  151.   */
  152.  
  153.  
  154. /* Exported macro ------------------------------------------------------------*/
  155. /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
  156.   * @{
  157.   */
  158.  
  159. /** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
  160.   * @{
  161.   */
  162.  
  163. /**
  164.   * @brief  Write a value in PWR register
  165.   * @param  __REG__ Register to be written
  166.   * @param  __VALUE__ Value to be written in the register
  167.   * @retval None
  168.   */
  169. #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
  170.  
  171. /**
  172.   * @brief  Read a value in PWR register
  173.   * @param  __REG__ Register to be read
  174.   * @retval Register value
  175.   */
  176. #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
  177. /**
  178.   * @}
  179.   */
  180.  
  181. /**
  182.   * @}
  183.   */
  184.  
  185. /* Exported functions --------------------------------------------------------*/
  186. /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
  187.   * @{
  188.   */
  189.  
  190. /** @defgroup PWR_LL_EF_Configuration Configuration
  191.   * @{
  192.   */
  193. /**
  194.   * @brief  Switch the Regulator from main mode to low-power mode
  195.   * @rmtoll CR    LPRUN       LL_PWR_EnableLowPowerRunMode
  196.   * @note   Remind to set the Regulator to low power before enabling
  197.   *         LowPower run mode (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER).
  198.   * @retval None
  199.   */
  200. __STATIC_INLINE void LL_PWR_EnableLowPowerRunMode(void)
  201. {
  202.   SET_BIT(PWR->CR, PWR_CR_LPRUN);
  203. }
  204.  
  205. /**
  206.   * @brief  Switch the Regulator from low-power mode to main mode
  207.   * @rmtoll CR    LPRUN       LL_PWR_DisableLowPowerRunMode
  208.   * @retval None
  209.   */
  210. __STATIC_INLINE void LL_PWR_DisableLowPowerRunMode(void)
  211. {
  212.   CLEAR_BIT(PWR->CR, PWR_CR_LPRUN);
  213. }
  214.  
  215. /**
  216.   * @brief  Check if the Regulator is in low-power mode
  217.   * @rmtoll CR    LPRUN       LL_PWR_IsEnabledLowPowerRunMode
  218.   * @retval State of bit (1 or 0).
  219.   */
  220. __STATIC_INLINE uint32_t LL_PWR_IsEnabledLowPowerRunMode(void)
  221. {
  222.   return ((READ_BIT(PWR->CR, PWR_CR_LPRUN) == PWR_CR_LPRUN) ? 1UL : 0UL);
  223. }
  224.  
  225. /**
  226.   * @brief  Set voltage Regulator to low-power and switch from
  227.   *         run main mode to run low-power mode.
  228.   * @rmtoll CR    LPSDSR       LL_PWR_EnterLowPowerRunMode\n
  229.   *         CR    LPRUN        LL_PWR_EnterLowPowerRunMode
  230.   * @note   This "high level" function is introduced to provide functional
  231.   *         compatibility with other families. Notice that the two registers
  232.   *         have to be written sequentially, so this function is not atomic.
  233.   *         To assure atomicity you can call separately the following functions:
  234.   *         - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_LOW_POWER);
  235.   *         - @ref LL_PWR_EnableLowPowerRunMode();
  236.   * @retval None
  237.   */
  238. __STATIC_INLINE void LL_PWR_EnterLowPowerRunMode(void)
  239. {
  240.   SET_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_LOW_POWER) */
  241.   SET_BIT(PWR->CR, PWR_CR_LPRUN);  /* => LL_PWR_EnableLowPowerRunMode() */
  242. }
  243.  
  244. /**
  245.   * @brief  Set voltage Regulator to main and switch from
  246.   *         run main mode to low-power mode.
  247.   * @rmtoll CR    LPSDSR       LL_PWR_ExitLowPowerRunMode\n
  248.   *         CR    LPRUN        LL_PWR_ExitLowPowerRunMode
  249.   * @note   This "high level" function is introduced to provide functional
  250.   *         compatibility with other families. Notice that the two registers
  251.   *         have to be written sequentially, so this function is not atomic.
  252.   *         To assure atomicity you can call separately the following functions:
  253.   *         - @ref LL_PWR_DisableLowPowerRunMode();
  254.   *         - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_MAIN);
  255.   * @retval None
  256.   */
  257. __STATIC_INLINE void LL_PWR_ExitLowPowerRunMode(void)
  258. {
  259.   CLEAR_BIT(PWR->CR, PWR_CR_LPRUN);   /* => LL_PWR_DisableLowPowerRunMode() */
  260.   CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR);  /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_MAIN) */
  261. }
  262. /**
  263.   * @brief  Set the main internal Regulator output voltage
  264.   * @rmtoll CR    VOS       LL_PWR_SetRegulVoltageScaling
  265.   * @param  VoltageScaling This parameter can be one of the following values:
  266.   *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1
  267.   *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
  268.   *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3
  269.   * @retval None
  270.   */
  271. __STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling)
  272. {
  273.   MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling);
  274. }
  275.  
  276. /**
  277.   * @brief  Get the main internal Regulator output voltage
  278.   * @rmtoll CR    VOS       LL_PWR_GetRegulVoltageScaling
  279.   * @retval Returned value can be one of the following values:
  280.   *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1
  281.   *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
  282.   *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3
  283.   */
  284. __STATIC_INLINE uint32_t LL_PWR_GetRegulVoltageScaling(void)
  285. {
  286.   return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_VOS));
  287. }
  288.  
  289. /**
  290.   * @brief  Enable access to the backup domain
  291.   * @rmtoll CR    DBP       LL_PWR_EnableBkUpAccess
  292.   * @retval None
  293.   */
  294. __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
  295. {
  296.   SET_BIT(PWR->CR, PWR_CR_DBP);
  297. }
  298.  
  299. /**
  300.   * @brief  Disable access to the backup domain
  301.   * @rmtoll CR    DBP       LL_PWR_DisableBkUpAccess
  302.   * @retval None
  303.   */
  304. __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
  305. {
  306.   CLEAR_BIT(PWR->CR, PWR_CR_DBP);
  307. }
  308.  
  309. /**
  310.   * @brief  Check if the backup domain is enabled
  311.   * @rmtoll CR    DBP       LL_PWR_IsEnabledBkUpAccess
  312.   * @retval State of bit (1 or 0).
  313.   */
  314. __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
  315. {
  316.   return ((READ_BIT(PWR->CR, PWR_CR_DBP) == PWR_CR_DBP) ? 1UL : 0UL);
  317. }
  318.  
  319. /**
  320.   * @brief  Set voltage Regulator mode during low power modes
  321.   * @rmtoll CR    LPSDSR       LL_PWR_SetRegulModeLP
  322.   * @param  RegulMode This parameter can be one of the following values:
  323.   *         @arg @ref LL_PWR_REGU_LPMODES_MAIN
  324.   *         @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER
  325.   * @retval None
  326.   */
  327. __STATIC_INLINE void LL_PWR_SetRegulModeLP(uint32_t RegulMode)
  328. {
  329.   MODIFY_REG(PWR->CR, PWR_CR_LPSDSR, RegulMode);
  330. }
  331.  
  332. /**
  333.   * @brief  Get voltage Regulator mode during low power modes
  334.   * @rmtoll CR    LPSDSR       LL_PWR_GetRegulModeLP
  335.   * @retval Returned value can be one of the following values:
  336.   *         @arg @ref LL_PWR_REGU_LPMODES_MAIN
  337.   *         @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER
  338.   */
  339. __STATIC_INLINE uint32_t LL_PWR_GetRegulModeLP(void)
  340. {
  341.   return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPSDSR));
  342. }
  343.  
  344. #if defined(PWR_CR_LPDS)
  345. /**
  346.   * @brief  Set voltage Regulator mode during deep sleep mode
  347.   * @rmtoll CR    LPDS         LL_PWR_SetRegulModeDS
  348.   * @param  RegulMode This parameter can be one of the following values:
  349.   *         @arg @ref LL_PWR_REGU_DSMODE_MAIN
  350.   *         @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
  351.   * @retval None
  352.   */
  353. __STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
  354. {
  355.   MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
  356. }
  357.  
  358. /**
  359.   * @brief  Get voltage Regulator mode during deep sleep mode
  360.   * @rmtoll CR    LPDS         LL_PWR_GetRegulModeDS
  361.   * @retval Returned value can be one of the following values:
  362.   *         @arg @ref LL_PWR_REGU_DSMODE_MAIN
  363.   *         @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
  364.   */
  365. __STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
  366. {
  367.   return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
  368. }
  369. #endif /* PWR_CR_LPDS */
  370.  
  371. /**
  372.   * @brief  Set Power Down mode when CPU enters deepsleep
  373.   * @rmtoll CR    PDDS         LL_PWR_SetPowerMode
  374.   * @param  PDMode This parameter can be one of the following values:
  375.   *         @arg @ref LL_PWR_MODE_STOP
  376.   *         @arg @ref LL_PWR_MODE_STANDBY
  377.   * @note   Set the Regulator to low power (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER)
  378.   *         before setting MODE_STOP. If the Regulator remains in "main mode",
  379.   *         it consumes more power without providing any additional feature.
  380.   *         In MODE_STANDBY the Regulator is automatically off.
  381.   * @retval None
  382.   */
  383. __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
  384. {
  385.   MODIFY_REG(PWR->CR, PWR_CR_PDDS, PDMode);
  386. }
  387.  
  388. /**
  389.   * @brief  Get Power Down mode when CPU enters deepsleep
  390.   * @rmtoll CR    PDDS         LL_PWR_GetPowerMode
  391.   * @retval Returned value can be one of the following values:
  392.   *         @arg @ref LL_PWR_MODE_STOP
  393.   *         @arg @ref LL_PWR_MODE_STANDBY
  394.   */
  395. __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
  396. {
  397.   return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PDDS));
  398. }
  399.  
  400. #if defined(PWR_PVD_SUPPORT)
  401. /**
  402.   * @brief  Configure the voltage threshold detected by the Power Voltage Detector
  403.   * @rmtoll CR    PLS       LL_PWR_SetPVDLevel
  404.   * @param  PVDLevel This parameter can be one of the following values:
  405.   *         @arg @ref LL_PWR_PVDLEVEL_0
  406.   *         @arg @ref LL_PWR_PVDLEVEL_1
  407.   *         @arg @ref LL_PWR_PVDLEVEL_2
  408.   *         @arg @ref LL_PWR_PVDLEVEL_3
  409.   *         @arg @ref LL_PWR_PVDLEVEL_4
  410.   *         @arg @ref LL_PWR_PVDLEVEL_5
  411.   *         @arg @ref LL_PWR_PVDLEVEL_6
  412.   *         @arg @ref LL_PWR_PVDLEVEL_7
  413.   * @retval None
  414.   */
  415. __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
  416. {
  417.   MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
  418. }
  419.  
  420. /**
  421.   * @brief  Get the voltage threshold detection
  422.   * @rmtoll CR    PLS       LL_PWR_GetPVDLevel
  423.   * @retval Returned value can be one of the following values:
  424.   *         @arg @ref LL_PWR_PVDLEVEL_0
  425.   *         @arg @ref LL_PWR_PVDLEVEL_1
  426.   *         @arg @ref LL_PWR_PVDLEVEL_2
  427.   *         @arg @ref LL_PWR_PVDLEVEL_3
  428.   *         @arg @ref LL_PWR_PVDLEVEL_4
  429.   *         @arg @ref LL_PWR_PVDLEVEL_5
  430.   *         @arg @ref LL_PWR_PVDLEVEL_6
  431.   *         @arg @ref LL_PWR_PVDLEVEL_7
  432.   */
  433. __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
  434. {
  435.   return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
  436. }
  437.  
  438. /**
  439.   * @brief  Enable Power Voltage Detector
  440.   * @rmtoll CR    PVDE       LL_PWR_EnablePVD
  441.   * @retval None
  442.   */
  443. __STATIC_INLINE void LL_PWR_EnablePVD(void)
  444. {
  445.   SET_BIT(PWR->CR, PWR_CR_PVDE);
  446. }
  447.  
  448. /**
  449.   * @brief  Disable Power Voltage Detector
  450.   * @rmtoll CR    PVDE       LL_PWR_DisablePVD
  451.   * @retval None
  452.   */
  453. __STATIC_INLINE void LL_PWR_DisablePVD(void)
  454. {
  455.   CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
  456. }
  457.  
  458. /**
  459.   * @brief  Check if Power Voltage Detector is enabled
  460.   * @rmtoll CR    PVDE       LL_PWR_IsEnabledPVD
  461.   * @retval State of bit (1 or 0).
  462.   */
  463. __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
  464. {
  465.   return ((READ_BIT(PWR->CR, PWR_CR_PVDE) == PWR_CR_PVDE) ? 1UL : 0UL);
  466. }
  467. #endif /* PWR_PVD_SUPPORT */
  468.  
  469. /**
  470.   * @brief  Enable the WakeUp PINx functionality
  471.   * @rmtoll CSR   EWUP1       LL_PWR_EnableWakeUpPin\n
  472.   * @rmtoll CSR   EWUP2       LL_PWR_EnableWakeUpPin\n
  473.   * @rmtoll CSR   EWUP3       LL_PWR_EnableWakeUpPin
  474.   * @param  WakeUpPin This parameter can be one of the following values:
  475.   *         @arg @ref LL_PWR_WAKEUP_PIN1
  476.   *         @arg @ref LL_PWR_WAKEUP_PIN2
  477.   *         @arg @ref LL_PWR_WAKEUP_PIN3 (*)
  478.   *
  479.   *         (*) not available on all devices
  480.   * @retval None
  481.   */
  482. __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
  483. {
  484.   SET_BIT(PWR->CSR, WakeUpPin);
  485. }
  486.  
  487. /**
  488.   * @brief  Disable the WakeUp PINx functionality
  489.   * @rmtoll CSR   EWUP1       LL_PWR_DisableWakeUpPin\n
  490.   * @rmtoll CSR   EWUP2       LL_PWR_DisableWakeUpPin\n
  491.   * @rmtoll CSR   EWUP3       LL_PWR_DisableWakeUpPin
  492.   * @param  WakeUpPin This parameter can be one of the following values:
  493.   *         @arg @ref LL_PWR_WAKEUP_PIN1
  494.   *         @arg @ref LL_PWR_WAKEUP_PIN2
  495.   *         @arg @ref LL_PWR_WAKEUP_PIN3 (*)
  496.   *
  497.   *         (*) not available on all devices
  498.   * @retval None
  499.   */
  500. __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
  501. {
  502.   CLEAR_BIT(PWR->CSR, WakeUpPin);
  503. }
  504.  
  505. /**
  506.   * @brief  Check if the WakeUp PINx functionality is enabled
  507.   * @rmtoll CSR   EWUP1       LL_PWR_IsEnabledWakeUpPin\n
  508.   * @rmtoll CSR   EWUP2       LL_PWR_IsEnabledWakeUpPin\n
  509.   * @rmtoll CSR   EWUP3       LL_PWR_IsEnabledWakeUpPin
  510.   * @param  WakeUpPin This parameter can be one of the following values:
  511.   *         @arg @ref LL_PWR_WAKEUP_PIN1
  512.   *         @arg @ref LL_PWR_WAKEUP_PIN2
  513.   *         @arg @ref LL_PWR_WAKEUP_PIN3 (*)
  514.   *
  515.   *         (*) not available on all devices
  516.   * @retval State of bit (1 or 0).
  517.   */
  518. __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
  519. {
  520.   return ((READ_BIT(PWR->CSR, WakeUpPin) == WakeUpPin) ? 1UL : 0UL);
  521. }
  522.  
  523. /**
  524.   * @brief  Enable ultra low-power mode by enabling VREFINT switch off in low-power modes
  525.   * @rmtoll CR    ULP       LL_PWR_EnableUltraLowPower
  526.   * @retval None
  527.   */
  528. __STATIC_INLINE void LL_PWR_EnableUltraLowPower(void)
  529. {
  530.   SET_BIT(PWR->CR, PWR_CR_ULP);
  531. }
  532.  
  533. /**
  534.   * @brief  Disable ultra low-power mode by disabling VREFINT switch off in low-power modes
  535.   * @rmtoll CR    ULP       LL_PWR_DisableUltraLowPower
  536.   * @retval None
  537.   */
  538. __STATIC_INLINE void LL_PWR_DisableUltraLowPower(void)
  539. {
  540.   CLEAR_BIT(PWR->CR, PWR_CR_ULP);
  541. }
  542.  
  543. /**
  544.   * @brief  Check if ultra low-power mode is enabled by checking if VREFINT switch off in low-power modes is enabled
  545.   * @rmtoll CR    ULP       LL_PWR_IsEnabledUltraLowPower
  546.   * @retval State of bit (1 or 0).
  547.   */
  548. __STATIC_INLINE uint32_t LL_PWR_IsEnabledUltraLowPower(void)
  549. {
  550.   return ((READ_BIT(PWR->CR, PWR_CR_ULP) == PWR_CR_ULP) ? 1UL : 0UL);
  551. }
  552.  
  553. /**
  554.   * @brief  Enable fast wakeup by ignoring VREFINT startup time when exiting from low-power mode
  555.   * @rmtoll CR    FWU       LL_PWR_EnableFastWakeUp
  556.   * @note   Works in conjunction with ultra low power mode.
  557.   * @retval None
  558.   */
  559. __STATIC_INLINE void LL_PWR_EnableFastWakeUp(void)
  560. {
  561.   SET_BIT(PWR->CR, PWR_CR_FWU);
  562. }
  563.  
  564. /**
  565.   * @brief  Disable fast wakeup by waiting VREFINT startup time when exiting from low-power mode
  566.   * @rmtoll CR    FWU       LL_PWR_DisableFastWakeUp
  567.   * @note   Works in conjunction with ultra low power mode.
  568.   * @retval None
  569.   */
  570. __STATIC_INLINE void LL_PWR_DisableFastWakeUp(void)
  571. {
  572.   CLEAR_BIT(PWR->CR, PWR_CR_FWU);
  573. }
  574.  
  575. /**
  576.   * @brief  Check if fast wakeup is enabled by checking if VREFINT startup time when exiting from low-power mode is ignored
  577.   * @rmtoll CR    FWU       LL_PWR_IsEnabledFastWakeUp
  578.   * @retval State of bit (1 or 0).
  579.   */
  580. __STATIC_INLINE uint32_t LL_PWR_IsEnabledFastWakeUp(void)
  581. {
  582.   return ((READ_BIT(PWR->CR, PWR_CR_FWU) == PWR_CR_FWU) ? 1UL : 0UL);
  583. }
  584.  
  585.  
  586. /**
  587.   * @}
  588.   */
  589.  
  590. /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
  591.   * @{
  592.   */
  593.  
  594. /**
  595.   * @brief  Get Wake-up Flag
  596.   * @rmtoll CSR   WUF       LL_PWR_IsActiveFlag_WU
  597.   * @retval State of bit (1 or 0).
  598.   */
  599. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
  600. {
  601.   return ((READ_BIT(PWR->CSR, PWR_CSR_WUF) == PWR_CSR_WUF) ? 1UL : 0UL);
  602. }
  603.  
  604. /**
  605.   * @brief  Get Standby Flag
  606.   * @rmtoll CSR   SBF       LL_PWR_IsActiveFlag_SB
  607.   * @retval State of bit (1 or 0).
  608.   */
  609. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
  610. {
  611.   return ((READ_BIT(PWR->CSR, PWR_CSR_SBF) == PWR_CSR_SBF) ? 1UL : 0UL);
  612. }
  613.  
  614. #if defined(PWR_PVD_SUPPORT)
  615. /**
  616.   * @brief  Indicate whether VDD voltage is below the selected PVD threshold
  617.   * @rmtoll CSR   PVDO       LL_PWR_IsActiveFlag_PVDO
  618.   * @retval State of bit (1 or 0).
  619.   */
  620. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
  621. {
  622.   return ((READ_BIT(PWR->CSR, PWR_CSR_PVDO) == PWR_CSR_PVDO) ? 1UL : 0UL);
  623. }
  624. #endif /* PWR_PVD_SUPPORT */
  625.  
  626. #if defined(PWR_CSR_VREFINTRDYF)
  627. /**
  628.   * @brief  Get Internal Reference VrefInt Flag
  629.   * @rmtoll CSR   VREFINTRDYF       LL_PWR_IsActiveFlag_VREFINTRDY
  630.   * @retval State of bit (1 or 0).
  631.   */
  632. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VREFINTRDY(void)
  633. {
  634.   return ((READ_BIT(PWR->CSR, PWR_CSR_VREFINTRDYF) == PWR_CSR_VREFINTRDYF) ? 1UL : 0UL);
  635. }
  636. #endif /* PWR_CSR_VREFINTRDYF */
  637. /**
  638.   * @brief  Indicate whether the Regulator is ready in the selected voltage range or if its output voltage is still changing to the required voltage level
  639.   * @rmtoll CSR   VOSF       LL_PWR_IsActiveFlag_VOS
  640.   * @retval State of bit (1 or 0).
  641.   */
  642. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VOS(void)
  643. {
  644.   return ((READ_BIT(PWR->CSR, PWR_CSR_VOSF) == PWR_CSR_VOSF) ? 1UL : 0UL);
  645. }
  646. /**
  647.   * @brief Indicate whether the Regulator is ready in main mode or is in low-power mode
  648.   * @rmtoll CSR   REGLPF       LL_PWR_IsActiveFlag_REGLPF
  649.   * @note Take care, return value "0" means the Regulator is ready.  Return value "1" means the output voltage range is still changing.
  650.   * @retval State of bit (1 or 0).
  651.   */
  652. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_REGLPF(void)
  653. {
  654.   return ((READ_BIT(PWR->CSR, PWR_CSR_REGLPF) == PWR_CSR_REGLPF) ? 1UL : 0UL);
  655. }
  656. /**
  657.   * @brief  Clear Standby Flag
  658.   * @rmtoll CR   CSBF       LL_PWR_ClearFlag_SB
  659.   * @retval None
  660.   */
  661. __STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
  662. {
  663.   SET_BIT(PWR->CR, PWR_CR_CSBF);
  664. }
  665.  
  666. /**
  667.   * @brief  Clear Wake-up Flags
  668.   * @rmtoll CR   CWUF       LL_PWR_ClearFlag_WU
  669.   * @retval None
  670.   */
  671. __STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
  672. {
  673.   SET_BIT(PWR->CR, PWR_CR_CWUF);
  674. }
  675.  
  676. /**
  677.   * @}
  678.   */
  679.  
  680. #if defined(USE_FULL_LL_DRIVER)
  681. /** @defgroup PWR_LL_EF_Init De-initialization function
  682.   * @{
  683.   */
  684. ErrorStatus LL_PWR_DeInit(void);
  685. /**
  686.   * @}
  687.   */
  688. #endif /* USE_FULL_LL_DRIVER */
  689.  
  690. /** @defgroup PWR_LL_EF_Legacy_Functions PWR legacy functions name
  691.   * @{
  692.   */
  693. /* Old functions name kept for legacy purpose, to be replaced by the          */
  694. /* current functions name.                                                    */
  695. #define LL_PWR_IsActiveFlag_VOSF  LL_PWR_IsActiveFlag_VOS
  696. /**
  697.   * @}
  698.   */
  699.  
  700. /**
  701.   * @}
  702.   */
  703.  
  704. /**
  705.   * @}
  706.   */
  707.  
  708. #endif /* defined(PWR) */
  709.  
  710. /**
  711.   * @}
  712.   */
  713.  
  714. #ifdef __cplusplus
  715. }
  716. #endif
  717.  
  718. #endif /* __STM32L1xx_LL_PWR_H */
  719.