Subversion Repositories DashDisplay

Rev

Go to most recent revision | Blame | Compare with Previous | Last modification | View Log | Download | RSS feed

  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32l1xx_ll_pwr.h
  4.   * @author  MCD Application Team
  5.   * @brief   Header file of PWR LL module.
  6.   ******************************************************************************
  7.   * @attention
  8.   *
  9.   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  10.   * All rights reserved.</center></h2>
  11.   *
  12.   * This software component is licensed by ST under BSD 3-Clause license,
  13.   * the "License"; You may not use this file except in compliance with the
  14.   * License. You may obtain a copy of the License at:
  15.   *                        opensource.org/licenses/BSD-3-Clause
  16.   *
  17.   ******************************************************************************
  18.   */
  19.  
  20. /* Define to prevent recursive inclusion -------------------------------------*/
  21. #ifndef __STM32L1xx_LL_PWR_H
  22. #define __STM32L1xx_LL_PWR_H
  23.  
  24. #ifdef __cplusplus
  25. extern "C" {
  26. #endif
  27.  
  28. /* Includes ------------------------------------------------------------------*/
  29. #include "stm32l1xx.h"
  30.  
  31. /** @addtogroup STM32L1xx_LL_Driver
  32.   * @{
  33.   */
  34.  
  35. #if defined(PWR)
  36.  
  37. /** @defgroup PWR_LL PWR
  38.   * @{
  39.   */
  40.  
  41. /* Private types -------------------------------------------------------------*/
  42. /* Private variables ---------------------------------------------------------*/
  43. /* Private constants ---------------------------------------------------------*/
  44. /* Private macros ------------------------------------------------------------*/
  45. /* Exported types ------------------------------------------------------------*/
  46. /* Exported constants --------------------------------------------------------*/
  47. /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
  48.   * @{
  49.   */
  50.  
  51. /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
  52.   * @brief    Flags defines which can be used with LL_PWR_WriteReg function
  53.   * @{
  54.   */
  55. #define LL_PWR_CR_CSBF                     PWR_CR_CSBF            /*!< Clear standby flag */
  56. #define LL_PWR_CR_CWUF                     PWR_CR_CWUF            /*!< Clear wakeup flag */
  57. /**
  58.   * @}
  59.   */
  60.  
  61. /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
  62.   * @brief    Flags defines which can be used with LL_PWR_ReadReg function
  63.   * @{
  64.   */
  65. #define LL_PWR_CSR_WUF                     PWR_CSR_WUF            /*!< Wakeup flag */
  66. #define LL_PWR_CSR_SBF                     PWR_CSR_SBF            /*!< Standby flag */
  67. #if defined(PWR_PVD_SUPPORT)
  68. #define LL_PWR_CSR_PVDO                    PWR_CSR_PVDO           /*!< Power voltage detector output flag */
  69. #endif /* PWR_PVD_SUPPORT */
  70. #if defined(PWR_CSR_VREFINTRDYF)
  71. #define LL_PWR_CSR_VREFINTRDYF             PWR_CSR_VREFINTRDYF    /*!< VREFINT ready flag */
  72. #endif /* PWR_CSR_VREFINTRDYF */
  73. #define LL_PWR_CSR_VOS                     PWR_CSR_VOSF           /*!< Voltage scaling select flag */
  74. #define LL_PWR_CSR_REGLPF                  PWR_CSR_REGLPF         /*!< Regulator low power flag */
  75. #define LL_PWR_CSR_EWUP1                   PWR_CSR_EWUP1          /*!< Enable WKUP pin 1 */
  76. #define LL_PWR_CSR_EWUP2                   PWR_CSR_EWUP2          /*!< Enable WKUP pin 2 */
  77. #if defined(PWR_CSR_EWUP3)
  78. #define LL_PWR_CSR_EWUP3                   PWR_CSR_EWUP3          /*!< Enable WKUP pin 3 */
  79. #endif /* PWR_CSR_EWUP3 */
  80. /**
  81.   * @}
  82.   */
  83.  
  84. /** @defgroup PWR_LL_EC_REGU_VOLTAGE Regulator Voltage
  85.   * @{
  86.   */
  87. #define LL_PWR_REGU_VOLTAGE_SCALE1         (PWR_CR_VOS_0)                   /*!< 1.8V (range 1) */
  88. #define LL_PWR_REGU_VOLTAGE_SCALE2         (PWR_CR_VOS_1)                   /*!< 1.5V (range 2) */
  89. #define LL_PWR_REGU_VOLTAGE_SCALE3         (PWR_CR_VOS_0 | PWR_CR_VOS_1)    /*!< 1.2V (range 3) */
  90. /**
  91.   * @}
  92.   */
  93.  
  94. /** @defgroup PWR_LL_EC_MODE_PWR Mode Power
  95.   * @{
  96.   */
  97. #define LL_PWR_MODE_STOP                      0x00000000U                    /*!< Enter Stop mode when the CPU enters deepsleep */
  98. #define LL_PWR_MODE_STANDBY                   (PWR_CR_PDDS)                  /*!< Enter Standby mode when the CPU enters deepsleep */
  99. /**
  100.   * @}
  101.   */
  102.  
  103. /** @defgroup PWR_LL_EC_REGU_MODE_LP_MODES  Regulator Mode In Low Power Modes
  104.   * @{
  105.   */
  106. #define LL_PWR_REGU_LPMODES_MAIN           0x00000000U        /*!< Voltage Regulator in main mode during deepsleep/sleep/low-power run mode */
  107. #define LL_PWR_REGU_LPMODES_LOW_POWER      (PWR_CR_LPSDSR)    /*!< Voltage Regulator in low-power mode during deepsleep/sleep/low-power run mode */
  108. /**
  109.   * @}
  110.   */
  111. #if defined(PWR_CR_LPDS)
  112. /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE  Regulator Mode In Deep Sleep Mode
  113.  * @{
  114.  */
  115. #define LL_PWR_REGU_DSMODE_MAIN        0x00000000U           /*!< Voltage Regulator in main mode during deepsleep mode */
  116. #define LL_PWR_REGU_DSMODE_LOW_POWER   (PWR_CR_LPDS)         /*!< Voltage Regulator in low-power mode during deepsleep mode */
  117. /**
  118.   * @}
  119.   */
  120. #endif /* PWR_CR_LPDS */
  121.  
  122. #if defined(PWR_PVD_SUPPORT)
  123. /** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
  124.   * @{
  125.   */
  126. #define LL_PWR_PVDLEVEL_0                  (PWR_CR_PLS_LEV0)      /*!< Voltage threshold detected by PVD 1.9 V */
  127. #define LL_PWR_PVDLEVEL_1                  (PWR_CR_PLS_LEV1)      /*!< Voltage threshold detected by PVD 2.1 V */
  128. #define LL_PWR_PVDLEVEL_2                  (PWR_CR_PLS_LEV2)      /*!< Voltage threshold detected by PVD 2.3 V */
  129. #define LL_PWR_PVDLEVEL_3                  (PWR_CR_PLS_LEV3)      /*!< Voltage threshold detected by PVD 2.5 V */
  130. #define LL_PWR_PVDLEVEL_4                  (PWR_CR_PLS_LEV4)      /*!< Voltage threshold detected by PVD 2.7 V */
  131. #define LL_PWR_PVDLEVEL_5                  (PWR_CR_PLS_LEV5)      /*!< Voltage threshold detected by PVD 2.9 V */
  132. #define LL_PWR_PVDLEVEL_6                  (PWR_CR_PLS_LEV6)      /*!< Voltage threshold detected by PVD 3.1 V */
  133. #define LL_PWR_PVDLEVEL_7                  (PWR_CR_PLS_LEV7)      /*!< External input analog voltage   (Compare internally to VREFINT) */
  134. /**
  135.   * @}
  136.   */
  137. #endif /* PWR_PVD_SUPPORT */
  138. /** @defgroup PWR_LL_EC_WAKEUP_PIN  Wakeup Pins
  139.   * @{
  140.   */
  141. #define LL_PWR_WAKEUP_PIN1                 (PWR_CSR_EWUP1)        /*!< WKUP pin 1 : PA0 */
  142. #define LL_PWR_WAKEUP_PIN2                 (PWR_CSR_EWUP2)        /*!< WKUP pin 2 : PC13 */
  143. #if defined(PWR_CSR_EWUP3)
  144. #define LL_PWR_WAKEUP_PIN3                 (PWR_CSR_EWUP3)        /*!< WKUP pin 3 : PE6 or PA2 according to device */
  145. #endif /* PWR_CSR_EWUP3 */
  146. /**
  147.   * @}
  148.   */
  149.  
  150. /**
  151.   * @}
  152.   */
  153.  
  154.  
  155. /* Exported macro ------------------------------------------------------------*/
  156. /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
  157.   * @{
  158.   */
  159.  
  160. /** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
  161.   * @{
  162.   */
  163.  
  164. /**
  165.   * @brief  Write a value in PWR register
  166.   * @param  __REG__ Register to be written
  167.   * @param  __VALUE__ Value to be written in the register
  168.   * @retval None
  169.   */
  170. #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
  171.  
  172. /**
  173.   * @brief  Read a value in PWR register
  174.   * @param  __REG__ Register to be read
  175.   * @retval Register value
  176.   */
  177. #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
  178. /**
  179.   * @}
  180.   */
  181.  
  182. /**
  183.   * @}
  184.   */
  185.  
  186. /* Exported functions --------------------------------------------------------*/
  187. /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
  188.   * @{
  189.   */
  190.  
  191. /** @defgroup PWR_LL_EF_Configuration Configuration
  192.   * @{
  193.   */
  194. /**
  195.   * @brief  Switch the Regulator from main mode to low-power mode
  196.   * @rmtoll CR    LPRUN       LL_PWR_EnableLowPowerRunMode
  197.   * @note   Remind to set the Regulator to low power before enabling
  198.   *         LowPower run mode (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER).
  199.   * @retval None
  200.   */
  201. __STATIC_INLINE void LL_PWR_EnableLowPowerRunMode(void)
  202. {
  203.   SET_BIT(PWR->CR, PWR_CR_LPRUN);
  204. }
  205.  
  206. /**
  207.   * @brief  Switch the Regulator from low-power mode to main mode
  208.   * @rmtoll CR    LPRUN       LL_PWR_DisableLowPowerRunMode
  209.   * @retval None
  210.   */
  211. __STATIC_INLINE void LL_PWR_DisableLowPowerRunMode(void)
  212. {
  213.   CLEAR_BIT(PWR->CR, PWR_CR_LPRUN);
  214. }
  215.  
  216. /**
  217.   * @brief  Check if the Regulator is in low-power mode
  218.   * @rmtoll CR    LPRUN       LL_PWR_IsEnabledLowPowerRunMode
  219.   * @retval State of bit (1 or 0).
  220.   */
  221. __STATIC_INLINE uint32_t LL_PWR_IsEnabledLowPowerRunMode(void)
  222. {
  223.   return ((READ_BIT(PWR->CR, PWR_CR_LPRUN) == PWR_CR_LPRUN) ? 1UL : 0UL);
  224. }
  225.  
  226. /**
  227.   * @brief  Set voltage Regulator to low-power and switch from
  228.   *         run main mode to run low-power mode.
  229.   * @rmtoll CR    LPSDSR       LL_PWR_EnterLowPowerRunMode\n
  230.   *         CR    LPRUN        LL_PWR_EnterLowPowerRunMode
  231.   * @note   This "high level" function is introduced to provide functional
  232.   *         compatibility with other families. Notice that the two registers
  233.   *         have to be written sequentially, so this function is not atomic.
  234.   *         To assure atomicity you can call separately the following functions:
  235.   *         - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_LOW_POWER);
  236.   *         - @ref LL_PWR_EnableLowPowerRunMode();
  237.   * @retval None
  238.   */
  239. __STATIC_INLINE void LL_PWR_EnterLowPowerRunMode(void)
  240. {
  241.   SET_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_LOW_POWER) */
  242.   SET_BIT(PWR->CR, PWR_CR_LPRUN);  /* => LL_PWR_EnableLowPowerRunMode() */
  243. }
  244.  
  245. /**
  246.   * @brief  Set voltage Regulator to main and switch from
  247.   *         run main mode to low-power mode.
  248.   * @rmtoll CR    LPSDSR       LL_PWR_ExitLowPowerRunMode\n
  249.   *         CR    LPRUN        LL_PWR_ExitLowPowerRunMode
  250.   * @note   This "high level" function is introduced to provide functional
  251.   *         compatibility with other families. Notice that the two registers
  252.   *         have to be written sequentially, so this function is not atomic.
  253.   *         To assure atomicity you can call separately the following functions:
  254.   *         - @ref LL_PWR_DisableLowPowerRunMode();
  255.   *         - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_MAIN);
  256.   * @retval None
  257.   */
  258. __STATIC_INLINE void LL_PWR_ExitLowPowerRunMode(void)
  259. {
  260.   CLEAR_BIT(PWR->CR, PWR_CR_LPRUN);   /* => LL_PWR_DisableLowPowerRunMode() */
  261.   CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR);  /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_MAIN) */
  262. }
  263. /**
  264.   * @brief  Set the main internal Regulator output voltage
  265.   * @rmtoll CR    VOS       LL_PWR_SetRegulVoltageScaling
  266.   * @param  VoltageScaling This parameter can be one of the following values:
  267.   *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1
  268.   *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
  269.   *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3
  270.   * @retval None
  271.   */
  272. __STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling)
  273. {
  274.   MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling);
  275. }
  276.  
  277. /**
  278.   * @brief  Get the main internal Regulator output voltage
  279.   * @rmtoll CR    VOS       LL_PWR_GetRegulVoltageScaling
  280.   * @retval Returned value can be one of the following values:
  281.   *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1
  282.   *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
  283.   *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3
  284.   */
  285. __STATIC_INLINE uint32_t LL_PWR_GetRegulVoltageScaling(void)
  286. {
  287.   return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_VOS));
  288. }
  289.  
  290. /**
  291.   * @brief  Enable access to the backup domain
  292.   * @rmtoll CR    DBP       LL_PWR_EnableBkUpAccess
  293.   * @retval None
  294.   */
  295. __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
  296. {
  297.   SET_BIT(PWR->CR, PWR_CR_DBP);
  298. }
  299.  
  300. /**
  301.   * @brief  Disable access to the backup domain
  302.   * @rmtoll CR    DBP       LL_PWR_DisableBkUpAccess
  303.   * @retval None
  304.   */
  305. __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
  306. {
  307.   CLEAR_BIT(PWR->CR, PWR_CR_DBP);
  308. }
  309.  
  310. /**
  311.   * @brief  Check if the backup domain is enabled
  312.   * @rmtoll CR    DBP       LL_PWR_IsEnabledBkUpAccess
  313.   * @retval State of bit (1 or 0).
  314.   */
  315. __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
  316. {
  317.   return ((READ_BIT(PWR->CR, PWR_CR_DBP) == PWR_CR_DBP) ? 1UL : 0UL);
  318. }
  319.  
  320. /**
  321.   * @brief  Set voltage Regulator mode during low power modes
  322.   * @rmtoll CR    LPSDSR       LL_PWR_SetRegulModeLP
  323.   * @param  RegulMode This parameter can be one of the following values:
  324.   *         @arg @ref LL_PWR_REGU_LPMODES_MAIN
  325.   *         @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER
  326.   * @retval None
  327.   */
  328. __STATIC_INLINE void LL_PWR_SetRegulModeLP(uint32_t RegulMode)
  329. {
  330.   MODIFY_REG(PWR->CR, PWR_CR_LPSDSR, RegulMode);
  331. }
  332.  
  333. /**
  334.   * @brief  Get voltage Regulator mode during low power modes
  335.   * @rmtoll CR    LPSDSR       LL_PWR_GetRegulModeLP
  336.   * @retval Returned value can be one of the following values:
  337.   *         @arg @ref LL_PWR_REGU_LPMODES_MAIN
  338.   *         @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER
  339.   */
  340. __STATIC_INLINE uint32_t LL_PWR_GetRegulModeLP(void)
  341. {
  342.   return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPSDSR));
  343. }
  344.  
  345. #if defined(PWR_CR_LPDS)
  346. /**
  347.   * @brief  Set voltage Regulator mode during deep sleep mode
  348.   * @rmtoll CR    LPDS         LL_PWR_SetRegulModeDS
  349.   * @param  RegulMode This parameter can be one of the following values:
  350.   *         @arg @ref LL_PWR_REGU_DSMODE_MAIN
  351.   *         @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
  352.   * @retval None
  353.   */
  354. __STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
  355. {
  356.   MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
  357. }
  358.  
  359. /**
  360.   * @brief  Get voltage Regulator mode during deep sleep mode
  361.   * @rmtoll CR    LPDS         LL_PWR_GetRegulModeDS
  362.   * @retval Returned value can be one of the following values:
  363.   *         @arg @ref LL_PWR_REGU_DSMODE_MAIN
  364.   *         @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
  365.   */
  366. __STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
  367. {
  368.   return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
  369. }
  370. #endif /* PWR_CR_LPDS */
  371.  
  372. /**
  373.   * @brief  Set Power Down mode when CPU enters deepsleep
  374.   * @rmtoll CR    PDDS         LL_PWR_SetPowerMode
  375.   * @param  PDMode This parameter can be one of the following values:
  376.   *         @arg @ref LL_PWR_MODE_STOP
  377.   *         @arg @ref LL_PWR_MODE_STANDBY
  378.   * @note   Set the Regulator to low power (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER)
  379.   *         before setting MODE_STOP. If the Regulator remains in "main mode",
  380.   *         it consumes more power without providing any additional feature.
  381.   *         In MODE_STANDBY the Regulator is automatically off.
  382.   * @retval None
  383.   */
  384. __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
  385. {
  386.   MODIFY_REG(PWR->CR, PWR_CR_PDDS, PDMode);
  387. }
  388.  
  389. /**
  390.   * @brief  Get Power Down mode when CPU enters deepsleep
  391.   * @rmtoll CR    PDDS         LL_PWR_GetPowerMode
  392.   * @retval Returned value can be one of the following values:
  393.   *         @arg @ref LL_PWR_MODE_STOP
  394.   *         @arg @ref LL_PWR_MODE_STANDBY
  395.   */
  396. __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
  397. {
  398.   return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PDDS));
  399. }
  400.  
  401. #if defined(PWR_PVD_SUPPORT)
  402. /**
  403.   * @brief  Configure the voltage threshold detected by the Power Voltage Detector
  404.   * @rmtoll CR    PLS       LL_PWR_SetPVDLevel
  405.   * @param  PVDLevel This parameter can be one of the following values:
  406.   *         @arg @ref LL_PWR_PVDLEVEL_0
  407.   *         @arg @ref LL_PWR_PVDLEVEL_1
  408.   *         @arg @ref LL_PWR_PVDLEVEL_2
  409.   *         @arg @ref LL_PWR_PVDLEVEL_3
  410.   *         @arg @ref LL_PWR_PVDLEVEL_4
  411.   *         @arg @ref LL_PWR_PVDLEVEL_5
  412.   *         @arg @ref LL_PWR_PVDLEVEL_6
  413.   *         @arg @ref LL_PWR_PVDLEVEL_7
  414.   * @retval None
  415.   */
  416. __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
  417. {
  418.   MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
  419. }
  420.  
  421. /**
  422.   * @brief  Get the voltage threshold detection
  423.   * @rmtoll CR    PLS       LL_PWR_GetPVDLevel
  424.   * @retval Returned value can be one of the following values:
  425.   *         @arg @ref LL_PWR_PVDLEVEL_0
  426.   *         @arg @ref LL_PWR_PVDLEVEL_1
  427.   *         @arg @ref LL_PWR_PVDLEVEL_2
  428.   *         @arg @ref LL_PWR_PVDLEVEL_3
  429.   *         @arg @ref LL_PWR_PVDLEVEL_4
  430.   *         @arg @ref LL_PWR_PVDLEVEL_5
  431.   *         @arg @ref LL_PWR_PVDLEVEL_6
  432.   *         @arg @ref LL_PWR_PVDLEVEL_7
  433.   */
  434. __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
  435. {
  436.   return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
  437. }
  438.  
  439. /**
  440.   * @brief  Enable Power Voltage Detector
  441.   * @rmtoll CR    PVDE       LL_PWR_EnablePVD
  442.   * @retval None
  443.   */
  444. __STATIC_INLINE void LL_PWR_EnablePVD(void)
  445. {
  446.   SET_BIT(PWR->CR, PWR_CR_PVDE);
  447. }
  448.  
  449. /**
  450.   * @brief  Disable Power Voltage Detector
  451.   * @rmtoll CR    PVDE       LL_PWR_DisablePVD
  452.   * @retval None
  453.   */
  454. __STATIC_INLINE void LL_PWR_DisablePVD(void)
  455. {
  456.   CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
  457. }
  458.  
  459. /**
  460.   * @brief  Check if Power Voltage Detector is enabled
  461.   * @rmtoll CR    PVDE       LL_PWR_IsEnabledPVD
  462.   * @retval State of bit (1 or 0).
  463.   */
  464. __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
  465. {
  466.   return ((READ_BIT(PWR->CR, PWR_CR_PVDE) == PWR_CR_PVDE) ? 1UL : 0UL);
  467. }
  468. #endif /* PWR_PVD_SUPPORT */
  469.  
  470. /**
  471.   * @brief  Enable the WakeUp PINx functionality
  472.   * @rmtoll CSR   EWUP1       LL_PWR_EnableWakeUpPin\n
  473.   * @rmtoll CSR   EWUP2       LL_PWR_EnableWakeUpPin\n
  474.   * @rmtoll CSR   EWUP3       LL_PWR_EnableWakeUpPin
  475.   * @param  WakeUpPin This parameter can be one of the following values:
  476.   *         @arg @ref LL_PWR_WAKEUP_PIN1
  477.   *         @arg @ref LL_PWR_WAKEUP_PIN2
  478.   *         @arg @ref LL_PWR_WAKEUP_PIN3 (*)
  479.   *
  480.   *         (*) not available on all devices
  481.   * @retval None
  482.   */
  483. __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
  484. {
  485.   SET_BIT(PWR->CSR, WakeUpPin);
  486. }
  487.  
  488. /**
  489.   * @brief  Disable the WakeUp PINx functionality
  490.   * @rmtoll CSR   EWUP1       LL_PWR_DisableWakeUpPin\n
  491.   * @rmtoll CSR   EWUP2       LL_PWR_DisableWakeUpPin\n
  492.   * @rmtoll CSR   EWUP3       LL_PWR_DisableWakeUpPin
  493.   * @param  WakeUpPin This parameter can be one of the following values:
  494.   *         @arg @ref LL_PWR_WAKEUP_PIN1
  495.   *         @arg @ref LL_PWR_WAKEUP_PIN2
  496.   *         @arg @ref LL_PWR_WAKEUP_PIN3 (*)
  497.   *
  498.   *         (*) not available on all devices
  499.   * @retval None
  500.   */
  501. __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
  502. {
  503.   CLEAR_BIT(PWR->CSR, WakeUpPin);
  504. }
  505.  
  506. /**
  507.   * @brief  Check if the WakeUp PINx functionality is enabled
  508.   * @rmtoll CSR   EWUP1       LL_PWR_IsEnabledWakeUpPin\n
  509.   * @rmtoll CSR   EWUP2       LL_PWR_IsEnabledWakeUpPin\n
  510.   * @rmtoll CSR   EWUP3       LL_PWR_IsEnabledWakeUpPin
  511.   * @param  WakeUpPin This parameter can be one of the following values:
  512.   *         @arg @ref LL_PWR_WAKEUP_PIN1
  513.   *         @arg @ref LL_PWR_WAKEUP_PIN2
  514.   *         @arg @ref LL_PWR_WAKEUP_PIN3 (*)
  515.   *
  516.   *         (*) not available on all devices
  517.   * @retval State of bit (1 or 0).
  518.   */
  519. __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
  520. {
  521.   return ((READ_BIT(PWR->CSR, WakeUpPin) == WakeUpPin) ? 1UL : 0UL);
  522. }
  523.  
  524. /**
  525.   * @brief  Enable ultra low-power mode by enabling VREFINT switch off in low-power modes
  526.   * @rmtoll CR    ULP       LL_PWR_EnableUltraLowPower
  527.   * @retval None
  528.   */
  529. __STATIC_INLINE void LL_PWR_EnableUltraLowPower(void)
  530. {
  531.   SET_BIT(PWR->CR, PWR_CR_ULP);
  532. }
  533.  
  534. /**
  535.   * @brief  Disable ultra low-power mode by disabling VREFINT switch off in low-power modes
  536.   * @rmtoll CR    ULP       LL_PWR_DisableUltraLowPower
  537.   * @retval None
  538.   */
  539. __STATIC_INLINE void LL_PWR_DisableUltraLowPower(void)
  540. {
  541.   CLEAR_BIT(PWR->CR, PWR_CR_ULP);
  542. }
  543.  
  544. /**
  545.   * @brief  Check if ultra low-power mode is enabled by checking if VREFINT switch off in low-power modes is enabled
  546.   * @rmtoll CR    ULP       LL_PWR_IsEnabledUltraLowPower
  547.   * @retval State of bit (1 or 0).
  548.   */
  549. __STATIC_INLINE uint32_t LL_PWR_IsEnabledUltraLowPower(void)
  550. {
  551.   return ((READ_BIT(PWR->CR, PWR_CR_ULP) == PWR_CR_ULP) ? 1UL : 0UL);
  552. }
  553.  
  554. /**
  555.   * @brief  Enable fast wakeup by ignoring VREFINT startup time when exiting from low-power mode
  556.   * @rmtoll CR    FWU       LL_PWR_EnableFastWakeUp
  557.   * @note   Works in conjunction with ultra low power mode.
  558.   * @retval None
  559.   */
  560. __STATIC_INLINE void LL_PWR_EnableFastWakeUp(void)
  561. {
  562.   SET_BIT(PWR->CR, PWR_CR_FWU);
  563. }
  564.  
  565. /**
  566.   * @brief  Disable fast wakeup by waiting VREFINT startup time when exiting from low-power mode
  567.   * @rmtoll CR    FWU       LL_PWR_DisableFastWakeUp
  568.   * @note   Works in conjunction with ultra low power mode.
  569.   * @retval None
  570.   */
  571. __STATIC_INLINE void LL_PWR_DisableFastWakeUp(void)
  572. {
  573.   CLEAR_BIT(PWR->CR, PWR_CR_FWU);
  574. }
  575.  
  576. /**
  577.   * @brief  Check if fast wakeup is enabled by checking if VREFINT startup time when exiting from low-power mode is ignored
  578.   * @rmtoll CR    FWU       LL_PWR_IsEnabledFastWakeUp
  579.   * @retval State of bit (1 or 0).
  580.   */
  581. __STATIC_INLINE uint32_t LL_PWR_IsEnabledFastWakeUp(void)
  582. {
  583.   return ((READ_BIT(PWR->CR, PWR_CR_FWU) == PWR_CR_FWU) ? 1UL : 0UL);
  584. }
  585.  
  586.  
  587. /**
  588.   * @}
  589.   */
  590.  
  591. /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
  592.   * @{
  593.   */
  594.  
  595. /**
  596.   * @brief  Get Wake-up Flag
  597.   * @rmtoll CSR   WUF       LL_PWR_IsActiveFlag_WU
  598.   * @retval State of bit (1 or 0).
  599.   */
  600. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
  601. {
  602.   return ((READ_BIT(PWR->CSR, PWR_CSR_WUF) == PWR_CSR_WUF) ? 1UL : 0UL);
  603. }
  604.  
  605. /**
  606.   * @brief  Get Standby Flag
  607.   * @rmtoll CSR   SBF       LL_PWR_IsActiveFlag_SB
  608.   * @retval State of bit (1 or 0).
  609.   */
  610. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
  611. {
  612.   return ((READ_BIT(PWR->CSR, PWR_CSR_SBF) == PWR_CSR_SBF) ? 1UL : 0UL);
  613. }
  614.  
  615. #if defined(PWR_PVD_SUPPORT)
  616. /**
  617.   * @brief  Indicate whether VDD voltage is below the selected PVD threshold
  618.   * @rmtoll CSR   PVDO       LL_PWR_IsActiveFlag_PVDO
  619.   * @retval State of bit (1 or 0).
  620.   */
  621. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
  622. {
  623.   return ((READ_BIT(PWR->CSR, PWR_CSR_PVDO) == PWR_CSR_PVDO) ? 1UL : 0UL);
  624. }
  625. #endif /* PWR_PVD_SUPPORT */
  626.  
  627. #if defined(PWR_CSR_VREFINTRDYF)
  628. /**
  629.   * @brief  Get Internal Reference VrefInt Flag
  630.   * @rmtoll CSR   VREFINTRDYF       LL_PWR_IsActiveFlag_VREFINTRDY
  631.   * @retval State of bit (1 or 0).
  632.   */
  633. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VREFINTRDY(void)
  634. {
  635.   return ((READ_BIT(PWR->CSR, PWR_CSR_VREFINTRDYF) == PWR_CSR_VREFINTRDYF) ? 1UL : 0UL);
  636. }
  637. #endif /* PWR_CSR_VREFINTRDYF */
  638. /**
  639.   * @brief  Indicate whether the Regulator is ready in the selected voltage range or if its output voltage is still changing to the required voltage level
  640.   * @rmtoll CSR   VOSF       LL_PWR_IsActiveFlag_VOS
  641.   * @retval State of bit (1 or 0).
  642.   */
  643. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VOS(void)
  644. {
  645.   return ((READ_BIT(PWR->CSR, PWR_CSR_VOSF) == PWR_CSR_VOSF) ? 1UL : 0UL);
  646. }
  647. /**
  648.   * @brief Indicate whether the Regulator is ready in main mode or is in low-power mode
  649.   * @rmtoll CSR   REGLPF       LL_PWR_IsActiveFlag_REGLPF
  650.   * @note Take care, return value "0" means the Regulator is ready.  Return value "1" means the output voltage range is still changing.
  651.   * @retval State of bit (1 or 0).
  652.   */
  653. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_REGLPF(void)
  654. {
  655.   return ((READ_BIT(PWR->CSR, PWR_CSR_REGLPF) == PWR_CSR_REGLPF) ? 1UL : 0UL);
  656. }
  657. /**
  658.   * @brief  Clear Standby Flag
  659.   * @rmtoll CR   CSBF       LL_PWR_ClearFlag_SB
  660.   * @retval None
  661.   */
  662. __STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
  663. {
  664.   SET_BIT(PWR->CR, PWR_CR_CSBF);
  665. }
  666.  
  667. /**
  668.   * @brief  Clear Wake-up Flags
  669.   * @rmtoll CR   CWUF       LL_PWR_ClearFlag_WU
  670.   * @retval None
  671.   */
  672. __STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
  673. {
  674.   SET_BIT(PWR->CR, PWR_CR_CWUF);
  675. }
  676.  
  677. /**
  678.   * @}
  679.   */
  680.  
  681. #if defined(USE_FULL_LL_DRIVER)
  682. /** @defgroup PWR_LL_EF_Init De-initialization function
  683.   * @{
  684.   */
  685. ErrorStatus LL_PWR_DeInit(void);
  686. /**
  687.   * @}
  688.   */
  689. #endif /* USE_FULL_LL_DRIVER */
  690.  
  691. /** @defgroup PWR_LL_EF_Legacy_Functions PWR legacy functions name
  692.   * @{
  693.   */
  694. /* Old functions name kept for legacy purpose, to be replaced by the          */
  695. /* current functions name.                                                    */
  696. #define LL_PWR_IsActiveFlag_VOSF  LL_PWR_IsActiveFlag_VOS
  697. /**
  698.   * @}
  699.   */
  700.  
  701. /**
  702.   * @}
  703.   */
  704.  
  705. /**
  706.   * @}
  707.   */
  708.  
  709. #endif /* defined(PWR) */
  710.  
  711. /**
  712.   * @}
  713.   */
  714.  
  715. #ifdef __cplusplus
  716. }
  717. #endif
  718.  
  719. #endif /* __STM32L1xx_LL_PWR_H */
  720.  
  721. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  722.