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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32l1xx_hal_pcd.h
  4.   * @author  MCD Application Team
  5.   * @brief   Header file of PCD HAL module.
  6.   ******************************************************************************
  7.   * @attention
  8.   *
  9.   * Copyright (c) 2016 STMicroelectronics.
  10.   * All rights reserved.
  11.   *
  12.   * This software is licensed under terms that can be found in the LICENSE file
  13.   * in the root directory of this software component.
  14.   * If no LICENSE file comes with this software, it is provided AS-IS.
  15.   *
  16.   ******************************************************************************
  17.   */
  18.  
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef STM32L1xx_HAL_PCD_H
  21. #define STM32L1xx_HAL_PCD_H
  22.  
  23. #ifdef __cplusplus
  24. extern "C" {
  25. #endif
  26.  
  27. /* Includes ------------------------------------------------------------------*/
  28. #include "stm32l1xx_ll_usb.h"
  29.  
  30. #if defined (USB)
  31.  
  32. /** @addtogroup STM32L1xx_HAL_Driver
  33.   * @{
  34.   */
  35.  
  36. /** @addtogroup PCD
  37.   * @{
  38.   */
  39.  
  40. /* Exported types ------------------------------------------------------------*/
  41. /** @defgroup PCD_Exported_Types PCD Exported Types
  42.   * @{
  43.   */
  44.  
  45. /**
  46.   * @brief  PCD State structure definition
  47.   */
  48. typedef enum
  49. {
  50.   HAL_PCD_STATE_RESET   = 0x00,
  51.   HAL_PCD_STATE_READY   = 0x01,
  52.   HAL_PCD_STATE_ERROR   = 0x02,
  53.   HAL_PCD_STATE_BUSY    = 0x03,
  54.   HAL_PCD_STATE_TIMEOUT = 0x04
  55. } PCD_StateTypeDef;
  56.  
  57. /* Device LPM suspend state */
  58. typedef enum
  59. {
  60.   LPM_L0 = 0x00, /* on */
  61.   LPM_L1 = 0x01, /* LPM L1 sleep */
  62.   LPM_L2 = 0x02, /* suspend */
  63.   LPM_L3 = 0x03, /* off */
  64. } PCD_LPM_StateTypeDef;
  65.  
  66. typedef enum
  67. {
  68.   PCD_LPM_L0_ACTIVE = 0x00, /* on */
  69.   PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
  70. } PCD_LPM_MsgTypeDef;
  71.  
  72. typedef enum
  73. {
  74.   PCD_BCD_ERROR                     = 0xFF,
  75.   PCD_BCD_CONTACT_DETECTION         = 0xFE,
  76.   PCD_BCD_STD_DOWNSTREAM_PORT       = 0xFD,
  77.   PCD_BCD_CHARGING_DOWNSTREAM_PORT  = 0xFC,
  78.   PCD_BCD_DEDICATED_CHARGING_PORT   = 0xFB,
  79.   PCD_BCD_DISCOVERY_COMPLETED       = 0x00,
  80.  
  81. } PCD_BCD_MsgTypeDef;
  82.  
  83.  
  84.  
  85.  
  86.  
  87. typedef USB_TypeDef        PCD_TypeDef;
  88. typedef USB_CfgTypeDef     PCD_InitTypeDef;
  89. typedef USB_EPTypeDef      PCD_EPTypeDef;
  90.  
  91.  
  92. /**
  93.   * @brief  PCD Handle Structure definition
  94.   */
  95. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  96. typedef struct __PCD_HandleTypeDef
  97. #else
  98. typedef struct
  99. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  100. {
  101.   PCD_TypeDef             *Instance;   /*!< Register base address             */
  102.   PCD_InitTypeDef         Init;        /*!< PCD required parameters           */
  103.   __IO uint8_t            USB_Address; /*!< USB Address                       */
  104.   PCD_EPTypeDef           IN_ep[8];    /*!< IN endpoint parameters            */
  105.   PCD_EPTypeDef           OUT_ep[8];   /*!< OUT endpoint parameters           */
  106.   HAL_LockTypeDef         Lock;        /*!< PCD peripheral status             */
  107.   __IO PCD_StateTypeDef   State;       /*!< PCD communication state           */
  108.   __IO  uint32_t          ErrorCode;   /*!< PCD Error code                    */
  109.   uint32_t                Setup[12];   /*!< Setup packet buffer               */
  110.   PCD_LPM_StateTypeDef    LPM_State;   /*!< LPM State                         */
  111.   uint32_t                BESL;
  112.  
  113.   void                    *pData;      /*!< Pointer to upper stack Handler */
  114.  
  115. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  116.   void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd);                              /*!< USB OTG PCD SOF callback                */
  117.   void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Setup Stage callback        */
  118.   void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd);                            /*!< USB OTG PCD Reset callback              */
  119.   void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Suspend callback            */
  120.   void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd);                           /*!< USB OTG PCD Resume callback             */
  121.   void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Connect callback            */
  122.   void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Disconnect callback         */
  123.  
  124.   void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);      /*!< USB OTG PCD Data OUT Stage callback     */
  125.   void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);       /*!< USB OTG PCD Data IN Stage callback      */
  126.   void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);  /*!< USB OTG PCD ISO OUT Incomplete callback */
  127.   void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);   /*!< USB OTG PCD ISO IN Incomplete callback  */
  128.  
  129.   void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Msp Init callback           */
  130.   void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd);                        /*!< USB OTG PCD Msp DeInit callback         */
  131. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  132. } PCD_HandleTypeDef;
  133.  
  134. /**
  135.   * @}
  136.   */
  137.  
  138. /* Include PCD HAL Extended module */
  139. #include "stm32l1xx_hal_pcd_ex.h"
  140.  
  141. /* Exported constants --------------------------------------------------------*/
  142. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  143.   * @{
  144.   */
  145.  
  146. /** @defgroup PCD_Speed PCD Speed
  147.   * @{
  148.   */
  149. #define PCD_SPEED_FULL               USBD_FS_SPEED
  150. /**
  151.   * @}
  152.   */
  153.  
  154. /** @defgroup PCD_PHY_Module PCD PHY Module
  155.   * @{
  156.   */
  157. #define PCD_PHY_ULPI                 1U
  158. #define PCD_PHY_EMBEDDED             2U
  159. #define PCD_PHY_UTMI                 3U
  160. /**
  161.   * @}
  162.   */
  163.  
  164. /** @defgroup PCD_Error_Code_definition PCD Error Code definition
  165.   * @brief  PCD Error Code definition
  166.   * @{
  167.   */
  168. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  169. #define  HAL_PCD_ERROR_INVALID_CALLBACK                        (0x00000010U)    /*!< Invalid Callback error  */
  170. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  171.  
  172. /**
  173.   * @}
  174.   */
  175.  
  176. /**
  177.   * @}
  178.   */
  179.  
  180. /* Exported macros -----------------------------------------------------------*/
  181. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  182.   *  @brief macros to handle interrupts and specific clock configurations
  183.   * @{
  184.   */
  185. #define __HAL_PCD_ENABLE(__HANDLE__)                       (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  186. #define __HAL_PCD_DISABLE(__HANDLE__)                      (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  187.  
  188. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \
  189.   ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  190.  
  191.  
  192. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)           (((__HANDLE__)->Instance->ISTR)\
  193.                                                                    &= (uint16_t)(~(__INTERRUPT__)))
  194.  
  195. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT()                         EXTI->IMR |= USB_WAKEUP_EXTI_LINE
  196. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT()                        EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
  197. #define __HAL_USB_WAKEUP_EXTI_GET_FLAG()                          EXTI->PR & (USB_WAKEUP_EXTI_LINE)
  198. #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG()                        EXTI->PR = USB_WAKEUP_EXTI_LINE
  199.  
  200. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  201.   do { \
  202.     EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  203.     EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
  204.   } while(0U)
  205.  
  206.  
  207.  
  208. /**
  209.   * @}
  210.   */
  211.  
  212. /* Exported functions --------------------------------------------------------*/
  213. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  214.   * @{
  215.   */
  216.  
  217. /* Initialization/de-initialization functions  ********************************/
  218. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  219.   * @{
  220.   */
  221. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  222. HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
  223. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  224. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  225.  
  226. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  227. /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
  228.   * @brief  HAL USB OTG PCD Callback ID enumeration definition
  229.   * @{
  230.   */
  231. typedef enum
  232. {
  233.   HAL_PCD_SOF_CB_ID          = 0x01,      /*!< USB PCD SOF callback ID          */
  234.   HAL_PCD_SETUPSTAGE_CB_ID   = 0x02,      /*!< USB PCD Setup Stage callback ID  */
  235.   HAL_PCD_RESET_CB_ID        = 0x03,      /*!< USB PCD Reset callback ID        */
  236.   HAL_PCD_SUSPEND_CB_ID      = 0x04,      /*!< USB PCD Suspend callback ID      */
  237.   HAL_PCD_RESUME_CB_ID       = 0x05,      /*!< USB PCD Resume callback ID       */
  238.   HAL_PCD_CONNECT_CB_ID      = 0x06,      /*!< USB PCD Connect callback ID      */
  239.   HAL_PCD_DISCONNECT_CB_ID   = 0x07,      /*!< USB PCD Disconnect callback ID   */
  240.  
  241.   HAL_PCD_MSPINIT_CB_ID      = 0x08,      /*!< USB PCD MspInit callback ID      */
  242.   HAL_PCD_MSPDEINIT_CB_ID    = 0x09       /*!< USB PCD MspDeInit callback ID    */
  243.  
  244. } HAL_PCD_CallbackIDTypeDef;
  245. /**
  246.   * @}
  247.   */
  248.  
  249. /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
  250.   * @brief  HAL USB OTG PCD Callback pointer definition
  251.   * @{
  252.   */
  253.  
  254. typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd);                                   /*!< pointer to a common USB OTG PCD callback function  */
  255. typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD Data OUT Stage callback     */
  256. typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD Data IN Stage callback      */
  257. typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
  258. typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD ISO IN Incomplete callback  */
  259.  
  260. /**
  261.   * @}
  262.   */
  263.  
  264. HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID,
  265.                                            pPCD_CallbackTypeDef pCallback);
  266.  
  267. HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
  268.  
  269. HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
  270.                                                        pPCD_DataOutStageCallbackTypeDef pCallback);
  271.  
  272. HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
  273.  
  274. HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
  275.                                                       pPCD_DataInStageCallbackTypeDef pCallback);
  276.  
  277. HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
  278.  
  279. HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
  280.                                                        pPCD_IsoOutIncpltCallbackTypeDef pCallback);
  281.  
  282. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
  283.  
  284. HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
  285.                                                       pPCD_IsoInIncpltCallbackTypeDef pCallback);
  286.  
  287. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
  288.  
  289. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  290. /**
  291.   * @}
  292.   */
  293.  
  294. /* I/O operation functions  ***************************************************/
  295. /* Non-Blocking mode: Interrupt */
  296. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
  297.   * @{
  298.   */
  299. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  300. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  301. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  302. void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd);
  303.  
  304. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  305. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  306. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  307. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  308. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  309. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  310. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  311.  
  312. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  313. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  314. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  315. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  316. /**
  317.   * @}
  318.   */
  319.  
  320. /* Peripheral Control functions  **********************************************/
  321. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  322.   * @{
  323.   */
  324. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  325. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  326. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  327. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  328. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  329. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  330. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  331. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  332. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  333. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  334. HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  335. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  336. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  337. uint32_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr);
  338. /**
  339.   * @}
  340.   */
  341.  
  342. /* Peripheral State functions  ************************************************/
  343. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  344.   * @{
  345.   */
  346. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd);
  347. /**
  348.   * @}
  349.   */
  350.  
  351. /**
  352.   * @}
  353.   */
  354.  
  355. /* Private constants ---------------------------------------------------------*/
  356. /** @defgroup PCD_Private_Constants PCD Private Constants
  357.   * @{
  358.   */
  359. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  360.   * @{
  361.   */
  362.  
  363.  
  364. #define USB_WAKEUP_EXTI_LINE                                          (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
  365.  
  366.  
  367. /**
  368.   * @}
  369.   */
  370.  
  371. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  372.   * @{
  373.   */
  374. #define PCD_EP0MPS_64                                                 EP_MPS_64
  375. #define PCD_EP0MPS_32                                                 EP_MPS_32
  376. #define PCD_EP0MPS_16                                                 EP_MPS_16
  377. #define PCD_EP0MPS_08                                                 EP_MPS_8
  378. /**
  379.   * @}
  380.   */
  381.  
  382. /** @defgroup PCD_ENDP PCD ENDP
  383.   * @{
  384.   */
  385. #define PCD_ENDP0                                                     0U
  386. #define PCD_ENDP1                                                     1U
  387. #define PCD_ENDP2                                                     2U
  388. #define PCD_ENDP3                                                     3U
  389. #define PCD_ENDP4                                                     4U
  390. #define PCD_ENDP5                                                     5U
  391. #define PCD_ENDP6                                                     6U
  392. #define PCD_ENDP7                                                     7U
  393. /**
  394.   * @}
  395.   */
  396.  
  397. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  398.   * @{
  399.   */
  400. #define PCD_SNG_BUF                                                   0U
  401. #define PCD_DBL_BUF                                                   1U
  402. /**
  403.   * @}
  404.   */
  405.  
  406. /**
  407.   * @}
  408.   */
  409.  
  410. /* Private macros ------------------------------------------------------------*/
  411. /** @defgroup PCD_Private_Macros PCD Private Macros
  412.   * @{
  413.   */
  414.  
  415. /********************  Bit definition for USB_COUNTn_RX register  *************/
  416. #define USB_CNTRX_NBLK_MSK                    (0x1FU << 10)
  417. #define USB_CNTRX_BLSIZE                      (0x1U << 15)
  418.  
  419. /* SetENDPOINT */
  420. #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) \
  421.   (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
  422.  
  423. /* GetENDPOINT */
  424. #define PCD_GET_ENDPOINT(USBx, bEpNum)             (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
  425.  
  426.  
  427. /**
  428.   * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
  429.   * @param  USBx USB peripheral instance register address.
  430.   * @param  bEpNum Endpoint Number.
  431.   * @param  wType Endpoint Type.
  432.   * @retval None
  433.   */
  434. #define PCD_SET_EPTYPE(USBx, bEpNum, wType) \
  435.   (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  436.                     ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
  437.  
  438.  
  439. /**
  440.   * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
  441.   * @param  USBx USB peripheral instance register address.
  442.   * @param  bEpNum Endpoint Number.
  443.   * @retval Endpoint Type
  444.   */
  445. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  446.  
  447. /**
  448.   * @brief free buffer used from the application realizing it to the line
  449.   *         toggles bit SW_BUF in the double buffered endpoint register
  450.   * @param USBx USB device.
  451.   * @param   bEpNum, bDir
  452.   * @retval None
  453.   */
  454. #define PCD_FREE_USER_BUFFER(USBx, bEpNum, bDir) \
  455.   do { \
  456.     if ((bDir) == 0U) \
  457.     { \
  458.       /* OUT double buffered endpoint */ \
  459.       PCD_TX_DTOG((USBx), (bEpNum)); \
  460.     } \
  461.     else if ((bDir) == 1U) \
  462.     { \
  463.       /* IN double buffered endpoint */ \
  464.       PCD_RX_DTOG((USBx), (bEpNum)); \
  465.     } \
  466.   } while(0)
  467.  
  468. /**
  469.   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
  470.   * @param  USBx USB peripheral instance register address.
  471.   * @param  bEpNum Endpoint Number.
  472.   * @param  wState new state
  473.   * @retval None
  474.   */
  475. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \
  476.   do { \
  477.     uint16_t _wRegVal; \
  478.     \
  479.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
  480.     /* toggle first bit ? */ \
  481.     if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
  482.     { \
  483.       _wRegVal ^= USB_EPTX_DTOG1; \
  484.     } \
  485.     /* toggle second bit ?  */ \
  486.     if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
  487.     { \
  488.       _wRegVal ^= USB_EPTX_DTOG2; \
  489.     } \
  490.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  491.   } while(0) /* PCD_SET_EP_TX_STATUS */
  492.  
  493. /**
  494.   * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
  495.   * @param  USBx USB peripheral instance register address.
  496.   * @param  bEpNum Endpoint Number.
  497.   * @param  wState new state
  498.   * @retval None
  499.   */
  500. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \
  501.   do { \
  502.     uint16_t _wRegVal; \
  503.     \
  504.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
  505.     /* toggle first bit ? */ \
  506.     if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
  507.     { \
  508.       _wRegVal ^= USB_EPRX_DTOG1; \
  509.     } \
  510.     /* toggle second bit ? */ \
  511.     if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
  512.     { \
  513.       _wRegVal ^= USB_EPRX_DTOG2; \
  514.     } \
  515.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  516.   } while(0) /* PCD_SET_EP_RX_STATUS */
  517.  
  518. /**
  519.   * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  520.   * @param  USBx USB peripheral instance register address.
  521.   * @param  bEpNum Endpoint Number.
  522.   * @param  wStaterx new state.
  523.   * @param  wStatetx new state.
  524.   * @retval None
  525.   */
  526. #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \
  527.   do { \
  528.     uint16_t _wRegVal; \
  529.     \
  530.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
  531.     /* toggle first bit ? */ \
  532.     if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
  533.     { \
  534.       _wRegVal ^= USB_EPRX_DTOG1; \
  535.     } \
  536.     /* toggle second bit ? */ \
  537.     if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
  538.     { \
  539.       _wRegVal ^= USB_EPRX_DTOG2; \
  540.     } \
  541.     /* toggle first bit ? */ \
  542.     if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
  543.     { \
  544.       _wRegVal ^= USB_EPTX_DTOG1; \
  545.     } \
  546.     /* toggle second bit ?  */ \
  547.     if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
  548.     { \
  549.       _wRegVal ^= USB_EPTX_DTOG2; \
  550.     } \
  551.     \
  552.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  553.   } while(0) /* PCD_SET_EP_TXRX_STATUS */
  554.  
  555. /**
  556.   * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
  557.   *         /STAT_RX[1:0])
  558.   * @param  USBx USB peripheral instance register address.
  559.   * @param  bEpNum Endpoint Number.
  560.   * @retval status
  561.   */
  562. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  563. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  564.  
  565. /**
  566.   * @brief  sets directly the VALID tx/rx-status into the endpoint register
  567.   * @param  USBx USB peripheral instance register address.
  568.   * @param  bEpNum Endpoint Number.
  569.   * @retval None
  570.   */
  571. #define PCD_SET_EP_TX_VALID(USBx, bEpNum)      (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  572. #define PCD_SET_EP_RX_VALID(USBx, bEpNum)      (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  573.  
  574. /**
  575.   * @brief  checks stall condition in an endpoint.
  576.   * @param  USBx USB peripheral instance register address.
  577.   * @param  bEpNum Endpoint Number.
  578.   * @retval TRUE = endpoint in stall condition.
  579.   */
  580. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL)
  581. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL)
  582.  
  583. /**
  584.   * @brief  set & clear EP_KIND bit.
  585.   * @param  USBx USB peripheral instance register address.
  586.   * @param  bEpNum Endpoint Number.
  587.   * @retval None
  588.   */
  589. #define PCD_SET_EP_KIND(USBx, bEpNum) \
  590.   do { \
  591.     uint16_t _wRegVal; \
  592.     \
  593.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  594.     \
  595.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
  596.   } while(0) /* PCD_SET_EP_KIND */
  597.  
  598. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) \
  599.   do { \
  600.     uint16_t _wRegVal; \
  601.     \
  602.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
  603.     \
  604.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  605.   } while(0) /* PCD_CLEAR_EP_KIND */
  606.  
  607. /**
  608.   * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
  609.   * @param  USBx USB peripheral instance register address.
  610.   * @param  bEpNum Endpoint Number.
  611.   * @retval None
  612.   */
  613. #define PCD_SET_OUT_STATUS(USBx, bEpNum)       PCD_SET_EP_KIND((USBx), (bEpNum))
  614. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)     PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  615.  
  616. /**
  617.   * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
  618.   * @param  USBx USB peripheral instance register address.
  619.   * @param  bEpNum Endpoint Number.
  620.   * @retval None
  621.   */
  622. #define PCD_SET_BULK_EP_DBUF(USBx, bEpNum)     PCD_SET_EP_KIND((USBx), (bEpNum))
  623. #define PCD_CLEAR_BULK_EP_DBUF(USBx, bEpNum)   PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  624.  
  625. /**
  626.   * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
  627.   * @param  USBx USB peripheral instance register address.
  628.   * @param  bEpNum Endpoint Number.
  629.   * @retval None
  630.   */
  631. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \
  632.   do { \
  633.     uint16_t _wRegVal; \
  634.     \
  635.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
  636.     \
  637.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
  638.   } while(0) /* PCD_CLEAR_RX_EP_CTR */
  639.  
  640. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \
  641.   do { \
  642.     uint16_t _wRegVal; \
  643.     \
  644.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
  645.     \
  646.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
  647.   } while(0) /* PCD_CLEAR_TX_EP_CTR */
  648.  
  649. /**
  650.   * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  651.   * @param  USBx USB peripheral instance register address.
  652.   * @param  bEpNum Endpoint Number.
  653.   * @retval None
  654.   */
  655. #define PCD_RX_DTOG(USBx, bEpNum) \
  656.   do { \
  657.     uint16_t _wEPVal; \
  658.     \
  659.     _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  660.     \
  661.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
  662.   } while(0) /* PCD_RX_DTOG */
  663.  
  664. #define PCD_TX_DTOG(USBx, bEpNum) \
  665.   do { \
  666.     uint16_t _wEPVal; \
  667.     \
  668.     _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  669.     \
  670.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
  671.   } while(0) /* PCD_TX_DTOG */
  672. /**
  673.   * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  674.   * @param  USBx USB peripheral instance register address.
  675.   * @param  bEpNum Endpoint Number.
  676.   * @retval None
  677.   */
  678. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \
  679.   do { \
  680.     uint16_t _wRegVal; \
  681.     \
  682.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  683.     \
  684.     if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
  685.     { \
  686.       PCD_RX_DTOG((USBx), (bEpNum)); \
  687.     } \
  688.   } while(0) /* PCD_CLEAR_RX_DTOG */
  689.  
  690. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \
  691.   do { \
  692.     uint16_t _wRegVal; \
  693.     \
  694.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  695.     \
  696.     if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
  697.     { \
  698.       PCD_TX_DTOG((USBx), (bEpNum)); \
  699.     } \
  700.   } while(0) /* PCD_CLEAR_TX_DTOG */
  701.  
  702. /**
  703.   * @brief  Sets address in an endpoint register.
  704.   * @param  USBx USB peripheral instance register address.
  705.   * @param  bEpNum Endpoint Number.
  706.   * @param  bAddr Address.
  707.   * @retval None
  708.   */
  709. #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \
  710.   do { \
  711.     uint16_t _wRegVal; \
  712.     \
  713.     _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
  714.     \
  715.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  716.   } while(0) /* PCD_SET_EP_ADDRESS */
  717.  
  718. /**
  719.   * @brief  Gets address in an endpoint register.
  720.   * @param  USBx USB peripheral instance register address.
  721.   * @param  bEpNum Endpoint Number.
  722.   * @retval None
  723.   */
  724. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  725.  
  726. #define PCD_EP_TX_CNT(USBx, bEpNum) \
  727.   ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \
  728.                   ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  729.  
  730. #define PCD_EP_RX_CNT(USBx, bEpNum) \
  731.   ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \
  732.                   ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  733.  
  734.  
  735. /**
  736.   * @brief  sets address of the tx/rx buffer.
  737.   * @param  USBx USB peripheral instance register address.
  738.   * @param  bEpNum Endpoint Number.
  739.   * @param  wAddr address to be set (must be word aligned).
  740.   * @retval None
  741.   */
  742. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \
  743.   do { \
  744.     __IO uint16_t *_wRegVal; \
  745.     uint32_t _wRegBase = (uint32_t)USBx; \
  746.     \
  747.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  748.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
  749.     *_wRegVal = ((wAddr) >> 1) << 1; \
  750.   } while(0) /* PCD_SET_EP_TX_ADDRESS */
  751.  
  752. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \
  753.   do { \
  754.     __IO uint16_t *_wRegVal; \
  755.     uint32_t _wRegBase = (uint32_t)USBx; \
  756.     \
  757.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  758.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
  759.     *_wRegVal = ((wAddr) >> 1) << 1; \
  760.   } while(0) /* PCD_SET_EP_RX_ADDRESS */
  761.  
  762. /**
  763.   * @brief  Gets address of the tx/rx buffer.
  764.   * @param  USBx USB peripheral instance register address.
  765.   * @param  bEpNum Endpoint Number.
  766.   * @retval address of the buffer.
  767.   */
  768. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  769. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  770.  
  771. /**
  772.   * @brief  Sets counter of rx buffer with no. of blocks.
  773.   * @param  pdwReg Register pointer
  774.   * @param  wCount Counter.
  775.   * @param  wNBlocks no. of Blocks.
  776.   * @retval None
  777.   */
  778. #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \
  779.   do { \
  780.     (wNBlocks) = (wCount) >> 5; \
  781.     if (((wCount) & 0x1fU) == 0U) \
  782.     { \
  783.       (wNBlocks)--; \
  784.     } \
  785.     *(pdwReg) |= (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
  786.   } while(0) /* PCD_CALC_BLK32 */
  787.  
  788. #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \
  789.   do { \
  790.     (wNBlocks) = (wCount) >> 1; \
  791.     if (((wCount) & 0x1U) != 0U) \
  792.     { \
  793.       (wNBlocks)++; \
  794.     } \
  795.     *(pdwReg) |= (uint16_t)((wNBlocks) << 10); \
  796.   } while(0) /* PCD_CALC_BLK2 */
  797.  
  798. #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \
  799.   do { \
  800.     uint32_t wNBlocks; \
  801.     \
  802.     *(pdwReg) &= 0x3FFU; \
  803.     \
  804.     if ((wCount) > 62U) \
  805.     { \
  806.       PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
  807.     } \
  808.     else \
  809.     { \
  810.       if ((wCount) == 0U) \
  811.       { \
  812.         *(pdwReg) |= USB_CNTRX_BLSIZE; \
  813.       } \
  814.       else \
  815.       { \
  816.         PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
  817.       } \
  818.     } \
  819.   } while(0) /* PCD_SET_EP_CNT_RX_REG */
  820.  
  821. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \
  822.   do { \
  823.     uint32_t _wRegBase = (uint32_t)(USBx); \
  824.     __IO uint16_t *pdwReg; \
  825.     \
  826.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  827.     pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  828.     PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
  829.   } while(0)
  830.  
  831. /**
  832.   * @brief  sets counter for the tx/rx buffer.
  833.   * @param  USBx USB peripheral instance register address.
  834.   * @param  bEpNum Endpoint Number.
  835.   * @param  wCount Counter value.
  836.   * @retval None
  837.   */
  838. #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \
  839.   do { \
  840.     uint32_t _wRegBase = (uint32_t)(USBx); \
  841.     __IO uint16_t *_wRegVal; \
  842.     \
  843.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  844.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  845.     *_wRegVal = (uint16_t)(wCount); \
  846.   } while(0)
  847.  
  848. #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \
  849.   do { \
  850.     uint32_t _wRegBase = (uint32_t)(USBx); \
  851.     __IO uint16_t *_wRegVal; \
  852.     \
  853.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  854.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  855.     PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
  856.   } while(0)
  857.  
  858. /**
  859.   * @brief  gets counter of the tx buffer.
  860.   * @param  USBx USB peripheral instance register address.
  861.   * @param  bEpNum Endpoint Number.
  862.   * @retval Counter value
  863.   */
  864. #define PCD_GET_EP_TX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
  865. #define PCD_GET_EP_RX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
  866.  
  867. /**
  868.   * @brief  Sets buffer 0/1 address in a double buffer endpoint.
  869.   * @param  USBx USB peripheral instance register address.
  870.   * @param  bEpNum Endpoint Number.
  871.   * @param  wBuf0Addr buffer 0 address.
  872.   * @retval Counter value
  873.   */
  874. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \
  875.   do { \
  876.     PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
  877.   } while(0) /* PCD_SET_EP_DBUF0_ADDR */
  878.  
  879. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \
  880.   do { \
  881.     PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
  882.   } while(0) /* PCD_SET_EP_DBUF1_ADDR */
  883.  
  884. /**
  885.   * @brief  Sets addresses in a double buffer endpoint.
  886.   * @param  USBx USB peripheral instance register address.
  887.   * @param  bEpNum Endpoint Number.
  888.   * @param  wBuf0Addr: buffer 0 address.
  889.   * @param  wBuf1Addr = buffer 1 address.
  890.   * @retval None
  891.   */
  892. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \
  893.   do { \
  894.     PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
  895.     PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
  896.   } while(0) /* PCD_SET_EP_DBUF_ADDR */
  897.  
  898. /**
  899.   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
  900.   * @param  USBx USB peripheral instance register address.
  901.   * @param  bEpNum Endpoint Number.
  902.   * @retval None
  903.   */
  904. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum)    (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  905. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum)    (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  906.  
  907. /**
  908.   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
  909.   * @param  USBx USB peripheral instance register address.
  910.   * @param  bEpNum Endpoint Number.
  911.   * @param  bDir endpoint dir  EP_DBUF_OUT = OUT
  912.   *         EP_DBUF_IN  = IN
  913.   * @param  wCount: Counter value
  914.   * @retval None
  915.   */
  916. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \
  917.   do { \
  918.     if ((bDir) == 0U) \
  919.       /* OUT endpoint */ \
  920.     { \
  921.       PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
  922.     } \
  923.     else \
  924.     { \
  925.       if ((bDir) == 1U) \
  926.       { \
  927.         /* IN endpoint */ \
  928.         PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
  929.       } \
  930.     } \
  931.   } while(0) /* SetEPDblBuf0Count*/
  932.  
  933. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \
  934.   do { \
  935.     uint32_t _wBase = (uint32_t)(USBx); \
  936.     __IO uint16_t *_wEPRegVal; \
  937.     \
  938.     if ((bDir) == 0U) \
  939.     { \
  940.       /* OUT endpoint */ \
  941.       PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
  942.     } \
  943.     else \
  944.     { \
  945.       if ((bDir) == 1U) \
  946.       { \
  947.         /* IN endpoint */ \
  948.         _wBase += (uint32_t)(USBx)->BTABLE; \
  949.         _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  950.         *_wEPRegVal = (uint16_t)(wCount); \
  951.       } \
  952.     } \
  953.   } while(0) /* SetEPDblBuf1Count */
  954.  
  955. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \
  956.   do { \
  957.     PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  958.     PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  959.   } while(0) /* PCD_SET_EP_DBUF_CNT */
  960.  
  961. /**
  962.   * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
  963.   * @param  USBx USB peripheral instance register address.
  964.   * @param  bEpNum Endpoint Number.
  965.   * @retval None
  966.   */
  967. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum)     (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  968. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum)     (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  969.  
  970.  
  971.  
  972. /**
  973.   * @}
  974.   */
  975.  
  976. /**
  977.   * @}
  978.   */
  979.  
  980. /**
  981.   * @}
  982.   */
  983. #endif /* defined (USB) */
  984.  
  985. #ifdef __cplusplus
  986. }
  987. #endif
  988.  
  989. #endif /* STM32L1xx_HAL_PCD_H */
  990.