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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32l1xx_hal_pcd.h
  4.   * @author  MCD Application Team
  5.   * @brief   Header file of PCD HAL module.
  6.   ******************************************************************************
  7.   * @attention
  8.   *
  9.   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  10.   * All rights reserved.</center></h2>
  11.   *
  12.   * This software component is licensed by ST under BSD 3-Clause license,
  13.   * the "License"; You may not use this file except in compliance with the
  14.   * License. You may obtain a copy of the License at:
  15.   *                        opensource.org/licenses/BSD-3-Clause
  16.   *
  17.   ******************************************************************************
  18.   */
  19.  
  20. /* Define to prevent recursive inclusion -------------------------------------*/
  21. #ifndef STM32L1xx_HAL_PCD_H
  22. #define STM32L1xx_HAL_PCD_H
  23.  
  24. #ifdef __cplusplus
  25. extern "C" {
  26. #endif
  27.  
  28. /* Includes ------------------------------------------------------------------*/
  29. #include "stm32l1xx_ll_usb.h"
  30.  
  31. #if defined (USB)
  32.  
  33. /** @addtogroup STM32L1xx_HAL_Driver
  34.   * @{
  35.   */
  36.  
  37. /** @addtogroup PCD
  38.   * @{
  39.   */
  40.  
  41. /* Exported types ------------------------------------------------------------*/
  42. /** @defgroup PCD_Exported_Types PCD Exported Types
  43.   * @{
  44.   */
  45.  
  46. /**
  47.   * @brief  PCD State structure definition
  48.   */
  49. typedef enum
  50. {
  51.   HAL_PCD_STATE_RESET   = 0x00,
  52.   HAL_PCD_STATE_READY   = 0x01,
  53.   HAL_PCD_STATE_ERROR   = 0x02,
  54.   HAL_PCD_STATE_BUSY    = 0x03,
  55.   HAL_PCD_STATE_TIMEOUT = 0x04
  56. } PCD_StateTypeDef;
  57.  
  58. /* Device LPM suspend state */
  59. typedef enum
  60. {
  61.   LPM_L0 = 0x00, /* on */
  62.   LPM_L1 = 0x01, /* LPM L1 sleep */
  63.   LPM_L2 = 0x02, /* suspend */
  64.   LPM_L3 = 0x03, /* off */
  65. } PCD_LPM_StateTypeDef;
  66.  
  67. typedef enum
  68. {
  69.   PCD_LPM_L0_ACTIVE = 0x00, /* on */
  70.   PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
  71. } PCD_LPM_MsgTypeDef;
  72.  
  73. typedef enum
  74. {
  75.   PCD_BCD_ERROR                     = 0xFF,
  76.   PCD_BCD_CONTACT_DETECTION         = 0xFE,
  77.   PCD_BCD_STD_DOWNSTREAM_PORT       = 0xFD,
  78.   PCD_BCD_CHARGING_DOWNSTREAM_PORT  = 0xFC,
  79.   PCD_BCD_DEDICATED_CHARGING_PORT   = 0xFB,
  80.   PCD_BCD_DISCOVERY_COMPLETED       = 0x00,
  81.  
  82. } PCD_BCD_MsgTypeDef;
  83.  
  84.  
  85.  
  86.  
  87.  
  88. typedef USB_TypeDef        PCD_TypeDef;
  89. typedef USB_CfgTypeDef     PCD_InitTypeDef;
  90. typedef USB_EPTypeDef      PCD_EPTypeDef;
  91.  
  92.  
  93. /**
  94.   * @brief  PCD Handle Structure definition
  95.   */
  96. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  97. typedef struct __PCD_HandleTypeDef
  98. #else
  99. typedef struct
  100. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  101. {
  102.   PCD_TypeDef             *Instance;   /*!< Register base address             */
  103.   PCD_InitTypeDef         Init;        /*!< PCD required parameters           */
  104.   __IO uint8_t            USB_Address; /*!< USB Address                       */
  105.   PCD_EPTypeDef           IN_ep[8];   /*!< IN endpoint parameters             */
  106.   PCD_EPTypeDef           OUT_ep[8];  /*!< OUT endpoint parameters            */
  107.   HAL_LockTypeDef         Lock;        /*!< PCD peripheral status             */
  108.   __IO PCD_StateTypeDef   State;       /*!< PCD communication state           */
  109.   __IO  uint32_t          ErrorCode;   /*!< PCD Error code                    */
  110.   uint32_t                Setup[12];   /*!< Setup packet buffer               */
  111.   PCD_LPM_StateTypeDef    LPM_State;   /*!< LPM State                         */
  112.   uint32_t                BESL;
  113.  
  114.   void                    *pData;      /*!< Pointer to upper stack Handler */
  115.  
  116. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  117.   void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd);                              /*!< USB OTG PCD SOF callback                */
  118.   void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Setup Stage callback        */
  119.   void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd);                            /*!< USB OTG PCD Reset callback              */
  120.   void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Suspend callback            */
  121.   void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd);                           /*!< USB OTG PCD Resume callback             */
  122.   void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Connect callback            */
  123.   void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Disconnect callback         */
  124.  
  125.   void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);      /*!< USB OTG PCD Data OUT Stage callback     */
  126.   void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);       /*!< USB OTG PCD Data IN Stage callback      */
  127.   void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);  /*!< USB OTG PCD ISO OUT Incomplete callback */
  128.   void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);   /*!< USB OTG PCD ISO IN Incomplete callback  */
  129.  
  130.   void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Msp Init callback           */
  131.   void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd);                        /*!< USB OTG PCD Msp DeInit callback         */
  132. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  133. } PCD_HandleTypeDef;
  134.  
  135. /**
  136.   * @}
  137.   */
  138.  
  139. /* Include PCD HAL Extended module */
  140. #include "stm32l1xx_hal_pcd_ex.h"
  141.  
  142. /* Exported constants --------------------------------------------------------*/
  143. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  144.   * @{
  145.   */
  146.  
  147. /** @defgroup PCD_Speed PCD Speed
  148.   * @{
  149.   */
  150. #define PCD_SPEED_FULL               USBD_FS_SPEED
  151. /**
  152.   * @}
  153.   */
  154.  
  155. /** @defgroup PCD_PHY_Module PCD PHY Module
  156.   * @{
  157.   */
  158. #define PCD_PHY_ULPI                 1U
  159. #define PCD_PHY_EMBEDDED             2U
  160. #define PCD_PHY_UTMI                 3U
  161. /**
  162.   * @}
  163.   */
  164.  
  165. /** @defgroup PCD_Error_Code_definition PCD Error Code definition
  166.   * @brief  PCD Error Code definition
  167.   * @{
  168.   */
  169. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  170. #define  HAL_PCD_ERROR_INVALID_CALLBACK                        (0x00000010U)    /*!< Invalid Callback error  */
  171. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  172.  
  173. /**
  174.   * @}
  175.   */
  176.  
  177. /**
  178.   * @}
  179.   */
  180.  
  181. /* Exported macros -----------------------------------------------------------*/
  182. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  183.   *  @brief macros to handle interrupts and specific clock configurations
  184.   * @{
  185.   */
  186.  
  187.  
  188. #define __HAL_PCD_ENABLE(__HANDLE__)                                  (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  189. #define __HAL_PCD_DISABLE(__HANDLE__)                                 (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  190. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)                 ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  191. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)               (((__HANDLE__)->Instance->ISTR) &= (uint16_t)(~(__INTERRUPT__)))
  192.  
  193. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT()                             EXTI->IMR |= USB_WAKEUP_EXTI_LINE
  194. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT()                            EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
  195. #define __HAL_USB_WAKEUP_EXTI_GET_FLAG()                              EXTI->PR & (USB_WAKEUP_EXTI_LINE)
  196. #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG()                            EXTI->PR = USB_WAKEUP_EXTI_LINE
  197.  
  198. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  199.   do { \
  200.     EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  201.     EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
  202.   } while(0U)
  203.  
  204.  
  205.  
  206. /**
  207.   * @}
  208.   */
  209.  
  210. /* Exported functions --------------------------------------------------------*/
  211. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  212.   * @{
  213.   */
  214.  
  215. /* Initialization/de-initialization functions  ********************************/
  216. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  217.   * @{
  218.   */
  219. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  220. HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
  221. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  222. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  223.  
  224. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  225. /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
  226.   * @brief  HAL USB OTG PCD Callback ID enumeration definition
  227.   * @{
  228.   */
  229. typedef enum
  230. {
  231.   HAL_PCD_SOF_CB_ID          = 0x01,      /*!< USB PCD SOF callback ID          */
  232.   HAL_PCD_SETUPSTAGE_CB_ID   = 0x02,      /*!< USB PCD Setup Stage callback ID  */
  233.   HAL_PCD_RESET_CB_ID        = 0x03,      /*!< USB PCD Reset callback ID        */
  234.   HAL_PCD_SUSPEND_CB_ID      = 0x04,      /*!< USB PCD Suspend callback ID      */
  235.   HAL_PCD_RESUME_CB_ID       = 0x05,      /*!< USB PCD Resume callback ID       */
  236.   HAL_PCD_CONNECT_CB_ID      = 0x06,      /*!< USB PCD Connect callback ID      */
  237.   HAL_PCD_DISCONNECT_CB_ID   = 0x07,      /*!< USB PCD Disconnect callback ID   */
  238.  
  239.   HAL_PCD_MSPINIT_CB_ID      = 0x08,      /*!< USB PCD MspInit callback ID      */
  240.   HAL_PCD_MSPDEINIT_CB_ID    = 0x09       /*!< USB PCD MspDeInit callback ID    */
  241.  
  242. } HAL_PCD_CallbackIDTypeDef;
  243. /**
  244.   * @}
  245.   */
  246.  
  247. /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
  248.   * @brief  HAL USB OTG PCD Callback pointer definition
  249.   * @{
  250.   */
  251.  
  252. typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd);                                   /*!< pointer to a common USB OTG PCD callback function  */
  253. typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD Data OUT Stage callback     */
  254. typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD Data IN Stage callback      */
  255. typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
  256. typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD ISO IN Incomplete callback  */
  257.  
  258. /**
  259.   * @}
  260.   */
  261.  
  262. HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback);
  263. HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
  264.  
  265. HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback);
  266. HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
  267.  
  268. HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback);
  269. HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
  270.  
  271. HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback);
  272. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
  273.  
  274. HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback);
  275. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
  276.  
  277. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  278. /**
  279.   * @}
  280.   */
  281.  
  282. /* I/O operation functions  ***************************************************/
  283. /* Non-Blocking mode: Interrupt */
  284. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
  285.   * @{
  286.   */
  287. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  288. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  289. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  290. void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd);
  291.  
  292. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  293. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  294. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  295. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  296. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  297. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  298. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  299.  
  300. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  301. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  302. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  303. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  304. /**
  305.   * @}
  306.   */
  307.  
  308. /* Peripheral Control functions  **********************************************/
  309. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  310.   * @{
  311.   */
  312. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  313. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  314. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  315. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  316. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  317. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  318. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  319. uint32_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  320. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  321. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  322. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  323. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  324. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  325. /**
  326.   * @}
  327.   */
  328.  
  329. /* Peripheral State functions  ************************************************/
  330. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  331.   * @{
  332.   */
  333. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  334. /**
  335.   * @}
  336.   */
  337.  
  338. /**
  339.   * @}
  340.   */
  341.  
  342. /* Private constants ---------------------------------------------------------*/
  343. /** @defgroup PCD_Private_Constants PCD Private Constants
  344.   * @{
  345.   */
  346. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  347.   * @{
  348.   */
  349.  
  350.  
  351. #define USB_WAKEUP_EXTI_LINE                                          (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
  352.  
  353.  
  354. /**
  355.   * @}
  356.   */
  357.  
  358. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  359.   * @{
  360.   */
  361. #define PCD_EP0MPS_64                                                 EP_MPS_64
  362. #define PCD_EP0MPS_32                                                 EP_MPS_32
  363. #define PCD_EP0MPS_16                                                 EP_MPS_16
  364. #define PCD_EP0MPS_08                                                 EP_MPS_8
  365. /**
  366.   * @}
  367.   */
  368.  
  369. /** @defgroup PCD_ENDP PCD ENDP
  370.   * @{
  371.   */
  372. #define PCD_ENDP0                                                     0U
  373. #define PCD_ENDP1                                                     1U
  374. #define PCD_ENDP2                                                     2U
  375. #define PCD_ENDP3                                                     3U
  376. #define PCD_ENDP4                                                     4U
  377. #define PCD_ENDP5                                                     5U
  378. #define PCD_ENDP6                                                     6U
  379. #define PCD_ENDP7                                                     7U
  380. /**
  381.   * @}
  382.   */
  383.  
  384. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  385.   * @{
  386.   */
  387. #define PCD_SNG_BUF                                                   0U
  388. #define PCD_DBL_BUF                                                   1U
  389. /**
  390.   * @}
  391.   */
  392.  
  393. /**
  394.   * @}
  395.   */
  396.  
  397. /* Private macros ------------------------------------------------------------*/
  398. /** @defgroup PCD_Private_Macros PCD Private Macros
  399.   * @{
  400.   */
  401.  
  402. /********************  Bit definition for USB_COUNTn_RX register  *************/
  403. #define USB_CNTRX_NBLK_MSK                    (0x1FU << 10)
  404. #define USB_CNTRX_BLSIZE                      (0x1U << 15)
  405.  
  406. /* SetENDPOINT */
  407. #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue)  (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
  408.  
  409. /* GetENDPOINT */
  410. #define PCD_GET_ENDPOINT(USBx, bEpNum)            (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
  411.  
  412. /* ENDPOINT transfer */
  413. #define USB_EP0StartXfer                          USB_EPStartXfer
  414.  
  415. /**
  416.   * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
  417.   * @param  USBx USB peripheral instance register address.
  418.   * @param  bEpNum Endpoint Number.
  419.   * @param  wType Endpoint Type.
  420.   * @retval None
  421.   */
  422. #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  423.                                              ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
  424.  
  425. /**
  426.   * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
  427.   * @param  USBx USB peripheral instance register address.
  428.   * @param  bEpNum Endpoint Number.
  429.   * @retval Endpoint Type
  430.   */
  431. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  432.  
  433. /**
  434.   * @brief free buffer used from the application realizing it to the line
  435.   *         toggles bit SW_BUF in the double buffered endpoint register
  436.   * @param USBx USB device.
  437.   * @param   bEpNum, bDir
  438.   * @retval None
  439.   */
  440. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) do { \
  441.   if ((bDir) == 0U) \
  442.   { \
  443.     /* OUT double buffered endpoint */ \
  444.     PCD_TX_DTOG((USBx), (bEpNum)); \
  445.   } \
  446.   else if ((bDir) == 1U) \
  447.   { \
  448.     /* IN double buffered endpoint */ \
  449.     PCD_RX_DTOG((USBx), (bEpNum)); \
  450.   } \
  451. } while(0)
  452.  
  453. /**
  454.   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
  455.   * @param  USBx USB peripheral instance register address.
  456.   * @param  bEpNum Endpoint Number.
  457.   * @param  wState new state
  458.   * @retval None
  459.   */
  460. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do { \
  461.    uint16_t _wRegVal; \
  462.    \
  463.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
  464.    /* toggle first bit ? */ \
  465.    if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
  466.    { \
  467.       _wRegVal ^= USB_EPTX_DTOG1; \
  468.    } \
  469.    /* toggle second bit ?  */ \
  470.    if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
  471.    { \
  472.       _wRegVal ^= USB_EPTX_DTOG2; \
  473.    } \
  474.    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  475.   } while(0) /* PCD_SET_EP_TX_STATUS */
  476.  
  477. /**
  478.   * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
  479.   * @param  USBx USB peripheral instance register address.
  480.   * @param  bEpNum Endpoint Number.
  481.   * @param  wState new state
  482.   * @retval None
  483.   */
  484. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do { \
  485.     uint16_t _wRegVal; \
  486.     \
  487.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
  488.     /* toggle first bit ? */ \
  489.     if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
  490.     { \
  491.        _wRegVal ^= USB_EPRX_DTOG1; \
  492.     } \
  493.     /* toggle second bit ? */ \
  494.     if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
  495.     { \
  496.        _wRegVal ^= USB_EPRX_DTOG2; \
  497.     } \
  498.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  499.   } while(0) /* PCD_SET_EP_RX_STATUS */
  500.  
  501. /**
  502.   * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  503.   * @param  USBx USB peripheral instance register address.
  504.   * @param  bEpNum Endpoint Number.
  505.   * @param  wStaterx new state.
  506.   * @param  wStatetx new state.
  507.   * @retval None
  508.   */
  509. #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) do { \
  510.     uint16_t _wRegVal; \
  511.     \
  512.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
  513.     /* toggle first bit ? */ \
  514.     if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
  515.     { \
  516.       _wRegVal ^= USB_EPRX_DTOG1; \
  517.     } \
  518.     /* toggle second bit ? */ \
  519.     if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
  520.     { \
  521.       _wRegVal ^= USB_EPRX_DTOG2; \
  522.     } \
  523.     /* toggle first bit ? */ \
  524.     if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
  525.     { \
  526.       _wRegVal ^= USB_EPTX_DTOG1; \
  527.     } \
  528.     /* toggle second bit ?  */ \
  529.     if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
  530.     { \
  531.       _wRegVal ^= USB_EPTX_DTOG2; \
  532.     } \
  533.     \
  534.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  535.   } while(0) /* PCD_SET_EP_TXRX_STATUS */
  536.  
  537. /**
  538.   * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
  539.   *         /STAT_RX[1:0])
  540.   * @param  USBx USB peripheral instance register address.
  541.   * @param  bEpNum Endpoint Number.
  542.   * @retval status
  543.   */
  544. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  545. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  546.  
  547. /**
  548.   * @brief  sets directly the VALID tx/rx-status into the endpoint register
  549.   * @param  USBx USB peripheral instance register address.
  550.   * @param  bEpNum Endpoint Number.
  551.   * @retval None
  552.   */
  553. #define PCD_SET_EP_TX_VALID(USBx, bEpNum)      (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  554. #define PCD_SET_EP_RX_VALID(USBx, bEpNum)      (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  555.  
  556. /**
  557.   * @brief  checks stall condition in an endpoint.
  558.   * @param  USBx USB peripheral instance register address.
  559.   * @param  bEpNum Endpoint Number.
  560.   * @retval TRUE = endpoint in stall condition.
  561.   */
  562. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL)
  563. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL)
  564.  
  565. /**
  566.   * @brief  set & clear EP_KIND bit.
  567.   * @param  USBx USB peripheral instance register address.
  568.   * @param  bEpNum Endpoint Number.
  569.   * @retval None
  570.   */
  571. #define PCD_SET_EP_KIND(USBx, bEpNum) do { \
  572.     uint16_t _wRegVal; \
  573.     \
  574.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  575.     \
  576.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
  577.   } while(0) /* PCD_SET_EP_KIND */
  578.  
  579. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) do { \
  580.     uint16_t _wRegVal; \
  581.     \
  582.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
  583.     \
  584.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  585.   } while(0) /* PCD_CLEAR_EP_KIND */
  586.  
  587. /**
  588.   * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
  589.   * @param  USBx USB peripheral instance register address.
  590.   * @param  bEpNum Endpoint Number.
  591.   * @retval None
  592.   */
  593. #define PCD_SET_OUT_STATUS(USBx, bEpNum)       PCD_SET_EP_KIND((USBx), (bEpNum))
  594. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)     PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  595.  
  596. /**
  597.   * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
  598.   * @param  USBx USB peripheral instance register address.
  599.   * @param  bEpNum Endpoint Number.
  600.   * @retval None
  601.   */
  602. #define PCD_SET_EP_DBUF(USBx, bEpNum)          PCD_SET_EP_KIND((USBx), (bEpNum))
  603. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum)        PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  604.  
  605. /**
  606.   * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
  607.   * @param  USBx USB peripheral instance register address.
  608.   * @param  bEpNum Endpoint Number.
  609.   * @retval None
  610.   */
  611. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) do { \
  612.     uint16_t _wRegVal; \
  613.     \
  614.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
  615.     \
  616.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
  617.   } while(0) /* PCD_CLEAR_RX_EP_CTR */
  618.  
  619. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) do { \
  620.     uint16_t _wRegVal; \
  621.     \
  622.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
  623.     \
  624.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
  625.   } while(0) /* PCD_CLEAR_TX_EP_CTR */
  626.  
  627. /**
  628.   * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  629.   * @param  USBx USB peripheral instance register address.
  630.   * @param  bEpNum Endpoint Number.
  631.   * @retval None
  632.   */
  633. #define PCD_RX_DTOG(USBx, bEpNum) do { \
  634.     uint16_t _wEPVal; \
  635.     \
  636.     _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  637.     \
  638.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
  639.   } while(0) /* PCD_RX_DTOG */
  640.  
  641. #define PCD_TX_DTOG(USBx, bEpNum) do { \
  642.     uint16_t _wEPVal; \
  643.     \
  644.     _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  645.     \
  646.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
  647.   } while(0) /* PCD_TX_DTOG */
  648. /**
  649.   * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  650.   * @param  USBx USB peripheral instance register address.
  651.   * @param  bEpNum Endpoint Number.
  652.   * @retval None
  653.   */
  654. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) do { \
  655.     uint16_t _wRegVal; \
  656.     \
  657.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  658.     \
  659.     if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
  660.     { \
  661.       PCD_RX_DTOG((USBx), (bEpNum)); \
  662.     } \
  663.   } while(0) /* PCD_CLEAR_RX_DTOG */
  664.  
  665. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) do { \
  666.     uint16_t _wRegVal; \
  667.     \
  668.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  669.     \
  670.     if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
  671.     { \
  672.       PCD_TX_DTOG((USBx), (bEpNum)); \
  673.     } \
  674.   } while(0) /* PCD_CLEAR_TX_DTOG */
  675.  
  676. /**
  677.   * @brief  Sets address in an endpoint register.
  678.   * @param  USBx USB peripheral instance register address.
  679.   * @param  bEpNum Endpoint Number.
  680.   * @param  bAddr Address.
  681.   * @retval None
  682.   */
  683. #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) do { \
  684.     uint16_t _wRegVal; \
  685.     \
  686.     _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
  687.     \
  688.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  689.   } while(0) /* PCD_SET_EP_ADDRESS */
  690.  
  691. /**
  692.   * @brief  Gets address in an endpoint register.
  693.   * @param  USBx USB peripheral instance register address.
  694.   * @param  bEpNum Endpoint Number.
  695.   * @retval None
  696.   */
  697. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  698.  
  699. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  700. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  701.  
  702. /**
  703.   * @brief  sets address of the tx/rx buffer.
  704.   * @param  USBx USB peripheral instance register address.
  705.   * @param  bEpNum Endpoint Number.
  706.   * @param  wAddr address to be set (must be word aligned).
  707.   * @retval None
  708.   */
  709. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) do { \
  710.   __IO uint16_t *_wRegVal; \
  711.   uint32_t _wRegBase = (uint32_t)USBx; \
  712.   \
  713.   _wRegBase += (uint32_t)(USBx)->BTABLE; \
  714.   _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
  715.   *_wRegVal = ((wAddr) >> 1) << 1; \
  716. } while(0) /* PCD_SET_EP_TX_ADDRESS */
  717.  
  718. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) do { \
  719.   __IO uint16_t *_wRegVal; \
  720.   uint32_t _wRegBase = (uint32_t)USBx; \
  721.   \
  722.   _wRegBase += (uint32_t)(USBx)->BTABLE; \
  723.   _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
  724.   *_wRegVal = ((wAddr) >> 1) << 1; \
  725. } while(0) /* PCD_SET_EP_RX_ADDRESS */
  726.  
  727. /**
  728.   * @brief  Gets address of the tx/rx buffer.
  729.   * @param  USBx USB peripheral instance register address.
  730.   * @param  bEpNum Endpoint Number.
  731.   * @retval address of the buffer.
  732.   */
  733. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  734. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  735.  
  736. /**
  737.   * @brief  Sets counter of rx buffer with no. of blocks.
  738.   * @param  pdwReg Register pointer
  739.   * @param  wCount Counter.
  740.   * @param  wNBlocks no. of Blocks.
  741.   * @retval None
  742.   */
  743. #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) do { \
  744.     (wNBlocks) = (wCount) >> 5; \
  745.     if (((wCount) & 0x1fU) == 0U) \
  746.     { \
  747.       (wNBlocks)--; \
  748.     } \
  749.     *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
  750.   } while(0) /* PCD_CALC_BLK32 */
  751.  
  752. #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) do { \
  753.     (wNBlocks) = (wCount) >> 1; \
  754.     if (((wCount) & 0x1U) != 0U) \
  755.     { \
  756.       (wNBlocks)++; \
  757.     } \
  758.     *(pdwReg) = (uint16_t)((wNBlocks) << 10); \
  759.   } while(0) /* PCD_CALC_BLK2 */
  760.  
  761. #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount)  do { \
  762.     uint32_t wNBlocks; \
  763.     if ((wCount) == 0U) \
  764.     { \
  765.       *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \
  766.       *(pdwReg) |= USB_CNTRX_BLSIZE; \
  767.     } \
  768.     else if((wCount) <= 62U) \
  769.     { \
  770.       PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
  771.     } \
  772.     else \
  773.     { \
  774.       PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
  775.     } \
  776.   } while(0) /* PCD_SET_EP_CNT_RX_REG */
  777.  
  778. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) do { \
  779.      uint32_t _wRegBase = (uint32_t)(USBx); \
  780.      __IO uint16_t *pdwReg; \
  781.      \
  782.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  783.     pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  784.     PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
  785.   } while(0)
  786.  
  787. /**
  788.   * @brief  sets counter for the tx/rx buffer.
  789.   * @param  USBx USB peripheral instance register address.
  790.   * @param  bEpNum Endpoint Number.
  791.   * @param  wCount Counter value.
  792.   * @retval None
  793.   */
  794. #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) do { \
  795.     uint32_t _wRegBase = (uint32_t)(USBx); \
  796.     __IO uint16_t *_wRegVal; \
  797.     \
  798.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  799.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  800.     *_wRegVal = (uint16_t)(wCount); \
  801. } while(0)
  802.  
  803. #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) do { \
  804.     uint32_t _wRegBase = (uint32_t)(USBx); \
  805.     __IO uint16_t *_wRegVal; \
  806.     \
  807.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  808.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  809.     PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
  810. } while(0)
  811.  
  812. /**
  813.   * @brief  gets counter of the tx buffer.
  814.   * @param  USBx USB peripheral instance register address.
  815.   * @param  bEpNum Endpoint Number.
  816.   * @retval Counter value
  817.   */
  818. #define PCD_GET_EP_TX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
  819. #define PCD_GET_EP_RX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
  820.  
  821. /**
  822.   * @brief  Sets buffer 0/1 address in a double buffer endpoint.
  823.   * @param  USBx USB peripheral instance register address.
  824.   * @param  bEpNum Endpoint Number.
  825.   * @param  wBuf0Addr buffer 0 address.
  826.   * @retval Counter value
  827.   */
  828. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) do { \
  829.     PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
  830.   } while(0) /* PCD_SET_EP_DBUF0_ADDR */
  831. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) do { \
  832.     PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
  833.   } while(0) /* PCD_SET_EP_DBUF1_ADDR */
  834.  
  835. /**
  836.   * @brief  Sets addresses in a double buffer endpoint.
  837.   * @param  USBx USB peripheral instance register address.
  838.   * @param  bEpNum Endpoint Number.
  839.   * @param  wBuf0Addr: buffer 0 address.
  840.   * @param  wBuf1Addr = buffer 1 address.
  841.   * @retval None
  842.   */
  843. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) do { \
  844.     PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
  845.     PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
  846.   } while(0) /* PCD_SET_EP_DBUF_ADDR */
  847.  
  848. /**
  849.   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
  850.   * @param  USBx USB peripheral instance register address.
  851.   * @param  bEpNum Endpoint Number.
  852.   * @retval None
  853.   */
  854. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum)    (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  855. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum)    (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  856.  
  857. /**
  858.   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
  859.   * @param  USBx USB peripheral instance register address.
  860.   * @param  bEpNum Endpoint Number.
  861.   * @param  bDir endpoint dir  EP_DBUF_OUT = OUT
  862.   *         EP_DBUF_IN  = IN
  863.   * @param  wCount: Counter value
  864.   * @retval None
  865.   */
  866. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) do { \
  867.     if ((bDir) == 0U) \
  868.       /* OUT endpoint */ \
  869.     { \
  870.       PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
  871.     } \
  872.     else \
  873.     { \
  874.       if ((bDir) == 1U) \
  875.       { \
  876.         /* IN endpoint */ \
  877.         PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
  878.       } \
  879.     } \
  880.   } while(0) /* SetEPDblBuf0Count*/
  881.  
  882. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) do { \
  883.     uint32_t _wBase = (uint32_t)(USBx); \
  884.     __IO uint16_t *_wEPRegVal; \
  885.     \
  886.     if ((bDir) == 0U) \
  887.     { \
  888.       /* OUT endpoint */ \
  889.       PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
  890.     } \
  891.     else \
  892.     { \
  893.       if ((bDir) == 1U) \
  894.       { \
  895.         /* IN endpoint */ \
  896.         _wBase += (uint32_t)(USBx)->BTABLE; \
  897.         _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  898.         *_wEPRegVal = (uint16_t)(wCount); \
  899.       } \
  900.     } \
  901.   } while(0) /* SetEPDblBuf1Count */
  902.  
  903. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do { \
  904.     PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  905.     PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  906.   } while(0) /* PCD_SET_EP_DBUF_CNT */
  907.  
  908. /**
  909.   * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
  910.   * @param  USBx USB peripheral instance register address.
  911.   * @param  bEpNum Endpoint Number.
  912.   * @retval None
  913.   */
  914. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum)     (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  915. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum)     (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  916.  
  917.  
  918.  
  919. /**
  920.   * @}
  921.   */
  922.  
  923. /**
  924.   * @}
  925.   */
  926.  
  927. /**
  928.   * @}
  929.   */
  930. #endif /* defined (USB) */
  931.  
  932. #ifdef __cplusplus
  933. }
  934. #endif
  935.  
  936. #endif /* STM32L1xx_HAL_PCD_H */
  937.  
  938. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  939.