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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32l1xx_hal_nor.h
  4.   * @author  MCD Application Team
  5.   * @brief   Header file of NOR HAL module.
  6.   ******************************************************************************
  7.   * @attention
  8.   *
  9.   * Copyright (c) 2016 STMicroelectronics.
  10.   * All rights reserved.
  11.   *
  12.   * This software is licensed under terms that can be found in the LICENSE file
  13.   * in the root directory of this software component.
  14.   * If no LICENSE file comes with this software, it is provided AS-IS.
  15.   *
  16.   ******************************************************************************
  17.   */
  18.  
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef STM32L1xx_HAL_NOR_H
  21. #define STM32L1xx_HAL_NOR_H
  22.  
  23. #ifdef __cplusplus
  24. extern "C" {
  25. #endif
  26.  
  27. #if defined(FSMC_BANK1)
  28.  
  29. /* Includes ------------------------------------------------------------------*/
  30. #include "stm32l1xx_ll_fsmc.h"
  31.  
  32. /** @addtogroup STM32L1xx_HAL_Driver
  33.   * @{
  34.   */
  35.  
  36. /** @addtogroup NOR
  37.   * @{
  38.   */
  39.  
  40. /* Exported typedef ----------------------------------------------------------*/
  41. /** @defgroup NOR_Exported_Types NOR Exported Types
  42.   * @{
  43.   */
  44.  
  45. /**
  46.   * @brief  HAL SRAM State structures definition
  47.   */
  48. typedef enum
  49. {
  50.   HAL_NOR_STATE_RESET             = 0x00U,  /*!< NOR not yet initialized or disabled  */
  51.   HAL_NOR_STATE_READY             = 0x01U,  /*!< NOR initialized and ready for use    */
  52.   HAL_NOR_STATE_BUSY              = 0x02U,  /*!< NOR internal processing is ongoing   */
  53.   HAL_NOR_STATE_ERROR             = 0x03U,  /*!< NOR error state                      */
  54.   HAL_NOR_STATE_PROTECTED         = 0x04U   /*!< NOR NORSRAM device write protected   */
  55. } HAL_NOR_StateTypeDef;
  56.  
  57. /**
  58.   * @brief  FSMC NOR Status typedef
  59.   */
  60. typedef enum
  61. {
  62.   HAL_NOR_STATUS_SUCCESS  = 0U,
  63.   HAL_NOR_STATUS_ONGOING,
  64.   HAL_NOR_STATUS_ERROR,
  65.   HAL_NOR_STATUS_TIMEOUT
  66. } HAL_NOR_StatusTypeDef;
  67.  
  68. /**
  69.   * @brief  FSMC NOR ID typedef
  70.   */
  71. typedef struct
  72. {
  73.   uint16_t Manufacturer_Code;  /*!< Defines the device's manufacturer code used to identify the memory       */
  74.  
  75.   uint16_t Device_Code1;
  76.  
  77.   uint16_t Device_Code2;
  78.  
  79.   uint16_t Device_Code3;       /*!< Defines the device's codes used to identify the memory.
  80.                                     These codes can be accessed by performing read operations with specific
  81.                                     control signals and addresses set.They can also be accessed by issuing
  82.                                     an Auto Select command                                                   */
  83. } NOR_IDTypeDef;
  84.  
  85. /**
  86.   * @brief  FSMC NOR CFI typedef
  87.   */
  88. typedef struct
  89. {
  90.   /*!< Defines the information stored in the memory's Common flash interface
  91.        which contains a description of various electrical and timing parameters,
  92.        density information and functions supported by the memory                   */
  93.  
  94.   uint16_t CFI_1;
  95.  
  96.   uint16_t CFI_2;
  97.  
  98.   uint16_t CFI_3;
  99.  
  100.   uint16_t CFI_4;
  101. } NOR_CFITypeDef;
  102.  
  103. /**
  104.   * @brief  NOR handle Structure definition
  105.   */
  106. #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
  107. typedef struct __NOR_HandleTypeDef
  108. #else
  109. typedef struct
  110. #endif /* USE_HAL_NOR_REGISTER_CALLBACKS  */
  111.  
  112. {
  113.   FSMC_NORSRAM_TypeDef           *Instance;    /*!< Register base address                        */
  114.  
  115.   FSMC_NORSRAM_EXTENDED_TypeDef  *Extended;    /*!< Extended mode register base address          */
  116.  
  117.   FSMC_NORSRAM_InitTypeDef       Init;         /*!< NOR device control configuration parameters  */
  118.  
  119.   HAL_LockTypeDef               Lock;         /*!< NOR locking object                           */
  120.  
  121.   __IO HAL_NOR_StateTypeDef     State;        /*!< NOR device access state                      */
  122.  
  123.   uint32_t                      CommandSet;   /*!< NOR algorithm command set and control        */
  124.  
  125. #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
  126.   void (* MspInitCallback)(struct __NOR_HandleTypeDef *hnor);               /*!< NOR Msp Init callback              */
  127.   void (* MspDeInitCallback)(struct __NOR_HandleTypeDef *hnor);             /*!< NOR Msp DeInit callback            */
  128. #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
  129. } NOR_HandleTypeDef;
  130.  
  131. #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
  132. /**
  133.   * @brief  HAL NOR Callback ID enumeration definition
  134.   */
  135. typedef enum
  136. {
  137.   HAL_NOR_MSP_INIT_CB_ID       = 0x00U,  /*!< NOR MspInit Callback ID          */
  138.   HAL_NOR_MSP_DEINIT_CB_ID     = 0x01U   /*!< NOR MspDeInit Callback ID        */
  139. } HAL_NOR_CallbackIDTypeDef;
  140.  
  141. /**
  142.   * @brief  HAL NOR Callback pointer definition
  143.   */
  144. typedef void (*pNOR_CallbackTypeDef)(NOR_HandleTypeDef *hnor);
  145. #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
  146. /**
  147.   * @}
  148.   */
  149.  
  150. /* Exported constants --------------------------------------------------------*/
  151. /* Exported macro ------------------------------------------------------------*/
  152. /** @defgroup NOR_Exported_Macros NOR Exported Macros
  153.   * @{
  154.   */
  155. /** @brief Reset NOR handle state
  156.   * @param  __HANDLE__ specifies the NOR handle.
  157.   * @retval None
  158.   */
  159. #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
  160. #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__)          do {                                             \
  161.                                                                (__HANDLE__)->State = HAL_NOR_STATE_RESET;  \
  162.                                                                (__HANDLE__)->MspInitCallback = NULL;       \
  163.                                                                (__HANDLE__)->MspDeInitCallback = NULL;     \
  164.                                                              } while(0)
  165. #else
  166. #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
  167. #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
  168. /**
  169.   * @}
  170.   */
  171.  
  172. /* Exported functions --------------------------------------------------------*/
  173. /** @addtogroup NOR_Exported_Functions NOR Exported Functions
  174.   * @{
  175.   */
  176.  
  177. /** @addtogroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions
  178.   * @{
  179.   */
  180.  
  181. /* Initialization/de-initialization functions  ********************************/
  182. HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FSMC_NORSRAM_TimingTypeDef *Timing,
  183.                                FSMC_NORSRAM_TimingTypeDef *ExtTiming);
  184. HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
  185. void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
  186. void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
  187. void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
  188. /**
  189.   * @}
  190.   */
  191.  
  192. /** @addtogroup NOR_Exported_Functions_Group2 Input and Output functions
  193.   * @{
  194.   */
  195.  
  196. /* I/O operation functions  ***************************************************/
  197. HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
  198. HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
  199. HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
  200. HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
  201.  
  202. HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData,
  203.                                      uint32_t uwBufferSize);
  204. HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData,
  205.                                         uint32_t uwBufferSize);
  206.  
  207. HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
  208. HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
  209. HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
  210.  
  211. #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
  212. /* NOR callback registering/unregistering */
  213. HAL_StatusTypeDef HAL_NOR_RegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId,
  214.                                            pNOR_CallbackTypeDef pCallback);
  215. HAL_StatusTypeDef HAL_NOR_UnRegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId);
  216. #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
  217. /**
  218.   * @}
  219.   */
  220.  
  221. /** @addtogroup NOR_Exported_Functions_Group3 NOR Control functions
  222.   * @{
  223.   */
  224.  
  225. /* NOR Control functions  *****************************************************/
  226. HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
  227. HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
  228. /**
  229.   * @}
  230.   */
  231.  
  232. /** @addtogroup NOR_Exported_Functions_Group4 NOR State functions
  233.   * @{
  234.   */
  235.  
  236. /* NOR State functions ********************************************************/
  237. HAL_NOR_StateTypeDef  HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
  238. HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
  239. /**
  240.   * @}
  241.   */
  242.  
  243. /**
  244.   * @}
  245.   */
  246.  
  247. /* Private types -------------------------------------------------------------*/
  248. /* Private variables ---------------------------------------------------------*/
  249. /* Private constants ---------------------------------------------------------*/
  250. /** @defgroup NOR_Private_Constants NOR Private Constants
  251.   * @{
  252.   */
  253. /* NOR device IDs addresses */
  254. #define MC_ADDRESS               ((uint16_t)0x0000)
  255. #define DEVICE_CODE1_ADDR        ((uint16_t)0x0001)
  256. #define DEVICE_CODE2_ADDR        ((uint16_t)0x000E)
  257. #define DEVICE_CODE3_ADDR        ((uint16_t)0x000F)
  258.  
  259. /* NOR CFI IDs addresses */
  260. #define CFI1_ADDRESS             ((uint16_t)0x0061)
  261. #define CFI2_ADDRESS             ((uint16_t)0x0062)
  262. #define CFI3_ADDRESS             ((uint16_t)0x0063)
  263. #define CFI4_ADDRESS             ((uint16_t)0x0064)
  264.  
  265. /* NOR operation wait timeout */
  266. #define NOR_TMEOUT               ((uint16_t)0xFFFF)
  267.  
  268. /* NOR memory data width */
  269. #define NOR_MEMORY_8B            ((uint8_t)0x00)
  270. #define NOR_MEMORY_16B           ((uint8_t)0x01)
  271.  
  272. /* NOR memory device read/write start address */
  273. #define NOR_MEMORY_ADRESS1       (0x60000000U)
  274. #define NOR_MEMORY_ADRESS2       (0x64000000U)
  275. #define NOR_MEMORY_ADRESS3       (0x68000000U)
  276. #define NOR_MEMORY_ADRESS4       (0x6C000000U)
  277. /**
  278.   * @}
  279.   */
  280.  
  281. /* Private macros ------------------------------------------------------------*/
  282. /** @defgroup NOR_Private_Macros NOR Private Macros
  283.   * @{
  284.   */
  285. /**
  286.   * @brief  NOR memory address shifting.
  287.   * @param  __NOR_ADDRESS NOR base address
  288.   * @param  __NOR_MEMORY_WIDTH_ NOR memory width
  289.   * @param  __ADDRESS__ NOR memory address
  290.   * @retval NOR shifted address value
  291.   */
  292. #define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__)         \
  293.   ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)?            \
  294.               ((uint32_t)((__NOR_ADDRESS) + (2U * (__ADDRESS__)))):              \
  295.               ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__)))))
  296.  
  297. /**
  298.   * @brief  NOR memory write data to specified address.
  299.   * @param  __ADDRESS__ NOR memory address
  300.   * @param  __DATA__ Data to write
  301.   * @retval None
  302.   */
  303. #define NOR_WRITE(__ADDRESS__, __DATA__)   do{                                                             \
  304.                                                (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)); \
  305.                                                __DSB();                                                    \
  306.                                              } while(0)
  307.  
  308. /**
  309.   * @}
  310.   */
  311.  
  312. /**
  313.   * @}
  314.   */
  315.  
  316. /**
  317.   * @}
  318.   */
  319.  
  320. #endif /* FSMC_BANK1 */
  321.  
  322. #ifdef __cplusplus
  323. }
  324. #endif
  325.  
  326. #endif /* STM32L1xx_HAL_NOR_H */
  327.