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  1. /* ----------------------------------------------------------------------    
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
  3. *    
  4. * $Date:        19. October 2015
  5. * $Revision:    V.1.4.5 a
  6. *    
  7. * Project:          CMSIS DSP Library    
  8. * Title:            arm_mult_q15.c    
  9. *    
  10. * Description:  Q15 vector multiplication.    
  11. *    
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *  
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. *   - Redistributions of source code must retain the above copyright
  18. *     notice, this list of conditions and the following disclaimer.
  19. *   - Redistributions in binary form must reproduce the above copyright
  20. *     notice, this list of conditions and the following disclaimer in
  21. *     the documentation and/or other materials provided with the
  22. *     distribution.
  23. *   - Neither the name of ARM LIMITED nor the names of its contributors
  24. *     may be used to endorse or promote products derived from this
  25. *     software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.  
  39. * -------------------------------------------------------------------- */
  40.  
  41. #include "arm_math.h"
  42.  
  43. /**    
  44.  * @ingroup groupMath    
  45.  */
  46.  
  47. /**    
  48.  * @addtogroup BasicMult    
  49.  * @{    
  50.  */
  51.  
  52.  
  53. /**    
  54.  * @brief           Q15 vector multiplication    
  55.  * @param[in]       *pSrcA points to the first input vector    
  56.  * @param[in]       *pSrcB points to the second input vector    
  57.  * @param[out]      *pDst points to the output vector    
  58.  * @param[in]       blockSize number of samples in each vector    
  59.  * @return none.    
  60.  *    
  61.  * <b>Scaling and Overflow Behavior:</b>    
  62.  * \par    
  63.  * The function uses saturating arithmetic.    
  64.  * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
  65.  */
  66.  
  67. void arm_mult_q15(
  68.   q15_t * pSrcA,
  69.   q15_t * pSrcB,
  70.   q15_t * pDst,
  71.   uint32_t blockSize)
  72. {
  73.   uint32_t blkCnt;                               /* loop counters */
  74.  
  75. #ifndef ARM_MATH_CM0_FAMILY
  76.  
  77. /* Run the below code for Cortex-M4 and Cortex-M3 */
  78.   q31_t inA1, inA2, inB1, inB2;                  /* temporary input variables */
  79.   q15_t out1, out2, out3, out4;                  /* temporary output variables */
  80.   q31_t mul1, mul2, mul3, mul4;                  /* temporary variables */
  81.  
  82.   /* loop Unrolling */
  83.   blkCnt = blockSize >> 2u;
  84.  
  85.   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
  86.    ** a second loop below computes the remaining 1 to 3 samples. */
  87.   while(blkCnt > 0u)
  88.   {
  89.     /* read two samples at a time from sourceA */
  90.     inA1 = *__SIMD32(pSrcA)++;
  91.     /* read two samples at a time from sourceB */
  92.     inB1 = *__SIMD32(pSrcB)++;
  93.     /* read two samples at a time from sourceA */
  94.     inA2 = *__SIMD32(pSrcA)++;
  95.     /* read two samples at a time from sourceB */
  96.     inB2 = *__SIMD32(pSrcB)++;
  97.  
  98.     /* multiply mul = sourceA * sourceB */
  99.     mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
  100.     mul2 = (q31_t) ((q15_t) inA1 * (q15_t) inB1);
  101.     mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16));
  102.     mul4 = (q31_t) ((q15_t) inA2 * (q15_t) inB2);
  103.  
  104.     /* saturate result to 16 bit */
  105.     out1 = (q15_t) __SSAT(mul1 >> 15, 16);
  106.     out2 = (q15_t) __SSAT(mul2 >> 15, 16);
  107.     out3 = (q15_t) __SSAT(mul3 >> 15, 16);
  108.     out4 = (q15_t) __SSAT(mul4 >> 15, 16);
  109.  
  110.     /* store the result */
  111. #ifndef ARM_MATH_BIG_ENDIAN
  112.  
  113.     *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
  114.     *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
  115.  
  116. #else
  117.  
  118.     *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
  119.     *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
  120.  
  121. #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
  122.  
  123.     /* Decrement the blockSize loop counter */
  124.     blkCnt--;
  125.   }
  126.  
  127.   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
  128.    ** No loop unrolling is used. */
  129.   blkCnt = blockSize % 0x4u;
  130.  
  131. #else
  132.  
  133.   /* Run the below code for Cortex-M0 */
  134.  
  135.   /* Initialize blkCnt with number of samples */
  136.   blkCnt = blockSize;
  137.  
  138. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  139.  
  140.  
  141.   while(blkCnt > 0u)
  142.   {
  143.     /* C = A * B */
  144.     /* Multiply the inputs and store the result in the destination buffer */
  145.     *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
  146.  
  147.     /* Decrement the blockSize loop counter */
  148.     blkCnt--;
  149.   }
  150. }
  151.  
  152. /**    
  153.  * @} end of BasicMult group    
  154.  */
  155.