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  1. /* ----------------------------------------------------------------------    
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
  3. *    
  4. * $Date:        19. March 2015
  5. * $Revision:    V.1.4.5
  6. *    
  7. * Project:          CMSIS DSP Library    
  8. * Title:                arm_dot_prod_q15.c    
  9. *    
  10. * Description:  Q15 dot product.    
  11. *    
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *  
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. *   - Redistributions of source code must retain the above copyright
  18. *     notice, this list of conditions and the following disclaimer.
  19. *   - Redistributions in binary form must reproduce the above copyright
  20. *     notice, this list of conditions and the following disclaimer in
  21. *     the documentation and/or other materials provided with the
  22. *     distribution.
  23. *   - Neither the name of ARM LIMITED nor the names of its contributors
  24. *     may be used to endorse or promote products derived from this
  25. *     software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * -------------------------------------------------------------------- */
  40.  
  41. #include "arm_math.h"
  42.  
  43. /**    
  44.  * @ingroup groupMath    
  45.  */
  46.  
  47. /**    
  48.  * @addtogroup dot_prod    
  49.  * @{    
  50.  */
  51.  
  52. /**    
  53.  * @brief Dot product of Q15 vectors.    
  54.  * @param[in]       *pSrcA points to the first input vector    
  55.  * @param[in]       *pSrcB points to the second input vector    
  56.  * @param[in]       blockSize number of samples in each vector    
  57.  * @param[out]      *result output result returned here    
  58.  * @return none.    
  59.  *    
  60.  * <b>Scaling and Overflow Behavior:</b>    
  61.  * \par    
  62.  * The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these    
  63.  * results are added to a 64-bit accumulator in 34.30 format.    
  64.  * Nonsaturating additions are used and given that there are 33 guard bits in the accumulator    
  65.  * there is no risk of overflow.    
  66.  * The return result is in 34.30 format.    
  67.  */
  68.  
  69. void arm_dot_prod_q15(
  70.   q15_t * pSrcA,
  71.   q15_t * pSrcB,
  72.   uint32_t blockSize,
  73.   q63_t * result)
  74. {
  75.   q63_t sum = 0;                                 /* Temporary result storage */
  76.   uint32_t blkCnt;                               /* loop counter */
  77.  
  78. #ifndef ARM_MATH_CM0_FAMILY
  79.  
  80. /* Run the below code for Cortex-M4 and Cortex-M3 */
  81.  
  82.  
  83.   /*loop Unrolling */
  84.   blkCnt = blockSize >> 2u;
  85.  
  86.   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
  87.    ** a second loop below computes the remaining 1 to 3 samples. */
  88.   while(blkCnt > 0u)
  89.   {
  90.     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
  91.     /* Calculate dot product and then store the result in a temporary buffer. */
  92.     sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
  93.     sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
  94.  
  95.     /* Decrement the loop counter */
  96.     blkCnt--;
  97.   }
  98.  
  99.   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
  100.    ** No loop unrolling is used. */
  101.   blkCnt = blockSize % 0x4u;
  102.  
  103.   while(blkCnt > 0u)
  104.   {
  105.     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
  106.     /* Calculate dot product and then store the results in a temporary buffer. */
  107.     sum = __SMLALD(*pSrcA++, *pSrcB++, sum);
  108.  
  109.     /* Decrement the loop counter */
  110.     blkCnt--;
  111.   }
  112.  
  113.  
  114. #else
  115.  
  116.   /* Run the below code for Cortex-M0 */
  117.  
  118.   /* Initialize blkCnt with number of samples */
  119.   blkCnt = blockSize;
  120.  
  121.   while(blkCnt > 0u)
  122.   {
  123.     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
  124.     /* Calculate dot product and then store the results in a temporary buffer. */
  125.     sum += (q63_t) ((q31_t) * pSrcA++ * *pSrcB++);
  126.  
  127.     /* Decrement the loop counter */
  128.     blkCnt--;
  129.   }
  130.  
  131. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  132.  
  133.   /* Store the result in the destination buffer in 34.30 format */
  134.   *result = sum;
  135.  
  136. }
  137.  
  138. /**    
  139.  * @} end of dot_prod group    
  140.  */
  141.