Subversion Repositories DashDisplay

Rev

Rev 61 | Blame | Compare with Previous | Last modification | View Log | Download | RSS feed

  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32l1xx_hal_i2c.c
  4.   * @author  MCD Application Team
  5.   * @brief   I2C HAL module driver.
  6.   *          This file provides firmware functions to manage the following
  7.   *          functionalities of the Inter Integrated Circuit (I2C) peripheral:
  8.   *           + Initialization and de-initialization functions
  9.   *           + IO operation functions
  10.   *           + Peripheral State, Mode and Error functions
  11.   *
  12.   @verbatim
  13.   ==============================================================================
  14.                         ##### How to use this driver #####
  15.   ==============================================================================
  16.   [..]
  17.     The I2C HAL driver can be used as follows:
  18.  
  19.     (#) Declare a I2C_HandleTypeDef handle structure, for example:
  20.         I2C_HandleTypeDef  hi2c;
  21.  
  22.     (#)Initialize the I2C low level resources by implementing the @ref HAL_I2C_MspInit() API:
  23.         (##) Enable the I2Cx interface clock
  24.         (##) I2C pins configuration
  25.             (+++) Enable the clock for the I2C GPIOs
  26.             (+++) Configure I2C pins as alternate function open-drain
  27.         (##) NVIC configuration if you need to use interrupt process
  28.             (+++) Configure the I2Cx interrupt priority
  29.             (+++) Enable the NVIC I2C IRQ Channel
  30.         (##) DMA Configuration if you need to use DMA process
  31.             (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
  32.             (+++) Enable the DMAx interface clock using
  33.             (+++) Configure the DMA handle parameters
  34.             (+++) Configure the DMA Tx or Rx channel
  35.             (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
  36.             (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
  37.                   the DMA Tx or Rx channel
  38.  
  39.     (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
  40.         Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
  41.  
  42.     (#) Initialize the I2C registers by calling the @ref HAL_I2C_Init(), configures also the low level Hardware
  43.         (GPIO, CLOCK, NVIC...etc) by calling the customized @ref HAL_I2C_MspInit() API.
  44.  
  45.     (#) To check if target device is ready for communication, use the function @ref HAL_I2C_IsDeviceReady()
  46.  
  47.     (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
  48.  
  49.     *** Polling mode IO operation ***
  50.     =================================
  51.     [..]
  52.       (+) Transmit in master mode an amount of data in blocking mode using @ref HAL_I2C_Master_Transmit()
  53.       (+) Receive in master mode an amount of data in blocking mode using @ref HAL_I2C_Master_Receive()
  54.       (+) Transmit in slave mode an amount of data in blocking mode using @ref HAL_I2C_Slave_Transmit()
  55.       (+) Receive in slave mode an amount of data in blocking mode using @ref HAL_I2C_Slave_Receive()
  56.  
  57.     *** Polling mode IO MEM operation ***
  58.     =====================================
  59.     [..]
  60.       (+) Write an amount of data in blocking mode to a specific memory address using @ref HAL_I2C_Mem_Write()
  61.       (+) Read an amount of data in blocking mode from a specific memory address using @ref HAL_I2C_Mem_Read()
  62.  
  63.  
  64.     *** Interrupt mode IO operation ***
  65.     ===================================
  66.     [..]
  67.       (+) Transmit in master mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Transmit_IT()
  68.       (+) At transmission end of transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can
  69.            add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback()
  70.       (+) Receive in master mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Receive_IT()
  71.       (+) At reception end of transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can
  72.            add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback()
  73.       (+) Transmit in slave mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Transmit_IT()
  74.       (+) At transmission end of transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can
  75.            add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback()
  76.       (+) Receive in slave mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Receive_IT()
  77.       (+) At reception end of transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can
  78.            add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback()
  79.       (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
  80.            add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
  81.       (+) Abort a master I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_IT()
  82.       (+) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can
  83.            add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback()
  84.  
  85.     *** Interrupt mode or DMA mode IO sequential operation ***
  86.     ==========================================================
  87.     [..]
  88.       (@) These interfaces allow to manage a sequential transfer with a repeated start condition
  89.           when a direction change during transfer
  90.     [..]
  91.       (+) A specific option field manage the different steps of a sequential transfer
  92.       (+) Option field values are defined through @ref I2C_XferOptions_definition and are listed below:
  93.       (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functional is same as associated interfaces in no sequential mode
  94.       (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
  95.                             and data to transfer without a final stop condition
  96.       (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a sequence with start condition, address
  97.                             and data to transfer without a final stop condition, an then permit a call the same master sequential interface
  98.                             several times (like @ref HAL_I2C_Master_Seq_Transmit_IT() then @ref HAL_I2C_Master_Seq_Transmit_IT()
  99.                             or @ref HAL_I2C_Master_Seq_Transmit_DMA() then @ref HAL_I2C_Master_Seq_Transmit_DMA())
  100.       (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
  101.                             and with new data to transfer if the direction change or manage only the new data to transfer
  102.                             if no direction change and without a final stop condition in both cases
  103.       (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
  104.                             and with new data to transfer if the direction change or manage only the new data to transfer
  105.                             if no direction change and with a final stop condition in both cases
  106.       (++) I2C_LAST_FRAME_NO_STOP: Sequential usage (Master only), this option allow to manage a restart condition after several call of the same master sequential
  107.                             interface several times (link with option I2C_FIRST_AND_NEXT_FRAME).
  108.                             Usage can, transfer several bytes one by one using HAL_I2C_Master_Seq_Transmit_IT(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)
  109.                               or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)
  110.                               or HAL_I2C_Master_Seq_Transmit_DMA(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)
  111.                               or HAL_I2C_Master_Seq_Receive_DMA(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME).
  112.                             Then usage of this option I2C_LAST_FRAME_NO_STOP at the last Transmit or Receive sequence permit to call the opposite interface Receive or Transmit
  113.                               without stopping the communication and so generate a restart condition.
  114.       (++) I2C_OTHER_FRAME: Sequential usage (Master only), this option allow to manage a restart condition after each call of the same master sequential
  115.                             interface.
  116.                             Usage can, transfer several bytes one by one with a restart with slave address between each bytes using HAL_I2C_Master_Seq_Transmit_IT(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)
  117.                               or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)
  118.                               or HAL_I2C_Master_Seq_Transmit_DMA(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)
  119.                               or HAL_I2C_Master_Seq_Receive_DMA(option I2C_FIRST_FRAME then I2C_OTHER_FRAME).
  120.                             Then usage of this option I2C_OTHER_AND_LAST_FRAME at the last frame to help automatic generation of STOP condition.
  121.  
  122.       (+) Different sequential I2C interfaces are listed below:
  123.       (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Seq_Transmit_IT()
  124.             or using @ref HAL_I2C_Master_Seq_Transmit_DMA()
  125.       (+++) At transmission end of current frame transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can
  126.            add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback()
  127.       (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Seq_Receive_IT()
  128.             or using @ref HAL_I2C_Master_Seq_Receive_DMA()
  129.       (+++) At reception end of current frame transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can
  130.            add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback()
  131.       (++) Abort a master IT or DMA I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_IT()
  132.       (+++) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can
  133.            add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback()
  134.       (++) Enable/disable the Address listen mode in slave I2C mode using @ref HAL_I2C_EnableListen_IT() @ref HAL_I2C_DisableListen_IT()
  135.       (+++) When address slave I2C match, @ref HAL_I2C_AddrCallback() is executed and user can
  136.            add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
  137.       (+++) At Listen mode end @ref HAL_I2C_ListenCpltCallback() is executed and user can
  138.            add his own code by customization of function pointer @ref HAL_I2C_ListenCpltCallback()
  139.       (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Seq_Transmit_IT()
  140.             or using @ref HAL_I2C_Slave_Seq_Transmit_DMA()
  141.       (+++) At transmission end of current frame transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can
  142.            add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback()
  143.       (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Seq_Receive_IT()
  144.             or using @ref HAL_I2C_Slave_Seq_Receive_DMA()
  145.       (+++) At reception end of current frame transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can
  146.            add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback()
  147.       (++) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
  148.            add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
  149.  
  150.     *** Interrupt mode IO MEM operation ***
  151.     =======================================
  152.     [..]
  153.       (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using
  154.           @ref HAL_I2C_Mem_Write_IT()
  155.       (+) At Memory end of write transfer, @ref HAL_I2C_MemTxCpltCallback() is executed and user can
  156.            add his own code by customization of function pointer @ref HAL_I2C_MemTxCpltCallback()
  157.       (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using
  158.           @ref HAL_I2C_Mem_Read_IT()
  159.       (+) At Memory end of read transfer, @ref HAL_I2C_MemRxCpltCallback() is executed and user can
  160.            add his own code by customization of function pointer @ref HAL_I2C_MemRxCpltCallback()
  161.       (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
  162.            add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
  163.  
  164.     *** DMA mode IO operation ***
  165.     ==============================
  166.     [..]
  167.       (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using
  168.           @ref HAL_I2C_Master_Transmit_DMA()
  169.       (+) At transmission end of transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can
  170.            add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback()
  171.       (+) Receive in master mode an amount of data in non-blocking mode (DMA) using
  172.           @ref HAL_I2C_Master_Receive_DMA()
  173.       (+) At reception end of transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can
  174.            add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback()
  175.       (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using
  176.           @ref HAL_I2C_Slave_Transmit_DMA()
  177.       (+) At transmission end of transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can
  178.            add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback()
  179.       (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using
  180.           @ref HAL_I2C_Slave_Receive_DMA()
  181.       (+) At reception end of transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can
  182.            add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback()
  183.       (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
  184.            add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
  185.       (+) Abort a master I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_IT()
  186.       (+) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can
  187.            add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback()
  188.  
  189.     *** DMA mode IO MEM operation ***
  190.     =================================
  191.     [..]
  192.       (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using
  193.           @ref HAL_I2C_Mem_Write_DMA()
  194.       (+) At Memory end of write transfer, @ref HAL_I2C_MemTxCpltCallback() is executed and user can
  195.            add his own code by customization of function pointer @ref HAL_I2C_MemTxCpltCallback()
  196.       (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using
  197.           @ref HAL_I2C_Mem_Read_DMA()
  198.       (+) At Memory end of read transfer, @ref HAL_I2C_MemRxCpltCallback() is executed and user can
  199.            add his own code by customization of function pointer @ref HAL_I2C_MemRxCpltCallback()
  200.       (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
  201.            add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
  202.  
  203.  
  204.      *** I2C HAL driver macros list ***
  205.      ==================================
  206.      [..]
  207.        Below the list of most used macros in I2C HAL driver.
  208.  
  209.       (+) @ref __HAL_I2C_ENABLE:     Enable the I2C peripheral
  210.       (+) @ref __HAL_I2C_DISABLE:    Disable the I2C peripheral
  211.       (+) @ref __HAL_I2C_GET_FLAG:   Checks whether the specified I2C flag is set or not
  212.       (+) @ref __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag
  213.       (+) @ref __HAL_I2C_ENABLE_IT:  Enable the specified I2C interrupt
  214.       (+) @ref __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
  215.  
  216.      *** Callback registration ***
  217.      =============================================
  218.     [..]
  219.      The compilation flag USE_HAL_I2C_REGISTER_CALLBACKS when set to 1
  220.      allows the user to configure dynamically the driver callbacks.
  221.      Use Functions @ref HAL_I2C_RegisterCallback() or @ref HAL_I2C_RegisterAddrCallback()
  222.      to register an interrupt callback.
  223.     [..]
  224.      Function @ref HAL_I2C_RegisterCallback() allows to register following callbacks:
  225.        (+) MasterTxCpltCallback : callback for Master transmission end of transfer.
  226.        (+) MasterRxCpltCallback : callback for Master reception end of transfer.
  227.        (+) SlaveTxCpltCallback  : callback for Slave transmission end of transfer.
  228.        (+) SlaveRxCpltCallback  : callback for Slave reception end of transfer.
  229.        (+) ListenCpltCallback   : callback for end of listen mode.
  230.        (+) MemTxCpltCallback    : callback for Memory transmission end of transfer.
  231.        (+) MemRxCpltCallback    : callback for Memory reception end of transfer.
  232.        (+) ErrorCallback        : callback for error detection.
  233.        (+) AbortCpltCallback    : callback for abort completion process.
  234.        (+) MspInitCallback      : callback for Msp Init.
  235.        (+) MspDeInitCallback    : callback for Msp DeInit.
  236.      This function takes as parameters the HAL peripheral handle, the Callback ID
  237.      and a pointer to the user callback function.
  238.     [..]
  239.      For specific callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_RegisterAddrCallback().
  240.     [..]
  241.      Use function @ref HAL_I2C_UnRegisterCallback to reset a callback to the default
  242.      weak function.
  243.      @ref HAL_I2C_UnRegisterCallback takes as parameters the HAL peripheral handle,
  244.      and the Callback ID.
  245.      This function allows to reset following callbacks:
  246.        (+) MasterTxCpltCallback : callback for Master transmission end of transfer.
  247.        (+) MasterRxCpltCallback : callback for Master reception end of transfer.
  248.        (+) SlaveTxCpltCallback  : callback for Slave transmission end of transfer.
  249.        (+) SlaveRxCpltCallback  : callback for Slave reception end of transfer.
  250.        (+) ListenCpltCallback   : callback for end of listen mode.
  251.        (+) MemTxCpltCallback    : callback for Memory transmission end of transfer.
  252.        (+) MemRxCpltCallback    : callback for Memory reception end of transfer.
  253.        (+) ErrorCallback        : callback for error detection.
  254.        (+) AbortCpltCallback    : callback for abort completion process.
  255.        (+) MspInitCallback      : callback for Msp Init.
  256.        (+) MspDeInitCallback    : callback for Msp DeInit.
  257.     [..]
  258.      For callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_UnRegisterAddrCallback().
  259.     [..]
  260.      By default, after the @ref HAL_I2C_Init() and when the state is @ref HAL_I2C_STATE_RESET
  261.      all callbacks are set to the corresponding weak functions:
  262.      examples @ref HAL_I2C_MasterTxCpltCallback(), @ref HAL_I2C_MasterRxCpltCallback().
  263.      Exception done for MspInit and MspDeInit functions that are
  264.      reset to the legacy weak functions in the @ref HAL_I2C_Init()/ @ref HAL_I2C_DeInit() only when
  265.      these callbacks are null (not registered beforehand).
  266.      If MspInit or MspDeInit are not null, the @ref HAL_I2C_Init()/ @ref HAL_I2C_DeInit()
  267.      keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
  268.     [..]
  269.      Callbacks can be registered/unregistered in @ref HAL_I2C_STATE_READY state only.
  270.      Exception done MspInit/MspDeInit functions that can be registered/unregistered
  271.      in @ref HAL_I2C_STATE_READY or @ref HAL_I2C_STATE_RESET state,
  272.      thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
  273.      Then, the user first registers the MspInit/MspDeInit user callbacks
  274.      using @ref HAL_I2C_RegisterCallback() before calling @ref HAL_I2C_DeInit()
  275.      or @ref HAL_I2C_Init() function.
  276.     [..]
  277.      When the compilation flag USE_HAL_I2C_REGISTER_CALLBACKS is set to 0 or
  278.      not defined, the callback registration feature is not available and all callbacks
  279.      are set to the corresponding weak functions.
  280.  
  281.  
  282.  
  283.      [..]
  284.        (@) You can refer to the I2C HAL driver header file for more useful macros
  285.  
  286.   @endverbatim
  287.   ******************************************************************************
  288.   * @attention
  289.   *
  290.   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  291.   * All rights reserved.</center></h2>
  292.   *
  293.   * This software component is licensed by ST under BSD 3-Clause license,
  294.   * the "License"; You may not use this file except in compliance with the
  295.   * License. You may obtain a copy of the License at:
  296.   *                        opensource.org/licenses/BSD-3-Clause
  297.   *
  298.   ******************************************************************************
  299.   */
  300.  
  301. /* Includes ------------------------------------------------------------------*/
  302. #include "stm32l1xx_hal.h"
  303.  
  304. /** @addtogroup STM32L1xx_HAL_Driver
  305.   * @{
  306.   */
  307.  
  308. /** @defgroup I2C I2C
  309.   * @brief I2C HAL module driver
  310.   * @{
  311.   */
  312.  
  313. #ifdef HAL_I2C_MODULE_ENABLED
  314.  
  315. /* Private typedef -----------------------------------------------------------*/
  316. /* Private define ------------------------------------------------------------*/
  317. /** @addtogroup I2C_Private_Define
  318.   * @{
  319.   */
  320. #define I2C_TIMEOUT_FLAG          35U         /*!< Timeout 35 ms             */
  321. #define I2C_TIMEOUT_BUSY_FLAG     25U         /*!< Timeout 25 ms             */
  322. #define I2C_TIMEOUT_STOP_FLAG     5U          /*!< Timeout 5 ms              */
  323. #define I2C_NO_OPTION_FRAME       0xFFFF0000U /*!< XferOptions default value */
  324.  
  325. /* Private define for @ref PreviousState usage */
  326. #define I2C_STATE_MSK             ((uint32_t)((uint32_t)((uint32_t)HAL_I2C_STATE_BUSY_TX | (uint32_t)HAL_I2C_STATE_BUSY_RX) & (uint32_t)(~((uint32_t)HAL_I2C_STATE_READY)))) /*!< Mask State define, keep only RX and TX bits            */
  327. #define I2C_STATE_NONE            ((uint32_t)(HAL_I2C_MODE_NONE))                                                        /*!< Default Value                                          */
  328. #define I2C_STATE_MASTER_BUSY_TX  ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MASTER))            /*!< Master Busy TX, combinaison of State LSB and Mode enum */
  329. #define I2C_STATE_MASTER_BUSY_RX  ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MASTER))            /*!< Master Busy RX, combinaison of State LSB and Mode enum */
  330. #define I2C_STATE_SLAVE_BUSY_TX   ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_SLAVE))             /*!< Slave Busy TX, combinaison of State LSB and Mode enum  */
  331. #define I2C_STATE_SLAVE_BUSY_RX   ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_SLAVE))             /*!< Slave Busy RX, combinaison of State LSB and Mode enum  */
  332.  
  333. /**
  334.   * @}
  335.   */
  336.  
  337. /* Private macro -------------------------------------------------------------*/
  338. /* Private variables ---------------------------------------------------------*/
  339. /* Private function prototypes -----------------------------------------------*/
  340.  
  341. /** @defgroup I2C_Private_Functions I2C Private Functions
  342.   * @{
  343.   */
  344. /* Private functions to handle DMA transfer */
  345. static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma);
  346. static void I2C_DMAError(DMA_HandleTypeDef *hdma);
  347. static void I2C_DMAAbort(DMA_HandleTypeDef *hdma);
  348.  
  349. static void I2C_ITError(I2C_HandleTypeDef *hi2c);
  350.  
  351. static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
  352. static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
  353. static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
  354. static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
  355.  
  356. /* Private functions to handle flags during polling transfer */
  357. static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
  358. static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart);
  359. static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  360. static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  361. static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  362. static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  363. static HAL_StatusTypeDef I2C_WaitOnSTOPRequestThroughIT(I2C_HandleTypeDef *hi2c);
  364. static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
  365.  
  366. /* Private functions for I2C transfer IRQ handler */
  367. static void I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
  368. static void I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
  369. static void I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
  370. static void I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
  371. static void I2C_Master_SB(I2C_HandleTypeDef *hi2c);
  372. static void I2C_Master_ADD10(I2C_HandleTypeDef *hi2c);
  373. static void I2C_Master_ADDR(I2C_HandleTypeDef *hi2c);
  374.  
  375. static void I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
  376. static void I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
  377. static void I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
  378. static void I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
  379. static void I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c, uint32_t IT2Flags);
  380. static void I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
  381. static void I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
  382.  
  383. static void I2C_MemoryTransmit_TXE_BTF(I2C_HandleTypeDef *hi2c);
  384.  
  385. /* Private function to Convert Specific options */
  386. static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c);
  387. /**
  388.   * @}
  389.   */
  390.  
  391. /* Exported functions --------------------------------------------------------*/
  392.  
  393. /** @defgroup I2C_Exported_Functions I2C Exported Functions
  394.   * @{
  395.   */
  396.  
  397. /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
  398.  *  @brief    Initialization and Configuration functions
  399.  *
  400. @verbatim
  401.  ===============================================================================
  402.               ##### Initialization and de-initialization functions #####
  403.  ===============================================================================
  404.     [..]  This subsection provides a set of functions allowing to initialize and
  405.           deinitialize the I2Cx peripheral:
  406.  
  407.       (+) User must Implement HAL_I2C_MspInit() function in which he configures
  408.           all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
  409.  
  410.       (+) Call the function HAL_I2C_Init() to configure the selected device with
  411.           the selected configuration:
  412.         (++) Communication Speed
  413.         (++) Duty cycle
  414.         (++) Addressing mode
  415.         (++) Own Address 1
  416.         (++) Dual Addressing mode
  417.         (++) Own Address 2
  418.         (++) General call mode
  419.         (++) Nostretch mode
  420.  
  421.       (+) Call the function HAL_I2C_DeInit() to restore the default configuration
  422.           of the selected I2Cx peripheral.
  423.  
  424. @endverbatim
  425.   * @{
  426.   */
  427.  
  428. /**
  429.   * @brief  Initializes the I2C according to the specified parameters
  430.   *         in the I2C_InitTypeDef and initialize the associated handle.
  431.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  432.   *                the configuration information for the specified I2C.
  433.   * @retval HAL status
  434.   */
  435. HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
  436. {
  437.   uint32_t freqrange;
  438.   uint32_t pclk1;
  439.  
  440.   /* Check the I2C handle allocation */
  441.   if (hi2c == NULL)
  442.   {
  443.     return HAL_ERROR;
  444.   }
  445.  
  446.   /* Check the parameters */
  447.   assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
  448.   assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
  449.   assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
  450.   assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
  451.   assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
  452.   assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
  453.   assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
  454.   assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
  455.   assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
  456.  
  457.   if (hi2c->State == HAL_I2C_STATE_RESET)
  458.   {
  459.     /* Allocate lock resource and initialize it */
  460.     hi2c->Lock = HAL_UNLOCKED;
  461.  
  462. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  463.     /* Init the I2C Callback settings */
  464.     hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallback */
  465.     hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallback */
  466.     hi2c->SlaveTxCpltCallback  = HAL_I2C_SlaveTxCpltCallback;  /* Legacy weak SlaveTxCpltCallback  */
  467.     hi2c->SlaveRxCpltCallback  = HAL_I2C_SlaveRxCpltCallback;  /* Legacy weak SlaveRxCpltCallback  */
  468.     hi2c->ListenCpltCallback   = HAL_I2C_ListenCpltCallback;   /* Legacy weak ListenCpltCallback   */
  469.     hi2c->MemTxCpltCallback    = HAL_I2C_MemTxCpltCallback;    /* Legacy weak MemTxCpltCallback    */
  470.     hi2c->MemRxCpltCallback    = HAL_I2C_MemRxCpltCallback;    /* Legacy weak MemRxCpltCallback    */
  471.     hi2c->ErrorCallback        = HAL_I2C_ErrorCallback;        /* Legacy weak ErrorCallback        */
  472.     hi2c->AbortCpltCallback    = HAL_I2C_AbortCpltCallback;    /* Legacy weak AbortCpltCallback    */
  473.     hi2c->AddrCallback         = HAL_I2C_AddrCallback;         /* Legacy weak AddrCallback         */
  474.  
  475.     if (hi2c->MspInitCallback == NULL)
  476.     {
  477.       hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit  */
  478.     }
  479.  
  480.     /* Init the low level hardware : GPIO, CLOCK, NVIC */
  481.     hi2c->MspInitCallback(hi2c);
  482. #else
  483.     /* Init the low level hardware : GPIO, CLOCK, NVIC */
  484.     HAL_I2C_MspInit(hi2c);
  485. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  486.   }
  487.  
  488.   hi2c->State = HAL_I2C_STATE_BUSY;
  489.  
  490.   /* Disable the selected I2C peripheral */
  491.   __HAL_I2C_DISABLE(hi2c);
  492.  
  493.   /*Reset I2C*/
  494.   hi2c->Instance->CR1 |= I2C_CR1_SWRST;
  495.   hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;
  496.  
  497.   /* Get PCLK1 frequency */
  498.   pclk1 = HAL_RCC_GetPCLK1Freq();
  499.  
  500.   /* Check the minimum allowed PCLK1 frequency */
  501.   if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
  502.   {
  503.     return HAL_ERROR;
  504.   }
  505.  
  506.   /* Calculate frequency range */
  507.   freqrange = I2C_FREQRANGE(pclk1);
  508.  
  509.   /*---------------------------- I2Cx CR2 Configuration ----------------------*/
  510.   /* Configure I2Cx: Frequency range */
  511.   MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
  512.  
  513.   /*---------------------------- I2Cx TRISE Configuration --------------------*/
  514.   /* Configure I2Cx: Rise Time */
  515.   MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
  516.  
  517.   /*---------------------------- I2Cx CCR Configuration ----------------------*/
  518.   /* Configure I2Cx: Speed */
  519.   MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
  520.  
  521.   /*---------------------------- I2Cx CR1 Configuration ----------------------*/
  522.   /* Configure I2Cx: Generalcall and NoStretch mode */
  523.   MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
  524.  
  525.   /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
  526.   /* Configure I2Cx: Own Address1 and addressing mode */
  527.   MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
  528.  
  529.   /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
  530.   /* Configure I2Cx: Dual mode and Own Address2 */
  531.   MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
  532.  
  533.   /* Enable the selected I2C peripheral */
  534.   __HAL_I2C_ENABLE(hi2c);
  535.  
  536.   hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  537.   hi2c->State = HAL_I2C_STATE_READY;
  538.   hi2c->PreviousState = I2C_STATE_NONE;
  539.   hi2c->Mode = HAL_I2C_MODE_NONE;
  540.  
  541.   return HAL_OK;
  542. }
  543.  
  544. /**
  545.   * @brief  DeInitialize the I2C peripheral.
  546.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  547.   *         the configuration information for the specified I2C.
  548.   * @retval HAL status
  549.   */
  550. HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
  551. {
  552.   /* Check the I2C handle allocation */
  553.   if (hi2c == NULL)
  554.   {
  555.     return HAL_ERROR;
  556.   }
  557.  
  558.   /* Check the parameters */
  559.   assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
  560.  
  561.   hi2c->State = HAL_I2C_STATE_BUSY;
  562.  
  563.   /* Disable the I2C Peripheral Clock */
  564.   __HAL_I2C_DISABLE(hi2c);
  565.  
  566. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  567.   if (hi2c->MspDeInitCallback == NULL)
  568.   {
  569.     hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit  */
  570.   }
  571.  
  572.   /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  573.   hi2c->MspDeInitCallback(hi2c);
  574. #else
  575.   /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  576.   HAL_I2C_MspDeInit(hi2c);
  577. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  578.  
  579.   hi2c->ErrorCode     = HAL_I2C_ERROR_NONE;
  580.   hi2c->State         = HAL_I2C_STATE_RESET;
  581.   hi2c->PreviousState = I2C_STATE_NONE;
  582.   hi2c->Mode          = HAL_I2C_MODE_NONE;
  583.  
  584.   /* Release Lock */
  585.   __HAL_UNLOCK(hi2c);
  586.  
  587.   return HAL_OK;
  588. }
  589.  
  590. /**
  591.   * @brief  Initialize the I2C MSP.
  592.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  593.   *         the configuration information for the specified I2C.
  594.   * @retval None
  595.   */
  596. __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
  597. {
  598.   /* Prevent unused argument(s) compilation warning */
  599.   UNUSED(hi2c);
  600.  
  601.   /* NOTE : This function should not be modified, when the callback is needed,
  602.             the HAL_I2C_MspInit could be implemented in the user file
  603.    */
  604. }
  605.  
  606. /**
  607.   * @brief  DeInitialize the I2C MSP.
  608.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  609.   *         the configuration information for the specified I2C.
  610.   * @retval None
  611.   */
  612. __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
  613. {
  614.   /* Prevent unused argument(s) compilation warning */
  615.   UNUSED(hi2c);
  616.  
  617.   /* NOTE : This function should not be modified, when the callback is needed,
  618.             the HAL_I2C_MspDeInit could be implemented in the user file
  619.    */
  620. }
  621.  
  622. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  623. /**
  624.   * @brief  Register a User I2C Callback
  625.   *         To be used instead of the weak predefined callback
  626.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  627.   *                the configuration information for the specified I2C.
  628.   * @param  CallbackID ID of the callback to be registered
  629.   *         This parameter can be one of the following values:
  630.   *          @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID
  631.   *          @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID
  632.   *          @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID
  633.   *          @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID
  634.   *          @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID
  635.   *          @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID
  636.   *          @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID
  637.   *          @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID
  638.   *          @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID
  639.   *          @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID
  640.   *          @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID
  641.   * @param  pCallback pointer to the Callback function
  642.   * @retval HAL status
  643.   */
  644. HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback)
  645. {
  646.   HAL_StatusTypeDef status = HAL_OK;
  647.  
  648.   if (pCallback == NULL)
  649.   {
  650.     /* Update the error code */
  651.     hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  652.  
  653.     return HAL_ERROR;
  654.   }
  655.   /* Process locked */
  656.   __HAL_LOCK(hi2c);
  657.  
  658.   if (HAL_I2C_STATE_READY == hi2c->State)
  659.   {
  660.     switch (CallbackID)
  661.     {
  662.       case HAL_I2C_MASTER_TX_COMPLETE_CB_ID :
  663.         hi2c->MasterTxCpltCallback = pCallback;
  664.         break;
  665.  
  666.       case HAL_I2C_MASTER_RX_COMPLETE_CB_ID :
  667.         hi2c->MasterRxCpltCallback = pCallback;
  668.         break;
  669.  
  670.       case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID :
  671.         hi2c->SlaveTxCpltCallback = pCallback;
  672.         break;
  673.  
  674.       case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID :
  675.         hi2c->SlaveRxCpltCallback = pCallback;
  676.         break;
  677.  
  678.       case HAL_I2C_LISTEN_COMPLETE_CB_ID :
  679.         hi2c->ListenCpltCallback = pCallback;
  680.         break;
  681.  
  682.       case HAL_I2C_MEM_TX_COMPLETE_CB_ID :
  683.         hi2c->MemTxCpltCallback = pCallback;
  684.         break;
  685.  
  686.       case HAL_I2C_MEM_RX_COMPLETE_CB_ID :
  687.         hi2c->MemRxCpltCallback = pCallback;
  688.         break;
  689.  
  690.       case HAL_I2C_ERROR_CB_ID :
  691.         hi2c->ErrorCallback = pCallback;
  692.         break;
  693.  
  694.       case HAL_I2C_ABORT_CB_ID :
  695.         hi2c->AbortCpltCallback = pCallback;
  696.         break;
  697.  
  698.       case HAL_I2C_MSPINIT_CB_ID :
  699.         hi2c->MspInitCallback = pCallback;
  700.         break;
  701.  
  702.       case HAL_I2C_MSPDEINIT_CB_ID :
  703.         hi2c->MspDeInitCallback = pCallback;
  704.         break;
  705.  
  706.       default :
  707.         /* Update the error code */
  708.         hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  709.  
  710.         /* Return error status */
  711.         status =  HAL_ERROR;
  712.         break;
  713.     }
  714.   }
  715.   else if (HAL_I2C_STATE_RESET == hi2c->State)
  716.   {
  717.     switch (CallbackID)
  718.     {
  719.       case HAL_I2C_MSPINIT_CB_ID :
  720.         hi2c->MspInitCallback = pCallback;
  721.         break;
  722.  
  723.       case HAL_I2C_MSPDEINIT_CB_ID :
  724.         hi2c->MspDeInitCallback = pCallback;
  725.         break;
  726.  
  727.       default :
  728.         /* Update the error code */
  729.         hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  730.  
  731.         /* Return error status */
  732.         status =  HAL_ERROR;
  733.         break;
  734.     }
  735.   }
  736.   else
  737.   {
  738.     /* Update the error code */
  739.     hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  740.  
  741.     /* Return error status */
  742.     status =  HAL_ERROR;
  743.   }
  744.  
  745.   /* Release Lock */
  746.   __HAL_UNLOCK(hi2c);
  747.   return status;
  748. }
  749.  
  750. /**
  751.   * @brief  Unregister an I2C Callback
  752.   *         I2C callback is redirected to the weak predefined callback
  753.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  754.   *                the configuration information for the specified I2C.
  755.   * @param  CallbackID ID of the callback to be unregistered
  756.   *         This parameter can be one of the following values:
  757.   *         This parameter can be one of the following values:
  758.   *          @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID
  759.   *          @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID
  760.   *          @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID
  761.   *          @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID
  762.   *          @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID
  763.   *          @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID
  764.   *          @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID
  765.   *          @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID
  766.   *          @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID
  767.   *          @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID
  768.   *          @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID
  769.   * @retval HAL status
  770.   */
  771. HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID)
  772. {
  773.   HAL_StatusTypeDef status = HAL_OK;
  774.  
  775.   /* Process locked */
  776.   __HAL_LOCK(hi2c);
  777.  
  778.   if (HAL_I2C_STATE_READY == hi2c->State)
  779.   {
  780.     switch (CallbackID)
  781.     {
  782.       case HAL_I2C_MASTER_TX_COMPLETE_CB_ID :
  783.         hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallback */
  784.         break;
  785.  
  786.       case HAL_I2C_MASTER_RX_COMPLETE_CB_ID :
  787.         hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallback */
  788.         break;
  789.  
  790.       case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID :
  791.         hi2c->SlaveTxCpltCallback = HAL_I2C_SlaveTxCpltCallback;   /* Legacy weak SlaveTxCpltCallback  */
  792.         break;
  793.  
  794.       case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID :
  795.         hi2c->SlaveRxCpltCallback = HAL_I2C_SlaveRxCpltCallback;   /* Legacy weak SlaveRxCpltCallback  */
  796.         break;
  797.  
  798.       case HAL_I2C_LISTEN_COMPLETE_CB_ID :
  799.         hi2c->ListenCpltCallback = HAL_I2C_ListenCpltCallback;     /* Legacy weak ListenCpltCallback   */
  800.         break;
  801.  
  802.       case HAL_I2C_MEM_TX_COMPLETE_CB_ID :
  803.         hi2c->MemTxCpltCallback = HAL_I2C_MemTxCpltCallback;       /* Legacy weak MemTxCpltCallback    */
  804.         break;
  805.  
  806.       case HAL_I2C_MEM_RX_COMPLETE_CB_ID :
  807.         hi2c->MemRxCpltCallback = HAL_I2C_MemRxCpltCallback;       /* Legacy weak MemRxCpltCallback    */
  808.         break;
  809.  
  810.       case HAL_I2C_ERROR_CB_ID :
  811.         hi2c->ErrorCallback = HAL_I2C_ErrorCallback;               /* Legacy weak ErrorCallback        */
  812.         break;
  813.  
  814.       case HAL_I2C_ABORT_CB_ID :
  815.         hi2c->AbortCpltCallback = HAL_I2C_AbortCpltCallback;       /* Legacy weak AbortCpltCallback    */
  816.         break;
  817.  
  818.       case HAL_I2C_MSPINIT_CB_ID :
  819.         hi2c->MspInitCallback = HAL_I2C_MspInit;                   /* Legacy weak MspInit              */
  820.         break;
  821.  
  822.       case HAL_I2C_MSPDEINIT_CB_ID :
  823.         hi2c->MspDeInitCallback = HAL_I2C_MspDeInit;               /* Legacy weak MspDeInit            */
  824.         break;
  825.  
  826.       default :
  827.         /* Update the error code */
  828.         hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  829.  
  830.         /* Return error status */
  831.         status =  HAL_ERROR;
  832.         break;
  833.     }
  834.   }
  835.   else if (HAL_I2C_STATE_RESET == hi2c->State)
  836.   {
  837.     switch (CallbackID)
  838.     {
  839.       case HAL_I2C_MSPINIT_CB_ID :
  840.         hi2c->MspInitCallback = HAL_I2C_MspInit;                   /* Legacy weak MspInit              */
  841.         break;
  842.  
  843.       case HAL_I2C_MSPDEINIT_CB_ID :
  844.         hi2c->MspDeInitCallback = HAL_I2C_MspDeInit;               /* Legacy weak MspDeInit            */
  845.         break;
  846.  
  847.       default :
  848.         /* Update the error code */
  849.         hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  850.  
  851.         /* Return error status */
  852.         status =  HAL_ERROR;
  853.         break;
  854.     }
  855.   }
  856.   else
  857.   {
  858.     /* Update the error code */
  859.     hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  860.  
  861.     /* Return error status */
  862.     status =  HAL_ERROR;
  863.   }
  864.  
  865.   /* Release Lock */
  866.   __HAL_UNLOCK(hi2c);
  867.   return status;
  868. }
  869.  
  870. /**
  871.   * @brief  Register the Slave Address Match I2C Callback
  872.   *         To be used instead of the weak HAL_I2C_AddrCallback() predefined callback
  873.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  874.   *                the configuration information for the specified I2C.
  875.   * @param  pCallback pointer to the Address Match Callback function
  876.   * @retval HAL status
  877.   */
  878. HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback)
  879. {
  880.   HAL_StatusTypeDef status = HAL_OK;
  881.  
  882.   if (pCallback == NULL)
  883.   {
  884.     /* Update the error code */
  885.     hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  886.  
  887.     return HAL_ERROR;
  888.   }
  889.   /* Process locked */
  890.   __HAL_LOCK(hi2c);
  891.  
  892.   if (HAL_I2C_STATE_READY == hi2c->State)
  893.   {
  894.     hi2c->AddrCallback = pCallback;
  895.   }
  896.   else
  897.   {
  898.     /* Update the error code */
  899.     hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  900.  
  901.     /* Return error status */
  902.     status =  HAL_ERROR;
  903.   }
  904.  
  905.   /* Release Lock */
  906.   __HAL_UNLOCK(hi2c);
  907.   return status;
  908. }
  909.  
  910. /**
  911.   * @brief  UnRegister the Slave Address Match I2C Callback
  912.   *         Info Ready I2C Callback is redirected to the weak HAL_I2C_AddrCallback() predefined callback
  913.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  914.   *                the configuration information for the specified I2C.
  915.   * @retval HAL status
  916.   */
  917. HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c)
  918. {
  919.   HAL_StatusTypeDef status = HAL_OK;
  920.  
  921.   /* Process locked */
  922.   __HAL_LOCK(hi2c);
  923.  
  924.   if (HAL_I2C_STATE_READY == hi2c->State)
  925.   {
  926.     hi2c->AddrCallback = HAL_I2C_AddrCallback; /* Legacy weak AddrCallback  */
  927.   }
  928.   else
  929.   {
  930.     /* Update the error code */
  931.     hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  932.  
  933.     /* Return error status */
  934.     status =  HAL_ERROR;
  935.   }
  936.  
  937.   /* Release Lock */
  938.   __HAL_UNLOCK(hi2c);
  939.   return status;
  940. }
  941.  
  942. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  943.  
  944. /**
  945.   * @}
  946.   */
  947.  
  948. /** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions
  949.  *  @brief   Data transfers functions
  950.  *
  951. @verbatim
  952.  ===============================================================================
  953.                       ##### IO operation functions #####
  954.  ===============================================================================
  955.     [..]
  956.     This subsection provides a set of functions allowing to manage the I2C data
  957.     transfers.
  958.  
  959.     (#) There are two modes of transfer:
  960.        (++) Blocking mode : The communication is performed in the polling mode.
  961.             The status of all data processing is returned by the same function
  962.             after finishing transfer.
  963.        (++) No-Blocking mode : The communication is performed using Interrupts
  964.             or DMA. These functions return the status of the transfer startup.
  965.             The end of the data processing will be indicated through the
  966.             dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
  967.             using DMA mode.
  968.  
  969.     (#) Blocking mode functions are :
  970.         (++) HAL_I2C_Master_Transmit()
  971.         (++) HAL_I2C_Master_Receive()
  972.         (++) HAL_I2C_Slave_Transmit()
  973.         (++) HAL_I2C_Slave_Receive()
  974.         (++) HAL_I2C_Mem_Write()
  975.         (++) HAL_I2C_Mem_Read()
  976.         (++) HAL_I2C_IsDeviceReady()
  977.  
  978.     (#) No-Blocking mode functions with Interrupt are :
  979.         (++) HAL_I2C_Master_Transmit_IT()
  980.         (++) HAL_I2C_Master_Receive_IT()
  981.         (++) HAL_I2C_Slave_Transmit_IT()
  982.         (++) HAL_I2C_Slave_Receive_IT()
  983.         (++) HAL_I2C_Mem_Write_IT()
  984.         (++) HAL_I2C_Mem_Read_IT()
  985.         (++) HAL_I2C_Master_Seq_Transmit_IT()
  986.         (++) HAL_I2C_Master_Seq_Receive_IT()
  987.         (++) HAL_I2C_Slave_Seq_Transmit_IT()
  988.         (++) HAL_I2C_Slave_Seq_Receive_IT()
  989.         (++) HAL_I2C_EnableListen_IT()
  990.         (++) HAL_I2C_DisableListen_IT()
  991.         (++) HAL_I2C_Master_Abort_IT()
  992.  
  993.     (#) No-Blocking mode functions with DMA are :
  994.         (++) HAL_I2C_Master_Transmit_DMA()
  995.         (++) HAL_I2C_Master_Receive_DMA()
  996.         (++) HAL_I2C_Slave_Transmit_DMA()
  997.         (++) HAL_I2C_Slave_Receive_DMA()
  998.         (++) HAL_I2C_Mem_Write_DMA()
  999.         (++) HAL_I2C_Mem_Read_DMA()
  1000.         (++) HAL_I2C_Master_Seq_Transmit_DMA()
  1001.         (++) HAL_I2C_Master_Seq_Receive_DMA()
  1002.         (++) HAL_I2C_Slave_Seq_Transmit_DMA()
  1003.         (++) HAL_I2C_Slave_Seq_Receive_DMA()
  1004.  
  1005.     (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
  1006.         (++) HAL_I2C_MasterTxCpltCallback()
  1007.         (++) HAL_I2C_MasterRxCpltCallback()
  1008.         (++) HAL_I2C_SlaveTxCpltCallback()
  1009.         (++) HAL_I2C_SlaveRxCpltCallback()
  1010.         (++) HAL_I2C_MemTxCpltCallback()
  1011.         (++) HAL_I2C_MemRxCpltCallback()
  1012.         (++) HAL_I2C_AddrCallback()
  1013.         (++) HAL_I2C_ListenCpltCallback()
  1014.         (++) HAL_I2C_ErrorCallback()
  1015.         (++) HAL_I2C_AbortCpltCallback()
  1016.  
  1017. @endverbatim
  1018.   * @{
  1019.   */
  1020.  
  1021. /**
  1022.   * @brief  Transmits in master mode an amount of data in blocking mode.
  1023.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1024.   *                the configuration information for the specified I2C.
  1025.   * @param  DevAddress Target device address: The device 7 bits address value
  1026.   *         in datasheet must be shifted to the left before calling the interface
  1027.   * @param  pData Pointer to data buffer
  1028.   * @param  Size Amount of data to be sent
  1029.   * @param  Timeout Timeout duration
  1030.   * @retval HAL status
  1031.   */
  1032. HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  1033. {
  1034.   /* Init tickstart for timeout management*/
  1035.   uint32_t tickstart = HAL_GetTick();
  1036.  
  1037.   if (hi2c->State == HAL_I2C_STATE_READY)
  1038.   {
  1039.     /* Wait until BUSY flag is reset */
  1040.     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  1041.     {
  1042.       return HAL_BUSY;
  1043.     }
  1044.  
  1045.     /* Process Locked */
  1046.     __HAL_LOCK(hi2c);
  1047.  
  1048.     /* Check if the I2C is already enabled */
  1049.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1050.     {
  1051.       /* Enable I2C peripheral */
  1052.       __HAL_I2C_ENABLE(hi2c);
  1053.     }
  1054.  
  1055.     /* Disable Pos */
  1056.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1057.  
  1058.     hi2c->State       = HAL_I2C_STATE_BUSY_TX;
  1059.     hi2c->Mode        = HAL_I2C_MODE_MASTER;
  1060.     hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
  1061.  
  1062.     /* Prepare transfer parameters */
  1063.     hi2c->pBuffPtr    = pData;
  1064.     hi2c->XferCount   = Size;
  1065.     hi2c->XferSize    = hi2c->XferCount;
  1066.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1067.  
  1068.     /* Send Slave Address */
  1069.     if (I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
  1070.     {
  1071.       return HAL_ERROR;
  1072.     }
  1073.  
  1074.     /* Clear ADDR flag */
  1075.     __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1076.  
  1077.     while (hi2c->XferSize > 0U)
  1078.     {
  1079.       /* Wait until TXE flag is set */
  1080.       if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1081.       {
  1082.         if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1083.         {
  1084.           /* Generate Stop */
  1085.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1086.         }
  1087.         return HAL_ERROR;
  1088.       }
  1089.  
  1090.       /* Write data to DR */
  1091.       hi2c->Instance->DR = *hi2c->pBuffPtr;
  1092.  
  1093.       /* Increment Buffer pointer */
  1094.       hi2c->pBuffPtr++;
  1095.  
  1096.       /* Update counter */
  1097.       hi2c->XferCount--;
  1098.       hi2c->XferSize--;
  1099.  
  1100.       if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  1101.       {
  1102.         /* Write data to DR */
  1103.         hi2c->Instance->DR = *hi2c->pBuffPtr;
  1104.  
  1105.         /* Increment Buffer pointer */
  1106.         hi2c->pBuffPtr++;
  1107.  
  1108.         /* Update counter */
  1109.         hi2c->XferCount--;
  1110.         hi2c->XferSize--;
  1111.       }
  1112.  
  1113.       /* Wait until BTF flag is set */
  1114.       if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1115.       {
  1116.         if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1117.         {
  1118.           /* Generate Stop */
  1119.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1120.         }
  1121.         return HAL_ERROR;
  1122.       }
  1123.     }
  1124.  
  1125.     /* Generate Stop */
  1126.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1127.  
  1128.     hi2c->State = HAL_I2C_STATE_READY;
  1129.     hi2c->Mode = HAL_I2C_MODE_NONE;
  1130.  
  1131.     /* Process Unlocked */
  1132.     __HAL_UNLOCK(hi2c);
  1133.  
  1134.     return HAL_OK;
  1135.   }
  1136.   else
  1137.   {
  1138.     return HAL_BUSY;
  1139.   }
  1140. }
  1141.  
  1142. /**
  1143.   * @brief  Receives in master mode an amount of data in blocking mode.
  1144.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1145.   *                the configuration information for the specified I2C.
  1146.   * @param  DevAddress Target device address: The device 7 bits address value
  1147.   *         in datasheet must be shifted to the left before calling the interface
  1148.   * @param  pData Pointer to data buffer
  1149.   * @param  Size Amount of data to be sent
  1150.   * @param  Timeout Timeout duration
  1151.   * @retval HAL status
  1152.   */
  1153. HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  1154. {
  1155.   /* Init tickstart for timeout management*/
  1156.   uint32_t tickstart = HAL_GetTick();
  1157.  
  1158.   if (hi2c->State == HAL_I2C_STATE_READY)
  1159.   {
  1160.     /* Wait until BUSY flag is reset */
  1161.     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  1162.     {
  1163.       return HAL_BUSY;
  1164.     }
  1165.  
  1166.     /* Process Locked */
  1167.     __HAL_LOCK(hi2c);
  1168.  
  1169.     /* Check if the I2C is already enabled */
  1170.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1171.     {
  1172.       /* Enable I2C peripheral */
  1173.       __HAL_I2C_ENABLE(hi2c);
  1174.     }
  1175.  
  1176.     /* Disable Pos */
  1177.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1178.  
  1179.     hi2c->State       = HAL_I2C_STATE_BUSY_RX;
  1180.     hi2c->Mode        = HAL_I2C_MODE_MASTER;
  1181.     hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
  1182.  
  1183.     /* Prepare transfer parameters */
  1184.     hi2c->pBuffPtr    = pData;
  1185.     hi2c->XferCount   = Size;
  1186.     hi2c->XferSize    = hi2c->XferCount;
  1187.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1188.  
  1189.     /* Send Slave Address */
  1190.     if (I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
  1191.     {
  1192.       return HAL_ERROR;
  1193.     }
  1194.  
  1195.     if (hi2c->XferSize == 0U)
  1196.     {
  1197.       /* Clear ADDR flag */
  1198.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1199.  
  1200.       /* Generate Stop */
  1201.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1202.     }
  1203.     else if (hi2c->XferSize == 1U)
  1204.     {
  1205.       /* Disable Acknowledge */
  1206.       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1207.  
  1208.       /* Clear ADDR flag */
  1209.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1210.  
  1211.       /* Generate Stop */
  1212.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1213.     }
  1214.     else if (hi2c->XferSize == 2U)
  1215.     {
  1216.       /* Disable Acknowledge */
  1217.       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1218.  
  1219.       /* Enable Pos */
  1220.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1221.  
  1222.       /* Clear ADDR flag */
  1223.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1224.     }
  1225.     else
  1226.     {
  1227.       /* Enable Acknowledge */
  1228.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1229.  
  1230.       /* Clear ADDR flag */
  1231.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1232.     }
  1233.  
  1234.     while (hi2c->XferSize > 0U)
  1235.     {
  1236.       if (hi2c->XferSize <= 3U)
  1237.       {
  1238.         /* One byte */
  1239.         if (hi2c->XferSize == 1U)
  1240.         {
  1241.           /* Wait until RXNE flag is set */
  1242.           if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1243.           {
  1244.             return HAL_ERROR;
  1245.           }
  1246.  
  1247.           /* Read data from DR */
  1248.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1249.  
  1250.           /* Increment Buffer pointer */
  1251.           hi2c->pBuffPtr++;
  1252.  
  1253.           /* Update counter */
  1254.           hi2c->XferSize--;
  1255.           hi2c->XferCount--;
  1256.         }
  1257.         /* Two bytes */
  1258.         else if (hi2c->XferSize == 2U)
  1259.         {
  1260.           /* Wait until BTF flag is set */
  1261.           if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  1262.           {
  1263.             return HAL_ERROR;
  1264.           }
  1265.  
  1266.           /* Generate Stop */
  1267.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1268.  
  1269.           /* Read data from DR */
  1270.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1271.  
  1272.           /* Increment Buffer pointer */
  1273.           hi2c->pBuffPtr++;
  1274.  
  1275.           /* Update counter */
  1276.           hi2c->XferSize--;
  1277.           hi2c->XferCount--;
  1278.  
  1279.           /* Read data from DR */
  1280.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1281.  
  1282.           /* Increment Buffer pointer */
  1283.           hi2c->pBuffPtr++;
  1284.  
  1285.           /* Update counter */
  1286.           hi2c->XferSize--;
  1287.           hi2c->XferCount--;
  1288.         }
  1289.         /* 3 Last bytes */
  1290.         else
  1291.         {
  1292.           /* Wait until BTF flag is set */
  1293.           if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  1294.           {
  1295.             return HAL_ERROR;
  1296.           }
  1297.  
  1298.           /* Disable Acknowledge */
  1299.           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1300.  
  1301.           /* Read data from DR */
  1302.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1303.  
  1304.           /* Increment Buffer pointer */
  1305.           hi2c->pBuffPtr++;
  1306.  
  1307.           /* Update counter */
  1308.           hi2c->XferSize--;
  1309.           hi2c->XferCount--;
  1310.  
  1311.           /* Wait until BTF flag is set */
  1312.           if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  1313.           {
  1314.             return HAL_ERROR;
  1315.           }
  1316.  
  1317.           /* Generate Stop */
  1318.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1319.  
  1320.           /* Read data from DR */
  1321.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1322.  
  1323.           /* Increment Buffer pointer */
  1324.           hi2c->pBuffPtr++;
  1325.  
  1326.           /* Update counter */
  1327.           hi2c->XferSize--;
  1328.           hi2c->XferCount--;
  1329.  
  1330.           /* Read data from DR */
  1331.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1332.  
  1333.           /* Increment Buffer pointer */
  1334.           hi2c->pBuffPtr++;
  1335.  
  1336.           /* Update counter */
  1337.           hi2c->XferSize--;
  1338.           hi2c->XferCount--;
  1339.         }
  1340.       }
  1341.       else
  1342.       {
  1343.         /* Wait until RXNE flag is set */
  1344.         if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1345.         {
  1346.           return HAL_ERROR;
  1347.         }
  1348.  
  1349.         /* Read data from DR */
  1350.         *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1351.  
  1352.         /* Increment Buffer pointer */
  1353.         hi2c->pBuffPtr++;
  1354.  
  1355.         /* Update counter */
  1356.         hi2c->XferSize--;
  1357.         hi2c->XferCount--;
  1358.  
  1359.         if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  1360.         {
  1361.           /* Read data from DR */
  1362.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1363.  
  1364.           /* Increment Buffer pointer */
  1365.           hi2c->pBuffPtr++;
  1366.  
  1367.           /* Update counter */
  1368.           hi2c->XferSize--;
  1369.           hi2c->XferCount--;
  1370.         }
  1371.       }
  1372.     }
  1373.  
  1374.     hi2c->State = HAL_I2C_STATE_READY;
  1375.     hi2c->Mode = HAL_I2C_MODE_NONE;
  1376.  
  1377.     /* Process Unlocked */
  1378.     __HAL_UNLOCK(hi2c);
  1379.  
  1380.     return HAL_OK;
  1381.   }
  1382.   else
  1383.   {
  1384.     return HAL_BUSY;
  1385.   }
  1386. }
  1387.  
  1388. /**
  1389.   * @brief  Transmits in slave mode an amount of data in blocking mode.
  1390.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1391.   *                the configuration information for the specified I2C.
  1392.   * @param  pData Pointer to data buffer
  1393.   * @param  Size Amount of data to be sent
  1394.   * @param  Timeout Timeout duration
  1395.   * @retval HAL status
  1396.   */
  1397. HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  1398. {
  1399.   /* Init tickstart for timeout management*/
  1400.   uint32_t tickstart = HAL_GetTick();
  1401.  
  1402.   if (hi2c->State == HAL_I2C_STATE_READY)
  1403.   {
  1404.     if ((pData == NULL) || (Size == 0U))
  1405.     {
  1406.       return  HAL_ERROR;
  1407.     }
  1408.  
  1409.     /* Process Locked */
  1410.     __HAL_LOCK(hi2c);
  1411.  
  1412.     /* Check if the I2C is already enabled */
  1413.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1414.     {
  1415.       /* Enable I2C peripheral */
  1416.       __HAL_I2C_ENABLE(hi2c);
  1417.     }
  1418.  
  1419.     /* Disable Pos */
  1420.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1421.  
  1422.     hi2c->State       = HAL_I2C_STATE_BUSY_TX;
  1423.     hi2c->Mode        = HAL_I2C_MODE_SLAVE;
  1424.     hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
  1425.  
  1426.     /* Prepare transfer parameters */
  1427.     hi2c->pBuffPtr    = pData;
  1428.     hi2c->XferCount   = Size;
  1429.     hi2c->XferSize    = hi2c->XferCount;
  1430.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1431.  
  1432.     /* Enable Address Acknowledge */
  1433.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1434.  
  1435.     /* Wait until ADDR flag is set */
  1436.     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  1437.     {
  1438.       return HAL_ERROR;
  1439.     }
  1440.  
  1441.     /* Clear ADDR flag */
  1442.     __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1443.  
  1444.     /* If 10bit addressing mode is selected */
  1445.     if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
  1446.     {
  1447.       /* Wait until ADDR flag is set */
  1448.       if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  1449.       {
  1450.         return HAL_ERROR;
  1451.       }
  1452.  
  1453.       /* Clear ADDR flag */
  1454.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1455.     }
  1456.  
  1457.     while (hi2c->XferSize > 0U)
  1458.     {
  1459.       /* Wait until TXE flag is set */
  1460.       if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1461.       {
  1462.         /* Disable Address Acknowledge */
  1463.         CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1464.  
  1465.         return HAL_ERROR;
  1466.       }
  1467.  
  1468.       /* Write data to DR */
  1469.       hi2c->Instance->DR = *hi2c->pBuffPtr;
  1470.  
  1471.       /* Increment Buffer pointer */
  1472.       hi2c->pBuffPtr++;
  1473.  
  1474.       /* Update counter */
  1475.       hi2c->XferCount--;
  1476.       hi2c->XferSize--;
  1477.  
  1478.       if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  1479.       {
  1480.         /* Write data to DR */
  1481.         hi2c->Instance->DR = *hi2c->pBuffPtr;
  1482.  
  1483.         /* Increment Buffer pointer */
  1484.         hi2c->pBuffPtr++;
  1485.  
  1486.         /* Update counter */
  1487.         hi2c->XferCount--;
  1488.         hi2c->XferSize--;
  1489.       }
  1490.     }
  1491.  
  1492.     /* Wait until AF flag is set */
  1493.     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK)
  1494.     {
  1495.       return HAL_ERROR;
  1496.     }
  1497.  
  1498.     /* Clear AF flag */
  1499.     __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  1500.  
  1501.     /* Disable Address Acknowledge */
  1502.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1503.  
  1504.     hi2c->State = HAL_I2C_STATE_READY;
  1505.     hi2c->Mode = HAL_I2C_MODE_NONE;
  1506.  
  1507.     /* Process Unlocked */
  1508.     __HAL_UNLOCK(hi2c);
  1509.  
  1510.     return HAL_OK;
  1511.   }
  1512.   else
  1513.   {
  1514.     return HAL_BUSY;
  1515.   }
  1516. }
  1517.  
  1518. /**
  1519.   * @brief  Receive in slave mode an amount of data in blocking mode
  1520.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1521.   *         the configuration information for the specified I2C.
  1522.   * @param  pData Pointer to data buffer
  1523.   * @param  Size Amount of data to be sent
  1524.   * @param  Timeout Timeout duration
  1525.   * @retval HAL status
  1526.   */
  1527. HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  1528. {
  1529.   /* Init tickstart for timeout management*/
  1530.   uint32_t tickstart = HAL_GetTick();
  1531.  
  1532.   if (hi2c->State == HAL_I2C_STATE_READY)
  1533.   {
  1534.     if ((pData == NULL) || (Size == (uint16_t)0))
  1535.     {
  1536.       return HAL_ERROR;
  1537.     }
  1538.  
  1539.     /* Process Locked */
  1540.     __HAL_LOCK(hi2c);
  1541.  
  1542.     /* Check if the I2C is already enabled */
  1543.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1544.     {
  1545.       /* Enable I2C peripheral */
  1546.       __HAL_I2C_ENABLE(hi2c);
  1547.     }
  1548.  
  1549.     /* Disable Pos */
  1550.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1551.  
  1552.     hi2c->State       = HAL_I2C_STATE_BUSY_RX;
  1553.     hi2c->Mode        = HAL_I2C_MODE_SLAVE;
  1554.     hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
  1555.  
  1556.     /* Prepare transfer parameters */
  1557.     hi2c->pBuffPtr    = pData;
  1558.     hi2c->XferCount   = Size;
  1559.     hi2c->XferSize    = hi2c->XferCount;
  1560.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1561.  
  1562.     /* Enable Address Acknowledge */
  1563.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1564.  
  1565.     /* Wait until ADDR flag is set */
  1566.     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  1567.     {
  1568.       return HAL_ERROR;
  1569.     }
  1570.  
  1571.     /* Clear ADDR flag */
  1572.     __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1573.  
  1574.     while (hi2c->XferSize > 0U)
  1575.     {
  1576.       /* Wait until RXNE flag is set */
  1577.       if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1578.       {
  1579.         /* Disable Address Acknowledge */
  1580.         CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1581.  
  1582.         return HAL_ERROR;
  1583.       }
  1584.  
  1585.       /* Read data from DR */
  1586.       *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1587.  
  1588.       /* Increment Buffer pointer */
  1589.       hi2c->pBuffPtr++;
  1590.  
  1591.       /* Update counter */
  1592.       hi2c->XferSize--;
  1593.       hi2c->XferCount--;
  1594.  
  1595.       if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  1596.       {
  1597.         /* Read data from DR */
  1598.         *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1599.  
  1600.         /* Increment Buffer pointer */
  1601.         hi2c->pBuffPtr++;
  1602.  
  1603.         /* Update counter */
  1604.         hi2c->XferSize--;
  1605.         hi2c->XferCount--;
  1606.       }
  1607.     }
  1608.  
  1609.     /* Wait until STOP flag is set */
  1610.     if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1611.     {
  1612.       /* Disable Address Acknowledge */
  1613.       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1614.  
  1615.       return HAL_ERROR;
  1616.     }
  1617.  
  1618.     /* Clear STOP flag */
  1619.     __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  1620.  
  1621.     /* Disable Address Acknowledge */
  1622.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1623.  
  1624.     hi2c->State = HAL_I2C_STATE_READY;
  1625.     hi2c->Mode = HAL_I2C_MODE_NONE;
  1626.  
  1627.     /* Process Unlocked */
  1628.     __HAL_UNLOCK(hi2c);
  1629.  
  1630.     return HAL_OK;
  1631.   }
  1632.   else
  1633.   {
  1634.     return HAL_BUSY;
  1635.   }
  1636. }
  1637.  
  1638. /**
  1639.   * @brief  Transmit in master mode an amount of data in non-blocking mode with Interrupt
  1640.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1641.   *                the configuration information for the specified I2C.
  1642.   * @param  DevAddress Target device address: The device 7 bits address value
  1643.   *         in datasheet must be shifted to the left before calling the interface
  1644.   * @param  pData Pointer to data buffer
  1645.   * @param  Size Amount of data to be sent
  1646.   * @retval HAL status
  1647.   */
  1648. HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1649. {
  1650.   __IO uint32_t count = 0U;
  1651.  
  1652.   if (hi2c->State == HAL_I2C_STATE_READY)
  1653.   {
  1654.     /* Wait until BUSY flag is reset */
  1655.     count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  1656.     do
  1657.     {
  1658.       count--;
  1659.       if (count == 0U)
  1660.       {
  1661.         hi2c->PreviousState       = I2C_STATE_NONE;
  1662.         hi2c->State               = HAL_I2C_STATE_READY;
  1663.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  1664.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  1665.  
  1666.         /* Process Unlocked */
  1667.         __HAL_UNLOCK(hi2c);
  1668.  
  1669.         return HAL_ERROR;
  1670.       }
  1671.     }
  1672.     while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1673.  
  1674.     /* Process Locked */
  1675.     __HAL_LOCK(hi2c);
  1676.  
  1677.     /* Check if the I2C is already enabled */
  1678.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1679.     {
  1680.       /* Enable I2C peripheral */
  1681.       __HAL_I2C_ENABLE(hi2c);
  1682.     }
  1683.  
  1684.     /* Disable Pos */
  1685.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1686.  
  1687.     hi2c->State     = HAL_I2C_STATE_BUSY_TX;
  1688.     hi2c->Mode      = HAL_I2C_MODE_MASTER;
  1689.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1690.  
  1691.     /* Prepare transfer parameters */
  1692.     hi2c->pBuffPtr    = pData;
  1693.     hi2c->XferCount   = Size;
  1694.     hi2c->XferSize    = hi2c->XferCount;
  1695.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1696.     hi2c->Devaddress  = DevAddress;
  1697.  
  1698.     /* Process Unlocked */
  1699.     __HAL_UNLOCK(hi2c);
  1700.  
  1701.     /* Note : The I2C interrupts must be enabled after unlocking current process
  1702.               to avoid the risk of I2C interrupt handle execution before current
  1703.               process unlock */
  1704.     /* Enable EVT, BUF and ERR interrupt */
  1705.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1706.  
  1707.     /* Generate Start */
  1708.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  1709.  
  1710.     return HAL_OK;
  1711.   }
  1712.   else
  1713.   {
  1714.     return HAL_BUSY;
  1715.   }
  1716. }
  1717.  
  1718. /**
  1719.   * @brief  Receive in master mode an amount of data in non-blocking mode with Interrupt
  1720.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1721.   *                the configuration information for the specified I2C.
  1722.   * @param  DevAddress Target device address: The device 7 bits address value
  1723.   *         in datasheet must be shifted to the left before calling the interface
  1724.   * @param  pData Pointer to data buffer
  1725.   * @param  Size Amount of data to be sent
  1726.   * @retval HAL status
  1727.   */
  1728. HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1729. {
  1730.   __IO uint32_t count = 0U;
  1731.  
  1732.   if (hi2c->State == HAL_I2C_STATE_READY)
  1733.   {
  1734.     /* Wait until BUSY flag is reset */
  1735.     count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  1736.     do
  1737.     {
  1738.       count--;
  1739.       if (count == 0U)
  1740.       {
  1741.         hi2c->PreviousState       = I2C_STATE_NONE;
  1742.         hi2c->State               = HAL_I2C_STATE_READY;
  1743.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  1744.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  1745.  
  1746.         /* Process Unlocked */
  1747.         __HAL_UNLOCK(hi2c);
  1748.  
  1749.         return HAL_ERROR;
  1750.       }
  1751.     }
  1752.     while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1753.  
  1754.     /* Process Locked */
  1755.     __HAL_LOCK(hi2c);
  1756.  
  1757.     /* Check if the I2C is already enabled */
  1758.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1759.     {
  1760.       /* Enable I2C peripheral */
  1761.       __HAL_I2C_ENABLE(hi2c);
  1762.     }
  1763.  
  1764.     /* Disable Pos */
  1765.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1766.  
  1767.     hi2c->State     = HAL_I2C_STATE_BUSY_RX;
  1768.     hi2c->Mode      = HAL_I2C_MODE_MASTER;
  1769.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1770.  
  1771.     /* Prepare transfer parameters */
  1772.     hi2c->pBuffPtr    = pData;
  1773.     hi2c->XferCount   = Size;
  1774.     hi2c->XferSize    = hi2c->XferCount;
  1775.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1776.     hi2c->Devaddress  = DevAddress;
  1777.  
  1778.  
  1779.     /* Process Unlocked */
  1780.     __HAL_UNLOCK(hi2c);
  1781.  
  1782.     /* Note : The I2C interrupts must be enabled after unlocking current process
  1783.     to avoid the risk of I2C interrupt handle execution before current
  1784.     process unlock */
  1785.  
  1786.     /* Enable EVT, BUF and ERR interrupt */
  1787.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1788.  
  1789.     /* Enable Acknowledge */
  1790.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1791.  
  1792.     /* Generate Start */
  1793.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  1794.  
  1795.     return HAL_OK;
  1796.   }
  1797.   else
  1798.   {
  1799.     return HAL_BUSY;
  1800.   }
  1801. }
  1802.  
  1803. /**
  1804.   * @brief  Transmit in slave mode an amount of data in non-blocking mode with Interrupt
  1805.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1806.   *         the configuration information for the specified I2C.
  1807.   * @param  pData Pointer to data buffer
  1808.   * @param  Size Amount of data to be sent
  1809.   * @retval HAL status
  1810.   */
  1811. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1812. {
  1813.  
  1814.   if (hi2c->State == HAL_I2C_STATE_READY)
  1815.   {
  1816.     if ((pData == NULL) || (Size == 0U))
  1817.     {
  1818.       return  HAL_ERROR;
  1819.     }
  1820.  
  1821.     /* Process Locked */
  1822.     __HAL_LOCK(hi2c);
  1823.  
  1824.     /* Check if the I2C is already enabled */
  1825.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1826.     {
  1827.       /* Enable I2C peripheral */
  1828.       __HAL_I2C_ENABLE(hi2c);
  1829.     }
  1830.  
  1831.     /* Disable Pos */
  1832.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1833.  
  1834.     hi2c->State     = HAL_I2C_STATE_BUSY_TX;
  1835.     hi2c->Mode      = HAL_I2C_MODE_SLAVE;
  1836.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1837.  
  1838.     /* Prepare transfer parameters */
  1839.     hi2c->pBuffPtr    = pData;
  1840.     hi2c->XferCount   = Size;
  1841.     hi2c->XferSize    = hi2c->XferCount;
  1842.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1843.  
  1844.     /* Enable Address Acknowledge */
  1845.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1846.  
  1847.     /* Process Unlocked */
  1848.     __HAL_UNLOCK(hi2c);
  1849.  
  1850.     /* Note : The I2C interrupts must be enabled after unlocking current process
  1851.               to avoid the risk of I2C interrupt handle execution before current
  1852.               process unlock */
  1853.  
  1854.     /* Enable EVT, BUF and ERR interrupt */
  1855.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1856.  
  1857.     return HAL_OK;
  1858.   }
  1859.   else
  1860.   {
  1861.     return HAL_BUSY;
  1862.   }
  1863. }
  1864.  
  1865. /**
  1866.   * @brief  Receive in slave mode an amount of data in non-blocking mode with Interrupt
  1867.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1868.   *                the configuration information for the specified I2C.
  1869.   * @param  pData Pointer to data buffer
  1870.   * @param  Size Amount of data to be sent
  1871.   * @retval HAL status
  1872.   */
  1873. HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1874. {
  1875.  
  1876.   if (hi2c->State == HAL_I2C_STATE_READY)
  1877.   {
  1878.     if ((pData == NULL) || (Size == 0U))
  1879.     {
  1880.       return  HAL_ERROR;
  1881.     }
  1882.  
  1883.     /* Process Locked */
  1884.     __HAL_LOCK(hi2c);
  1885.  
  1886.     /* Check if the I2C is already enabled */
  1887.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1888.     {
  1889.       /* Enable I2C peripheral */
  1890.       __HAL_I2C_ENABLE(hi2c);
  1891.     }
  1892.  
  1893.     /* Disable Pos */
  1894.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1895.  
  1896.     hi2c->State     = HAL_I2C_STATE_BUSY_RX;
  1897.     hi2c->Mode      = HAL_I2C_MODE_SLAVE;
  1898.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1899.  
  1900.     /* Prepare transfer parameters */
  1901.     hi2c->pBuffPtr    = pData;
  1902.     hi2c->XferCount   = Size;
  1903.     hi2c->XferSize    = hi2c->XferCount;
  1904.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1905.  
  1906.     /* Enable Address Acknowledge */
  1907.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1908.  
  1909.     /* Process Unlocked */
  1910.     __HAL_UNLOCK(hi2c);
  1911.  
  1912.     /* Note : The I2C interrupts must be enabled after unlocking current process
  1913.               to avoid the risk of I2C interrupt handle execution before current
  1914.               process unlock */
  1915.  
  1916.     /* Enable EVT, BUF and ERR interrupt */
  1917.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1918.  
  1919.     return HAL_OK;
  1920.   }
  1921.   else
  1922.   {
  1923.     return HAL_BUSY;
  1924.   }
  1925. }
  1926.  
  1927. /**
  1928.   * @brief  Transmit in master mode an amount of data in non-blocking mode with DMA
  1929.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1930.   *                the configuration information for the specified I2C.
  1931.   * @param  DevAddress Target device address: The device 7 bits address value
  1932.   *         in datasheet must be shifted to the left before calling the interface
  1933.   * @param  pData Pointer to data buffer
  1934.   * @param  Size Amount of data to be sent
  1935.   * @retval HAL status
  1936.   */
  1937. HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1938. {
  1939.   __IO uint32_t count = 0U;
  1940.   HAL_StatusTypeDef dmaxferstatus;
  1941.  
  1942.   if (hi2c->State == HAL_I2C_STATE_READY)
  1943.   {
  1944.     /* Wait until BUSY flag is reset */
  1945.     count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  1946.     do
  1947.     {
  1948.       count--;
  1949.       if (count == 0U)
  1950.       {
  1951.         hi2c->PreviousState       = I2C_STATE_NONE;
  1952.         hi2c->State               = HAL_I2C_STATE_READY;
  1953.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  1954.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  1955.  
  1956.         /* Process Unlocked */
  1957.         __HAL_UNLOCK(hi2c);
  1958.  
  1959.         return HAL_ERROR;
  1960.       }
  1961.     }
  1962.     while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1963.  
  1964.     /* Process Locked */
  1965.     __HAL_LOCK(hi2c);
  1966.  
  1967.     /* Check if the I2C is already enabled */
  1968.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1969.     {
  1970.       /* Enable I2C peripheral */
  1971.       __HAL_I2C_ENABLE(hi2c);
  1972.     }
  1973.  
  1974.     /* Disable Pos */
  1975.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1976.  
  1977.     hi2c->State     = HAL_I2C_STATE_BUSY_TX;
  1978.     hi2c->Mode      = HAL_I2C_MODE_MASTER;
  1979.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1980.  
  1981.     /* Prepare transfer parameters */
  1982.     hi2c->pBuffPtr    = pData;
  1983.     hi2c->XferCount   = Size;
  1984.     hi2c->XferSize    = hi2c->XferCount;
  1985.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1986.     hi2c->Devaddress  = DevAddress;
  1987.  
  1988.     if (hi2c->XferSize > 0U)
  1989.     {
  1990.       if (hi2c->hdmatx != NULL)
  1991.       {
  1992.         /* Set the I2C DMA transfer complete callback */
  1993.         hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  1994.  
  1995.         /* Set the DMA error callback */
  1996.         hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  1997.  
  1998.         /* Set the unused DMA callbacks to NULL */
  1999.         hi2c->hdmatx->XferHalfCpltCallback = NULL;
  2000.         hi2c->hdmatx->XferAbortCallback = NULL;
  2001.  
  2002.         /* Enable the DMA channel */
  2003.         dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  2004.       }
  2005.       else
  2006.       {
  2007.         /* Update I2C state */
  2008.         hi2c->State     = HAL_I2C_STATE_READY;
  2009.         hi2c->Mode      = HAL_I2C_MODE_NONE;
  2010.  
  2011.         /* Update I2C error code */
  2012.         hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
  2013.  
  2014.         /* Process Unlocked */
  2015.         __HAL_UNLOCK(hi2c);
  2016.  
  2017.         return HAL_ERROR;
  2018.       }
  2019.  
  2020.       if (dmaxferstatus == HAL_OK)
  2021.       {
  2022.         /* Process Unlocked */
  2023.         __HAL_UNLOCK(hi2c);
  2024.  
  2025.         /* Note : The I2C interrupts must be enabled after unlocking current process
  2026.         to avoid the risk of I2C interrupt handle execution before current
  2027.         process unlock */
  2028.  
  2029.         /* Enable EVT and ERR interrupt */
  2030.         __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  2031.  
  2032.         /* Enable DMA Request */
  2033.         SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  2034.  
  2035.         /* Enable Acknowledge */
  2036.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2037.  
  2038.         /* Generate Start */
  2039.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2040.       }
  2041.       else
  2042.       {
  2043.         /* Update I2C state */
  2044.         hi2c->State     = HAL_I2C_STATE_READY;
  2045.         hi2c->Mode      = HAL_I2C_MODE_NONE;
  2046.  
  2047.         /* Update I2C error code */
  2048.         hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  2049.  
  2050.         /* Process Unlocked */
  2051.         __HAL_UNLOCK(hi2c);
  2052.  
  2053.         return HAL_ERROR;
  2054.       }
  2055.     }
  2056.     else
  2057.     {
  2058.       /* Enable Acknowledge */
  2059.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2060.  
  2061.       /* Generate Start */
  2062.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2063.  
  2064.       /* Process Unlocked */
  2065.       __HAL_UNLOCK(hi2c);
  2066.  
  2067.       /* Note : The I2C interrupts must be enabled after unlocking current process
  2068.       to avoid the risk of I2C interrupt handle execution before current
  2069.       process unlock */
  2070.  
  2071.       /* Enable EVT, BUF and ERR interrupt */
  2072.       __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2073.     }
  2074.  
  2075.     return HAL_OK;
  2076.   }
  2077.   else
  2078.   {
  2079.     return HAL_BUSY;
  2080.   }
  2081. }
  2082.  
  2083. /**
  2084.   * @brief  Receive in master mode an amount of data in non-blocking mode with DMA
  2085.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2086.   *                the configuration information for the specified I2C.
  2087.   * @param  DevAddress Target device address: The device 7 bits address value
  2088.   *         in datasheet must be shifted to the left before calling the interface
  2089.   * @param  pData Pointer to data buffer
  2090.   * @param  Size Amount of data to be sent
  2091.   * @retval HAL status
  2092.   */
  2093. HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  2094. {
  2095.   __IO uint32_t count = 0U;
  2096.   HAL_StatusTypeDef dmaxferstatus;
  2097.  
  2098.   if (hi2c->State == HAL_I2C_STATE_READY)
  2099.   {
  2100.     /* Wait until BUSY flag is reset */
  2101.     count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  2102.     do
  2103.     {
  2104.       count--;
  2105.       if (count == 0U)
  2106.       {
  2107.         hi2c->PreviousState       = I2C_STATE_NONE;
  2108.         hi2c->State               = HAL_I2C_STATE_READY;
  2109.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  2110.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  2111.  
  2112.         /* Process Unlocked */
  2113.         __HAL_UNLOCK(hi2c);
  2114.  
  2115.         return HAL_ERROR;
  2116.       }
  2117.     }
  2118.     while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2119.  
  2120.     /* Process Locked */
  2121.     __HAL_LOCK(hi2c);
  2122.  
  2123.     /* Check if the I2C is already enabled */
  2124.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2125.     {
  2126.       /* Enable I2C peripheral */
  2127.       __HAL_I2C_ENABLE(hi2c);
  2128.     }
  2129.  
  2130.     /* Disable Pos */
  2131.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2132.  
  2133.     hi2c->State     = HAL_I2C_STATE_BUSY_RX;
  2134.     hi2c->Mode      = HAL_I2C_MODE_MASTER;
  2135.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2136.  
  2137.     /* Prepare transfer parameters */
  2138.     hi2c->pBuffPtr    = pData;
  2139.     hi2c->XferCount   = Size;
  2140.     hi2c->XferSize    = hi2c->XferCount;
  2141.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2142.     hi2c->Devaddress  = DevAddress;
  2143.  
  2144.     if (hi2c->XferSize > 0U)
  2145.     {
  2146.       if (hi2c->hdmarx != NULL)
  2147.       {
  2148.         /* Set the I2C DMA transfer complete callback */
  2149.         hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  2150.  
  2151.         /* Set the DMA error callback */
  2152.         hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  2153.  
  2154.         /* Set the unused DMA callbacks to NULL */
  2155.         hi2c->hdmarx->XferHalfCpltCallback = NULL;
  2156.         hi2c->hdmarx->XferAbortCallback = NULL;
  2157.  
  2158.         /* Enable the DMA channel */
  2159.         dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  2160.       }
  2161.       else
  2162.       {
  2163.         /* Update I2C state */
  2164.         hi2c->State     = HAL_I2C_STATE_READY;
  2165.         hi2c->Mode      = HAL_I2C_MODE_NONE;
  2166.  
  2167.         /* Update I2C error code */
  2168.         hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
  2169.  
  2170.         /* Process Unlocked */
  2171.         __HAL_UNLOCK(hi2c);
  2172.  
  2173.         return HAL_ERROR;
  2174.       }
  2175.  
  2176.       if (dmaxferstatus == HAL_OK)
  2177.       {
  2178.         /* Enable Acknowledge */
  2179.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2180.  
  2181.         /* Generate Start */
  2182.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2183.  
  2184.         /* Process Unlocked */
  2185.         __HAL_UNLOCK(hi2c);
  2186.  
  2187.         /* Note : The I2C interrupts must be enabled after unlocking current process
  2188.         to avoid the risk of I2C interrupt handle execution before current
  2189.         process unlock */
  2190.  
  2191.         /* Enable EVT and ERR interrupt */
  2192.         __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  2193.  
  2194.         /* Enable DMA Request */
  2195.         SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  2196.       }
  2197.       else
  2198.       {
  2199.         /* Update I2C state */
  2200.         hi2c->State     = HAL_I2C_STATE_READY;
  2201.         hi2c->Mode      = HAL_I2C_MODE_NONE;
  2202.  
  2203.         /* Update I2C error code */
  2204.         hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  2205.  
  2206.         /* Process Unlocked */
  2207.         __HAL_UNLOCK(hi2c);
  2208.  
  2209.         return HAL_ERROR;
  2210.       }
  2211.     }
  2212.     else
  2213.     {
  2214.       /* Process Unlocked */
  2215.       __HAL_UNLOCK(hi2c);
  2216.  
  2217.       /* Note : The I2C interrupts must be enabled after unlocking current process
  2218.       to avoid the risk of I2C interrupt handle execution before current
  2219.       process unlock */
  2220.  
  2221.       /* Enable EVT, BUF and ERR interrupt */
  2222.       __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2223.  
  2224.       /* Enable Acknowledge */
  2225.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2226.  
  2227.       /* Generate Start */
  2228.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2229.     }
  2230.  
  2231.     return HAL_OK;
  2232.   }
  2233.   else
  2234.   {
  2235.     return HAL_BUSY;
  2236.   }
  2237. }
  2238.  
  2239. /**
  2240.   * @brief  Transmit in slave mode an amount of data in non-blocking mode with DMA
  2241.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2242.   *                the configuration information for the specified I2C.
  2243.   * @param  pData Pointer to data buffer
  2244.   * @param  Size Amount of data to be sent
  2245.   * @retval HAL status
  2246.   */
  2247. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  2248. {
  2249.   HAL_StatusTypeDef dmaxferstatus;
  2250.  
  2251.   if (hi2c->State == HAL_I2C_STATE_READY)
  2252.   {
  2253.     if ((pData == NULL) || (Size == 0U))
  2254.     {
  2255.       return  HAL_ERROR;
  2256.     }
  2257.  
  2258.     /* Process Locked */
  2259.     __HAL_LOCK(hi2c);
  2260.  
  2261.     /* Check if the I2C is already enabled */
  2262.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2263.     {
  2264.       /* Enable I2C peripheral */
  2265.       __HAL_I2C_ENABLE(hi2c);
  2266.     }
  2267.  
  2268.     /* Disable Pos */
  2269.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2270.  
  2271.     hi2c->State     = HAL_I2C_STATE_BUSY_TX;
  2272.     hi2c->Mode      = HAL_I2C_MODE_SLAVE;
  2273.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2274.  
  2275.     /* Prepare transfer parameters */
  2276.     hi2c->pBuffPtr    = pData;
  2277.     hi2c->XferCount   = Size;
  2278.     hi2c->XferSize    = hi2c->XferCount;
  2279.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2280.  
  2281.     if (hi2c->hdmatx != NULL)
  2282.     {
  2283.       /* Set the I2C DMA transfer complete callback */
  2284.       hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  2285.  
  2286.       /* Set the DMA error callback */
  2287.       hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  2288.  
  2289.       /* Set the unused DMA callbacks to NULL */
  2290.       hi2c->hdmatx->XferHalfCpltCallback = NULL;
  2291.       hi2c->hdmatx->XferAbortCallback = NULL;
  2292.  
  2293.       /* Enable the DMA channel */
  2294.       dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  2295.     }
  2296.     else
  2297.     {
  2298.       /* Update I2C state */
  2299.       hi2c->State     = HAL_I2C_STATE_LISTEN;
  2300.       hi2c->Mode      = HAL_I2C_MODE_NONE;
  2301.  
  2302.       /* Update I2C error code */
  2303.       hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
  2304.  
  2305.       /* Process Unlocked */
  2306.       __HAL_UNLOCK(hi2c);
  2307.  
  2308.       return HAL_ERROR;
  2309.     }
  2310.  
  2311.     if (dmaxferstatus == HAL_OK)
  2312.     {
  2313.       /* Enable Address Acknowledge */
  2314.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2315.  
  2316.       /* Process Unlocked */
  2317.       __HAL_UNLOCK(hi2c);
  2318.  
  2319.       /* Note : The I2C interrupts must be enabled after unlocking current process
  2320.       to avoid the risk of I2C interrupt handle execution before current
  2321.       process unlock */
  2322.       /* Enable EVT and ERR interrupt */
  2323.       __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  2324.  
  2325.       /* Enable DMA Request */
  2326.       hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  2327.  
  2328.       return HAL_OK;
  2329.     }
  2330.     else
  2331.     {
  2332.       /* Update I2C state */
  2333.       hi2c->State     = HAL_I2C_STATE_READY;
  2334.       hi2c->Mode      = HAL_I2C_MODE_NONE;
  2335.  
  2336.       /* Update I2C error code */
  2337.       hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  2338.  
  2339.       /* Process Unlocked */
  2340.       __HAL_UNLOCK(hi2c);
  2341.  
  2342.       return HAL_ERROR;
  2343.     }
  2344.   }
  2345.   else
  2346.   {
  2347.     return HAL_BUSY;
  2348.   }
  2349. }
  2350.  
  2351. /**
  2352.   * @brief  Receive in slave mode an amount of data in non-blocking mode with DMA
  2353.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2354.   *                the configuration information for the specified I2C.
  2355.   * @param  pData Pointer to data buffer
  2356.   * @param  Size Amount of data to be sent
  2357.   * @retval HAL status
  2358.   */
  2359. HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  2360. {
  2361.   HAL_StatusTypeDef dmaxferstatus;
  2362.  
  2363.   if (hi2c->State == HAL_I2C_STATE_READY)
  2364.   {
  2365.     if ((pData == NULL) || (Size == 0U))
  2366.     {
  2367.       return  HAL_ERROR;
  2368.     }
  2369.  
  2370.     /* Process Locked */
  2371.     __HAL_LOCK(hi2c);
  2372.  
  2373.     /* Check if the I2C is already enabled */
  2374.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2375.     {
  2376.       /* Enable I2C peripheral */
  2377.       __HAL_I2C_ENABLE(hi2c);
  2378.     }
  2379.  
  2380.     /* Disable Pos */
  2381.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2382.  
  2383.     hi2c->State     = HAL_I2C_STATE_BUSY_RX;
  2384.     hi2c->Mode      = HAL_I2C_MODE_SLAVE;
  2385.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2386.  
  2387.     /* Prepare transfer parameters */
  2388.     hi2c->pBuffPtr    = pData;
  2389.     hi2c->XferCount   = Size;
  2390.     hi2c->XferSize    = hi2c->XferCount;
  2391.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2392.  
  2393.     if (hi2c->hdmarx != NULL)
  2394.     {
  2395.       /* Set the I2C DMA transfer complete callback */
  2396.       hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  2397.  
  2398.       /* Set the DMA error callback */
  2399.       hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  2400.  
  2401.       /* Set the unused DMA callbacks to NULL */
  2402.       hi2c->hdmarx->XferHalfCpltCallback = NULL;
  2403.       hi2c->hdmarx->XferAbortCallback = NULL;
  2404.  
  2405.       /* Enable the DMA channel */
  2406.       dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  2407.     }
  2408.     else
  2409.     {
  2410.       /* Update I2C state */
  2411.       hi2c->State     = HAL_I2C_STATE_LISTEN;
  2412.       hi2c->Mode      = HAL_I2C_MODE_NONE;
  2413.  
  2414.       /* Update I2C error code */
  2415.       hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
  2416.  
  2417.       /* Process Unlocked */
  2418.       __HAL_UNLOCK(hi2c);
  2419.  
  2420.       return HAL_ERROR;
  2421.     }
  2422.  
  2423.     if (dmaxferstatus == HAL_OK)
  2424.     {
  2425.       /* Enable Address Acknowledge */
  2426.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2427.  
  2428.       /* Process Unlocked */
  2429.       __HAL_UNLOCK(hi2c);
  2430.  
  2431.       /* Note : The I2C interrupts must be enabled after unlocking current process
  2432.       to avoid the risk of I2C interrupt handle execution before current
  2433.       process unlock */
  2434.       /* Enable EVT and ERR interrupt */
  2435.       __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  2436.  
  2437.       /* Enable DMA Request */
  2438.       SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  2439.  
  2440.       return HAL_OK;
  2441.     }
  2442.     else
  2443.     {
  2444.       /* Update I2C state */
  2445.       hi2c->State     = HAL_I2C_STATE_READY;
  2446.       hi2c->Mode      = HAL_I2C_MODE_NONE;
  2447.  
  2448.       /* Update I2C error code */
  2449.       hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  2450.  
  2451.       /* Process Unlocked */
  2452.       __HAL_UNLOCK(hi2c);
  2453.  
  2454.       return HAL_ERROR;
  2455.     }
  2456.   }
  2457.   else
  2458.   {
  2459.     return HAL_BUSY;
  2460.   }
  2461. }
  2462.  
  2463. /**
  2464.   * @brief  Write an amount of data in blocking mode to a specific memory address
  2465.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2466.   *                the configuration information for the specified I2C.
  2467.   * @param  DevAddress Target device address: The device 7 bits address value
  2468.   *         in datasheet must be shifted to the left before calling the interface
  2469.   * @param  MemAddress Internal memory address
  2470.   * @param  MemAddSize Size of internal memory address
  2471.   * @param  pData Pointer to data buffer
  2472.   * @param  Size Amount of data to be sent
  2473.   * @param  Timeout Timeout duration
  2474.   * @retval HAL status
  2475.   */
  2476. HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  2477. {
  2478.   /* Init tickstart for timeout management*/
  2479.   uint32_t tickstart = HAL_GetTick();
  2480.  
  2481.   /* Check the parameters */
  2482.   assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2483.  
  2484.   if (hi2c->State == HAL_I2C_STATE_READY)
  2485.   {
  2486.     /* Wait until BUSY flag is reset */
  2487.     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2488.     {
  2489.       return HAL_BUSY;
  2490.     }
  2491.  
  2492.     /* Process Locked */
  2493.     __HAL_LOCK(hi2c);
  2494.  
  2495.     /* Check if the I2C is already enabled */
  2496.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2497.     {
  2498.       /* Enable I2C peripheral */
  2499.       __HAL_I2C_ENABLE(hi2c);
  2500.     }
  2501.  
  2502.     /* Disable Pos */
  2503.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2504.  
  2505.     hi2c->State     = HAL_I2C_STATE_BUSY_TX;
  2506.     hi2c->Mode      = HAL_I2C_MODE_MEM;
  2507.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2508.  
  2509.     /* Prepare transfer parameters */
  2510.     hi2c->pBuffPtr    = pData;
  2511.     hi2c->XferCount   = Size;
  2512.     hi2c->XferSize    = hi2c->XferCount;
  2513.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2514.  
  2515.     /* Send Slave Address and Memory Address */
  2516.     if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2517.     {
  2518.       return HAL_ERROR;
  2519.     }
  2520.  
  2521.     while (hi2c->XferSize > 0U)
  2522.     {
  2523.       /* Wait until TXE flag is set */
  2524.       if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2525.       {
  2526.         if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2527.         {
  2528.           /* Generate Stop */
  2529.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  2530.         }
  2531.         return HAL_ERROR;
  2532.       }
  2533.  
  2534.       /* Write data to DR */
  2535.       hi2c->Instance->DR = *hi2c->pBuffPtr;
  2536.  
  2537.       /* Increment Buffer pointer */
  2538.       hi2c->pBuffPtr++;
  2539.  
  2540.       /* Update counter */
  2541.       hi2c->XferSize--;
  2542.       hi2c->XferCount--;
  2543.  
  2544.       if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  2545.       {
  2546.         /* Write data to DR */
  2547.         hi2c->Instance->DR = *hi2c->pBuffPtr;
  2548.  
  2549.         /* Increment Buffer pointer */
  2550.         hi2c->pBuffPtr++;
  2551.  
  2552.         /* Update counter */
  2553.         hi2c->XferSize--;
  2554.         hi2c->XferCount--;
  2555.       }
  2556.     }
  2557.  
  2558.     /* Wait until BTF flag is set */
  2559.     if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2560.     {
  2561.       if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2562.       {
  2563.         /* Generate Stop */
  2564.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  2565.       }
  2566.       return HAL_ERROR;
  2567.     }
  2568.  
  2569.     /* Generate Stop */
  2570.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  2571.  
  2572.     hi2c->State = HAL_I2C_STATE_READY;
  2573.     hi2c->Mode = HAL_I2C_MODE_NONE;
  2574.  
  2575.     /* Process Unlocked */
  2576.     __HAL_UNLOCK(hi2c);
  2577.  
  2578.     return HAL_OK;
  2579.   }
  2580.   else
  2581.   {
  2582.     return HAL_BUSY;
  2583.   }
  2584. }
  2585.  
  2586. /**
  2587.   * @brief  Read an amount of data in blocking mode from a specific memory address
  2588.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2589.   *                the configuration information for the specified I2C.
  2590.   * @param  DevAddress Target device address: The device 7 bits address value
  2591.   *         in datasheet must be shifted to the left before calling the interface
  2592.   * @param  MemAddress Internal memory address
  2593.   * @param  MemAddSize Size of internal memory address
  2594.   * @param  pData Pointer to data buffer
  2595.   * @param  Size Amount of data to be sent
  2596.   * @param  Timeout Timeout duration
  2597.   * @retval HAL status
  2598.   */
  2599. HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  2600. {
  2601.   /* Init tickstart for timeout management*/
  2602.   uint32_t tickstart = HAL_GetTick();
  2603.  
  2604.   /* Check the parameters */
  2605.   assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2606.  
  2607.   if (hi2c->State == HAL_I2C_STATE_READY)
  2608.   {
  2609.     /* Wait until BUSY flag is reset */
  2610.     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2611.     {
  2612.       return HAL_BUSY;
  2613.     }
  2614.  
  2615.     /* Process Locked */
  2616.     __HAL_LOCK(hi2c);
  2617.  
  2618.     /* Check if the I2C is already enabled */
  2619.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2620.     {
  2621.       /* Enable I2C peripheral */
  2622.       __HAL_I2C_ENABLE(hi2c);
  2623.     }
  2624.  
  2625.     /* Disable Pos */
  2626.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2627.  
  2628.     hi2c->State     = HAL_I2C_STATE_BUSY_RX;
  2629.     hi2c->Mode      = HAL_I2C_MODE_MEM;
  2630.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2631.  
  2632.     /* Prepare transfer parameters */
  2633.     hi2c->pBuffPtr    = pData;
  2634.     hi2c->XferCount   = Size;
  2635.     hi2c->XferSize    = hi2c->XferCount;
  2636.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2637.  
  2638.     /* Send Slave Address and Memory Address */
  2639.     if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2640.     {
  2641.       return HAL_ERROR;
  2642.     }
  2643.  
  2644.     if (hi2c->XferSize == 0U)
  2645.     {
  2646.       /* Clear ADDR flag */
  2647.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2648.  
  2649.       /* Generate Stop */
  2650.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  2651.     }
  2652.     else if (hi2c->XferSize == 1U)
  2653.     {
  2654.       /* Disable Acknowledge */
  2655.       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2656.  
  2657.       /* Clear ADDR flag */
  2658.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2659.  
  2660.       /* Generate Stop */
  2661.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  2662.     }
  2663.     else if (hi2c->XferSize == 2U)
  2664.     {
  2665.       /* Disable Acknowledge */
  2666.       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2667.  
  2668.       /* Enable Pos */
  2669.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2670.  
  2671.       /* Clear ADDR flag */
  2672.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2673.     }
  2674.     else
  2675.     {
  2676.       /* Clear ADDR flag */
  2677.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2678.     }
  2679.  
  2680.     while (hi2c->XferSize > 0U)
  2681.     {
  2682.       if (hi2c->XferSize <= 3U)
  2683.       {
  2684.         /* One byte */
  2685.         if (hi2c->XferSize == 1U)
  2686.         {
  2687.           /* Wait until RXNE flag is set */
  2688.           if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2689.           {
  2690.             return HAL_ERROR;
  2691.           }
  2692.  
  2693.           /* Read data from DR */
  2694.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  2695.  
  2696.           /* Increment Buffer pointer */
  2697.           hi2c->pBuffPtr++;
  2698.  
  2699.           /* Update counter */
  2700.           hi2c->XferSize--;
  2701.           hi2c->XferCount--;
  2702.         }
  2703.         /* Two bytes */
  2704.         else if (hi2c->XferSize == 2U)
  2705.         {
  2706.           /* Wait until BTF flag is set */
  2707.           if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2708.           {
  2709.             return HAL_ERROR;
  2710.           }
  2711.  
  2712.           /* Generate Stop */
  2713.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  2714.  
  2715.           /* Read data from DR */
  2716.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  2717.  
  2718.           /* Increment Buffer pointer */
  2719.           hi2c->pBuffPtr++;
  2720.  
  2721.           /* Update counter */
  2722.           hi2c->XferSize--;
  2723.           hi2c->XferCount--;
  2724.  
  2725.           /* Read data from DR */
  2726.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  2727.  
  2728.           /* Increment Buffer pointer */
  2729.           hi2c->pBuffPtr++;
  2730.  
  2731.           /* Update counter */
  2732.           hi2c->XferSize--;
  2733.           hi2c->XferCount--;
  2734.         }
  2735.         /* 3 Last bytes */
  2736.         else
  2737.         {
  2738.           /* Wait until BTF flag is set */
  2739.           if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2740.           {
  2741.             return HAL_ERROR;
  2742.           }
  2743.  
  2744.           /* Disable Acknowledge */
  2745.           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2746.  
  2747.           /* Read data from DR */
  2748.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  2749.  
  2750.           /* Increment Buffer pointer */
  2751.           hi2c->pBuffPtr++;
  2752.  
  2753.           /* Update counter */
  2754.           hi2c->XferSize--;
  2755.           hi2c->XferCount--;
  2756.  
  2757.           /* Wait until BTF flag is set */
  2758.           if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2759.           {
  2760.             return HAL_ERROR;
  2761.           }
  2762.  
  2763.           /* Generate Stop */
  2764.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  2765.  
  2766.           /* Read data from DR */
  2767.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  2768.  
  2769.           /* Increment Buffer pointer */
  2770.           hi2c->pBuffPtr++;
  2771.  
  2772.           /* Update counter */
  2773.           hi2c->XferSize--;
  2774.           hi2c->XferCount--;
  2775.  
  2776.           /* Read data from DR */
  2777.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  2778.  
  2779.           /* Increment Buffer pointer */
  2780.           hi2c->pBuffPtr++;
  2781.  
  2782.           /* Update counter */
  2783.           hi2c->XferSize--;
  2784.           hi2c->XferCount--;
  2785.         }
  2786.       }
  2787.       else
  2788.       {
  2789.         /* Wait until RXNE flag is set */
  2790.         if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2791.         {
  2792.           return HAL_ERROR;
  2793.         }
  2794.  
  2795.         /* Read data from DR */
  2796.         *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  2797.  
  2798.         /* Increment Buffer pointer */
  2799.         hi2c->pBuffPtr++;
  2800.  
  2801.         /* Update counter */
  2802.         hi2c->XferSize--;
  2803.         hi2c->XferCount--;
  2804.  
  2805.         if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  2806.         {
  2807.           /* Read data from DR */
  2808.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  2809.  
  2810.           /* Increment Buffer pointer */
  2811.           hi2c->pBuffPtr++;
  2812.  
  2813.           /* Update counter */
  2814.           hi2c->XferSize--;
  2815.           hi2c->XferCount--;
  2816.         }
  2817.       }
  2818.     }
  2819.  
  2820.     hi2c->State = HAL_I2C_STATE_READY;
  2821.     hi2c->Mode = HAL_I2C_MODE_NONE;
  2822.  
  2823.     /* Process Unlocked */
  2824.     __HAL_UNLOCK(hi2c);
  2825.  
  2826.     return HAL_OK;
  2827.   }
  2828.   else
  2829.   {
  2830.     return HAL_BUSY;
  2831.   }
  2832. }
  2833.  
  2834. /**
  2835.   * @brief  Write an amount of data in non-blocking mode with Interrupt to a specific memory address
  2836.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2837.   *                the configuration information for the specified I2C.
  2838.   * @param  DevAddress Target device address: The device 7 bits address value
  2839.   *         in datasheet must be shifted to the left before calling the interface
  2840.   * @param  MemAddress Internal memory address
  2841.   * @param  MemAddSize Size of internal memory address
  2842.   * @param  pData Pointer to data buffer
  2843.   * @param  Size Amount of data to be sent
  2844.   * @retval HAL status
  2845.   */
  2846. HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2847. {
  2848.   __IO uint32_t count = 0U;
  2849.  
  2850.   /* Check the parameters */
  2851.   assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2852.  
  2853.   if (hi2c->State == HAL_I2C_STATE_READY)
  2854.   {
  2855.     /* Wait until BUSY flag is reset */
  2856.     count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  2857.     do
  2858.     {
  2859.       count--;
  2860.       if (count == 0U)
  2861.       {
  2862.         hi2c->PreviousState       = I2C_STATE_NONE;
  2863.         hi2c->State               = HAL_I2C_STATE_READY;
  2864.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  2865.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  2866.  
  2867.         /* Process Unlocked */
  2868.         __HAL_UNLOCK(hi2c);
  2869.  
  2870.         return HAL_ERROR;
  2871.       }
  2872.     }
  2873.     while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2874.  
  2875.     /* Process Locked */
  2876.     __HAL_LOCK(hi2c);
  2877.  
  2878.     /* Check if the I2C is already enabled */
  2879.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2880.     {
  2881.       /* Enable I2C peripheral */
  2882.       __HAL_I2C_ENABLE(hi2c);
  2883.     }
  2884.  
  2885.     /* Disable Pos */
  2886.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2887.  
  2888.     hi2c->State     = HAL_I2C_STATE_BUSY_TX;
  2889.     hi2c->Mode      = HAL_I2C_MODE_MEM;
  2890.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2891.  
  2892.     /* Prepare transfer parameters */
  2893.     hi2c->pBuffPtr    = pData;
  2894.     hi2c->XferCount   = Size;
  2895.     hi2c->XferSize    = hi2c->XferCount;
  2896.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2897.     hi2c->Devaddress  = DevAddress;
  2898.     hi2c->Memaddress  = MemAddress;
  2899.     hi2c->MemaddSize  = MemAddSize;
  2900.     hi2c->EventCount  = 0U;
  2901.  
  2902.     /* Generate Start */
  2903.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2904.  
  2905.     /* Process Unlocked */
  2906.     __HAL_UNLOCK(hi2c);
  2907.  
  2908.     /* Note : The I2C interrupts must be enabled after unlocking current process
  2909.     to avoid the risk of I2C interrupt handle execution before current
  2910.     process unlock */
  2911.  
  2912.     /* Enable EVT, BUF and ERR interrupt */
  2913.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2914.  
  2915.     return HAL_OK;
  2916.   }
  2917.   else
  2918.   {
  2919.     return HAL_BUSY;
  2920.   }
  2921. }
  2922.  
  2923. /**
  2924.   * @brief  Read an amount of data in non-blocking mode with Interrupt from a specific memory address
  2925.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2926.   *                the configuration information for the specified I2C.
  2927.   * @param  DevAddress Target device address
  2928.   * @param  MemAddress Internal memory address
  2929.   * @param  MemAddSize Size of internal memory address
  2930.   * @param  pData Pointer to data buffer
  2931.   * @param  Size Amount of data to be sent
  2932.   * @retval HAL status
  2933.   */
  2934. HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2935. {
  2936.   __IO uint32_t count = 0U;
  2937.  
  2938.   /* Check the parameters */
  2939.   assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2940.  
  2941.   if (hi2c->State == HAL_I2C_STATE_READY)
  2942.   {
  2943.     /* Wait until BUSY flag is reset */
  2944.     count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  2945.     do
  2946.     {
  2947.       count--;
  2948.       if (count == 0U)
  2949.       {
  2950.         hi2c->PreviousState       = I2C_STATE_NONE;
  2951.         hi2c->State               = HAL_I2C_STATE_READY;
  2952.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  2953.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  2954.  
  2955.         /* Process Unlocked */
  2956.         __HAL_UNLOCK(hi2c);
  2957.  
  2958.         return HAL_ERROR;
  2959.       }
  2960.     }
  2961.     while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2962.  
  2963.     /* Process Locked */
  2964.     __HAL_LOCK(hi2c);
  2965.  
  2966.     /* Check if the I2C is already enabled */
  2967.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2968.     {
  2969.       /* Enable I2C peripheral */
  2970.       __HAL_I2C_ENABLE(hi2c);
  2971.     }
  2972.  
  2973.     /* Disable Pos */
  2974.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2975.  
  2976.     hi2c->State     = HAL_I2C_STATE_BUSY_RX;
  2977.     hi2c->Mode      = HAL_I2C_MODE_MEM;
  2978.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2979.  
  2980.     /* Prepare transfer parameters */
  2981.     hi2c->pBuffPtr    = pData;
  2982.     hi2c->XferCount   = Size;
  2983.     hi2c->XferSize    = hi2c->XferCount;
  2984.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2985.     hi2c->Devaddress  = DevAddress;
  2986.     hi2c->Memaddress  = MemAddress;
  2987.     hi2c->MemaddSize  = MemAddSize;
  2988.     hi2c->EventCount  = 0U;
  2989.  
  2990.     /* Enable Acknowledge */
  2991.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2992.  
  2993.     /* Generate Start */
  2994.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2995.  
  2996.     /* Process Unlocked */
  2997.     __HAL_UNLOCK(hi2c);
  2998.  
  2999.     if (hi2c->XferSize > 0U)
  3000.     {
  3001.       /* Note : The I2C interrupts must be enabled after unlocking current process
  3002.       to avoid the risk of I2C interrupt handle execution before current
  3003.       process unlock */
  3004.  
  3005.       /* Enable EVT, BUF and ERR interrupt */
  3006.       __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3007.     }
  3008.     return HAL_OK;
  3009.   }
  3010.   else
  3011.   {
  3012.     return HAL_BUSY;
  3013.   }
  3014. }
  3015.  
  3016. /**
  3017.   * @brief  Write an amount of data in non-blocking mode with DMA to a specific memory address
  3018.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3019.   *                the configuration information for the specified I2C.
  3020.   * @param  DevAddress Target device address: The device 7 bits address value
  3021.   *         in datasheet must be shifted to the left before calling the interface
  3022.   * @param  MemAddress Internal memory address
  3023.   * @param  MemAddSize Size of internal memory address
  3024.   * @param  pData Pointer to data buffer
  3025.   * @param  Size Amount of data to be sent
  3026.   * @retval HAL status
  3027.   */
  3028. HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  3029. {
  3030.   __IO uint32_t count = 0U;
  3031.   HAL_StatusTypeDef dmaxferstatus;
  3032.  
  3033.   /* Init tickstart for timeout management*/
  3034.   uint32_t tickstart = HAL_GetTick();
  3035.  
  3036.   /* Check the parameters */
  3037.   assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  3038.  
  3039.   if (hi2c->State == HAL_I2C_STATE_READY)
  3040.   {
  3041.     /* Wait until BUSY flag is reset */
  3042.     count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  3043.     do
  3044.     {
  3045.       count--;
  3046.       if (count == 0U)
  3047.       {
  3048.         hi2c->PreviousState       = I2C_STATE_NONE;
  3049.         hi2c->State               = HAL_I2C_STATE_READY;
  3050.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  3051.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  3052.  
  3053.         /* Process Unlocked */
  3054.         __HAL_UNLOCK(hi2c);
  3055.  
  3056.         return HAL_ERROR;
  3057.       }
  3058.     }
  3059.     while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  3060.  
  3061.     /* Process Locked */
  3062.     __HAL_LOCK(hi2c);
  3063.  
  3064.     /* Check if the I2C is already enabled */
  3065.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  3066.     {
  3067.       /* Enable I2C peripheral */
  3068.       __HAL_I2C_ENABLE(hi2c);
  3069.     }
  3070.  
  3071.     /* Disable Pos */
  3072.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  3073.  
  3074.     hi2c->State     = HAL_I2C_STATE_BUSY_TX;
  3075.     hi2c->Mode      = HAL_I2C_MODE_MEM;
  3076.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  3077.  
  3078.     /* Prepare transfer parameters */
  3079.     hi2c->pBuffPtr    = pData;
  3080.     hi2c->XferCount   = Size;
  3081.     hi2c->XferSize    = hi2c->XferCount;
  3082.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3083.  
  3084.     if (hi2c->XferSize > 0U)
  3085.     {
  3086.       if (hi2c->hdmatx != NULL)
  3087.       {
  3088.         /* Set the I2C DMA transfer complete callback */
  3089.         hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  3090.  
  3091.         /* Set the DMA error callback */
  3092.         hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  3093.  
  3094.         /* Set the unused DMA callbacks to NULL */
  3095.         hi2c->hdmatx->XferHalfCpltCallback = NULL;
  3096.         hi2c->hdmatx->XferAbortCallback = NULL;
  3097.  
  3098.         /* Enable the DMA channel */
  3099.         dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  3100.       }
  3101.       else
  3102.       {
  3103.         /* Update I2C state */
  3104.         hi2c->State     = HAL_I2C_STATE_READY;
  3105.         hi2c->Mode      = HAL_I2C_MODE_NONE;
  3106.  
  3107.         /* Update I2C error code */
  3108.         hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
  3109.  
  3110.         /* Process Unlocked */
  3111.         __HAL_UNLOCK(hi2c);
  3112.  
  3113.         return HAL_ERROR;
  3114.       }
  3115.  
  3116.       if (dmaxferstatus == HAL_OK)
  3117.       {
  3118.         /* Send Slave Address and Memory Address */
  3119.         if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  3120.         {
  3121.           /* Abort the ongoing DMA */
  3122.           dmaxferstatus = HAL_DMA_Abort_IT(hi2c->hdmatx);
  3123.  
  3124.           /* Prevent unused argument(s) compilation and MISRA warning */
  3125.           UNUSED(dmaxferstatus);
  3126.  
  3127.           /* Set the unused I2C DMA transfer complete callback to NULL */
  3128.           hi2c->hdmatx->XferCpltCallback = NULL;
  3129.  
  3130.           /* Disable Acknowledge */
  3131.           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3132.  
  3133.           hi2c->XferSize = 0U;
  3134.           hi2c->XferCount = 0U;
  3135.  
  3136.           /* Disable I2C peripheral to prevent dummy data in buffer */
  3137.           __HAL_I2C_DISABLE(hi2c);
  3138.  
  3139.           return HAL_ERROR;
  3140.         }
  3141.  
  3142.         /* Clear ADDR flag */
  3143.         __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3144.  
  3145.         /* Process Unlocked */
  3146.         __HAL_UNLOCK(hi2c);
  3147.  
  3148.         /* Note : The I2C interrupts must be enabled after unlocking current process
  3149.         to avoid the risk of I2C interrupt handle execution before current
  3150.         process unlock */
  3151.         /* Enable ERR interrupt */
  3152.         __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  3153.  
  3154.         /* Enable DMA Request */
  3155.         SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  3156.  
  3157.         return HAL_OK;
  3158.       }
  3159.       else
  3160.       {
  3161.         /* Update I2C state */
  3162.         hi2c->State     = HAL_I2C_STATE_READY;
  3163.         hi2c->Mode      = HAL_I2C_MODE_NONE;
  3164.  
  3165.         /* Update I2C error code */
  3166.         hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  3167.  
  3168.         /* Process Unlocked */
  3169.         __HAL_UNLOCK(hi2c);
  3170.  
  3171.         return HAL_ERROR;
  3172.       }
  3173.     }
  3174.     else
  3175.     {
  3176.       /* Update I2C state */
  3177.       hi2c->State     = HAL_I2C_STATE_READY;
  3178.       hi2c->Mode      = HAL_I2C_MODE_NONE;
  3179.  
  3180.       /* Update I2C error code */
  3181.       hi2c->ErrorCode |= HAL_I2C_ERROR_SIZE;
  3182.  
  3183.       /* Process Unlocked */
  3184.       __HAL_UNLOCK(hi2c);
  3185.  
  3186.       return HAL_ERROR;
  3187.     }
  3188.   }
  3189.   else
  3190.   {
  3191.     return HAL_BUSY;
  3192.   }
  3193. }
  3194.  
  3195. /**
  3196.   * @brief  Reads an amount of data in non-blocking mode with DMA from a specific memory address.
  3197.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3198.   *                the configuration information for the specified I2C.
  3199.   * @param  DevAddress Target device address: The device 7 bits address value
  3200.   *         in datasheet must be shifted to the left before calling the interface
  3201.   * @param  MemAddress Internal memory address
  3202.   * @param  MemAddSize Size of internal memory address
  3203.   * @param  pData Pointer to data buffer
  3204.   * @param  Size Amount of data to be read
  3205.   * @retval HAL status
  3206.   */
  3207. HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  3208. {
  3209.   /* Init tickstart for timeout management*/
  3210.   uint32_t tickstart = HAL_GetTick();
  3211.   __IO uint32_t count = 0U;
  3212.   HAL_StatusTypeDef dmaxferstatus;
  3213.  
  3214.   /* Check the parameters */
  3215.   assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  3216.  
  3217.   if (hi2c->State == HAL_I2C_STATE_READY)
  3218.   {
  3219.     /* Wait until BUSY flag is reset */
  3220.     count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  3221.     do
  3222.     {
  3223.       count--;
  3224.       if (count == 0U)
  3225.       {
  3226.         hi2c->PreviousState       = I2C_STATE_NONE;
  3227.         hi2c->State               = HAL_I2C_STATE_READY;
  3228.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  3229.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  3230.  
  3231.         /* Process Unlocked */
  3232.         __HAL_UNLOCK(hi2c);
  3233.  
  3234.         return HAL_ERROR;
  3235.       }
  3236.     }
  3237.     while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  3238.  
  3239.     /* Process Locked */
  3240.     __HAL_LOCK(hi2c);
  3241.  
  3242.     /* Check if the I2C is already enabled */
  3243.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  3244.     {
  3245.       /* Enable I2C peripheral */
  3246.       __HAL_I2C_ENABLE(hi2c);
  3247.     }
  3248.  
  3249.     /* Disable Pos */
  3250.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  3251.  
  3252.     hi2c->State     = HAL_I2C_STATE_BUSY_RX;
  3253.     hi2c->Mode      = HAL_I2C_MODE_MEM;
  3254.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  3255.  
  3256.     /* Prepare transfer parameters */
  3257.     hi2c->pBuffPtr    = pData;
  3258.     hi2c->XferCount   = Size;
  3259.     hi2c->XferSize    = hi2c->XferCount;
  3260.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3261.  
  3262.     if (hi2c->XferSize > 0U)
  3263.     {
  3264.       if (hi2c->hdmarx != NULL)
  3265.       {
  3266.         /* Set the I2C DMA transfer complete callback */
  3267.         hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  3268.  
  3269.         /* Set the DMA error callback */
  3270.         hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  3271.  
  3272.         /* Set the unused DMA callbacks to NULL */
  3273.         hi2c->hdmarx->XferHalfCpltCallback = NULL;
  3274.         hi2c->hdmarx->XferAbortCallback = NULL;
  3275.  
  3276.         /* Enable the DMA channel */
  3277.         dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  3278.       }
  3279.       else
  3280.       {
  3281.         /* Update I2C state */
  3282.         hi2c->State     = HAL_I2C_STATE_READY;
  3283.         hi2c->Mode      = HAL_I2C_MODE_NONE;
  3284.  
  3285.         /* Update I2C error code */
  3286.         hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
  3287.  
  3288.         /* Process Unlocked */
  3289.         __HAL_UNLOCK(hi2c);
  3290.  
  3291.         return HAL_ERROR;
  3292.       }
  3293.  
  3294.       if (dmaxferstatus == HAL_OK)
  3295.       {
  3296.         /* Send Slave Address and Memory Address */
  3297.         if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  3298.         {
  3299.           /* Abort the ongoing DMA */
  3300.           dmaxferstatus = HAL_DMA_Abort_IT(hi2c->hdmarx);
  3301.  
  3302.           /* Prevent unused argument(s) compilation and MISRA warning */
  3303.           UNUSED(dmaxferstatus);
  3304.  
  3305.           /* Set the unused I2C DMA transfer complete callback to NULL */
  3306.           hi2c->hdmarx->XferCpltCallback = NULL;
  3307.  
  3308.           /* Disable Acknowledge */
  3309.           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3310.  
  3311.           hi2c->XferSize = 0U;
  3312.           hi2c->XferCount = 0U;
  3313.  
  3314.           /* Disable I2C peripheral to prevent dummy data in buffer */
  3315.           __HAL_I2C_DISABLE(hi2c);
  3316.  
  3317.           return HAL_ERROR;
  3318.         }
  3319.  
  3320.         if (hi2c->XferSize == 1U)
  3321.         {
  3322.           /* Disable Acknowledge */
  3323.           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3324.         }
  3325.         else
  3326.         {
  3327.           /* Enable Last DMA bit */
  3328.           SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
  3329.         }
  3330.  
  3331.         /* Clear ADDR flag */
  3332.         __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3333.  
  3334.         /* Process Unlocked */
  3335.         __HAL_UNLOCK(hi2c);
  3336.  
  3337.         /* Note : The I2C interrupts must be enabled after unlocking current process
  3338.         to avoid the risk of I2C interrupt handle execution before current
  3339.         process unlock */
  3340.         /* Enable ERR interrupt */
  3341.         __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  3342.  
  3343.         /* Enable DMA Request */
  3344.         hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  3345.       }
  3346.       else
  3347.       {
  3348.         /* Update I2C state */
  3349.         hi2c->State     = HAL_I2C_STATE_READY;
  3350.         hi2c->Mode      = HAL_I2C_MODE_NONE;
  3351.  
  3352.         /* Update I2C error code */
  3353.         hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  3354.  
  3355.         /* Process Unlocked */
  3356.         __HAL_UNLOCK(hi2c);
  3357.  
  3358.         return HAL_ERROR;
  3359.       }
  3360.     }
  3361.     else
  3362.     {
  3363.       /* Send Slave Address and Memory Address */
  3364.       if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  3365.       {
  3366.         return HAL_ERROR;
  3367.       }
  3368.  
  3369.       /* Clear ADDR flag */
  3370.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3371.  
  3372.       /* Generate Stop */
  3373.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  3374.  
  3375.       hi2c->State = HAL_I2C_STATE_READY;
  3376.  
  3377.       /* Process Unlocked */
  3378.       __HAL_UNLOCK(hi2c);
  3379.     }
  3380.  
  3381.     return HAL_OK;
  3382.   }
  3383.   else
  3384.   {
  3385.     return HAL_BUSY;
  3386.   }
  3387. }
  3388.  
  3389. /**
  3390.   * @brief  Checks if target device is ready for communication.
  3391.   * @note   This function is used with Memory devices
  3392.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3393.   *                the configuration information for the specified I2C.
  3394.   * @param  DevAddress Target device address: The device 7 bits address value
  3395.   *         in datasheet must be shifted to the left before calling the interface
  3396.   * @param  Trials Number of trials
  3397.   * @param  Timeout Timeout duration
  3398.   * @retval HAL status
  3399.   */
  3400. HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
  3401. {
  3402.   /* Get tick */
  3403.   uint32_t tickstart = HAL_GetTick();
  3404.   uint32_t I2C_Trials = 1U;
  3405.   FlagStatus tmp1;
  3406.   FlagStatus tmp2;
  3407.  
  3408.   if (hi2c->State == HAL_I2C_STATE_READY)
  3409.   {
  3410.     /* Wait until BUSY flag is reset */
  3411.     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  3412.     {
  3413.       return HAL_BUSY;
  3414.     }
  3415.  
  3416.     /* Process Locked */
  3417.     __HAL_LOCK(hi2c);
  3418.  
  3419.     /* Check if the I2C is already enabled */
  3420.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  3421.     {
  3422.       /* Enable I2C peripheral */
  3423.       __HAL_I2C_ENABLE(hi2c);
  3424.     }
  3425.  
  3426.     /* Disable Pos */
  3427.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  3428.  
  3429.     hi2c->State = HAL_I2C_STATE_BUSY;
  3430.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  3431.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3432.  
  3433.     do
  3434.     {
  3435.       /* Generate Start */
  3436.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  3437.  
  3438.       /* Wait until SB flag is set */
  3439.       if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK)
  3440.       {
  3441.         if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
  3442.         {
  3443.           hi2c->ErrorCode = HAL_I2C_WRONG_START;
  3444.         }
  3445.         return HAL_TIMEOUT;
  3446.       }
  3447.  
  3448.       /* Send slave address */
  3449.       hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  3450.  
  3451.       /* Wait until ADDR or AF flag are set */
  3452.       /* Get tick */
  3453.       tickstart = HAL_GetTick();
  3454.  
  3455.       tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
  3456.       tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
  3457.       while ((hi2c->State != HAL_I2C_STATE_TIMEOUT) && (tmp1 == RESET) && (tmp2 == RESET))
  3458.       {
  3459.         if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
  3460.         {
  3461.           hi2c->State = HAL_I2C_STATE_TIMEOUT;
  3462.         }
  3463.         tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
  3464.         tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
  3465.       }
  3466.  
  3467.       hi2c->State = HAL_I2C_STATE_READY;
  3468.  
  3469.       /* Check if the ADDR flag has been set */
  3470.       if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
  3471.       {
  3472.         /* Generate Stop */
  3473.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  3474.  
  3475.         /* Clear ADDR Flag */
  3476.         __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3477.  
  3478.         /* Wait until BUSY flag is reset */
  3479.         if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  3480.         {
  3481.           return HAL_ERROR;
  3482.         }
  3483.  
  3484.         hi2c->State = HAL_I2C_STATE_READY;
  3485.  
  3486.         /* Process Unlocked */
  3487.         __HAL_UNLOCK(hi2c);
  3488.  
  3489.         return HAL_OK;
  3490.       }
  3491.       else
  3492.       {
  3493.         /* Generate Stop */
  3494.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  3495.  
  3496.         /* Clear AF Flag */
  3497.         __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3498.  
  3499.         /* Wait until BUSY flag is reset */
  3500.         if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  3501.         {
  3502.           return HAL_ERROR;
  3503.         }
  3504.       }
  3505.  
  3506.       /* Increment Trials */
  3507.       I2C_Trials++;
  3508.     }
  3509.     while (I2C_Trials < Trials);
  3510.  
  3511.     hi2c->State = HAL_I2C_STATE_READY;
  3512.  
  3513.     /* Process Unlocked */
  3514.     __HAL_UNLOCK(hi2c);
  3515.  
  3516.     return HAL_ERROR;
  3517.   }
  3518.   else
  3519.   {
  3520.     return HAL_BUSY;
  3521.   }
  3522. }
  3523.  
  3524. /**
  3525.   * @brief  Sequential transmit in master I2C mode an amount of data in non-blocking mode with Interrupt.
  3526.   * @note   This interface allow to manage repeated start condition when a direction change during transfer
  3527.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3528.   *         the configuration information for the specified I2C.
  3529.   * @param  DevAddress Target device address: The device 7 bits address value
  3530.   *         in datasheet must be shifted to the left before calling the interface
  3531.   * @param  pData Pointer to data buffer
  3532.   * @param  Size Amount of data to be sent
  3533.   * @param  XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  3534.   * @retval HAL status
  3535.   */
  3536. HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  3537. {
  3538.   __IO uint32_t Prev_State = 0x00U;
  3539.   __IO uint32_t count      = 0x00U;
  3540.  
  3541.   /* Check the parameters */
  3542.   assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  3543.  
  3544.   if (hi2c->State == HAL_I2C_STATE_READY)
  3545.   {
  3546.     /* Check Busy Flag only if FIRST call of Master interface */
  3547.     if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  3548.     {
  3549.       /* Wait until BUSY flag is reset */
  3550.       count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  3551.       do
  3552.       {
  3553.         count--;
  3554.         if (count == 0U)
  3555.         {
  3556.           hi2c->PreviousState       = I2C_STATE_NONE;
  3557.           hi2c->State               = HAL_I2C_STATE_READY;
  3558.           hi2c->Mode                = HAL_I2C_MODE_NONE;
  3559.           hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  3560.  
  3561.           /* Process Unlocked */
  3562.           __HAL_UNLOCK(hi2c);
  3563.  
  3564.           return HAL_ERROR;
  3565.         }
  3566.       }
  3567.       while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  3568.     }
  3569.  
  3570.     /* Process Locked */
  3571.     __HAL_LOCK(hi2c);
  3572.  
  3573.     /* Check if the I2C is already enabled */
  3574.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  3575.     {
  3576.       /* Enable I2C peripheral */
  3577.       __HAL_I2C_ENABLE(hi2c);
  3578.     }
  3579.  
  3580.     /* Disable Pos */
  3581.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  3582.  
  3583.     hi2c->State     = HAL_I2C_STATE_BUSY_TX;
  3584.     hi2c->Mode      = HAL_I2C_MODE_MASTER;
  3585.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  3586.  
  3587.     /* Prepare transfer parameters */
  3588.     hi2c->pBuffPtr    = pData;
  3589.     hi2c->XferCount   = Size;
  3590.     hi2c->XferSize    = hi2c->XferCount;
  3591.     hi2c->XferOptions = XferOptions;
  3592.     hi2c->Devaddress  = DevAddress;
  3593.  
  3594.     Prev_State = hi2c->PreviousState;
  3595.  
  3596.     /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
  3597.     /* Mean Previous state is same as current state */
  3598.     if ((Prev_State != I2C_STATE_MASTER_BUSY_TX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
  3599.     {
  3600.       /* Generate Start */
  3601.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  3602.     }
  3603.  
  3604.     /* Process Unlocked */
  3605.     __HAL_UNLOCK(hi2c);
  3606.  
  3607.     /* Note : The I2C interrupts must be enabled after unlocking current process
  3608.     to avoid the risk of I2C interrupt handle execution before current
  3609.     process unlock */
  3610.  
  3611.     /* Enable EVT, BUF and ERR interrupt */
  3612.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3613.  
  3614.     return HAL_OK;
  3615.   }
  3616.   else
  3617.   {
  3618.     return HAL_BUSY;
  3619.   }
  3620. }
  3621.  
  3622. /**
  3623.   * @brief  Sequential transmit in master I2C mode an amount of data in non-blocking mode with DMA.
  3624.   * @note   This interface allow to manage repeated start condition when a direction change during transfer
  3625.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3626.   *         the configuration information for the specified I2C.
  3627.   * @param  DevAddress Target device address: The device 7 bits address value
  3628.   *         in datasheet must be shifted to the left before calling the interface
  3629.   * @param  pData Pointer to data buffer
  3630.   * @param  Size Amount of data to be sent
  3631.   * @param  XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  3632.   * @retval HAL status
  3633.   */
  3634. HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  3635. {
  3636.   __IO uint32_t Prev_State = 0x00U;
  3637.   __IO uint32_t count      = 0x00U;
  3638.   HAL_StatusTypeDef dmaxferstatus;
  3639.  
  3640.   /* Check the parameters */
  3641.   assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  3642.  
  3643.   if (hi2c->State == HAL_I2C_STATE_READY)
  3644.   {
  3645.     /* Check Busy Flag only if FIRST call of Master interface */
  3646.     if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  3647.     {
  3648.       /* Wait until BUSY flag is reset */
  3649.       count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  3650.       do
  3651.       {
  3652.         count--;
  3653.         if (count == 0U)
  3654.         {
  3655.           hi2c->PreviousState       = I2C_STATE_NONE;
  3656.           hi2c->State               = HAL_I2C_STATE_READY;
  3657.           hi2c->Mode                = HAL_I2C_MODE_NONE;
  3658.           hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  3659.  
  3660.           /* Process Unlocked */
  3661.           __HAL_UNLOCK(hi2c);
  3662.  
  3663.           return HAL_ERROR;
  3664.         }
  3665.       }
  3666.       while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  3667.     }
  3668.  
  3669.     /* Process Locked */
  3670.     __HAL_LOCK(hi2c);
  3671.  
  3672.     /* Check if the I2C is already enabled */
  3673.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  3674.     {
  3675.       /* Enable I2C peripheral */
  3676.       __HAL_I2C_ENABLE(hi2c);
  3677.     }
  3678.  
  3679.     /* Disable Pos */
  3680.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  3681.  
  3682.     hi2c->State     = HAL_I2C_STATE_BUSY_TX;
  3683.     hi2c->Mode      = HAL_I2C_MODE_MASTER;
  3684.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  3685.  
  3686.     /* Prepare transfer parameters */
  3687.     hi2c->pBuffPtr    = pData;
  3688.     hi2c->XferCount   = Size;
  3689.     hi2c->XferSize    = hi2c->XferCount;
  3690.     hi2c->XferOptions = XferOptions;
  3691.     hi2c->Devaddress  = DevAddress;
  3692.  
  3693.     Prev_State = hi2c->PreviousState;
  3694.  
  3695.     if (hi2c->XferSize > 0U)
  3696.     {
  3697.       if (hi2c->hdmatx != NULL)
  3698.       {
  3699.         /* Set the I2C DMA transfer complete callback */
  3700.         hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  3701.  
  3702.         /* Set the DMA error callback */
  3703.         hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  3704.  
  3705.         /* Set the unused DMA callbacks to NULL */
  3706.         hi2c->hdmatx->XferHalfCpltCallback = NULL;
  3707.         hi2c->hdmatx->XferAbortCallback = NULL;
  3708.  
  3709.         /* Enable the DMA channel */
  3710.         dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  3711.       }
  3712.       else
  3713.       {
  3714.         /* Update I2C state */
  3715.         hi2c->State     = HAL_I2C_STATE_READY;
  3716.         hi2c->Mode      = HAL_I2C_MODE_NONE;
  3717.  
  3718.         /* Update I2C error code */
  3719.         hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
  3720.  
  3721.         /* Process Unlocked */
  3722.         __HAL_UNLOCK(hi2c);
  3723.  
  3724.         return HAL_ERROR;
  3725.       }
  3726.  
  3727.       if (dmaxferstatus == HAL_OK)
  3728.       {
  3729.         /* Enable Acknowledge */
  3730.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3731.  
  3732.         /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
  3733.         /* Mean Previous state is same as current state */
  3734.         if ((Prev_State != I2C_STATE_MASTER_BUSY_TX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
  3735.         {
  3736.           /* Generate Start */
  3737.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  3738.         }
  3739.  
  3740.         /* Process Unlocked */
  3741.         __HAL_UNLOCK(hi2c);
  3742.  
  3743.         /* Note : The I2C interrupts must be enabled after unlocking current process
  3744.         to avoid the risk of I2C interrupt handle execution before current
  3745.         process unlock */
  3746.  
  3747.         /* If XferOptions is not associated to a new frame, mean no start bit is request, enable directly the DMA request */
  3748.         /* In other cases, DMA request is enabled after Slave address treatment in IRQHandler */
  3749.         if ((XferOptions == I2C_NEXT_FRAME) || (XferOptions == I2C_LAST_FRAME) || (XferOptions == I2C_LAST_FRAME_NO_STOP))
  3750.         {
  3751.           /* Enable DMA Request */
  3752.           SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  3753.         }
  3754.  
  3755.         /* Enable EVT and ERR interrupt */
  3756.         __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  3757.       }
  3758.       else
  3759.       {
  3760.         /* Update I2C state */
  3761.         hi2c->State     = HAL_I2C_STATE_READY;
  3762.         hi2c->Mode      = HAL_I2C_MODE_NONE;
  3763.  
  3764.         /* Update I2C error code */
  3765.         hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  3766.  
  3767.         /* Process Unlocked */
  3768.         __HAL_UNLOCK(hi2c);
  3769.  
  3770.         return HAL_ERROR;
  3771.       }
  3772.     }
  3773.     else
  3774.     {
  3775.       /* Enable Acknowledge */
  3776.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3777.  
  3778.       /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
  3779.       /* Mean Previous state is same as current state */
  3780.       if ((Prev_State != I2C_STATE_MASTER_BUSY_TX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
  3781.       {
  3782.         /* Generate Start */
  3783.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  3784.       }
  3785.  
  3786.       /* Process Unlocked */
  3787.       __HAL_UNLOCK(hi2c);
  3788.  
  3789.       /* Note : The I2C interrupts must be enabled after unlocking current process
  3790.       to avoid the risk of I2C interrupt handle execution before current
  3791.       process unlock */
  3792.  
  3793.       /* Enable EVT, BUF and ERR interrupt */
  3794.       __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3795.     }
  3796.  
  3797.     return HAL_OK;
  3798.   }
  3799.   else
  3800.   {
  3801.     return HAL_BUSY;
  3802.   }
  3803. }
  3804.  
  3805. /**
  3806.   * @brief  Sequential receive in master I2C mode an amount of data in non-blocking mode with Interrupt
  3807.   * @note   This interface allow to manage repeated start condition when a direction change during transfer
  3808.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3809.   *         the configuration information for the specified I2C.
  3810.   * @param  DevAddress Target device address: The device 7 bits address value
  3811.   *         in datasheet must be shifted to the left before calling the interface
  3812.   * @param  pData Pointer to data buffer
  3813.   * @param  Size Amount of data to be sent
  3814.   * @param  XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  3815.   * @retval HAL status
  3816.   */
  3817. HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  3818. {
  3819.   __IO uint32_t Prev_State = 0x00U;
  3820.   __IO uint32_t count = 0U;
  3821.   uint32_t enableIT = (I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3822.  
  3823.   /* Check the parameters */
  3824.   assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  3825.  
  3826.   if (hi2c->State == HAL_I2C_STATE_READY)
  3827.   {
  3828.     /* Check Busy Flag only if FIRST call of Master interface */
  3829.     if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  3830.     {
  3831.       /* Wait until BUSY flag is reset */
  3832.       count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  3833.       do
  3834.       {
  3835.         count--;
  3836.         if (count == 0U)
  3837.         {
  3838.           hi2c->PreviousState       = I2C_STATE_NONE;
  3839.           hi2c->State               = HAL_I2C_STATE_READY;
  3840.           hi2c->Mode                = HAL_I2C_MODE_NONE;
  3841.           hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  3842.  
  3843.           /* Process Unlocked */
  3844.           __HAL_UNLOCK(hi2c);
  3845.  
  3846.           return HAL_ERROR;
  3847.         }
  3848.       }
  3849.       while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  3850.     }
  3851.  
  3852.     /* Process Locked */
  3853.     __HAL_LOCK(hi2c);
  3854.  
  3855.     /* Check if the I2C is already enabled */
  3856.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  3857.     {
  3858.       /* Enable I2C peripheral */
  3859.       __HAL_I2C_ENABLE(hi2c);
  3860.     }
  3861.  
  3862.     /* Disable Pos */
  3863.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  3864.  
  3865.     hi2c->State     = HAL_I2C_STATE_BUSY_RX;
  3866.     hi2c->Mode      = HAL_I2C_MODE_MASTER;
  3867.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  3868.  
  3869.     /* Prepare transfer parameters */
  3870.     hi2c->pBuffPtr    = pData;
  3871.     hi2c->XferCount   = Size;
  3872.     hi2c->XferSize    = hi2c->XferCount;
  3873.     hi2c->XferOptions = XferOptions;
  3874.     hi2c->Devaddress  = DevAddress;
  3875.  
  3876.     Prev_State = hi2c->PreviousState;
  3877.  
  3878.     if ((hi2c->XferCount == 2U) && ((XferOptions == I2C_LAST_FRAME) || (XferOptions == I2C_LAST_FRAME_NO_STOP)))
  3879.     {
  3880.       if (Prev_State == I2C_STATE_MASTER_BUSY_RX)
  3881.       {
  3882.         /* Disable Acknowledge */
  3883.         CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3884.  
  3885.         /* Enable Pos */
  3886.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  3887.  
  3888.         /* Remove Enabling of IT_BUF, mean RXNE treatment, treat the 2 bytes through BTF */
  3889.         enableIT &= ~I2C_IT_BUF;
  3890.       }
  3891.       else
  3892.       {
  3893.         /* Enable Acknowledge */
  3894.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3895.       }
  3896.     }
  3897.     else
  3898.     {
  3899.       /* Enable Acknowledge */
  3900.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3901.     }
  3902.  
  3903.     /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
  3904.     /* Mean Previous state is same as current state */
  3905.     if ((Prev_State != I2C_STATE_MASTER_BUSY_RX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
  3906.     {
  3907.       /* Generate Start */
  3908.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  3909.     }
  3910.  
  3911.     /* Process Unlocked */
  3912.     __HAL_UNLOCK(hi2c);
  3913.  
  3914.     /* Note : The I2C interrupts must be enabled after unlocking current process
  3915.     to avoid the risk of I2C interrupt handle execution before current
  3916.     process unlock */
  3917.  
  3918.     /* Enable interrupts */
  3919.     __HAL_I2C_ENABLE_IT(hi2c, enableIT);
  3920.  
  3921.     return HAL_OK;
  3922.   }
  3923.   else
  3924.   {
  3925.     return HAL_BUSY;
  3926.   }
  3927. }
  3928.  
  3929. /**
  3930.   * @brief  Sequential receive in master mode an amount of data in non-blocking mode with DMA
  3931.   * @note   This interface allow to manage repeated start condition when a direction change during transfer
  3932.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3933.   *         the configuration information for the specified I2C.
  3934.   * @param  DevAddress Target device address: The device 7 bits address value
  3935.   *         in datasheet must be shifted to the left before calling the interface
  3936.   * @param  pData Pointer to data buffer
  3937.   * @param  Size Amount of data to be sent
  3938.   * @param  XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  3939.   * @retval HAL status
  3940.   */
  3941. HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  3942. {
  3943.   __IO uint32_t Prev_State = 0x00U;
  3944.   __IO uint32_t count = 0U;
  3945.   uint32_t enableIT = (I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3946.   HAL_StatusTypeDef dmaxferstatus;
  3947.  
  3948.   /* Check the parameters */
  3949.   assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  3950.  
  3951.   if (hi2c->State == HAL_I2C_STATE_READY)
  3952.   {
  3953.     /* Check Busy Flag only if FIRST call of Master interface */
  3954.     if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  3955.     {
  3956.       /* Wait until BUSY flag is reset */
  3957.       count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  3958.       do
  3959.       {
  3960.         count--;
  3961.         if (count == 0U)
  3962.         {
  3963.           hi2c->PreviousState       = I2C_STATE_NONE;
  3964.           hi2c->State               = HAL_I2C_STATE_READY;
  3965.           hi2c->Mode                = HAL_I2C_MODE_NONE;
  3966.           hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  3967.  
  3968.           /* Process Unlocked */
  3969.           __HAL_UNLOCK(hi2c);
  3970.  
  3971.           return HAL_ERROR;
  3972.         }
  3973.       }
  3974.       while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  3975.     }
  3976.  
  3977.     /* Process Locked */
  3978.     __HAL_LOCK(hi2c);
  3979.  
  3980.     /* Check if the I2C is already enabled */
  3981.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  3982.     {
  3983.       /* Enable I2C peripheral */
  3984.       __HAL_I2C_ENABLE(hi2c);
  3985.     }
  3986.  
  3987.     /* Disable Pos */
  3988.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  3989.  
  3990.     /* Clear Last DMA bit */
  3991.     CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
  3992.  
  3993.     hi2c->State     = HAL_I2C_STATE_BUSY_RX;
  3994.     hi2c->Mode      = HAL_I2C_MODE_MASTER;
  3995.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  3996.  
  3997.     /* Prepare transfer parameters */
  3998.     hi2c->pBuffPtr    = pData;
  3999.     hi2c->XferCount   = Size;
  4000.     hi2c->XferSize    = hi2c->XferCount;
  4001.     hi2c->XferOptions = XferOptions;
  4002.     hi2c->Devaddress  = DevAddress;
  4003.  
  4004.     Prev_State = hi2c->PreviousState;
  4005.  
  4006.     if (hi2c->XferSize > 0U)
  4007.     {
  4008.       if ((hi2c->XferCount == 2U) && ((XferOptions == I2C_LAST_FRAME) || (XferOptions == I2C_LAST_FRAME_NO_STOP)))
  4009.       {
  4010.         if (Prev_State == I2C_STATE_MASTER_BUSY_RX)
  4011.         {
  4012.           /* Disable Acknowledge */
  4013.           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  4014.  
  4015.           /* Enable Pos */
  4016.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  4017.  
  4018.           /* Enable Last DMA bit */
  4019.           SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
  4020.         }
  4021.         else
  4022.         {
  4023.           /* Enable Acknowledge */
  4024.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  4025.         }
  4026.       }
  4027.       else
  4028.       {
  4029.         /* Enable Acknowledge */
  4030.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  4031.  
  4032.         if ((XferOptions == I2C_LAST_FRAME) || (XferOptions == I2C_OTHER_AND_LAST_FRAME) || (XferOptions == I2C_LAST_FRAME_NO_STOP))
  4033.         {
  4034.           /* Enable Last DMA bit */
  4035.           SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
  4036.         }
  4037.       }
  4038.       if (hi2c->hdmarx != NULL)
  4039.       {
  4040.         /* Set the I2C DMA transfer complete callback */
  4041.         hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  4042.  
  4043.         /* Set the DMA error callback */
  4044.         hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  4045.  
  4046.         /* Set the unused DMA callbacks to NULL */
  4047.         hi2c->hdmarx->XferHalfCpltCallback = NULL;
  4048.         hi2c->hdmarx->XferAbortCallback = NULL;
  4049.  
  4050.         /* Enable the DMA channel */
  4051.         dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  4052.       }
  4053.       else
  4054.       {
  4055.         /* Update I2C state */
  4056.         hi2c->State     = HAL_I2C_STATE_READY;
  4057.         hi2c->Mode      = HAL_I2C_MODE_NONE;
  4058.  
  4059.         /* Update I2C error code */
  4060.         hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
  4061.  
  4062.         /* Process Unlocked */
  4063.         __HAL_UNLOCK(hi2c);
  4064.  
  4065.         return HAL_ERROR;
  4066.       }
  4067.       if (dmaxferstatus == HAL_OK)
  4068.       {
  4069.         /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
  4070.         /* Mean Previous state is same as current state */
  4071.         if ((Prev_State != I2C_STATE_MASTER_BUSY_RX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
  4072.         {
  4073.           /* Generate Start */
  4074.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  4075.  
  4076.           /* Update interrupt for only EVT and ERR */
  4077.           enableIT = (I2C_IT_EVT | I2C_IT_ERR);
  4078.         }
  4079.         else
  4080.         {
  4081.           /* Update interrupt for only ERR */
  4082.           enableIT = I2C_IT_ERR;
  4083.         }
  4084.  
  4085.         /* Process Unlocked */
  4086.         __HAL_UNLOCK(hi2c);
  4087.  
  4088.         /* Note : The I2C interrupts must be enabled after unlocking current process
  4089.         to avoid the risk of I2C interrupt handle execution before current
  4090.         process unlock */
  4091.  
  4092.         /* If XferOptions is not associated to a new frame, mean no start bit is request, enable directly the DMA request */
  4093.         /* In other cases, DMA request is enabled after Slave address treatment in IRQHandler */
  4094.         if ((XferOptions == I2C_NEXT_FRAME) || (XferOptions == I2C_LAST_FRAME) || (XferOptions == I2C_LAST_FRAME_NO_STOP))
  4095.         {
  4096.           /* Enable DMA Request */
  4097.           SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  4098.         }
  4099.  
  4100.         /* Enable EVT and ERR interrupt */
  4101.         __HAL_I2C_ENABLE_IT(hi2c, enableIT);
  4102.       }
  4103.       else
  4104.       {
  4105.         /* Update I2C state */
  4106.         hi2c->State     = HAL_I2C_STATE_READY;
  4107.         hi2c->Mode      = HAL_I2C_MODE_NONE;
  4108.  
  4109.         /* Update I2C error code */
  4110.         hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  4111.  
  4112.         /* Process Unlocked */
  4113.         __HAL_UNLOCK(hi2c);
  4114.  
  4115.         return HAL_ERROR;
  4116.       }
  4117.     }
  4118.     else
  4119.     {
  4120.       /* Enable Acknowledge */
  4121.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  4122.  
  4123.       /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
  4124.       /* Mean Previous state is same as current state */
  4125.       if ((Prev_State != I2C_STATE_MASTER_BUSY_RX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
  4126.       {
  4127.         /* Generate Start */
  4128.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  4129.       }
  4130.  
  4131.       /* Process Unlocked */
  4132.       __HAL_UNLOCK(hi2c);
  4133.  
  4134.       /* Note : The I2C interrupts must be enabled after unlocking current process
  4135.       to avoid the risk of I2C interrupt handle execution before current
  4136.       process unlock */
  4137.  
  4138.       /* Enable interrupts */
  4139.       __HAL_I2C_ENABLE_IT(hi2c, enableIT);
  4140.     }
  4141.     return HAL_OK;
  4142.   }
  4143.   else
  4144.   {
  4145.     return HAL_BUSY;
  4146.   }
  4147. }
  4148.  
  4149. /**
  4150.   * @brief  Sequential transmit in slave mode an amount of data in non-blocking mode with Interrupt
  4151.   * @note   This interface allow to manage repeated start condition when a direction change during transfer
  4152.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4153.   *         the configuration information for the specified I2C.
  4154.   * @param  pData Pointer to data buffer
  4155.   * @param  Size Amount of data to be sent
  4156.   * @param  XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  4157.   * @retval HAL status
  4158.   */
  4159. HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  4160. {
  4161.   /* Check the parameters */
  4162.   assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  4163.  
  4164.   if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
  4165.   {
  4166.     if ((pData == NULL) || (Size == 0U))
  4167.     {
  4168.       return  HAL_ERROR;
  4169.     }
  4170.  
  4171.     /* Process Locked */
  4172.     __HAL_LOCK(hi2c);
  4173.  
  4174.     /* Check if the I2C is already enabled */
  4175.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  4176.     {
  4177.       /* Enable I2C peripheral */
  4178.       __HAL_I2C_ENABLE(hi2c);
  4179.     }
  4180.  
  4181.     /* Disable Pos */
  4182.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  4183.  
  4184.     hi2c->State     = HAL_I2C_STATE_BUSY_TX_LISTEN;
  4185.     hi2c->Mode      = HAL_I2C_MODE_SLAVE;
  4186.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  4187.  
  4188.     /* Prepare transfer parameters */
  4189.     hi2c->pBuffPtr    = pData;
  4190.     hi2c->XferCount   = Size;
  4191.     hi2c->XferSize    = hi2c->XferCount;
  4192.     hi2c->XferOptions = XferOptions;
  4193.  
  4194.     /* Clear ADDR flag */
  4195.     __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4196.  
  4197.     /* Process Unlocked */
  4198.     __HAL_UNLOCK(hi2c);
  4199.  
  4200.     /* Note : The I2C interrupts must be enabled after unlocking current process
  4201.               to avoid the risk of I2C interrupt handle execution before current
  4202.               process unlock */
  4203.  
  4204.     /* Enable EVT, BUF and ERR interrupt */
  4205.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  4206.  
  4207.     return HAL_OK;
  4208.   }
  4209.   else
  4210.   {
  4211.     return HAL_BUSY;
  4212.   }
  4213. }
  4214.  
  4215. /**
  4216.   * @brief  Sequential transmit in slave mode an amount of data in non-blocking mode with DMA
  4217.   * @note   This interface allow to manage repeated start condition when a direction change during transfer
  4218.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4219.   *         the configuration information for the specified I2C.
  4220.   * @param  pData Pointer to data buffer
  4221.   * @param  Size Amount of data to be sent
  4222.   * @param  XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  4223.   * @retval HAL status
  4224.   */
  4225. HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  4226. {
  4227.   HAL_StatusTypeDef dmaxferstatus;
  4228.  
  4229.   /* Check the parameters */
  4230.   assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  4231.  
  4232.   if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
  4233.   {
  4234.     if ((pData == NULL) || (Size == 0U))
  4235.     {
  4236.       return  HAL_ERROR;
  4237.     }
  4238.  
  4239.     /* Process Locked */
  4240.     __HAL_LOCK(hi2c);
  4241.  
  4242.     /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
  4243.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  4244.  
  4245.     /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */
  4246.     /* and then toggle the HAL slave RX state to TX state */
  4247.     if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)
  4248.     {
  4249.       if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  4250.       {
  4251.         /* Abort DMA Xfer if any */
  4252.         if (hi2c->hdmarx != NULL)
  4253.         {
  4254.           CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  4255.  
  4256.           /* Set the I2C DMA Abort callback :
  4257.            will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  4258.           hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
  4259.  
  4260.           /* Abort DMA RX */
  4261.           if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
  4262.           {
  4263.             /* Call Directly XferAbortCallback function in case of error */
  4264.             hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
  4265.           }
  4266.         }
  4267.       }
  4268.     }
  4269.     else if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)
  4270.     {
  4271.       if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  4272.       {
  4273.         CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  4274.  
  4275.         /* Abort DMA Xfer if any */
  4276.         if (hi2c->hdmatx != NULL)
  4277.         {
  4278.           /* Set the I2C DMA Abort callback :
  4279.            will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  4280.           hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
  4281.  
  4282.           /* Abort DMA TX */
  4283.           if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
  4284.           {
  4285.             /* Call Directly XferAbortCallback function in case of error */
  4286.             hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
  4287.           }
  4288.         }
  4289.       }
  4290.     }
  4291.     else
  4292.     {
  4293.       /* Nothing to do */
  4294.     }
  4295.  
  4296.     /* Check if the I2C is already enabled */
  4297.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  4298.     {
  4299.       /* Enable I2C peripheral */
  4300.       __HAL_I2C_ENABLE(hi2c);
  4301.     }
  4302.  
  4303.     /* Disable Pos */
  4304.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  4305.  
  4306.     hi2c->State     = HAL_I2C_STATE_BUSY_TX_LISTEN;
  4307.     hi2c->Mode      = HAL_I2C_MODE_SLAVE;
  4308.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  4309.  
  4310.     /* Prepare transfer parameters */
  4311.     hi2c->pBuffPtr    = pData;
  4312.     hi2c->XferCount   = Size;
  4313.     hi2c->XferSize    = hi2c->XferCount;
  4314.     hi2c->XferOptions = XferOptions;
  4315.  
  4316.     if (hi2c->hdmatx != NULL)
  4317.     {
  4318.       /* Set the I2C DMA transfer complete callback */
  4319.       hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  4320.  
  4321.       /* Set the DMA error callback */
  4322.       hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  4323.  
  4324.       /* Set the unused DMA callbacks to NULL */
  4325.       hi2c->hdmatx->XferHalfCpltCallback = NULL;
  4326.       hi2c->hdmatx->XferAbortCallback = NULL;
  4327.  
  4328.       /* Enable the DMA channel */
  4329.       dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  4330.     }
  4331.     else
  4332.     {
  4333.       /* Update I2C state */
  4334.       hi2c->State     = HAL_I2C_STATE_LISTEN;
  4335.       hi2c->Mode      = HAL_I2C_MODE_NONE;
  4336.  
  4337.       /* Update I2C error code */
  4338.       hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
  4339.  
  4340.       /* Process Unlocked */
  4341.       __HAL_UNLOCK(hi2c);
  4342.  
  4343.       return HAL_ERROR;
  4344.     }
  4345.  
  4346.     if (dmaxferstatus == HAL_OK)
  4347.     {
  4348.       /* Enable Address Acknowledge */
  4349.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  4350.  
  4351.       /* Clear ADDR flag */
  4352.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4353.  
  4354.       /* Process Unlocked */
  4355.       __HAL_UNLOCK(hi2c);
  4356.  
  4357.       /* Note : The I2C interrupts must be enabled after unlocking current process
  4358.       to avoid the risk of I2C interrupt handle execution before current
  4359.       process unlock */
  4360.       /* Enable EVT and ERR interrupt */
  4361.       __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  4362.  
  4363.       /* Enable DMA Request */
  4364.       hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  4365.  
  4366.       return HAL_OK;
  4367.     }
  4368.     else
  4369.     {
  4370.       /* Update I2C state */
  4371.       hi2c->State     = HAL_I2C_STATE_READY;
  4372.       hi2c->Mode      = HAL_I2C_MODE_NONE;
  4373.  
  4374.       /* Update I2C error code */
  4375.       hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  4376.  
  4377.       /* Process Unlocked */
  4378.       __HAL_UNLOCK(hi2c);
  4379.  
  4380.       return HAL_ERROR;
  4381.     }
  4382.   }
  4383.   else
  4384.   {
  4385.     return HAL_BUSY;
  4386.   }
  4387. }
  4388.  
  4389. /**
  4390.   * @brief  Sequential receive in slave mode an amount of data in non-blocking mode with Interrupt
  4391.   * @note   This interface allow to manage repeated start condition when a direction change during transfer
  4392.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4393.   *         the configuration information for the specified I2C.
  4394.   * @param  pData Pointer to data buffer
  4395.   * @param  Size Amount of data to be sent
  4396.   * @param  XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  4397.   * @retval HAL status
  4398.   */
  4399. HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  4400. {
  4401.   /* Check the parameters */
  4402.   assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  4403.  
  4404.   if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
  4405.   {
  4406.     if ((pData == NULL) || (Size == 0U))
  4407.     {
  4408.       return  HAL_ERROR;
  4409.     }
  4410.  
  4411.     /* Process Locked */
  4412.     __HAL_LOCK(hi2c);
  4413.  
  4414.     /* Check if the I2C is already enabled */
  4415.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  4416.     {
  4417.       /* Enable I2C peripheral */
  4418.       __HAL_I2C_ENABLE(hi2c);
  4419.     }
  4420.  
  4421.     /* Disable Pos */
  4422.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  4423.  
  4424.     hi2c->State     = HAL_I2C_STATE_BUSY_RX_LISTEN;
  4425.     hi2c->Mode      = HAL_I2C_MODE_SLAVE;
  4426.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  4427.  
  4428.     /* Prepare transfer parameters */
  4429.     hi2c->pBuffPtr    = pData;
  4430.     hi2c->XferCount   = Size;
  4431.     hi2c->XferSize    = hi2c->XferCount;
  4432.     hi2c->XferOptions = XferOptions;
  4433.  
  4434.     /* Clear ADDR flag */
  4435.     __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4436.  
  4437.     /* Process Unlocked */
  4438.     __HAL_UNLOCK(hi2c);
  4439.  
  4440.     /* Note : The I2C interrupts must be enabled after unlocking current process
  4441.               to avoid the risk of I2C interrupt handle execution before current
  4442.               process unlock */
  4443.  
  4444.     /* Enable EVT, BUF and ERR interrupt */
  4445.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  4446.  
  4447.     return HAL_OK;
  4448.   }
  4449.   else
  4450.   {
  4451.     return HAL_BUSY;
  4452.   }
  4453. }
  4454.  
  4455. /**
  4456.   * @brief  Sequential receive in slave mode an amount of data in non-blocking mode with DMA
  4457.   * @note   This interface allow to manage repeated start condition when a direction change during transfer
  4458.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4459.   *         the configuration information for the specified I2C.
  4460.   * @param  pData Pointer to data buffer
  4461.   * @param  Size Amount of data to be sent
  4462.   * @param  XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  4463.   * @retval HAL status
  4464.   */
  4465. HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  4466. {
  4467.   HAL_StatusTypeDef dmaxferstatus;
  4468.  
  4469.   /* Check the parameters */
  4470.   assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  4471.  
  4472.   if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
  4473.   {
  4474.     if ((pData == NULL) || (Size == 0U))
  4475.     {
  4476.       return  HAL_ERROR;
  4477.     }
  4478.  
  4479.     /* Process Locked */
  4480.     __HAL_LOCK(hi2c);
  4481.  
  4482.     /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
  4483.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  4484.  
  4485.     /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */
  4486.     /* and then toggle the HAL slave RX state to TX state */
  4487.     if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)
  4488.     {
  4489.       if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  4490.       {
  4491.         /* Abort DMA Xfer if any */
  4492.         if (hi2c->hdmarx != NULL)
  4493.         {
  4494.           CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  4495.  
  4496.           /* Set the I2C DMA Abort callback :
  4497.            will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  4498.           hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
  4499.  
  4500.           /* Abort DMA RX */
  4501.           if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
  4502.           {
  4503.             /* Call Directly XferAbortCallback function in case of error */
  4504.             hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
  4505.           }
  4506.         }
  4507.       }
  4508.     }
  4509.     else if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)
  4510.     {
  4511.       if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  4512.       {
  4513.         CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  4514.  
  4515.         /* Abort DMA Xfer if any */
  4516.         if (hi2c->hdmatx != NULL)
  4517.         {
  4518.           /* Set the I2C DMA Abort callback :
  4519.            will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  4520.           hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
  4521.  
  4522.           /* Abort DMA TX */
  4523.           if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
  4524.           {
  4525.             /* Call Directly XferAbortCallback function in case of error */
  4526.             hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
  4527.           }
  4528.         }
  4529.       }
  4530.     }
  4531.     else
  4532.     {
  4533.       /* Nothing to do */
  4534.     }
  4535.  
  4536.     /* Check if the I2C is already enabled */
  4537.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  4538.     {
  4539.       /* Enable I2C peripheral */
  4540.       __HAL_I2C_ENABLE(hi2c);
  4541.     }
  4542.  
  4543.     /* Disable Pos */
  4544.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  4545.  
  4546.     hi2c->State     = HAL_I2C_STATE_BUSY_RX_LISTEN;
  4547.     hi2c->Mode      = HAL_I2C_MODE_SLAVE;
  4548.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  4549.  
  4550.     /* Prepare transfer parameters */
  4551.     hi2c->pBuffPtr    = pData;
  4552.     hi2c->XferCount   = Size;
  4553.     hi2c->XferSize    = hi2c->XferCount;
  4554.     hi2c->XferOptions = XferOptions;
  4555.  
  4556.     if (hi2c->hdmarx != NULL)
  4557.     {
  4558.       /* Set the I2C DMA transfer complete callback */
  4559.       hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  4560.  
  4561.       /* Set the DMA error callback */
  4562.       hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  4563.  
  4564.       /* Set the unused DMA callbacks to NULL */
  4565.       hi2c->hdmarx->XferHalfCpltCallback = NULL;
  4566.       hi2c->hdmarx->XferAbortCallback = NULL;
  4567.  
  4568.       /* Enable the DMA channel */
  4569.       dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  4570.     }
  4571.     else
  4572.     {
  4573.       /* Update I2C state */
  4574.       hi2c->State     = HAL_I2C_STATE_LISTEN;
  4575.       hi2c->Mode      = HAL_I2C_MODE_NONE;
  4576.  
  4577.       /* Update I2C error code */
  4578.       hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
  4579.  
  4580.       /* Process Unlocked */
  4581.       __HAL_UNLOCK(hi2c);
  4582.  
  4583.       return HAL_ERROR;
  4584.     }
  4585.  
  4586.     if (dmaxferstatus == HAL_OK)
  4587.     {
  4588.       /* Enable Address Acknowledge */
  4589.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  4590.  
  4591.       /* Clear ADDR flag */
  4592.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4593.  
  4594.       /* Process Unlocked */
  4595.       __HAL_UNLOCK(hi2c);
  4596.  
  4597.       /* Enable DMA Request */
  4598.       SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  4599.  
  4600.       /* Note : The I2C interrupts must be enabled after unlocking current process
  4601.       to avoid the risk of I2C interrupt handle execution before current
  4602.       process unlock */
  4603.       /* Enable EVT and ERR interrupt */
  4604.       __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  4605.  
  4606.       return HAL_OK;
  4607.     }
  4608.     else
  4609.     {
  4610.       /* Update I2C state */
  4611.       hi2c->State     = HAL_I2C_STATE_READY;
  4612.       hi2c->Mode      = HAL_I2C_MODE_NONE;
  4613.  
  4614.       /* Update I2C error code */
  4615.       hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  4616.  
  4617.       /* Process Unlocked */
  4618.       __HAL_UNLOCK(hi2c);
  4619.  
  4620.       return HAL_ERROR;
  4621.     }
  4622.   }
  4623.   else
  4624.   {
  4625.     return HAL_BUSY;
  4626.   }
  4627. }
  4628.  
  4629. /**
  4630.   * @brief  Enable the Address listen mode with Interrupt.
  4631.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4632.   *                the configuration information for the specified I2C.
  4633.   * @retval HAL status
  4634.   */
  4635. HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
  4636. {
  4637.   if (hi2c->State == HAL_I2C_STATE_READY)
  4638.   {
  4639.     hi2c->State = HAL_I2C_STATE_LISTEN;
  4640.  
  4641.     /* Check if the I2C is already enabled */
  4642.     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  4643.     {
  4644.       /* Enable I2C peripheral */
  4645.       __HAL_I2C_ENABLE(hi2c);
  4646.     }
  4647.  
  4648.     /* Enable Address Acknowledge */
  4649.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  4650.  
  4651.     /* Enable EVT and ERR interrupt */
  4652.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  4653.  
  4654.     return HAL_OK;
  4655.   }
  4656.   else
  4657.   {
  4658.     return HAL_BUSY;
  4659.   }
  4660. }
  4661.  
  4662. /**
  4663.   * @brief  Disable the Address listen mode with Interrupt.
  4664.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4665.   *                the configuration information for the specified I2C.
  4666.   * @retval HAL status
  4667.   */
  4668. HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
  4669. {
  4670.   /* Declaration of tmp to prevent undefined behavior of volatile usage */
  4671.   uint32_t tmp;
  4672.  
  4673.   /* Disable Address listen mode only if a transfer is not ongoing */
  4674.   if (hi2c->State == HAL_I2C_STATE_LISTEN)
  4675.   {
  4676.     tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
  4677.     hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
  4678.     hi2c->State = HAL_I2C_STATE_READY;
  4679.     hi2c->Mode = HAL_I2C_MODE_NONE;
  4680.  
  4681.     /* Disable Address Acknowledge */
  4682.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  4683.  
  4684.     /* Disable EVT and ERR interrupt */
  4685.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  4686.  
  4687.     return HAL_OK;
  4688.   }
  4689.   else
  4690.   {
  4691.     return HAL_BUSY;
  4692.   }
  4693. }
  4694.  
  4695. /**
  4696.   * @brief  Abort a master I2C IT or DMA process communication with Interrupt.
  4697.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4698.   *         the configuration information for the specified I2C.
  4699.   * @param  DevAddress Target device address: The device 7 bits address value
  4700.   *         in datasheet must be shifted to the left before calling the interface
  4701.   * @retval HAL status
  4702.   */
  4703. HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
  4704. {
  4705.   /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  4706.   HAL_I2C_ModeTypeDef CurrentMode   = hi2c->Mode;
  4707.  
  4708.   /* Prevent unused argument(s) compilation warning */
  4709.   UNUSED(DevAddress);
  4710.  
  4711.   /* Abort Master transfer during Receive or Transmit process    */
  4712.   if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET) && (CurrentMode == HAL_I2C_MODE_MASTER))
  4713.   {
  4714.     /* Process Locked */
  4715.     __HAL_LOCK(hi2c);
  4716.  
  4717.     hi2c->PreviousState = I2C_STATE_NONE;
  4718.     hi2c->State = HAL_I2C_STATE_ABORT;
  4719.  
  4720.     /* Disable Acknowledge */
  4721.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  4722.  
  4723.     /* Generate Stop */
  4724.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  4725.  
  4726.     hi2c->XferCount = 0U;
  4727.  
  4728.     /* Disable EVT, BUF and ERR interrupt */
  4729.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  4730.  
  4731.     /* Process Unlocked */
  4732.     __HAL_UNLOCK(hi2c);
  4733.  
  4734.     /* Call the corresponding callback to inform upper layer of End of Transfer */
  4735.     I2C_ITError(hi2c);
  4736.  
  4737.     return HAL_OK;
  4738.   }
  4739.   else
  4740.   {
  4741.     /* Wrong usage of abort function */
  4742.     /* This function should be used only in case of abort monitored by master device */
  4743.     /* Or periphal is not in busy state, mean there is no active sequence to be abort */
  4744.     return HAL_ERROR;
  4745.   }
  4746. }
  4747.  
  4748. /**
  4749.   * @}
  4750.   */
  4751.  
  4752. /** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
  4753.  * @{
  4754.  */
  4755.  
  4756. /**
  4757.   * @brief  This function handles I2C event interrupt request.
  4758.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4759.   *                the configuration information for the specified I2C.
  4760.   * @retval None
  4761.   */
  4762. void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
  4763. {
  4764.   uint32_t sr1itflags;
  4765.   uint32_t sr2itflags               = 0U;
  4766.   uint32_t itsources                = READ_REG(hi2c->Instance->CR2);
  4767.   uint32_t CurrentXferOptions       = hi2c->XferOptions;
  4768.   HAL_I2C_ModeTypeDef CurrentMode   = hi2c->Mode;
  4769.   HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  4770.  
  4771.   /* Master or Memory mode selected */
  4772.   if ((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM))
  4773.   {
  4774.     sr2itflags   = READ_REG(hi2c->Instance->SR2);
  4775.     sr1itflags   = READ_REG(hi2c->Instance->SR1);
  4776.  
  4777.     /* Exit IRQ event until Start Bit detected in case of Other frame requested */
  4778.     if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_SB) == RESET) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(CurrentXferOptions) == 1U))
  4779.     {
  4780.       return;
  4781.     }
  4782.  
  4783.     /* SB Set ----------------------------------------------------------------*/
  4784.     if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_SB) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  4785.     {
  4786.       /* Convert OTHER_xxx XferOptions if any */
  4787.       I2C_ConvertOtherXferOptions(hi2c);
  4788.  
  4789.       I2C_Master_SB(hi2c);
  4790.     }
  4791.     /* ADD10 Set -------------------------------------------------------------*/
  4792.     else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ADD10) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  4793.     {
  4794.       I2C_Master_ADD10(hi2c);
  4795.     }
  4796.     /* ADDR Set --------------------------------------------------------------*/
  4797.     else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ADDR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  4798.     {
  4799.       I2C_Master_ADDR(hi2c);
  4800.     }
  4801.     /* I2C in mode Transmitter -----------------------------------------------*/
  4802.     else if (I2C_CHECK_FLAG(sr2itflags, I2C_FLAG_TRA) != RESET)
  4803.     {
  4804.       /* Do not check buffer and BTF flag if a Xfer DMA is on going */
  4805.       if (READ_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN) != I2C_CR2_DMAEN)
  4806.       {
  4807.         /* TXE set and BTF reset -----------------------------------------------*/
  4808.         if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_TXE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET))
  4809.         {
  4810.           I2C_MasterTransmit_TXE(hi2c);
  4811.         }
  4812.         /* BTF set -------------------------------------------------------------*/
  4813.         else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  4814.         {
  4815.           if (CurrentState == HAL_I2C_STATE_BUSY_TX)
  4816.           {
  4817.             I2C_MasterTransmit_BTF(hi2c);
  4818.           }
  4819.           else /* HAL_I2C_MODE_MEM */
  4820.           {
  4821.             if (CurrentMode == HAL_I2C_MODE_MEM)
  4822.             {
  4823.               I2C_MemoryTransmit_TXE_BTF(hi2c);
  4824.             }
  4825.           }
  4826.         }
  4827.         else
  4828.         {
  4829.           /* Do nothing */
  4830.         }
  4831.       }
  4832.     }
  4833.     /* I2C in mode Receiver --------------------------------------------------*/
  4834.     else
  4835.     {
  4836.       /* Do not check buffer and BTF flag if a Xfer DMA is on going */
  4837.       if (READ_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN) != I2C_CR2_DMAEN)
  4838.       {
  4839.         /* RXNE set and BTF reset -----------------------------------------------*/
  4840.         if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_RXNE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET))
  4841.         {
  4842.           I2C_MasterReceive_RXNE(hi2c);
  4843.         }
  4844.         /* BTF set -------------------------------------------------------------*/
  4845.         else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  4846.         {
  4847.           I2C_MasterReceive_BTF(hi2c);
  4848.         }
  4849.         else
  4850.         {
  4851.           /* Do nothing */
  4852.         }
  4853.       }
  4854.     }
  4855.   }
  4856.   /* Slave mode selected */
  4857.   else
  4858.   {
  4859.     /* If an error is detected, read only SR1 register to prevent */
  4860.     /* a clear of ADDR flags by reading SR2 after reading SR1 in Error treatment */
  4861.     if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  4862.     {
  4863.       sr1itflags   = READ_REG(hi2c->Instance->SR1);
  4864.     }
  4865.     else
  4866.     {
  4867.       sr2itflags   = READ_REG(hi2c->Instance->SR2);
  4868.       sr1itflags   = READ_REG(hi2c->Instance->SR1);
  4869.     }
  4870.  
  4871.     /* ADDR set --------------------------------------------------------------*/
  4872.     if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ADDR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  4873.     {
  4874.       /* Now time to read SR2, this will clear ADDR flag automatically */
  4875.       if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  4876.       {
  4877.         sr2itflags   = READ_REG(hi2c->Instance->SR2);
  4878.       }
  4879.       I2C_Slave_ADDR(hi2c, sr2itflags);
  4880.     }
  4881.     /* STOPF set --------------------------------------------------------------*/
  4882.     else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  4883.     {
  4884.       I2C_Slave_STOPF(hi2c);
  4885.     }
  4886.     /* I2C in mode Transmitter -----------------------------------------------*/
  4887.     else if ((CurrentState == HAL_I2C_STATE_BUSY_TX) || (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
  4888.     {
  4889.       /* TXE set and BTF reset -----------------------------------------------*/
  4890.       if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_TXE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET))
  4891.       {
  4892.         I2C_SlaveTransmit_TXE(hi2c);
  4893.       }
  4894.       /* BTF set -------------------------------------------------------------*/
  4895.       else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  4896.       {
  4897.         I2C_SlaveTransmit_BTF(hi2c);
  4898.       }
  4899.       else
  4900.       {
  4901.         /* Do nothing */
  4902.       }
  4903.     }
  4904.     /* I2C in mode Receiver --------------------------------------------------*/
  4905.     else
  4906.     {
  4907.       /* RXNE set and BTF reset ----------------------------------------------*/
  4908.       if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_RXNE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET))
  4909.       {
  4910.         I2C_SlaveReceive_RXNE(hi2c);
  4911.       }
  4912.       /* BTF set -------------------------------------------------------------*/
  4913.       else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  4914.       {
  4915.         I2C_SlaveReceive_BTF(hi2c);
  4916.       }
  4917.       else
  4918.       {
  4919.         /* Do nothing */
  4920.       }
  4921.     }
  4922.   }
  4923. }
  4924.  
  4925. /**
  4926.   * @brief  This function handles I2C error interrupt request.
  4927.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4928.   *                the configuration information for the specified I2C.
  4929.   * @retval None
  4930.   */
  4931. void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
  4932. {
  4933.   HAL_I2C_ModeTypeDef tmp1;
  4934.   uint32_t tmp2;
  4935.   HAL_I2C_StateTypeDef tmp3;
  4936.   uint32_t tmp4;
  4937.   uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
  4938.   uint32_t itsources  = READ_REG(hi2c->Instance->CR2);
  4939.   uint32_t error      = HAL_I2C_ERROR_NONE;
  4940.   HAL_I2C_ModeTypeDef CurrentMode   = hi2c->Mode;
  4941.  
  4942.   /* I2C Bus error interrupt occurred ----------------------------------------*/
  4943.   if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BERR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
  4944.   {
  4945.     error |= HAL_I2C_ERROR_BERR;
  4946.  
  4947.     /* Clear BERR flag */
  4948.     __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
  4949.   }
  4950.  
  4951.   /* I2C Arbitration Lost error interrupt occurred ---------------------------*/
  4952.   if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ARLO) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
  4953.   {
  4954.     error |= HAL_I2C_ERROR_ARLO;
  4955.  
  4956.     /* Clear ARLO flag */
  4957.     __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
  4958.   }
  4959.  
  4960.   /* I2C Acknowledge failure error interrupt occurred ------------------------*/
  4961.   if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
  4962.   {
  4963.     tmp1 = CurrentMode;
  4964.     tmp2 = hi2c->XferCount;
  4965.     tmp3 = hi2c->State;
  4966.     tmp4 = hi2c->PreviousState;
  4967.     if ((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0U) && \
  4968.         ((tmp3 == HAL_I2C_STATE_BUSY_TX) || (tmp3 == HAL_I2C_STATE_BUSY_TX_LISTEN) || \
  4969.          ((tmp3 == HAL_I2C_STATE_LISTEN) && (tmp4 == I2C_STATE_SLAVE_BUSY_TX))))
  4970.     {
  4971.       I2C_Slave_AF(hi2c);
  4972.     }
  4973.     else
  4974.     {
  4975.       /* Clear AF flag */
  4976.       __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  4977.  
  4978.       error |= HAL_I2C_ERROR_AF;
  4979.  
  4980.       /* Do not generate a STOP in case of Slave receive non acknowledge during transfer (mean not at the end of transfer) */
  4981.       if ((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM))
  4982.       {
  4983.         /* Generate Stop */
  4984.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  4985.       }
  4986.     }
  4987.   }
  4988.  
  4989.   /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
  4990.   if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_OVR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
  4991.   {
  4992.     error |= HAL_I2C_ERROR_OVR;
  4993.     /* Clear OVR flag */
  4994.     __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
  4995.   }
  4996.  
  4997.   /* Call the Error Callback in case of Error detected -----------------------*/
  4998.   if (error != HAL_I2C_ERROR_NONE)
  4999.   {
  5000.     hi2c->ErrorCode |= error;
  5001.     I2C_ITError(hi2c);
  5002.   }
  5003. }
  5004.  
  5005. /**
  5006.   * @brief  Master Tx Transfer completed callback.
  5007.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5008.   *                the configuration information for the specified I2C.
  5009.   * @retval None
  5010.   */
  5011. __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
  5012. {
  5013.   /* Prevent unused argument(s) compilation warning */
  5014.   UNUSED(hi2c);
  5015.  
  5016.   /* NOTE : This function should not be modified, when the callback is needed,
  5017.             the HAL_I2C_MasterTxCpltCallback could be implemented in the user file
  5018.    */
  5019. }
  5020.  
  5021. /**
  5022.   * @brief  Master Rx Transfer completed callback.
  5023.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5024.   *                the configuration information for the specified I2C.
  5025.   * @retval None
  5026.   */
  5027. __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
  5028. {
  5029.   /* Prevent unused argument(s) compilation warning */
  5030.   UNUSED(hi2c);
  5031.  
  5032.   /* NOTE : This function should not be modified, when the callback is needed,
  5033.             the HAL_I2C_MasterRxCpltCallback could be implemented in the user file
  5034.    */
  5035. }
  5036.  
  5037. /** @brief  Slave Tx Transfer completed callback.
  5038.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5039.   *                the configuration information for the specified I2C.
  5040.   * @retval None
  5041.   */
  5042. __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
  5043. {
  5044.   /* Prevent unused argument(s) compilation warning */
  5045.   UNUSED(hi2c);
  5046.  
  5047.   /* NOTE : This function should not be modified, when the callback is needed,
  5048.             the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file
  5049.    */
  5050. }
  5051.  
  5052. /**
  5053.   * @brief  Slave Rx Transfer completed callback.
  5054.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5055.   *                the configuration information for the specified I2C.
  5056.   * @retval None
  5057.   */
  5058. __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
  5059. {
  5060.   /* Prevent unused argument(s) compilation warning */
  5061.   UNUSED(hi2c);
  5062.  
  5063.   /* NOTE : This function should not be modified, when the callback is needed,
  5064.             the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file
  5065.    */
  5066. }
  5067.  
  5068. /**
  5069.   * @brief  Slave Address Match callback.
  5070.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5071.   *                the configuration information for the specified I2C.
  5072.   * @param  TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XferDirection_definition
  5073.   * @param  AddrMatchCode Address Match Code
  5074.   * @retval None
  5075.   */
  5076. __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
  5077. {
  5078.   /* Prevent unused argument(s) compilation warning */
  5079.   UNUSED(hi2c);
  5080.   UNUSED(TransferDirection);
  5081.   UNUSED(AddrMatchCode);
  5082.  
  5083.   /* NOTE : This function should not be modified, when the callback is needed,
  5084.             the HAL_I2C_AddrCallback() could be implemented in the user file
  5085.    */
  5086. }
  5087.  
  5088. /**
  5089.   * @brief  Listen Complete callback.
  5090.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5091.   *                the configuration information for the specified I2C.
  5092.   * @retval None
  5093.   */
  5094. __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
  5095. {
  5096.   /* Prevent unused argument(s) compilation warning */
  5097.   UNUSED(hi2c);
  5098.  
  5099.   /* NOTE : This function should not be modified, when the callback is needed,
  5100.             the HAL_I2C_ListenCpltCallback() could be implemented in the user file
  5101.   */
  5102. }
  5103.  
  5104. /**
  5105.   * @brief  Memory Tx Transfer completed callback.
  5106.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5107.   *                the configuration information for the specified I2C.
  5108.   * @retval None
  5109.   */
  5110. __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
  5111. {
  5112.   /* Prevent unused argument(s) compilation warning */
  5113.   UNUSED(hi2c);
  5114.  
  5115.   /* NOTE : This function should not be modified, when the callback is needed,
  5116.             the HAL_I2C_MemTxCpltCallback could be implemented in the user file
  5117.    */
  5118. }
  5119.  
  5120. /**
  5121.   * @brief  Memory Rx Transfer completed callback.
  5122.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5123.   *                the configuration information for the specified I2C.
  5124.   * @retval None
  5125.   */
  5126. __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
  5127. {
  5128.   /* Prevent unused argument(s) compilation warning */
  5129.   UNUSED(hi2c);
  5130.  
  5131.   /* NOTE : This function should not be modified, when the callback is needed,
  5132.             the HAL_I2C_MemRxCpltCallback could be implemented in the user file
  5133.    */
  5134. }
  5135.  
  5136. /**
  5137.   * @brief  I2C error callback.
  5138.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5139.   *                the configuration information for the specified I2C.
  5140.   * @retval None
  5141.   */
  5142. __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
  5143. {
  5144.   /* Prevent unused argument(s) compilation warning */
  5145.   UNUSED(hi2c);
  5146.  
  5147.   /* NOTE : This function should not be modified, when the callback is needed,
  5148.             the HAL_I2C_ErrorCallback could be implemented in the user file
  5149.    */
  5150. }
  5151.  
  5152. /**
  5153.   * @brief  I2C abort callback.
  5154.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5155.   *                the configuration information for the specified I2C.
  5156.   * @retval None
  5157.   */
  5158. __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
  5159. {
  5160.   /* Prevent unused argument(s) compilation warning */
  5161.   UNUSED(hi2c);
  5162.  
  5163.   /* NOTE : This function should not be modified, when the callback is needed,
  5164.             the HAL_I2C_AbortCpltCallback could be implemented in the user file
  5165.    */
  5166. }
  5167.  
  5168. /**
  5169.   * @}
  5170.   */
  5171.  
  5172. /** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
  5173.  *  @brief   Peripheral State, Mode and Error functions
  5174.   *
  5175. @verbatim
  5176.  ===============================================================================
  5177.             ##### Peripheral State, Mode and Error functions #####
  5178.  ===============================================================================
  5179.     [..]
  5180.     This subsection permit to get in run-time the status of the peripheral
  5181.     and the data flow.
  5182.  
  5183. @endverbatim
  5184.   * @{
  5185.   */
  5186.  
  5187. /**
  5188.   * @brief  Return the I2C handle state.
  5189.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5190.   *                the configuration information for the specified I2C.
  5191.   * @retval HAL state
  5192.   */
  5193. HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
  5194. {
  5195.   /* Return I2C handle state */
  5196.   return hi2c->State;
  5197. }
  5198.  
  5199. /**
  5200.   * @brief  Returns the I2C Master, Slave, Memory or no mode.
  5201.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5202.   *         the configuration information for I2C module
  5203.   * @retval HAL mode
  5204.   */
  5205. HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
  5206. {
  5207.   return hi2c->Mode;
  5208. }
  5209.  
  5210. /**
  5211.   * @brief  Return the I2C error code.
  5212.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5213.   *              the configuration information for the specified I2C.
  5214.   * @retval I2C Error Code
  5215.   */
  5216. uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
  5217. {
  5218.   return hi2c->ErrorCode;
  5219. }
  5220.  
  5221. /**
  5222.   * @}
  5223.   */
  5224.  
  5225. /**
  5226.   * @}
  5227.   */
  5228.  
  5229. /** @addtogroup I2C_Private_Functions
  5230.   * @{
  5231.   */
  5232.  
  5233. /**
  5234.   * @brief  Handle TXE flag for Master
  5235.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5236.   *         the configuration information for I2C module
  5237.   * @retval None
  5238.   */
  5239. static void I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
  5240. {
  5241.   /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  5242.   HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  5243.   HAL_I2C_ModeTypeDef CurrentMode   = hi2c->Mode;
  5244.   uint32_t CurrentXferOptions       = hi2c->XferOptions;
  5245.  
  5246.   if ((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
  5247.   {
  5248.     /* Call TxCpltCallback() directly if no stop mode is set */
  5249.     if ((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  5250.     {
  5251.       __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  5252.  
  5253.       hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
  5254.       hi2c->Mode = HAL_I2C_MODE_NONE;
  5255.       hi2c->State = HAL_I2C_STATE_READY;
  5256.  
  5257. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5258.       hi2c->MasterTxCpltCallback(hi2c);
  5259. #else
  5260.       HAL_I2C_MasterTxCpltCallback(hi2c);
  5261. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5262.     }
  5263.     else /* Generate Stop condition then Call TxCpltCallback() */
  5264.     {
  5265.       /* Disable EVT, BUF and ERR interrupt */
  5266.       __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  5267.  
  5268.       /* Generate Stop */
  5269.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  5270.  
  5271.       hi2c->PreviousState = I2C_STATE_NONE;
  5272.       hi2c->State = HAL_I2C_STATE_READY;
  5273.  
  5274.       if (hi2c->Mode == HAL_I2C_MODE_MEM)
  5275.       {
  5276.         hi2c->Mode = HAL_I2C_MODE_NONE;
  5277. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5278.         hi2c->MemTxCpltCallback(hi2c);
  5279. #else
  5280.         HAL_I2C_MemTxCpltCallback(hi2c);
  5281. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5282.       }
  5283.       else
  5284.       {
  5285.         hi2c->Mode = HAL_I2C_MODE_NONE;
  5286. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5287.         hi2c->MasterTxCpltCallback(hi2c);
  5288. #else
  5289.         HAL_I2C_MasterTxCpltCallback(hi2c);
  5290. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5291.       }
  5292.     }
  5293.   }
  5294.   else if ((CurrentState == HAL_I2C_STATE_BUSY_TX) || \
  5295.            ((CurrentMode == HAL_I2C_MODE_MEM) && (CurrentState == HAL_I2C_STATE_BUSY_RX)))
  5296.   {
  5297.     if (hi2c->XferCount == 0U)
  5298.     {
  5299.       /* Disable BUF interrupt */
  5300.       __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  5301.     }
  5302.     else
  5303.     {
  5304.       if (hi2c->Mode == HAL_I2C_MODE_MEM)
  5305.       {
  5306.         I2C_MemoryTransmit_TXE_BTF(hi2c);
  5307.       }
  5308.       else
  5309.       {
  5310.         /* Write data to DR */
  5311.         hi2c->Instance->DR = *hi2c->pBuffPtr;
  5312.  
  5313.         /* Increment Buffer pointer */
  5314.         hi2c->pBuffPtr++;
  5315.  
  5316.         /* Update counter */
  5317.         hi2c->XferCount--;
  5318.       }
  5319.     }
  5320.   }
  5321.   else
  5322.   {
  5323.     /* Do nothing */
  5324.   }
  5325. }
  5326.  
  5327. /**
  5328.   * @brief  Handle BTF flag for Master transmitter
  5329.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5330.   *         the configuration information for I2C module
  5331.   * @retval None
  5332.   */
  5333. static void I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
  5334. {
  5335.   /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  5336.   uint32_t CurrentXferOptions = hi2c->XferOptions;
  5337.  
  5338.   if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
  5339.   {
  5340.     if (hi2c->XferCount != 0U)
  5341.     {
  5342.       /* Write data to DR */
  5343.       hi2c->Instance->DR = *hi2c->pBuffPtr;
  5344.  
  5345.       /* Increment Buffer pointer */
  5346.       hi2c->pBuffPtr++;
  5347.  
  5348.       /* Update counter */
  5349.       hi2c->XferCount--;
  5350.     }
  5351.     else
  5352.     {
  5353.       /* Call TxCpltCallback() directly if no stop mode is set */
  5354.       if ((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  5355.       {
  5356.         __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  5357.  
  5358.         hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
  5359.         hi2c->Mode = HAL_I2C_MODE_NONE;
  5360.         hi2c->State = HAL_I2C_STATE_READY;
  5361.  
  5362. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5363.         hi2c->MasterTxCpltCallback(hi2c);
  5364. #else
  5365.         HAL_I2C_MasterTxCpltCallback(hi2c);
  5366. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5367.       }
  5368.       else /* Generate Stop condition then Call TxCpltCallback() */
  5369.       {
  5370.         /* Disable EVT, BUF and ERR interrupt */
  5371.         __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  5372.  
  5373.         /* Generate Stop */
  5374.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  5375.  
  5376.         hi2c->PreviousState = I2C_STATE_NONE;
  5377.         hi2c->State = HAL_I2C_STATE_READY;
  5378.         if (hi2c->Mode == HAL_I2C_MODE_MEM)
  5379.         {
  5380.           hi2c->Mode = HAL_I2C_MODE_NONE;
  5381. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5382.           hi2c->MemTxCpltCallback(hi2c);
  5383. #else
  5384.           HAL_I2C_MemTxCpltCallback(hi2c);
  5385. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5386.         }
  5387.         else
  5388.         {
  5389.           hi2c->Mode = HAL_I2C_MODE_NONE;
  5390.  
  5391. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5392.           hi2c->MasterTxCpltCallback(hi2c);
  5393. #else
  5394.           HAL_I2C_MasterTxCpltCallback(hi2c);
  5395. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5396.         }
  5397.       }
  5398.     }
  5399.   }
  5400.   else
  5401.   {
  5402.     /* Do nothing */
  5403.   }
  5404. }
  5405.  
  5406. /**
  5407.   * @brief  Handle TXE and BTF flag for Memory transmitter
  5408.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5409.   *         the configuration information for I2C module
  5410.   * @retval None
  5411.   */
  5412. static void I2C_MemoryTransmit_TXE_BTF(I2C_HandleTypeDef *hi2c)
  5413. {
  5414.   /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  5415.   HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  5416.  
  5417.   if (hi2c->EventCount == 0U)
  5418.   {
  5419.     /* If Memory address size is 8Bit */
  5420.     if (hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
  5421.     {
  5422.       /* Send Memory Address */
  5423.       hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
  5424.  
  5425.       hi2c->EventCount += 2U;
  5426.     }
  5427.     /* If Memory address size is 16Bit */
  5428.     else
  5429.     {
  5430.       /* Send MSB of Memory Address */
  5431.       hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
  5432.  
  5433.       hi2c->EventCount++;
  5434.     }
  5435.   }
  5436.   else if (hi2c->EventCount == 1U)
  5437.   {
  5438.     /* Send LSB of Memory Address */
  5439.     hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
  5440.  
  5441.     hi2c->EventCount++;
  5442.   }
  5443.   else if (hi2c->EventCount == 2U)
  5444.   {
  5445.     if (CurrentState == HAL_I2C_STATE_BUSY_RX)
  5446.     {
  5447.       /* Generate Restart */
  5448.       hi2c->Instance->CR1 |= I2C_CR1_START;
  5449.  
  5450.       hi2c->EventCount++;
  5451.     }
  5452.     else if ((hi2c->XferCount > 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
  5453.     {
  5454.       /* Write data to DR */
  5455.       hi2c->Instance->DR = *hi2c->pBuffPtr;
  5456.  
  5457.       /* Increment Buffer pointer */
  5458.       hi2c->pBuffPtr++;
  5459.  
  5460.       /* Update counter */
  5461.       hi2c->XferCount--;
  5462.     }
  5463.     else if ((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
  5464.     {
  5465.       /* Generate Stop condition then Call TxCpltCallback() */
  5466.       /* Disable EVT, BUF and ERR interrupt */
  5467.       __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  5468.  
  5469.       /* Generate Stop */
  5470.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  5471.  
  5472.       hi2c->PreviousState = I2C_STATE_NONE;
  5473.       hi2c->State = HAL_I2C_STATE_READY;
  5474.       hi2c->Mode = HAL_I2C_MODE_NONE;
  5475. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5476.       hi2c->MemTxCpltCallback(hi2c);
  5477. #else
  5478.       HAL_I2C_MemTxCpltCallback(hi2c);
  5479. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5480.     }
  5481.     else
  5482.     {
  5483.       /* Do nothing */
  5484.     }
  5485.   }
  5486.   else
  5487.   {
  5488.     /* Do nothing */
  5489.   }
  5490. }
  5491.  
  5492. /**
  5493.   * @brief  Handle RXNE flag for Master
  5494.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5495.   *         the configuration information for I2C module
  5496.   * @retval None
  5497.   */
  5498. static void I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
  5499. {
  5500.   if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
  5501.   {
  5502.     uint32_t tmp;
  5503.  
  5504.     tmp = hi2c->XferCount;
  5505.     if (tmp > 3U)
  5506.     {
  5507.       /* Read data from DR */
  5508.       *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  5509.  
  5510.       /* Increment Buffer pointer */
  5511.       hi2c->pBuffPtr++;
  5512.  
  5513.       /* Update counter */
  5514.       hi2c->XferCount--;
  5515.  
  5516.       if (hi2c->XferCount == (uint16_t)3)
  5517.       {
  5518.         /* Disable BUF interrupt, this help to treat correctly the last 4 bytes
  5519.         on BTF subroutine */
  5520.         /* Disable BUF interrupt */
  5521.         __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  5522.       }
  5523.     }
  5524.     else if ((hi2c->XferOptions != I2C_FIRST_AND_NEXT_FRAME) && ((tmp == 1U) || (tmp == 0U)))
  5525.     {
  5526.       if (I2C_WaitOnSTOPRequestThroughIT(hi2c) == HAL_OK)
  5527.       {
  5528.         /* Disable Acknowledge */
  5529.         CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5530.  
  5531.         /* Disable EVT, BUF and ERR interrupt */
  5532.         __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  5533.  
  5534.         /* Read data from DR */
  5535.         *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  5536.  
  5537.         /* Increment Buffer pointer */
  5538.         hi2c->pBuffPtr++;
  5539.  
  5540.         /* Update counter */
  5541.         hi2c->XferCount--;
  5542.  
  5543.         hi2c->State = HAL_I2C_STATE_READY;
  5544.  
  5545.         if (hi2c->Mode == HAL_I2C_MODE_MEM)
  5546.         {
  5547.           hi2c->Mode = HAL_I2C_MODE_NONE;
  5548.           hi2c->PreviousState = I2C_STATE_NONE;
  5549.  
  5550. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5551.           hi2c->MemRxCpltCallback(hi2c);
  5552. #else
  5553.           HAL_I2C_MemRxCpltCallback(hi2c);
  5554. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5555.         }
  5556.         else
  5557.         {
  5558.           hi2c->Mode = HAL_I2C_MODE_NONE;
  5559.           hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
  5560.  
  5561. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5562.           hi2c->MasterRxCpltCallback(hi2c);
  5563. #else
  5564.           HAL_I2C_MasterRxCpltCallback(hi2c);
  5565. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5566.         }
  5567.       }
  5568.       else
  5569.       {
  5570.         /* Disable EVT, BUF and ERR interrupt */
  5571.         __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  5572.  
  5573.         /* Read data from DR */
  5574.         *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  5575.  
  5576.         /* Increment Buffer pointer */
  5577.         hi2c->pBuffPtr++;
  5578.  
  5579.         /* Update counter */
  5580.         hi2c->XferCount--;
  5581.  
  5582.         hi2c->State = HAL_I2C_STATE_READY;
  5583.         hi2c->Mode = HAL_I2C_MODE_NONE;
  5584.  
  5585.         /* Call user error callback */
  5586. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5587.         hi2c->ErrorCallback(hi2c);
  5588. #else
  5589.         HAL_I2C_ErrorCallback(hi2c);
  5590. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5591.       }
  5592.     }
  5593.     else
  5594.     {
  5595.       /* Do nothing */
  5596.     }
  5597.   }
  5598. }
  5599.  
  5600. /**
  5601.   * @brief  Handle BTF flag for Master receiver
  5602.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5603.   *         the configuration information for I2C module
  5604.   * @retval None
  5605.   */
  5606. static void I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
  5607. {
  5608.   /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  5609.   uint32_t CurrentXferOptions = hi2c->XferOptions;
  5610.  
  5611.   if (hi2c->XferCount == 4U)
  5612.   {
  5613.     /* Disable BUF interrupt, this help to treat correctly the last 2 bytes
  5614.        on BTF subroutine if there is a reception delay between N-1 and N byte */
  5615.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  5616.  
  5617.     /* Read data from DR */
  5618.     *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  5619.  
  5620.     /* Increment Buffer pointer */
  5621.     hi2c->pBuffPtr++;
  5622.  
  5623.     /* Update counter */
  5624.     hi2c->XferCount--;
  5625.   }
  5626.   else if (hi2c->XferCount == 3U)
  5627.   {
  5628.     /* Disable BUF interrupt, this help to treat correctly the last 2 bytes
  5629.        on BTF subroutine if there is a reception delay between N-1 and N byte */
  5630.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  5631.  
  5632.     if ((CurrentXferOptions != I2C_NEXT_FRAME) && (CurrentXferOptions != I2C_FIRST_AND_NEXT_FRAME))
  5633.     {
  5634.       /* Disable Acknowledge */
  5635.       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5636.     }
  5637.  
  5638.     /* Read data from DR */
  5639.     *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  5640.  
  5641.     /* Increment Buffer pointer */
  5642.     hi2c->pBuffPtr++;
  5643.  
  5644.     /* Update counter */
  5645.     hi2c->XferCount--;
  5646.   }
  5647.   else if (hi2c->XferCount == 2U)
  5648.   {
  5649.     /* Prepare next transfer or stop current transfer */
  5650.     if ((CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME_NO_STOP))
  5651.     {
  5652.       /* Disable Acknowledge */
  5653.       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5654.     }
  5655.     else if ((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_AND_NEXT_FRAME))
  5656.     {
  5657.       /* Enable Acknowledge */
  5658.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5659.     }
  5660.     else if (CurrentXferOptions != I2C_LAST_FRAME_NO_STOP)
  5661.     {
  5662.       /* Generate Stop */
  5663.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  5664.     }
  5665.     else
  5666.     {
  5667.       /* Do nothing */
  5668.     }
  5669.  
  5670.     /* Read data from DR */
  5671.     *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  5672.  
  5673.     /* Increment Buffer pointer */
  5674.     hi2c->pBuffPtr++;
  5675.  
  5676.     /* Update counter */
  5677.     hi2c->XferCount--;
  5678.  
  5679.     /* Read data from DR */
  5680.     *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  5681.  
  5682.     /* Increment Buffer pointer */
  5683.     hi2c->pBuffPtr++;
  5684.  
  5685.     /* Update counter */
  5686.     hi2c->XferCount--;
  5687.  
  5688.     /* Disable EVT and ERR interrupt */
  5689.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  5690.  
  5691.     hi2c->State = HAL_I2C_STATE_READY;
  5692.     if (hi2c->Mode == HAL_I2C_MODE_MEM)
  5693.     {
  5694.       hi2c->Mode = HAL_I2C_MODE_NONE;
  5695.       hi2c->PreviousState = I2C_STATE_NONE;
  5696. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5697.       hi2c->MemRxCpltCallback(hi2c);
  5698. #else
  5699.       HAL_I2C_MemRxCpltCallback(hi2c);
  5700. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5701.     }
  5702.     else
  5703.     {
  5704.       hi2c->Mode = HAL_I2C_MODE_NONE;
  5705.       hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
  5706. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5707.       hi2c->MasterRxCpltCallback(hi2c);
  5708. #else
  5709.       HAL_I2C_MasterRxCpltCallback(hi2c);
  5710. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5711.     }
  5712.   }
  5713.   else
  5714.   {
  5715.     /* Read data from DR */
  5716.     *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  5717.  
  5718.     /* Increment Buffer pointer */
  5719.     hi2c->pBuffPtr++;
  5720.  
  5721.     /* Update counter */
  5722.     hi2c->XferCount--;
  5723.   }
  5724. }
  5725.  
  5726. /**
  5727.   * @brief  Handle SB flag for Master
  5728.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5729.   *         the configuration information for I2C module
  5730.   * @retval None
  5731.   */
  5732. static void I2C_Master_SB(I2C_HandleTypeDef *hi2c)
  5733. {
  5734.   if (hi2c->Mode == HAL_I2C_MODE_MEM)
  5735.   {
  5736.     if (hi2c->EventCount == 0U)
  5737.     {
  5738.       /* Send slave address */
  5739.       hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
  5740.     }
  5741.     else
  5742.     {
  5743.       hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
  5744.     }
  5745.   }
  5746.   else
  5747.   {
  5748.     if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  5749.     {
  5750.       /* Send slave 7 Bits address */
  5751.       if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
  5752.       {
  5753.         hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
  5754.       }
  5755.       else
  5756.       {
  5757.         hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
  5758.       }
  5759.  
  5760.       if (((hi2c->hdmatx != NULL) && (hi2c->hdmatx->XferCpltCallback != NULL))
  5761.           || ((hi2c->hdmarx != NULL) && (hi2c->hdmarx->XferCpltCallback != NULL)))
  5762.       {
  5763.         /* Enable DMA Request */
  5764.         SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  5765.       }
  5766.     }
  5767.     else
  5768.     {
  5769.       if (hi2c->EventCount == 0U)
  5770.       {
  5771.         /* Send header of slave address */
  5772.         hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(hi2c->Devaddress);
  5773.       }
  5774.       else if (hi2c->EventCount == 1U)
  5775.       {
  5776.         /* Send header of slave address */
  5777.         hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress);
  5778.       }
  5779.       else
  5780.       {
  5781.         /* Do nothing */
  5782.       }
  5783.     }
  5784.   }
  5785. }
  5786.  
  5787. /**
  5788.   * @brief  Handle ADD10 flag for Master
  5789.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5790.   *         the configuration information for I2C module
  5791.   * @retval None
  5792.   */
  5793. static void I2C_Master_ADD10(I2C_HandleTypeDef *hi2c)
  5794. {
  5795.   /* Send slave address */
  5796.   hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress);
  5797.  
  5798.   if (((hi2c->hdmatx != NULL) && (hi2c->hdmatx->XferCpltCallback != NULL))
  5799.       || ((hi2c->hdmarx != NULL) && (hi2c->hdmarx->XferCpltCallback != NULL)))
  5800.   {
  5801.     /* Enable DMA Request */
  5802.     SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  5803.   }
  5804. }
  5805.  
  5806. /**
  5807.   * @brief  Handle ADDR flag for Master
  5808.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5809.   *         the configuration information for I2C module
  5810.   * @retval None
  5811.   */
  5812. static void I2C_Master_ADDR(I2C_HandleTypeDef *hi2c)
  5813. {
  5814.   /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  5815.   HAL_I2C_ModeTypeDef CurrentMode       = hi2c->Mode;
  5816.   uint32_t CurrentXferOptions           = hi2c->XferOptions;
  5817.   uint32_t Prev_State                   = hi2c->PreviousState;
  5818.  
  5819.   if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
  5820.   {
  5821.     if ((hi2c->EventCount == 0U) && (CurrentMode == HAL_I2C_MODE_MEM))
  5822.     {
  5823.       /* Clear ADDR flag */
  5824.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5825.     }
  5826.     else if ((hi2c->EventCount == 0U) && (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT))
  5827.     {
  5828.       /* Clear ADDR flag */
  5829.       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5830.  
  5831.       /* Generate Restart */
  5832.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  5833.  
  5834.       hi2c->EventCount++;
  5835.     }
  5836.     else
  5837.     {
  5838.       if (hi2c->XferCount == 0U)
  5839.       {
  5840.         /* Clear ADDR flag */
  5841.         __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5842.  
  5843.         /* Generate Stop */
  5844.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  5845.       }
  5846.       else if (hi2c->XferCount == 1U)
  5847.       {
  5848.         if (CurrentXferOptions == I2C_NO_OPTION_FRAME)
  5849.         {
  5850.           /* Disable Acknowledge */
  5851.           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5852.  
  5853.           if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  5854.           {
  5855.             /* Disable Acknowledge */
  5856.             CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5857.  
  5858.             /* Clear ADDR flag */
  5859.             __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5860.           }
  5861.           else
  5862.           {
  5863.             /* Clear ADDR flag */
  5864.             __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5865.  
  5866.             /* Generate Stop */
  5867.             SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  5868.           }
  5869.         }
  5870.         /* Prepare next transfer or stop current transfer */
  5871.         else if ((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) \
  5872.                  && ((Prev_State != I2C_STATE_MASTER_BUSY_RX) || (CurrentXferOptions == I2C_FIRST_FRAME)))
  5873.         {
  5874.           if ((CurrentXferOptions != I2C_NEXT_FRAME) && (CurrentXferOptions != I2C_FIRST_AND_NEXT_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME_NO_STOP))
  5875.           {
  5876.             /* Disable Acknowledge */
  5877.             CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5878.           }
  5879.           else
  5880.           {
  5881.             /* Enable Acknowledge */
  5882.             SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5883.           }
  5884.  
  5885.           /* Clear ADDR flag */
  5886.           __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5887.         }
  5888.         else
  5889.         {
  5890.           /* Disable Acknowledge */
  5891.           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5892.  
  5893.           /* Clear ADDR flag */
  5894.           __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5895.  
  5896.           /* Generate Stop */
  5897.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  5898.         }
  5899.       }
  5900.       else if (hi2c->XferCount == 2U)
  5901.       {
  5902.         if ((CurrentXferOptions != I2C_NEXT_FRAME) && (CurrentXferOptions != I2C_FIRST_AND_NEXT_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME_NO_STOP))
  5903.         {
  5904.           /* Disable Acknowledge */
  5905.           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5906.  
  5907.           /* Enable Pos */
  5908.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  5909.         }
  5910.         else
  5911.         {
  5912.           /* Enable Acknowledge */
  5913.           SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5914.         }
  5915.  
  5916.         if (((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) && ((CurrentXferOptions == I2C_NO_OPTION_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME_NO_STOP) || (CurrentXferOptions == I2C_LAST_FRAME)))
  5917.         {
  5918.           /* Enable Last DMA bit */
  5919.           SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
  5920.         }
  5921.  
  5922.         /* Clear ADDR flag */
  5923.         __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5924.       }
  5925.       else
  5926.       {
  5927.         /* Enable Acknowledge */
  5928.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  5929.  
  5930.         if (((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) && ((CurrentXferOptions == I2C_NO_OPTION_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME_NO_STOP) || (CurrentXferOptions == I2C_LAST_FRAME)))
  5931.         {
  5932.           /* Enable Last DMA bit */
  5933.           SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
  5934.         }
  5935.  
  5936.         /* Clear ADDR flag */
  5937.         __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5938.       }
  5939.  
  5940.       /* Reset Event counter  */
  5941.       hi2c->EventCount = 0U;
  5942.     }
  5943.   }
  5944.   else
  5945.   {
  5946.     /* Clear ADDR flag */
  5947.     __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  5948.   }
  5949. }
  5950.  
  5951. /**
  5952.   * @brief  Handle TXE flag for Slave
  5953.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5954.   *         the configuration information for I2C module
  5955.   * @retval None
  5956.   */
  5957. static void I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
  5958. {
  5959.   /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  5960.   HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  5961.  
  5962.   if (hi2c->XferCount != 0U)
  5963.   {
  5964.     /* Write data to DR */
  5965.     hi2c->Instance->DR = *hi2c->pBuffPtr;
  5966.  
  5967.     /* Increment Buffer pointer */
  5968.     hi2c->pBuffPtr++;
  5969.  
  5970.     /* Update counter */
  5971.     hi2c->XferCount--;
  5972.  
  5973.     if ((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
  5974.     {
  5975.       /* Last Byte is received, disable Interrupt */
  5976.       __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  5977.  
  5978.       /* Set state at HAL_I2C_STATE_LISTEN */
  5979.       hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
  5980.       hi2c->State = HAL_I2C_STATE_LISTEN;
  5981.  
  5982.       /* Call the corresponding callback to inform upper layer of End of Transfer */
  5983. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  5984.       hi2c->SlaveTxCpltCallback(hi2c);
  5985. #else
  5986.       HAL_I2C_SlaveTxCpltCallback(hi2c);
  5987. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  5988.     }
  5989.   }
  5990. }
  5991.  
  5992. /**
  5993.   * @brief  Handle BTF flag for Slave transmitter
  5994.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  5995.   *         the configuration information for I2C module
  5996.   * @retval None
  5997.   */
  5998. static void I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
  5999. {
  6000.   if (hi2c->XferCount != 0U)
  6001.   {
  6002.     /* Write data to DR */
  6003.     hi2c->Instance->DR = *hi2c->pBuffPtr;
  6004.  
  6005.     /* Increment Buffer pointer */
  6006.     hi2c->pBuffPtr++;
  6007.  
  6008.     /* Update counter */
  6009.     hi2c->XferCount--;
  6010.   }
  6011. }
  6012.  
  6013. /**
  6014.   * @brief  Handle RXNE flag for Slave
  6015.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  6016.   *         the configuration information for I2C module
  6017.   * @retval None
  6018.   */
  6019. static void I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
  6020. {
  6021.   /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  6022.   HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  6023.  
  6024.   if (hi2c->XferCount != 0U)
  6025.   {
  6026.     /* Read data from DR */
  6027.     *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  6028.  
  6029.     /* Increment Buffer pointer */
  6030.     hi2c->pBuffPtr++;
  6031.  
  6032.     /* Update counter */
  6033.     hi2c->XferCount--;
  6034.  
  6035.     if ((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
  6036.     {
  6037.       /* Last Byte is received, disable Interrupt */
  6038.       __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  6039.  
  6040.       /* Set state at HAL_I2C_STATE_LISTEN */
  6041.       hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
  6042.       hi2c->State = HAL_I2C_STATE_LISTEN;
  6043.  
  6044.       /* Call the corresponding callback to inform upper layer of End of Transfer */
  6045. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6046.       hi2c->SlaveRxCpltCallback(hi2c);
  6047. #else
  6048.       HAL_I2C_SlaveRxCpltCallback(hi2c);
  6049. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6050.     }
  6051.   }
  6052. }
  6053.  
  6054. /**
  6055.   * @brief  Handle BTF flag for Slave receiver
  6056.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  6057.   *         the configuration information for I2C module
  6058.   * @retval None
  6059.   */
  6060. static void I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
  6061. {
  6062.   if (hi2c->XferCount != 0U)
  6063.   {
  6064.     /* Read data from DR */
  6065.     *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  6066.  
  6067.     /* Increment Buffer pointer */
  6068.     hi2c->pBuffPtr++;
  6069.  
  6070.     /* Update counter */
  6071.     hi2c->XferCount--;
  6072.   }
  6073. }
  6074.  
  6075. /**
  6076.   * @brief  Handle ADD flag for Slave
  6077.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  6078.   *         the configuration information for I2C module
  6079.   * @param  IT2Flags Interrupt2 flags to handle.
  6080.   * @retval None
  6081.   */
  6082. static void I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c, uint32_t IT2Flags)
  6083. {
  6084.   uint8_t TransferDirection = I2C_DIRECTION_RECEIVE;
  6085.   uint16_t SlaveAddrCode;
  6086.  
  6087.   if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
  6088.   {
  6089.     /* Disable BUF interrupt, BUF enabling is manage through slave specific interface */
  6090.     __HAL_I2C_DISABLE_IT(hi2c, (I2C_IT_BUF));
  6091.  
  6092.     /* Transfer Direction requested by Master */
  6093.     if (I2C_CHECK_FLAG(IT2Flags, I2C_FLAG_TRA) == RESET)
  6094.     {
  6095.       TransferDirection = I2C_DIRECTION_TRANSMIT;
  6096.     }
  6097.  
  6098.     if (I2C_CHECK_FLAG(IT2Flags, I2C_FLAG_DUALF) == RESET)
  6099.     {
  6100.       SlaveAddrCode = (uint16_t)hi2c->Init.OwnAddress1;
  6101.     }
  6102.     else
  6103.     {
  6104.       SlaveAddrCode = (uint16_t)hi2c->Init.OwnAddress2;
  6105.     }
  6106.  
  6107.     /* Process Unlocked */
  6108.     __HAL_UNLOCK(hi2c);
  6109.  
  6110.     /* Call Slave Addr callback */
  6111. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6112.     hi2c->AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
  6113. #else
  6114.     HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
  6115. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6116.   }
  6117.   else
  6118.   {
  6119.     /* Clear ADDR flag */
  6120.     __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  6121.  
  6122.     /* Process Unlocked */
  6123.     __HAL_UNLOCK(hi2c);
  6124.   }
  6125. }
  6126.  
  6127. /**
  6128.   * @brief  Handle STOPF flag for Slave
  6129.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  6130.   *         the configuration information for I2C module
  6131.   * @retval None
  6132.   */
  6133. static void I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
  6134. {
  6135.   /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  6136.   HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  6137.  
  6138.   /* Disable EVT, BUF and ERR interrupt */
  6139.   __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  6140.  
  6141.   /* Clear STOPF flag */
  6142.   __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  6143.  
  6144.   /* Disable Acknowledge */
  6145.   CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  6146.  
  6147.   /* If a DMA is ongoing, Update handle size context */
  6148.   if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  6149.   {
  6150.     if ((CurrentState == HAL_I2C_STATE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
  6151.     {
  6152.       hi2c->XferCount = (uint16_t)(__HAL_DMA_GET_COUNTER(hi2c->hdmarx));
  6153.  
  6154.       if (hi2c->XferCount != 0U)
  6155.       {
  6156.         /* Set ErrorCode corresponding to a Non-Acknowledge */
  6157.         hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  6158.       }
  6159.  
  6160.       /* Disable, stop the current DMA */
  6161.       CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  6162.  
  6163.       /* Abort DMA Xfer if any */
  6164.       if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY)
  6165.       {
  6166.         /* Set the I2C DMA Abort callback :
  6167.         will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  6168.         hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
  6169.  
  6170.         /* Abort DMA RX */
  6171.         if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
  6172.         {
  6173.           /* Call Directly XferAbortCallback function in case of error */
  6174.           hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
  6175.         }
  6176.       }
  6177.     }
  6178.     else
  6179.     {
  6180.       hi2c->XferCount = (uint16_t)(__HAL_DMA_GET_COUNTER(hi2c->hdmatx));
  6181.  
  6182.       if (hi2c->XferCount != 0U)
  6183.       {
  6184.         /* Set ErrorCode corresponding to a Non-Acknowledge */
  6185.         hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  6186.       }
  6187.  
  6188.       /* Disable, stop the current DMA */
  6189.       CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  6190.  
  6191.       /* Abort DMA Xfer if any */
  6192.       if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY)
  6193.       {
  6194.         /* Set the I2C DMA Abort callback :
  6195.         will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  6196.         hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
  6197.  
  6198.         /* Abort DMA TX */
  6199.         if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
  6200.         {
  6201.           /* Call Directly XferAbortCallback function in case of error */
  6202.           hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
  6203.         }
  6204.       }
  6205.     }
  6206.   }
  6207.  
  6208.   /* All data are not transferred, so set error code accordingly */
  6209.   if (hi2c->XferCount != 0U)
  6210.   {
  6211.     /* Store Last receive data if any */
  6212.     if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  6213.     {
  6214.       /* Read data from DR */
  6215.       *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  6216.  
  6217.       /* Increment Buffer pointer */
  6218.       hi2c->pBuffPtr++;
  6219.  
  6220.       /* Update counter */
  6221.       hi2c->XferCount--;
  6222.     }
  6223.  
  6224.     /* Store Last receive data if any */
  6225.     if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  6226.     {
  6227.       /* Read data from DR */
  6228.       *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  6229.  
  6230.       /* Increment Buffer pointer */
  6231.       hi2c->pBuffPtr++;
  6232.  
  6233.       /* Update counter */
  6234.       hi2c->XferCount--;
  6235.     }
  6236.  
  6237.     if (hi2c->XferCount != 0U)
  6238.     {
  6239.       /* Set ErrorCode corresponding to a Non-Acknowledge */
  6240.       hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  6241.     }
  6242.   }
  6243.  
  6244.   if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  6245.   {
  6246.     /* Call the corresponding callback to inform upper layer of End of Transfer */
  6247.     I2C_ITError(hi2c);
  6248.   }
  6249.   else
  6250.   {
  6251.     if (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN)
  6252.     {
  6253.       /* Set state at HAL_I2C_STATE_LISTEN */
  6254.       hi2c->PreviousState = I2C_STATE_NONE;
  6255.       hi2c->State = HAL_I2C_STATE_LISTEN;
  6256.  
  6257.       /* Call the corresponding callback to inform upper layer of End of Transfer */
  6258. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6259.       hi2c->SlaveRxCpltCallback(hi2c);
  6260. #else
  6261.       HAL_I2C_SlaveRxCpltCallback(hi2c);
  6262. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6263.     }
  6264.  
  6265.     if (hi2c->State == HAL_I2C_STATE_LISTEN)
  6266.     {
  6267.       hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  6268.       hi2c->PreviousState = I2C_STATE_NONE;
  6269.       hi2c->State = HAL_I2C_STATE_READY;
  6270.       hi2c->Mode = HAL_I2C_MODE_NONE;
  6271.  
  6272.       /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  6273. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6274.       hi2c->ListenCpltCallback(hi2c);
  6275. #else
  6276.       HAL_I2C_ListenCpltCallback(hi2c);
  6277. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6278.     }
  6279.     else
  6280.     {
  6281.       if ((hi2c->PreviousState  == I2C_STATE_SLAVE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX))
  6282.       {
  6283.         hi2c->PreviousState = I2C_STATE_NONE;
  6284.         hi2c->State = HAL_I2C_STATE_READY;
  6285.         hi2c->Mode = HAL_I2C_MODE_NONE;
  6286.  
  6287. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6288.         hi2c->SlaveRxCpltCallback(hi2c);
  6289. #else
  6290.         HAL_I2C_SlaveRxCpltCallback(hi2c);
  6291. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6292.       }
  6293.     }
  6294.   }
  6295. }
  6296.  
  6297. /**
  6298.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  6299.   *         the configuration information for I2C module
  6300.   * @retval None
  6301.   */
  6302. static void I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
  6303. {
  6304.   /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  6305.   HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  6306.   uint32_t CurrentXferOptions       = hi2c->XferOptions;
  6307.  
  6308.   if (((CurrentXferOptions ==  I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME)) && \
  6309.       (CurrentState == HAL_I2C_STATE_LISTEN))
  6310.   {
  6311.     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  6312.  
  6313.     /* Disable EVT, BUF and ERR interrupt */
  6314.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  6315.  
  6316.     /* Clear AF flag */
  6317.     __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  6318.  
  6319.     /* Disable Acknowledge */
  6320.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  6321.  
  6322.     hi2c->PreviousState = I2C_STATE_NONE;
  6323.     hi2c->State         = HAL_I2C_STATE_READY;
  6324.     hi2c->Mode          = HAL_I2C_MODE_NONE;
  6325.  
  6326.     /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  6327. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6328.     hi2c->ListenCpltCallback(hi2c);
  6329. #else
  6330.     HAL_I2C_ListenCpltCallback(hi2c);
  6331. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6332.   }
  6333.   else if (CurrentState == HAL_I2C_STATE_BUSY_TX)
  6334.   {
  6335.     hi2c->XferOptions   = I2C_NO_OPTION_FRAME;
  6336.     hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
  6337.     hi2c->State         = HAL_I2C_STATE_READY;
  6338.     hi2c->Mode          = HAL_I2C_MODE_NONE;
  6339.  
  6340.     /* Disable EVT, BUF and ERR interrupt */
  6341.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  6342.  
  6343.     /* Clear AF flag */
  6344.     __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  6345.  
  6346.     /* Disable Acknowledge */
  6347.     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  6348.  
  6349. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6350.     hi2c->SlaveTxCpltCallback(hi2c);
  6351. #else
  6352.     HAL_I2C_SlaveTxCpltCallback(hi2c);
  6353. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6354.   }
  6355.   else
  6356.   {
  6357.     /* Clear AF flag only */
  6358.     /* State Listen, but XferOptions == FIRST or NEXT */
  6359.     __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  6360.   }
  6361. }
  6362.  
  6363. /**
  6364.   * @brief  I2C interrupts error process
  6365.   * @param  hi2c I2C handle.
  6366.   * @retval None
  6367.   */
  6368. static void I2C_ITError(I2C_HandleTypeDef *hi2c)
  6369. {
  6370.   /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  6371.   HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  6372.   HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode;
  6373.   uint32_t CurrentError;
  6374.  
  6375.   if (((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM)) && (CurrentState == HAL_I2C_STATE_BUSY_RX))
  6376.   {
  6377.     /* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
  6378.     hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  6379.   }
  6380.  
  6381.   if (((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
  6382.   {
  6383.     /* keep HAL_I2C_STATE_LISTEN */
  6384.     hi2c->PreviousState = I2C_STATE_NONE;
  6385.     hi2c->State = HAL_I2C_STATE_LISTEN;
  6386.   }
  6387.   else
  6388.   {
  6389.     /* If state is an abort treatment on going, don't change state */
  6390.     /* This change will be do later */
  6391.     if ((READ_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN) != I2C_CR2_DMAEN) && (CurrentState != HAL_I2C_STATE_ABORT))
  6392.     {
  6393.       hi2c->State = HAL_I2C_STATE_READY;
  6394.       hi2c->Mode = HAL_I2C_MODE_NONE;
  6395.     }
  6396.     hi2c->PreviousState = I2C_STATE_NONE;
  6397.   }
  6398.  
  6399.   /* Abort DMA transfer */
  6400.   if (READ_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  6401.   {
  6402.     hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
  6403.  
  6404.     if (hi2c->hdmatx->State != HAL_DMA_STATE_READY)
  6405.     {
  6406.       /* Set the DMA Abort callback :
  6407.       will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  6408.       hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
  6409.  
  6410.       if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
  6411.       {
  6412.         /* Disable I2C peripheral to prevent dummy data in buffer */
  6413.         __HAL_I2C_DISABLE(hi2c);
  6414.  
  6415.         hi2c->State = HAL_I2C_STATE_READY;
  6416.  
  6417.         /* Call Directly XferAbortCallback function in case of error */
  6418.         hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
  6419.       }
  6420.     }
  6421.     else
  6422.     {
  6423.       /* Set the DMA Abort callback :
  6424.       will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  6425.       hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
  6426.  
  6427.       if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
  6428.       {
  6429.         /* Store Last receive data if any */
  6430.         if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  6431.         {
  6432.           /* Read data from DR */
  6433.           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  6434.  
  6435.           /* Increment Buffer pointer */
  6436.           hi2c->pBuffPtr++;
  6437.         }
  6438.  
  6439.         /* Disable I2C peripheral to prevent dummy data in buffer */
  6440.         __HAL_I2C_DISABLE(hi2c);
  6441.  
  6442.         hi2c->State = HAL_I2C_STATE_READY;
  6443.  
  6444.         /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
  6445.         hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
  6446.       }
  6447.     }
  6448.   }
  6449.   else if (hi2c->State == HAL_I2C_STATE_ABORT)
  6450.   {
  6451.     hi2c->State = HAL_I2C_STATE_READY;
  6452.     hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  6453.  
  6454.     /* Store Last receive data if any */
  6455.     if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  6456.     {
  6457.       /* Read data from DR */
  6458.       *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  6459.  
  6460.       /* Increment Buffer pointer */
  6461.       hi2c->pBuffPtr++;
  6462.     }
  6463.  
  6464.     /* Disable I2C peripheral to prevent dummy data in buffer */
  6465.     __HAL_I2C_DISABLE(hi2c);
  6466.  
  6467.     /* Call the corresponding callback to inform upper layer of End of Transfer */
  6468. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6469.     hi2c->AbortCpltCallback(hi2c);
  6470. #else
  6471.     HAL_I2C_AbortCpltCallback(hi2c);
  6472. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6473.   }
  6474.   else
  6475.   {
  6476.     /* Store Last receive data if any */
  6477.     if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  6478.     {
  6479.       /* Read data from DR */
  6480.       *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  6481.  
  6482.       /* Increment Buffer pointer */
  6483.       hi2c->pBuffPtr++;
  6484.     }
  6485.  
  6486.     /* Call user error callback */
  6487. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6488.     hi2c->ErrorCallback(hi2c);
  6489. #else
  6490.     HAL_I2C_ErrorCallback(hi2c);
  6491. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6492.   }
  6493.  
  6494.   /* STOP Flag is not set after a NACK reception, BusError, ArbitrationLost, OverRun */
  6495.   CurrentError = hi2c->ErrorCode;
  6496.  
  6497.   if (((CurrentError & HAL_I2C_ERROR_BERR) == HAL_I2C_ERROR_BERR) || \
  6498.       ((CurrentError & HAL_I2C_ERROR_ARLO) == HAL_I2C_ERROR_ARLO) || \
  6499.       ((CurrentError & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF)     || \
  6500.       ((CurrentError & HAL_I2C_ERROR_OVR) == HAL_I2C_ERROR_OVR))
  6501.   {
  6502.     /* Disable EVT, BUF and ERR interrupt */
  6503.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  6504.   }
  6505.  
  6506.   /* So may inform upper layer that listen phase is stopped */
  6507.   /* during NACK error treatment */
  6508.   CurrentState = hi2c->State;
  6509.   if (((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF) && (CurrentState == HAL_I2C_STATE_LISTEN))
  6510.   {
  6511.     hi2c->XferOptions   = I2C_NO_OPTION_FRAME;
  6512.     hi2c->PreviousState = I2C_STATE_NONE;
  6513.     hi2c->State         = HAL_I2C_STATE_READY;
  6514.     hi2c->Mode          = HAL_I2C_MODE_NONE;
  6515.  
  6516.     /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  6517. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6518.     hi2c->ListenCpltCallback(hi2c);
  6519. #else
  6520.     HAL_I2C_ListenCpltCallback(hi2c);
  6521. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6522.   }
  6523. }
  6524.  
  6525. /**
  6526.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  6527.   *         the configuration information for I2C module
  6528.   * @param  DevAddress Target device address: The device 7 bits address value
  6529.   *         in datasheet must be shifted to the left before calling the interface
  6530.   * @param  Timeout Timeout duration
  6531.   * @param  Tickstart Tick start value
  6532.   * @retval HAL status
  6533.   */
  6534. static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
  6535. {
  6536.   /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  6537.   uint32_t CurrentXferOptions = hi2c->XferOptions;
  6538.  
  6539.   /* Generate Start condition if first transfer */
  6540.   if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  6541.   {
  6542.     /* Generate Start */
  6543.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  6544.   }
  6545.   else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
  6546.   {
  6547.     /* Generate ReStart */
  6548.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  6549.   }
  6550.   else
  6551.   {
  6552.     /* Do nothing */
  6553.   }
  6554.  
  6555.   /* Wait until SB flag is set */
  6556.   if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  6557.   {
  6558.     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
  6559.     {
  6560.       hi2c->ErrorCode = HAL_I2C_WRONG_START;
  6561.     }
  6562.     return HAL_TIMEOUT;
  6563.   }
  6564.  
  6565.   if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  6566.   {
  6567.     /* Send slave address */
  6568.     hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  6569.   }
  6570.   else
  6571.   {
  6572.     /* Send header of slave address */
  6573.     hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
  6574.  
  6575.     /* Wait until ADD10 flag is set */
  6576.     if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
  6577.     {
  6578.       return HAL_ERROR;
  6579.     }
  6580.  
  6581.     /* Send slave address */
  6582.     hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
  6583.   }
  6584.  
  6585.   /* Wait until ADDR flag is set */
  6586.   if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  6587.   {
  6588.     return HAL_ERROR;
  6589.   }
  6590.  
  6591.   return HAL_OK;
  6592. }
  6593.  
  6594. /**
  6595.   * @brief  Master sends target device address for read request.
  6596.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  6597.   *         the configuration information for I2C module
  6598.   * @param  DevAddress Target device address: The device 7 bits address value
  6599.   *         in datasheet must be shifted to the left before calling the interface
  6600.   * @param  Timeout Timeout duration
  6601.   * @param  Tickstart Tick start value
  6602.   * @retval HAL status
  6603.   */
  6604. static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
  6605. {
  6606.   /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  6607.   uint32_t CurrentXferOptions = hi2c->XferOptions;
  6608.  
  6609.   /* Enable Acknowledge */
  6610.   SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  6611.  
  6612.   /* Generate Start condition if first transfer */
  6613.   if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME)  || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  6614.   {
  6615.     /* Generate Start */
  6616.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  6617.   }
  6618.   else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
  6619.   {
  6620.     /* Generate ReStart */
  6621.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  6622.   }
  6623.   else
  6624.   {
  6625.     /* Do nothing */
  6626.   }
  6627.  
  6628.   /* Wait until SB flag is set */
  6629.   if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  6630.   {
  6631.     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
  6632.     {
  6633.       hi2c->ErrorCode = HAL_I2C_WRONG_START;
  6634.     }
  6635.     return HAL_TIMEOUT;
  6636.   }
  6637.  
  6638.   if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  6639.   {
  6640.     /* Send slave address */
  6641.     hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  6642.   }
  6643.   else
  6644.   {
  6645.     /* Send header of slave address */
  6646.     hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
  6647.  
  6648.     /* Wait until ADD10 flag is set */
  6649.     if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
  6650.     {
  6651.       return HAL_ERROR;
  6652.     }
  6653.  
  6654.     /* Send slave address */
  6655.     hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
  6656.  
  6657.     /* Wait until ADDR flag is set */
  6658.     if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  6659.     {
  6660.       return HAL_ERROR;
  6661.     }
  6662.  
  6663.     /* Clear ADDR flag */
  6664.     __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  6665.  
  6666.     /* Generate Restart */
  6667.     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  6668.  
  6669.     /* Wait until SB flag is set */
  6670.     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  6671.     {
  6672.       if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
  6673.       {
  6674.         hi2c->ErrorCode = HAL_I2C_WRONG_START;
  6675.       }
  6676.       return HAL_TIMEOUT;
  6677.     }
  6678.  
  6679.     /* Send header of slave address */
  6680.     hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
  6681.   }
  6682.  
  6683.   /* Wait until ADDR flag is set */
  6684.   if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  6685.   {
  6686.     return HAL_ERROR;
  6687.   }
  6688.  
  6689.   return HAL_OK;
  6690. }
  6691.  
  6692. /**
  6693.   * @brief  Master sends target device address followed by internal memory address for write request.
  6694.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  6695.   *         the configuration information for I2C module
  6696.   * @param  DevAddress Target device address: The device 7 bits address value
  6697.   *         in datasheet must be shifted to the left before calling the interface
  6698.   * @param  MemAddress Internal memory address
  6699.   * @param  MemAddSize Size of internal memory address
  6700.   * @param  Timeout Timeout duration
  6701.   * @param  Tickstart Tick start value
  6702.   * @retval HAL status
  6703.   */
  6704. static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
  6705. {
  6706.   /* Generate Start */
  6707.   SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  6708.  
  6709.   /* Wait until SB flag is set */
  6710.   if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  6711.   {
  6712.     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
  6713.     {
  6714.       hi2c->ErrorCode = HAL_I2C_WRONG_START;
  6715.     }
  6716.     return HAL_TIMEOUT;
  6717.   }
  6718.  
  6719.   /* Send slave address */
  6720.   hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  6721.  
  6722.   /* Wait until ADDR flag is set */
  6723.   if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  6724.   {
  6725.     return HAL_ERROR;
  6726.   }
  6727.  
  6728.   /* Clear ADDR flag */
  6729.   __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  6730.  
  6731.   /* Wait until TXE flag is set */
  6732.   if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  6733.   {
  6734.     if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  6735.     {
  6736.       /* Generate Stop */
  6737.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  6738.     }
  6739.     return HAL_ERROR;
  6740.   }
  6741.  
  6742.   /* If Memory address size is 8Bit */
  6743.   if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
  6744.   {
  6745.     /* Send Memory Address */
  6746.     hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  6747.   }
  6748.   /* If Memory address size is 16Bit */
  6749.   else
  6750.   {
  6751.     /* Send MSB of Memory Address */
  6752.     hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  6753.  
  6754.     /* Wait until TXE flag is set */
  6755.     if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  6756.     {
  6757.       if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  6758.       {
  6759.         /* Generate Stop */
  6760.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  6761.       }
  6762.       return HAL_ERROR;
  6763.     }
  6764.  
  6765.     /* Send LSB of Memory Address */
  6766.     hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  6767.   }
  6768.  
  6769.   return HAL_OK;
  6770. }
  6771.  
  6772. /**
  6773.   * @brief  Master sends target device address followed by internal memory address for read request.
  6774.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  6775.   *         the configuration information for I2C module
  6776.   * @param  DevAddress Target device address: The device 7 bits address value
  6777.   *         in datasheet must be shifted to the left before calling the interface
  6778.   * @param  MemAddress Internal memory address
  6779.   * @param  MemAddSize Size of internal memory address
  6780.   * @param  Timeout Timeout duration
  6781.   * @param  Tickstart Tick start value
  6782.   * @retval HAL status
  6783.   */
  6784. static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
  6785. {
  6786.   /* Enable Acknowledge */
  6787.   SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  6788.  
  6789.   /* Generate Start */
  6790.   SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  6791.  
  6792.   /* Wait until SB flag is set */
  6793.   if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  6794.   {
  6795.     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
  6796.     {
  6797.       hi2c->ErrorCode = HAL_I2C_WRONG_START;
  6798.     }
  6799.     return HAL_TIMEOUT;
  6800.   }
  6801.  
  6802.   /* Send slave address */
  6803.   hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  6804.  
  6805.   /* Wait until ADDR flag is set */
  6806.   if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  6807.   {
  6808.     return HAL_ERROR;
  6809.   }
  6810.  
  6811.   /* Clear ADDR flag */
  6812.   __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  6813.  
  6814.   /* Wait until TXE flag is set */
  6815.   if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  6816.   {
  6817.     if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  6818.     {
  6819.       /* Generate Stop */
  6820.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  6821.     }
  6822.     return HAL_ERROR;
  6823.   }
  6824.  
  6825.   /* If Memory address size is 8Bit */
  6826.   if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
  6827.   {
  6828.     /* Send Memory Address */
  6829.     hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  6830.   }
  6831.   /* If Memory address size is 16Bit */
  6832.   else
  6833.   {
  6834.     /* Send MSB of Memory Address */
  6835.     hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  6836.  
  6837.     /* Wait until TXE flag is set */
  6838.     if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  6839.     {
  6840.       if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  6841.       {
  6842.         /* Generate Stop */
  6843.         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  6844.       }
  6845.       return HAL_ERROR;
  6846.     }
  6847.  
  6848.     /* Send LSB of Memory Address */
  6849.     hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  6850.   }
  6851.  
  6852.   /* Wait until TXE flag is set */
  6853.   if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  6854.   {
  6855.     if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  6856.     {
  6857.       /* Generate Stop */
  6858.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  6859.     }
  6860.     return HAL_ERROR;
  6861.   }
  6862.  
  6863.   /* Generate Restart */
  6864.   SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  6865.  
  6866.   /* Wait until SB flag is set */
  6867.   if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  6868.   {
  6869.     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
  6870.     {
  6871.       hi2c->ErrorCode = HAL_I2C_WRONG_START;
  6872.     }
  6873.     return HAL_TIMEOUT;
  6874.   }
  6875.  
  6876.   /* Send slave address */
  6877.   hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  6878.  
  6879.   /* Wait until ADDR flag is set */
  6880.   if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  6881.   {
  6882.     return HAL_ERROR;
  6883.   }
  6884.  
  6885.   return HAL_OK;
  6886. }
  6887.  
  6888. /**
  6889.   * @brief  DMA I2C process complete callback.
  6890.   * @param  hdma DMA handle
  6891.   * @retval None
  6892.   */
  6893. static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma)
  6894. {
  6895.   I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
  6896.  
  6897.   /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  6898.   HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  6899.   HAL_I2C_ModeTypeDef CurrentMode   = hi2c->Mode;
  6900.   uint32_t CurrentXferOptions       = hi2c->XferOptions;
  6901.  
  6902.   /* Disable EVT and ERR interrupt */
  6903.   __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  6904.  
  6905.   /* Clear Complete callback */
  6906.   if (hi2c->hdmatx != NULL)
  6907.   {
  6908.     hi2c->hdmatx->XferCpltCallback = NULL;
  6909.   }
  6910.   if (hi2c->hdmarx != NULL)
  6911.   {
  6912.     hi2c->hdmarx->XferCpltCallback = NULL;
  6913.   }
  6914.  
  6915.   if ((((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_BUSY_TX) == (uint32_t)HAL_I2C_STATE_BUSY_TX) || ((((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_BUSY_RX) == (uint32_t)HAL_I2C_STATE_BUSY_RX) && (CurrentMode == HAL_I2C_MODE_SLAVE)))
  6916.   {
  6917.     /* Disable DMA Request */
  6918.     CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  6919.  
  6920.     hi2c->XferCount = 0U;
  6921.  
  6922.     if (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN)
  6923.     {
  6924.       /* Set state at HAL_I2C_STATE_LISTEN */
  6925.       hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
  6926.       hi2c->State = HAL_I2C_STATE_LISTEN;
  6927.  
  6928.       /* Call the corresponding callback to inform upper layer of End of Transfer */
  6929. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6930.       hi2c->SlaveTxCpltCallback(hi2c);
  6931. #else
  6932.       HAL_I2C_SlaveTxCpltCallback(hi2c);
  6933. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6934.     }
  6935.     else if (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN)
  6936.     {
  6937.       /* Set state at HAL_I2C_STATE_LISTEN */
  6938.       hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
  6939.       hi2c->State = HAL_I2C_STATE_LISTEN;
  6940.  
  6941.       /* Call the corresponding callback to inform upper layer of End of Transfer */
  6942. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6943.       hi2c->SlaveRxCpltCallback(hi2c);
  6944. #else
  6945.       HAL_I2C_SlaveRxCpltCallback(hi2c);
  6946. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6947.     }
  6948.     else
  6949.     {
  6950.       /* Do nothing */
  6951.     }
  6952.  
  6953.     /* Enable EVT and ERR interrupt to treat end of transfer in IRQ handler */
  6954.     __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  6955.   }
  6956.   /* Check current Mode, in case of treatment DMA handler have been preempted by a prior interrupt */
  6957.   else if (hi2c->Mode != HAL_I2C_MODE_NONE)
  6958.   {
  6959.     if (hi2c->XferCount == (uint16_t)1)
  6960.     {
  6961.       /* Disable Acknowledge */
  6962.       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  6963.     }
  6964.  
  6965.     /* Disable EVT and ERR interrupt */
  6966.     __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  6967.  
  6968.     /* Prepare next transfer or stop current transfer */
  6969.     if ((CurrentXferOptions == I2C_NO_OPTION_FRAME) || (CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_OTHER_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME))
  6970.     {
  6971.       /* Generate Stop */
  6972.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  6973.     }
  6974.  
  6975.     /* Disable Last DMA */
  6976.     CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
  6977.  
  6978.     /* Disable DMA Request */
  6979.     CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
  6980.  
  6981.     hi2c->XferCount = 0U;
  6982.  
  6983.     /* Check if Errors has been detected during transfer */
  6984.     if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  6985.     {
  6986. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  6987.       hi2c->ErrorCallback(hi2c);
  6988. #else
  6989.       HAL_I2C_ErrorCallback(hi2c);
  6990. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  6991.     }
  6992.     else
  6993.     {
  6994.       hi2c->State = HAL_I2C_STATE_READY;
  6995.  
  6996.       if (hi2c->Mode == HAL_I2C_MODE_MEM)
  6997.       {
  6998.         hi2c->Mode = HAL_I2C_MODE_NONE;
  6999.         hi2c->PreviousState = I2C_STATE_NONE;
  7000.  
  7001. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  7002.         hi2c->MemRxCpltCallback(hi2c);
  7003. #else
  7004.         HAL_I2C_MemRxCpltCallback(hi2c);
  7005. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  7006.       }
  7007.       else
  7008.       {
  7009.         hi2c->Mode = HAL_I2C_MODE_NONE;
  7010.         hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
  7011.  
  7012. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  7013.         hi2c->MasterRxCpltCallback(hi2c);
  7014. #else
  7015.         HAL_I2C_MasterRxCpltCallback(hi2c);
  7016. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  7017.       }
  7018.     }
  7019.   }
  7020.   else
  7021.   {
  7022.     /* Do nothing */
  7023.   }
  7024. }
  7025.  
  7026. /**
  7027.   * @brief  DMA I2C communication error callback.
  7028.   * @param  hdma DMA handle
  7029.   * @retval None
  7030.   */
  7031. static void I2C_DMAError(DMA_HandleTypeDef *hdma)
  7032. {
  7033.   I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
  7034.  
  7035.   /* Clear Complete callback */
  7036.   if (hi2c->hdmatx != NULL)
  7037.   {
  7038.     hi2c->hdmatx->XferCpltCallback = NULL;
  7039.   }
  7040.   if (hi2c->hdmarx != NULL)
  7041.   {
  7042.     hi2c->hdmarx->XferCpltCallback = NULL;
  7043.   }
  7044.  
  7045.   /* Disable Acknowledge */
  7046.   CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  7047.  
  7048.   hi2c->XferCount       = 0U;
  7049.   hi2c->State           = HAL_I2C_STATE_READY;
  7050.   hi2c->Mode            = HAL_I2C_MODE_NONE;
  7051.   hi2c->ErrorCode       |= HAL_I2C_ERROR_DMA;
  7052.  
  7053. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  7054.   hi2c->ErrorCallback(hi2c);
  7055. #else
  7056.   HAL_I2C_ErrorCallback(hi2c);
  7057. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  7058. }
  7059.  
  7060. /**
  7061.   * @brief DMA I2C communication abort callback
  7062.   *        (To be called at end of DMA Abort procedure).
  7063.   * @param hdma DMA handle.
  7064.   * @retval None
  7065.   */
  7066. static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
  7067. {
  7068.   __IO uint32_t count = 0U;
  7069.   I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
  7070.  
  7071.   /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  7072.   HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  7073.  
  7074.   /* During abort treatment, check that there is no pending STOP request */
  7075.   /* Wait until STOP flag is reset */
  7076.   count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U);
  7077.   do
  7078.   {
  7079.     if (count == 0U)
  7080.     {
  7081.       hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  7082.       break;
  7083.     }
  7084.     count--;
  7085.   }
  7086.   while (READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP);
  7087.  
  7088.   /* Clear Complete callback */
  7089.   if (hi2c->hdmatx != NULL)
  7090.   {
  7091.     hi2c->hdmatx->XferCpltCallback = NULL;
  7092.   }
  7093.   if (hi2c->hdmarx != NULL)
  7094.   {
  7095.     hi2c->hdmarx->XferCpltCallback = NULL;
  7096.   }
  7097.  
  7098.   /* Disable Acknowledge */
  7099.   CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  7100.  
  7101.   hi2c->XferCount = 0U;
  7102.  
  7103.   /* Reset XferAbortCallback */
  7104.   if (hi2c->hdmatx != NULL)
  7105.   {
  7106.     hi2c->hdmatx->XferAbortCallback = NULL;
  7107.   }
  7108.   if (hi2c->hdmarx != NULL)
  7109.   {
  7110.     hi2c->hdmarx->XferAbortCallback = NULL;
  7111.   }
  7112.  
  7113.   /* Disable I2C peripheral to prevent dummy data in buffer */
  7114.   __HAL_I2C_DISABLE(hi2c);
  7115.  
  7116.   /* Check if come from abort from user */
  7117.   if (hi2c->State == HAL_I2C_STATE_ABORT)
  7118.   {
  7119.     hi2c->State         = HAL_I2C_STATE_READY;
  7120.     hi2c->Mode          = HAL_I2C_MODE_NONE;
  7121.     hi2c->ErrorCode     = HAL_I2C_ERROR_NONE;
  7122.  
  7123.     /* Call the corresponding callback to inform upper layer of End of Transfer */
  7124. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  7125.     hi2c->AbortCpltCallback(hi2c);
  7126. #else
  7127.     HAL_I2C_AbortCpltCallback(hi2c);
  7128. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  7129.   }
  7130.   else
  7131.   {
  7132.     if (((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
  7133.     {
  7134.       /* Renable I2C peripheral */
  7135.       __HAL_I2C_ENABLE(hi2c);
  7136.  
  7137.       /* Enable Acknowledge */
  7138.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  7139.  
  7140.       /* keep HAL_I2C_STATE_LISTEN */
  7141.       hi2c->PreviousState = I2C_STATE_NONE;
  7142.       hi2c->State = HAL_I2C_STATE_LISTEN;
  7143.     }
  7144.     else
  7145.     {
  7146.       hi2c->State = HAL_I2C_STATE_READY;
  7147.       hi2c->Mode = HAL_I2C_MODE_NONE;
  7148.     }
  7149.  
  7150.     /* Call the corresponding callback to inform upper layer of End of Transfer */
  7151. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  7152.     hi2c->ErrorCallback(hi2c);
  7153. #else
  7154.     HAL_I2C_ErrorCallback(hi2c);
  7155. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  7156.   }
  7157. }
  7158.  
  7159. /**
  7160.   * @brief  This function handles I2C Communication Timeout.
  7161.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  7162.   *         the configuration information for I2C module
  7163.   * @param  Flag specifies the I2C flag to check.
  7164.   * @param  Status The new Flag status (SET or RESET).
  7165.   * @param  Timeout Timeout duration
  7166.   * @param  Tickstart Tick start value
  7167.   * @retval HAL status
  7168.   */
  7169. static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
  7170. {
  7171.   /* Wait until flag is set */
  7172.   while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
  7173.   {
  7174.     /* Check for the Timeout */
  7175.     if (Timeout != HAL_MAX_DELAY)
  7176.     {
  7177.       if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
  7178.       {
  7179.         hi2c->PreviousState     = I2C_STATE_NONE;
  7180.         hi2c->State             = HAL_I2C_STATE_READY;
  7181.         hi2c->Mode              = HAL_I2C_MODE_NONE;
  7182.         hi2c->ErrorCode         |= HAL_I2C_ERROR_TIMEOUT;
  7183.  
  7184.         /* Process Unlocked */
  7185.         __HAL_UNLOCK(hi2c);
  7186.  
  7187.         return HAL_ERROR;
  7188.       }
  7189.     }
  7190.   }
  7191.   return HAL_OK;
  7192. }
  7193.  
  7194. /**
  7195.   * @brief  This function handles I2C Communication Timeout for Master addressing phase.
  7196.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  7197.   *         the configuration information for I2C module
  7198.   * @param  Flag specifies the I2C flag to check.
  7199.   * @param  Timeout Timeout duration
  7200.   * @param  Tickstart Tick start value
  7201.   * @retval HAL status
  7202.   */
  7203. static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
  7204. {
  7205.   while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
  7206.   {
  7207.     if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  7208.     {
  7209.       /* Generate Stop */
  7210.       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  7211.  
  7212.       /* Clear AF Flag */
  7213.       __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  7214.  
  7215.       hi2c->PreviousState       = I2C_STATE_NONE;
  7216.       hi2c->State               = HAL_I2C_STATE_READY;
  7217.       hi2c->Mode                = HAL_I2C_MODE_NONE;
  7218.       hi2c->ErrorCode           |= HAL_I2C_ERROR_AF;
  7219.  
  7220.       /* Process Unlocked */
  7221.       __HAL_UNLOCK(hi2c);
  7222.  
  7223.       return HAL_ERROR;
  7224.     }
  7225.  
  7226.     /* Check for the Timeout */
  7227.     if (Timeout != HAL_MAX_DELAY)
  7228.     {
  7229.       if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
  7230.       {
  7231.         hi2c->PreviousState       = I2C_STATE_NONE;
  7232.         hi2c->State               = HAL_I2C_STATE_READY;
  7233.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  7234.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  7235.  
  7236.         /* Process Unlocked */
  7237.         __HAL_UNLOCK(hi2c);
  7238.  
  7239.         return HAL_ERROR;
  7240.       }
  7241.     }
  7242.   }
  7243.   return HAL_OK;
  7244. }
  7245.  
  7246. /**
  7247.   * @brief  This function handles I2C Communication Timeout for specific usage of TXE flag.
  7248.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  7249.   *                the configuration information for the specified I2C.
  7250.   * @param  Timeout Timeout duration
  7251.   * @param  Tickstart Tick start value
  7252.   * @retval HAL status
  7253.   */
  7254. static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  7255. {
  7256.   while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
  7257.   {
  7258.     /* Check if a NACK is detected */
  7259.     if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  7260.     {
  7261.       return HAL_ERROR;
  7262.     }
  7263.  
  7264.     /* Check for the Timeout */
  7265.     if (Timeout != HAL_MAX_DELAY)
  7266.     {
  7267.       if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
  7268.       {
  7269.         hi2c->PreviousState       = I2C_STATE_NONE;
  7270.         hi2c->State               = HAL_I2C_STATE_READY;
  7271.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  7272.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  7273.  
  7274.         /* Process Unlocked */
  7275.         __HAL_UNLOCK(hi2c);
  7276.  
  7277.         return HAL_ERROR;
  7278.       }
  7279.     }
  7280.   }
  7281.   return HAL_OK;
  7282. }
  7283.  
  7284. /**
  7285.   * @brief  This function handles I2C Communication Timeout for specific usage of BTF flag.
  7286.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  7287.   *                the configuration information for the specified I2C.
  7288.   * @param  Timeout Timeout duration
  7289.   * @param  Tickstart Tick start value
  7290.   * @retval HAL status
  7291.   */
  7292. static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  7293. {
  7294.   while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
  7295.   {
  7296.     /* Check if a NACK is detected */
  7297.     if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  7298.     {
  7299.       return HAL_ERROR;
  7300.     }
  7301.  
  7302.     /* Check for the Timeout */
  7303.     if (Timeout != HAL_MAX_DELAY)
  7304.     {
  7305.       if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
  7306.       {
  7307.         hi2c->PreviousState       = I2C_STATE_NONE;
  7308.         hi2c->State               = HAL_I2C_STATE_READY;
  7309.         hi2c->Mode                = HAL_I2C_MODE_NONE;
  7310.         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  7311.  
  7312.         /* Process Unlocked */
  7313.         __HAL_UNLOCK(hi2c);
  7314.  
  7315.         return HAL_ERROR;
  7316.       }
  7317.     }
  7318.   }
  7319.   return HAL_OK;
  7320. }
  7321.  
  7322. /**
  7323.   * @brief  This function handles I2C Communication Timeout for specific usage of STOP flag.
  7324.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  7325.   *                the configuration information for the specified I2C.
  7326.   * @param  Timeout Timeout duration
  7327.   * @param  Tickstart Tick start value
  7328.   * @retval HAL status
  7329.   */
  7330. static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  7331. {
  7332.   while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
  7333.   {
  7334.     /* Check if a NACK is detected */
  7335.     if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  7336.     {
  7337.       return HAL_ERROR;
  7338.     }
  7339.  
  7340.     /* Check for the Timeout */
  7341.     if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
  7342.     {
  7343.       hi2c->PreviousState       = I2C_STATE_NONE;
  7344.       hi2c->State               = HAL_I2C_STATE_READY;
  7345.       hi2c->Mode                = HAL_I2C_MODE_NONE;
  7346.       hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  7347.  
  7348.       /* Process Unlocked */
  7349.       __HAL_UNLOCK(hi2c);
  7350.  
  7351.       return HAL_ERROR;
  7352.     }
  7353.   }
  7354.   return HAL_OK;
  7355. }
  7356.  
  7357. /**
  7358.   * @brief  This function handles I2C Communication Timeout for specific usage of STOP request through Interrupt.
  7359.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  7360.   *                the configuration information for the specified I2C.
  7361.   * @retval HAL status
  7362.   */
  7363. static HAL_StatusTypeDef I2C_WaitOnSTOPRequestThroughIT(I2C_HandleTypeDef *hi2c)
  7364. {
  7365.   __IO uint32_t count = 0U;
  7366.  
  7367.   /* Wait until STOP flag is reset */
  7368.   count = I2C_TIMEOUT_STOP_FLAG * (SystemCoreClock / 25U / 1000U);
  7369.   do
  7370.   {
  7371.     count--;
  7372.     if (count == 0U)
  7373.     {
  7374.       hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  7375.  
  7376.       return HAL_ERROR;
  7377.     }
  7378.   }
  7379.   while (READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP);
  7380.  
  7381.   return HAL_OK;
  7382. }
  7383.  
  7384. /**
  7385.   * @brief  This function handles I2C Communication Timeout for specific usage of RXNE flag.
  7386.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  7387.   *                the configuration information for the specified I2C.
  7388.   * @param  Timeout Timeout duration
  7389.   * @param  Tickstart Tick start value
  7390.   * @retval HAL status
  7391.   */
  7392. static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  7393. {
  7394.  
  7395.   while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
  7396.   {
  7397.     /* Check if a STOPF is detected */
  7398.     if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
  7399.     {
  7400.       /* Clear STOP Flag */
  7401.       __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
  7402.  
  7403.       hi2c->PreviousState       = I2C_STATE_NONE;
  7404.       hi2c->State               = HAL_I2C_STATE_READY;
  7405.       hi2c->Mode                = HAL_I2C_MODE_NONE;
  7406.       hi2c->ErrorCode           |= HAL_I2C_ERROR_NONE;
  7407.  
  7408.       /* Process Unlocked */
  7409.       __HAL_UNLOCK(hi2c);
  7410.  
  7411.       return HAL_ERROR;
  7412.     }
  7413.  
  7414.     /* Check for the Timeout */
  7415.     if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
  7416.     {
  7417.       hi2c->PreviousState       = I2C_STATE_NONE;
  7418.       hi2c->State               = HAL_I2C_STATE_READY;
  7419.       hi2c->Mode                = HAL_I2C_MODE_NONE;
  7420.       hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
  7421.  
  7422.       /* Process Unlocked */
  7423.       __HAL_UNLOCK(hi2c);
  7424.  
  7425.       return HAL_ERROR;
  7426.     }
  7427.   }
  7428.   return HAL_OK;
  7429. }
  7430.  
  7431. /**
  7432.   * @brief  This function handles Acknowledge failed detection during an I2C Communication.
  7433.   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
  7434.   *                the configuration information for the specified I2C.
  7435.   * @retval HAL status
  7436.   */
  7437. static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
  7438. {
  7439.   if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  7440.   {
  7441.     /* Clear NACKF Flag */
  7442.     __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  7443.  
  7444.     hi2c->PreviousState       = I2C_STATE_NONE;
  7445.     hi2c->State               = HAL_I2C_STATE_READY;
  7446.     hi2c->Mode                = HAL_I2C_MODE_NONE;
  7447.     hi2c->ErrorCode           |= HAL_I2C_ERROR_AF;
  7448.  
  7449.     /* Process Unlocked */
  7450.     __HAL_UNLOCK(hi2c);
  7451.  
  7452.     return HAL_ERROR;
  7453.   }
  7454.   return HAL_OK;
  7455. }
  7456.  
  7457. /**
  7458.   * @brief  Convert I2Cx OTHER_xxx XferOptions to functional XferOptions.
  7459.   * @param  hi2c I2C handle.
  7460.   * @retval None
  7461.   */
  7462. static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c)
  7463. {
  7464.   /* if user set XferOptions to I2C_OTHER_FRAME            */
  7465.   /* it request implicitly to generate a restart condition */
  7466.   /* set XferOptions to I2C_FIRST_FRAME                    */
  7467.   if (hi2c->XferOptions == I2C_OTHER_FRAME)
  7468.   {
  7469.     hi2c->XferOptions = I2C_FIRST_FRAME;
  7470.   }
  7471.   /* else if user set XferOptions to I2C_OTHER_AND_LAST_FRAME */
  7472.   /* it request implicitly to generate a restart condition    */
  7473.   /* then generate a stop condition at the end of transfer    */
  7474.   /* set XferOptions to I2C_FIRST_AND_LAST_FRAME              */
  7475.   else if (hi2c->XferOptions == I2C_OTHER_AND_LAST_FRAME)
  7476.   {
  7477.     hi2c->XferOptions = I2C_FIRST_AND_LAST_FRAME;
  7478.   }
  7479.   else
  7480.   {
  7481.     /* Nothing to do */
  7482.   }
  7483. }
  7484.  
  7485. /**
  7486.   * @}
  7487.   */
  7488.  
  7489. #endif /* HAL_I2C_MODULE_ENABLED */
  7490. /**
  7491.   * @}
  7492.   */
  7493.  
  7494. /**
  7495.   * @}
  7496.   */
  7497.  
  7498. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  7499.