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  1. /**
  2.   ******************************************************************************
  3.   * @file    stm32l1xx_hal_pcd.h
  4.   * @author  MCD Application Team
  5.   * @brief   Header file of PCD HAL module.
  6.   ******************************************************************************
  7.   * @attention
  8.   *
  9.   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  10.   * All rights reserved.</center></h2>
  11.   *
  12.   * This software component is licensed by ST under BSD 3-Clause license,
  13.   * the "License"; You may not use this file except in compliance with the
  14.   * License. You may obtain a copy of the License at:
  15.   *                        opensource.org/licenses/BSD-3-Clause
  16.   *
  17.   ******************************************************************************
  18.   */
  19.  
  20. /* Define to prevent recursive inclusion -------------------------------------*/
  21. #ifndef STM32L1xx_HAL_PCD_H
  22. #define STM32L1xx_HAL_PCD_H
  23.  
  24. #ifdef __cplusplus
  25. extern "C" {
  26. #endif
  27.  
  28. /* Includes ------------------------------------------------------------------*/
  29. #include "stm32l1xx_ll_usb.h"
  30.  
  31. #if defined (USB)
  32.  
  33. /** @addtogroup STM32L1xx_HAL_Driver
  34.   * @{
  35.   */
  36.  
  37. /** @addtogroup PCD
  38.   * @{
  39.   */
  40.  
  41. /* Exported types ------------------------------------------------------------*/
  42. /** @defgroup PCD_Exported_Types PCD Exported Types
  43.   * @{
  44.   */
  45.  
  46. /**
  47.   * @brief  PCD State structure definition
  48.   */
  49. typedef enum
  50. {
  51.   HAL_PCD_STATE_RESET   = 0x00,
  52.   HAL_PCD_STATE_READY   = 0x01,
  53.   HAL_PCD_STATE_ERROR   = 0x02,
  54.   HAL_PCD_STATE_BUSY    = 0x03,
  55.   HAL_PCD_STATE_TIMEOUT = 0x04
  56. } PCD_StateTypeDef;
  57.  
  58. /* Device LPM suspend state */
  59. typedef enum
  60. {
  61.   LPM_L0 = 0x00, /* on */
  62.   LPM_L1 = 0x01, /* LPM L1 sleep */
  63.   LPM_L2 = 0x02, /* suspend */
  64.   LPM_L3 = 0x03, /* off */
  65. } PCD_LPM_StateTypeDef;
  66.  
  67. typedef enum
  68. {
  69.   PCD_LPM_L0_ACTIVE = 0x00, /* on */
  70.   PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
  71. } PCD_LPM_MsgTypeDef;
  72.  
  73. typedef enum
  74. {
  75.   PCD_BCD_ERROR                     = 0xFF,
  76.   PCD_BCD_CONTACT_DETECTION         = 0xFE,
  77.   PCD_BCD_STD_DOWNSTREAM_PORT       = 0xFD,
  78.   PCD_BCD_CHARGING_DOWNSTREAM_PORT  = 0xFC,
  79.   PCD_BCD_DEDICATED_CHARGING_PORT   = 0xFB,
  80.   PCD_BCD_DISCOVERY_COMPLETED       = 0x00,
  81.  
  82. } PCD_BCD_MsgTypeDef;
  83.  
  84.  
  85.  
  86.  
  87.  
  88. typedef USB_TypeDef        PCD_TypeDef;
  89. typedef USB_CfgTypeDef     PCD_InitTypeDef;
  90. typedef USB_EPTypeDef      PCD_EPTypeDef;
  91.  
  92.  
  93. /**
  94.   * @brief  PCD Handle Structure definition
  95.   */
  96. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  97. typedef struct __PCD_HandleTypeDef
  98. #else
  99. typedef struct
  100. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  101. {
  102.   PCD_TypeDef             *Instance;   /*!< Register base address             */
  103.   PCD_InitTypeDef         Init;        /*!< PCD required parameters           */
  104.   __IO uint8_t            USB_Address; /*!< USB Address                       */
  105.   PCD_EPTypeDef           IN_ep[8];   /*!< IN endpoint parameters             */
  106.   PCD_EPTypeDef           OUT_ep[8];  /*!< OUT endpoint parameters            */
  107.   HAL_LockTypeDef         Lock;        /*!< PCD peripheral status             */
  108.   __IO PCD_StateTypeDef   State;       /*!< PCD communication state           */
  109.   __IO  uint32_t          ErrorCode;   /*!< PCD Error code                    */
  110.   uint32_t                Setup[12];   /*!< Setup packet buffer               */
  111.   PCD_LPM_StateTypeDef    LPM_State;   /*!< LPM State                         */
  112.   uint32_t                BESL;
  113.  
  114.   void                    *pData;      /*!< Pointer to upper stack Handler */
  115.  
  116. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  117.   void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd);                              /*!< USB OTG PCD SOF callback                */
  118.   void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Setup Stage callback        */
  119.   void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd);                            /*!< USB OTG PCD Reset callback              */
  120.   void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Suspend callback            */
  121.   void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd);                           /*!< USB OTG PCD Resume callback             */
  122.   void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Connect callback            */
  123.   void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Disconnect callback         */
  124.  
  125.   void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);      /*!< USB OTG PCD Data OUT Stage callback     */
  126.   void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);       /*!< USB OTG PCD Data IN Stage callback      */
  127.   void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);  /*!< USB OTG PCD ISO OUT Incomplete callback */
  128.   void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);   /*!< USB OTG PCD ISO IN Incomplete callback  */
  129.  
  130.   void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Msp Init callback           */
  131.   void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd);                        /*!< USB OTG PCD Msp DeInit callback         */
  132. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  133. } PCD_HandleTypeDef;
  134.  
  135. /**
  136.   * @}
  137.   */
  138.  
  139. /* Include PCD HAL Extended module */
  140. #include "stm32l1xx_hal_pcd_ex.h"
  141.  
  142. /* Exported constants --------------------------------------------------------*/
  143. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  144.   * @{
  145.   */
  146.  
  147. /** @defgroup PCD_Speed PCD Speed
  148.   * @{
  149.   */
  150. #define PCD_SPEED_FULL               USBD_FS_SPEED
  151. /**
  152.   * @}
  153.   */
  154.  
  155. /** @defgroup PCD_PHY_Module PCD PHY Module
  156.   * @{
  157.   */
  158. #define PCD_PHY_ULPI                 1U
  159. #define PCD_PHY_EMBEDDED             2U
  160. #define PCD_PHY_UTMI                 3U
  161. /**
  162.   * @}
  163.   */
  164.  
  165. /** @defgroup PCD_Error_Code_definition PCD Error Code definition
  166.   * @brief  PCD Error Code definition
  167.   * @{
  168.   */
  169. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  170. #define  HAL_PCD_ERROR_INVALID_CALLBACK                        (0x00000010U)    /*!< Invalid Callback error  */
  171. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  172.  
  173. /**
  174.   * @}
  175.   */
  176.  
  177. /**
  178.   * @}
  179.   */
  180.  
  181. /* Exported macros -----------------------------------------------------------*/
  182. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  183.   *  @brief macros to handle interrupts and specific clock configurations
  184.   * @{
  185.   */
  186.  
  187.  
  188. #define __HAL_PCD_ENABLE(__HANDLE__)                                  (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  189. #define __HAL_PCD_DISABLE(__HANDLE__)                                 (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  190. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)                 ((USB_ReadInterrupts((__HANDLE__)->Instance)\
  191.                                                                         & (__INTERRUPT__)) == (__INTERRUPT__))
  192.  
  193. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)               (((__HANDLE__)->Instance->ISTR)\
  194.                                                                        &= (uint16_t)(~(__INTERRUPT__)))
  195.  
  196. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT()                             EXTI->IMR |= USB_WAKEUP_EXTI_LINE
  197. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT()                            EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
  198. #define __HAL_USB_WAKEUP_EXTI_GET_FLAG()                              EXTI->PR & (USB_WAKEUP_EXTI_LINE)
  199. #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG()                            EXTI->PR = USB_WAKEUP_EXTI_LINE
  200.  
  201. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  202.   do { \
  203.     EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  204.     EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
  205.   } while(0U)
  206.  
  207.  
  208.  
  209. /**
  210.   * @}
  211.   */
  212.  
  213. /* Exported functions --------------------------------------------------------*/
  214. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  215.   * @{
  216.   */
  217.  
  218. /* Initialization/de-initialization functions  ********************************/
  219. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  220.   * @{
  221.   */
  222. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  223. HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
  224. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  225. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  226.  
  227. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  228. /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
  229.   * @brief  HAL USB OTG PCD Callback ID enumeration definition
  230.   * @{
  231.   */
  232. typedef enum
  233. {
  234.   HAL_PCD_SOF_CB_ID          = 0x01,      /*!< USB PCD SOF callback ID          */
  235.   HAL_PCD_SETUPSTAGE_CB_ID   = 0x02,      /*!< USB PCD Setup Stage callback ID  */
  236.   HAL_PCD_RESET_CB_ID        = 0x03,      /*!< USB PCD Reset callback ID        */
  237.   HAL_PCD_SUSPEND_CB_ID      = 0x04,      /*!< USB PCD Suspend callback ID      */
  238.   HAL_PCD_RESUME_CB_ID       = 0x05,      /*!< USB PCD Resume callback ID       */
  239.   HAL_PCD_CONNECT_CB_ID      = 0x06,      /*!< USB PCD Connect callback ID      */
  240.   HAL_PCD_DISCONNECT_CB_ID   = 0x07,      /*!< USB PCD Disconnect callback ID   */
  241.  
  242.   HAL_PCD_MSPINIT_CB_ID      = 0x08,      /*!< USB PCD MspInit callback ID      */
  243.   HAL_PCD_MSPDEINIT_CB_ID    = 0x09       /*!< USB PCD MspDeInit callback ID    */
  244.  
  245. } HAL_PCD_CallbackIDTypeDef;
  246. /**
  247.   * @}
  248.   */
  249.  
  250. /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
  251.   * @brief  HAL USB OTG PCD Callback pointer definition
  252.   * @{
  253.   */
  254.  
  255. typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd);                                   /*!< pointer to a common USB OTG PCD callback function  */
  256. typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD Data OUT Stage callback     */
  257. typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD Data IN Stage callback      */
  258. typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
  259. typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD ISO IN Incomplete callback  */
  260.  
  261. /**
  262.   * @}
  263.   */
  264.  
  265. HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd,
  266.                                            HAL_PCD_CallbackIDTypeDef CallbackID,
  267.                                            pPCD_CallbackTypeDef pCallback);
  268.  
  269. HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd,
  270.                                              HAL_PCD_CallbackIDTypeDef CallbackID);
  271.  
  272. HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
  273.                                                        pPCD_DataOutStageCallbackTypeDef pCallback);
  274.  
  275. HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
  276.  
  277. HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
  278.                                                       pPCD_DataInStageCallbackTypeDef pCallback);
  279.  
  280. HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
  281.  
  282. HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
  283.                                                        pPCD_IsoOutIncpltCallbackTypeDef pCallback);
  284.  
  285. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
  286.  
  287. HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
  288.                                                       pPCD_IsoInIncpltCallbackTypeDef pCallback);
  289.  
  290. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
  291.  
  292. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  293. /**
  294.   * @}
  295.   */
  296.  
  297. /* I/O operation functions  ***************************************************/
  298. /* Non-Blocking mode: Interrupt */
  299. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
  300.   * @{
  301.   */
  302. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  303. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  304. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  305. void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd);
  306.  
  307. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  308. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  309. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  310. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  311. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  312. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  313. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  314.  
  315. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  316. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  317. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  318. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  319. /**
  320.   * @}
  321.   */
  322.  
  323. /* Peripheral Control functions  **********************************************/
  324. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  325.   * @{
  326.   */
  327. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  328. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  329. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  330. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
  331.                                   uint16_t ep_mps, uint8_t ep_type);
  332.  
  333. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  334. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
  335.                                      uint8_t *pBuf, uint32_t len);
  336.  
  337. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
  338.                                       uint8_t *pBuf, uint32_t len);
  339.  
  340.  
  341. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  342. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  343. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  344. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  345. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  346.  
  347. uint32_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  348. /**
  349.   * @}
  350.   */
  351.  
  352. /* Peripheral State functions  ************************************************/
  353. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  354.   * @{
  355.   */
  356. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  357. /**
  358.   * @}
  359.   */
  360.  
  361. /**
  362.   * @}
  363.   */
  364.  
  365. /* Private constants ---------------------------------------------------------*/
  366. /** @defgroup PCD_Private_Constants PCD Private Constants
  367.   * @{
  368.   */
  369. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  370.   * @{
  371.   */
  372.  
  373.  
  374. #define USB_WAKEUP_EXTI_LINE                                          (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
  375.  
  376.  
  377. /**
  378.   * @}
  379.   */
  380.  
  381. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  382.   * @{
  383.   */
  384. #define PCD_EP0MPS_64                                                 EP_MPS_64
  385. #define PCD_EP0MPS_32                                                 EP_MPS_32
  386. #define PCD_EP0MPS_16                                                 EP_MPS_16
  387. #define PCD_EP0MPS_08                                                 EP_MPS_8
  388. /**
  389.   * @}
  390.   */
  391.  
  392. /** @defgroup PCD_ENDP PCD ENDP
  393.   * @{
  394.   */
  395. #define PCD_ENDP0                                                     0U
  396. #define PCD_ENDP1                                                     1U
  397. #define PCD_ENDP2                                                     2U
  398. #define PCD_ENDP3                                                     3U
  399. #define PCD_ENDP4                                                     4U
  400. #define PCD_ENDP5                                                     5U
  401. #define PCD_ENDP6                                                     6U
  402. #define PCD_ENDP7                                                     7U
  403. /**
  404.   * @}
  405.   */
  406.  
  407. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  408.   * @{
  409.   */
  410. #define PCD_SNG_BUF                                                   0U
  411. #define PCD_DBL_BUF                                                   1U
  412. /**
  413.   * @}
  414.   */
  415.  
  416. /**
  417.   * @}
  418.   */
  419.  
  420. /* Private macros ------------------------------------------------------------*/
  421. /** @defgroup PCD_Private_Macros PCD Private Macros
  422.   * @{
  423.   */
  424.  
  425. /********************  Bit definition for USB_COUNTn_RX register  *************/
  426. #define USB_CNTRX_NBLK_MSK                    (0x1FU << 10)
  427. #define USB_CNTRX_BLSIZE                      (0x1U << 15)
  428.  
  429. /* SetENDPOINT */
  430. #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue)  (*(__IO uint16_t *)\
  431.                                                     (&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
  432.  
  433. /* GetENDPOINT */
  434. #define PCD_GET_ENDPOINT(USBx, bEpNum)             (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
  435.  
  436. /* ENDPOINT transfer */
  437. #define USB_EP0StartXfer                           USB_EPStartXfer
  438.  
  439. /**
  440.   * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
  441.   * @param  USBx USB peripheral instance register address.
  442.   * @param  bEpNum Endpoint Number.
  443.   * @param  wType Endpoint Type.
  444.   * @retval None
  445.   */
  446. #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum))\
  447.                                                               & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
  448.  
  449.  
  450. /**
  451.   * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
  452.   * @param  USBx USB peripheral instance register address.
  453.   * @param  bEpNum Endpoint Number.
  454.   * @retval Endpoint Type
  455.   */
  456. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  457.  
  458. /**
  459.   * @brief free buffer used from the application realizing it to the line
  460.   *         toggles bit SW_BUF in the double buffered endpoint register
  461.   * @param USBx USB device.
  462.   * @param   bEpNum, bDir
  463.   * @retval None
  464.   */
  465. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) \
  466.   do { \
  467.     if ((bDir) == 0U) \
  468.     { \
  469.       /* OUT double buffered endpoint */ \
  470.       PCD_TX_DTOG((USBx), (bEpNum)); \
  471.     } \
  472.     else if ((bDir) == 1U) \
  473.     { \
  474.       /* IN double buffered endpoint */ \
  475.       PCD_RX_DTOG((USBx), (bEpNum)); \
  476.     } \
  477.   } while(0)
  478.  
  479. /**
  480.   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
  481.   * @param  USBx USB peripheral instance register address.
  482.   * @param  bEpNum Endpoint Number.
  483.   * @param  wState new state
  484.   * @retval None
  485.   */
  486. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \
  487.   do { \
  488.     uint16_t _wRegVal; \
  489.     \
  490.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
  491.     /* toggle first bit ? */ \
  492.     if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
  493.     { \
  494.       _wRegVal ^= USB_EPTX_DTOG1; \
  495.     } \
  496.     /* toggle second bit ?  */ \
  497.     if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
  498.     { \
  499.       _wRegVal ^= USB_EPTX_DTOG2; \
  500.     } \
  501.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  502.   } while(0) /* PCD_SET_EP_TX_STATUS */
  503.  
  504. /**
  505.   * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
  506.   * @param  USBx USB peripheral instance register address.
  507.   * @param  bEpNum Endpoint Number.
  508.   * @param  wState new state
  509.   * @retval None
  510.   */
  511. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \
  512.   do { \
  513.     uint16_t _wRegVal; \
  514.     \
  515.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
  516.     /* toggle first bit ? */ \
  517.     if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
  518.     { \
  519.       _wRegVal ^= USB_EPRX_DTOG1; \
  520.     } \
  521.     /* toggle second bit ? */ \
  522.     if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
  523.     { \
  524.       _wRegVal ^= USB_EPRX_DTOG2; \
  525.     } \
  526.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  527.   } while(0) /* PCD_SET_EP_RX_STATUS */
  528.  
  529. /**
  530.   * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  531.   * @param  USBx USB peripheral instance register address.
  532.   * @param  bEpNum Endpoint Number.
  533.   * @param  wStaterx new state.
  534.   * @param  wStatetx new state.
  535.   * @retval None
  536.   */
  537. #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \
  538.   do { \
  539.     uint16_t _wRegVal; \
  540.     \
  541.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
  542.     /* toggle first bit ? */ \
  543.     if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
  544.     { \
  545.       _wRegVal ^= USB_EPRX_DTOG1; \
  546.     } \
  547.     /* toggle second bit ? */ \
  548.     if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
  549.     { \
  550.       _wRegVal ^= USB_EPRX_DTOG2; \
  551.     } \
  552.     /* toggle first bit ? */ \
  553.     if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
  554.     { \
  555.       _wRegVal ^= USB_EPTX_DTOG1; \
  556.     } \
  557.     /* toggle second bit ?  */ \
  558.     if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
  559.     { \
  560.       _wRegVal ^= USB_EPTX_DTOG2; \
  561.     } \
  562.     \
  563.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  564.   } while(0) /* PCD_SET_EP_TXRX_STATUS */
  565.  
  566. /**
  567.   * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
  568.   *         /STAT_RX[1:0])
  569.   * @param  USBx USB peripheral instance register address.
  570.   * @param  bEpNum Endpoint Number.
  571.   * @retval status
  572.   */
  573. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  574. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  575.  
  576. /**
  577.   * @brief  sets directly the VALID tx/rx-status into the endpoint register
  578.   * @param  USBx USB peripheral instance register address.
  579.   * @param  bEpNum Endpoint Number.
  580.   * @retval None
  581.   */
  582. #define PCD_SET_EP_TX_VALID(USBx, bEpNum)      (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  583. #define PCD_SET_EP_RX_VALID(USBx, bEpNum)      (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  584.  
  585. /**
  586.   * @brief  checks stall condition in an endpoint.
  587.   * @param  USBx USB peripheral instance register address.
  588.   * @param  bEpNum Endpoint Number.
  589.   * @retval TRUE = endpoint in stall condition.
  590.   */
  591. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL)
  592. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL)
  593.  
  594. /**
  595.   * @brief  set & clear EP_KIND bit.
  596.   * @param  USBx USB peripheral instance register address.
  597.   * @param  bEpNum Endpoint Number.
  598.   * @retval None
  599.   */
  600. #define PCD_SET_EP_KIND(USBx, bEpNum) \
  601.   do { \
  602.     uint16_t _wRegVal; \
  603.     \
  604.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  605.     \
  606.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
  607.   } while(0) /* PCD_SET_EP_KIND */
  608.  
  609. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) \
  610.   do { \
  611.     uint16_t _wRegVal; \
  612.     \
  613.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
  614.     \
  615.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  616.   } while(0) /* PCD_CLEAR_EP_KIND */
  617.  
  618. /**
  619.   * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
  620.   * @param  USBx USB peripheral instance register address.
  621.   * @param  bEpNum Endpoint Number.
  622.   * @retval None
  623.   */
  624. #define PCD_SET_OUT_STATUS(USBx, bEpNum)       PCD_SET_EP_KIND((USBx), (bEpNum))
  625. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)     PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  626.  
  627. /**
  628.   * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
  629.   * @param  USBx USB peripheral instance register address.
  630.   * @param  bEpNum Endpoint Number.
  631.   * @retval None
  632.   */
  633. #define PCD_SET_EP_DBUF(USBx, bEpNum)          PCD_SET_EP_KIND((USBx), (bEpNum))
  634. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum)        PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  635.  
  636. /**
  637.   * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
  638.   * @param  USBx USB peripheral instance register address.
  639.   * @param  bEpNum Endpoint Number.
  640.   * @retval None
  641.   */
  642. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \
  643.   do { \
  644.     uint16_t _wRegVal; \
  645.     \
  646.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
  647.     \
  648.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
  649.   } while(0) /* PCD_CLEAR_RX_EP_CTR */
  650.  
  651. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \
  652.   do { \
  653.     uint16_t _wRegVal; \
  654.     \
  655.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
  656.     \
  657.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
  658.   } while(0) /* PCD_CLEAR_TX_EP_CTR */
  659.  
  660. /**
  661.   * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  662.   * @param  USBx USB peripheral instance register address.
  663.   * @param  bEpNum Endpoint Number.
  664.   * @retval None
  665.   */
  666. #define PCD_RX_DTOG(USBx, bEpNum) \
  667.   do { \
  668.     uint16_t _wEPVal; \
  669.     \
  670.     _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  671.     \
  672.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
  673.   } while(0) /* PCD_RX_DTOG */
  674.  
  675. #define PCD_TX_DTOG(USBx, bEpNum) \
  676.   do { \
  677.     uint16_t _wEPVal; \
  678.     \
  679.     _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  680.     \
  681.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
  682.   } while(0) /* PCD_TX_DTOG */
  683. /**
  684.   * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  685.   * @param  USBx USB peripheral instance register address.
  686.   * @param  bEpNum Endpoint Number.
  687.   * @retval None
  688.   */
  689. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \
  690.   do { \
  691.     uint16_t _wRegVal; \
  692.     \
  693.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  694.     \
  695.     if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
  696.     { \
  697.       PCD_RX_DTOG((USBx), (bEpNum)); \
  698.     } \
  699.   } while(0) /* PCD_CLEAR_RX_DTOG */
  700.  
  701. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \
  702.   do { \
  703.     uint16_t _wRegVal; \
  704.     \
  705.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  706.     \
  707.     if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
  708.     { \
  709.       PCD_TX_DTOG((USBx), (bEpNum)); \
  710.     } \
  711.   } while(0) /* PCD_CLEAR_TX_DTOG */
  712.  
  713. /**
  714.   * @brief  Sets address in an endpoint register.
  715.   * @param  USBx USB peripheral instance register address.
  716.   * @param  bEpNum Endpoint Number.
  717.   * @param  bAddr Address.
  718.   * @retval None
  719.   */
  720. #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \
  721.   do { \
  722.     uint16_t _wRegVal; \
  723.     \
  724.     _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
  725.     \
  726.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  727.   } while(0) /* PCD_SET_EP_ADDRESS */
  728.  
  729. /**
  730.   * @brief  Gets address in an endpoint register.
  731.   * @param  USBx USB peripheral instance register address.
  732.   * @param  bEpNum Endpoint Number.
  733.   * @retval None
  734.   */
  735. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  736.  
  737. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\
  738.                                                     + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  739.  
  740. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\
  741.                                                     + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  742.  
  743.  
  744. /**
  745.   * @brief  sets address of the tx/rx buffer.
  746.   * @param  USBx USB peripheral instance register address.
  747.   * @param  bEpNum Endpoint Number.
  748.   * @param  wAddr address to be set (must be word aligned).
  749.   * @retval None
  750.   */
  751. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \
  752.   do { \
  753.     __IO uint16_t *_wRegVal; \
  754.     uint32_t _wRegBase = (uint32_t)USBx; \
  755.     \
  756.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  757.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
  758.     *_wRegVal = ((wAddr) >> 1) << 1; \
  759.   } while(0) /* PCD_SET_EP_TX_ADDRESS */
  760.  
  761. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \
  762.   do { \
  763.     __IO uint16_t *_wRegVal; \
  764.     uint32_t _wRegBase = (uint32_t)USBx; \
  765.     \
  766.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  767.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
  768.     *_wRegVal = ((wAddr) >> 1) << 1; \
  769.   } while(0) /* PCD_SET_EP_RX_ADDRESS */
  770.  
  771. /**
  772.   * @brief  Gets address of the tx/rx buffer.
  773.   * @param  USBx USB peripheral instance register address.
  774.   * @param  bEpNum Endpoint Number.
  775.   * @retval address of the buffer.
  776.   */
  777. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  778. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  779.  
  780. /**
  781.   * @brief  Sets counter of rx buffer with no. of blocks.
  782.   * @param  pdwReg Register pointer
  783.   * @param  wCount Counter.
  784.   * @param  wNBlocks no. of Blocks.
  785.   * @retval None
  786.   */
  787. #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \
  788.   do { \
  789.     (wNBlocks) = (wCount) >> 5; \
  790.     if (((wCount) & 0x1fU) == 0U) \
  791.     { \
  792.       (wNBlocks)--; \
  793.     } \
  794.     *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
  795.   } while(0) /* PCD_CALC_BLK32 */
  796.  
  797. #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \
  798.   do { \
  799.     (wNBlocks) = (wCount) >> 1; \
  800.     if (((wCount) & 0x1U) != 0U) \
  801.     { \
  802.       (wNBlocks)++; \
  803.     } \
  804.     *(pdwReg) = (uint16_t)((wNBlocks) << 10); \
  805.   } while(0) /* PCD_CALC_BLK2 */
  806.  
  807. #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \
  808.   do { \
  809.     uint32_t wNBlocks; \
  810.     if ((wCount) == 0U) \
  811.     { \
  812.       *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \
  813.       *(pdwReg) |= USB_CNTRX_BLSIZE; \
  814.     } \
  815.     else if((wCount) <= 62U) \
  816.     { \
  817.       PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
  818.     } \
  819.     else \
  820.     { \
  821.       PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
  822.     } \
  823.   } while(0) /* PCD_SET_EP_CNT_RX_REG */
  824.  
  825. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \
  826.   do { \
  827.     uint32_t _wRegBase = (uint32_t)(USBx); \
  828.     __IO uint16_t *pdwReg; \
  829.     \
  830.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  831.     pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  832.     PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
  833.   } while(0)
  834.  
  835. /**
  836.   * @brief  sets counter for the tx/rx buffer.
  837.   * @param  USBx USB peripheral instance register address.
  838.   * @param  bEpNum Endpoint Number.
  839.   * @param  wCount Counter value.
  840.   * @retval None
  841.   */
  842. #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \
  843.   do { \
  844.     uint32_t _wRegBase = (uint32_t)(USBx); \
  845.     __IO uint16_t *_wRegVal; \
  846.     \
  847.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  848.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  849.     *_wRegVal = (uint16_t)(wCount); \
  850.   } while(0)
  851.  
  852. #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \
  853.   do { \
  854.     uint32_t _wRegBase = (uint32_t)(USBx); \
  855.     __IO uint16_t *_wRegVal; \
  856.     \
  857.     _wRegBase += (uint32_t)(USBx)->BTABLE; \
  858.     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  859.     PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
  860.   } while(0)
  861.  
  862. /**
  863.   * @brief  gets counter of the tx buffer.
  864.   * @param  USBx USB peripheral instance register address.
  865.   * @param  bEpNum Endpoint Number.
  866.   * @retval Counter value
  867.   */
  868. #define PCD_GET_EP_TX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
  869. #define PCD_GET_EP_RX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
  870.  
  871. /**
  872.   * @brief  Sets buffer 0/1 address in a double buffer endpoint.
  873.   * @param  USBx USB peripheral instance register address.
  874.   * @param  bEpNum Endpoint Number.
  875.   * @param  wBuf0Addr buffer 0 address.
  876.   * @retval Counter value
  877.   */
  878. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \
  879.   do { \
  880.     PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
  881.   } while(0) /* PCD_SET_EP_DBUF0_ADDR */
  882.  
  883. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \
  884.   do { \
  885.     PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
  886.   } while(0) /* PCD_SET_EP_DBUF1_ADDR */
  887.  
  888. /**
  889.   * @brief  Sets addresses in a double buffer endpoint.
  890.   * @param  USBx USB peripheral instance register address.
  891.   * @param  bEpNum Endpoint Number.
  892.   * @param  wBuf0Addr: buffer 0 address.
  893.   * @param  wBuf1Addr = buffer 1 address.
  894.   * @retval None
  895.   */
  896. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \
  897.   do { \
  898.     PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
  899.     PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
  900.   } while(0) /* PCD_SET_EP_DBUF_ADDR */
  901.  
  902. /**
  903.   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
  904.   * @param  USBx USB peripheral instance register address.
  905.   * @param  bEpNum Endpoint Number.
  906.   * @retval None
  907.   */
  908. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum)    (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  909. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum)    (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  910.  
  911. /**
  912.   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
  913.   * @param  USBx USB peripheral instance register address.
  914.   * @param  bEpNum Endpoint Number.
  915.   * @param  bDir endpoint dir  EP_DBUF_OUT = OUT
  916.   *         EP_DBUF_IN  = IN
  917.   * @param  wCount: Counter value
  918.   * @retval None
  919.   */
  920. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \
  921.   do { \
  922.     if ((bDir) == 0U) \
  923.       /* OUT endpoint */ \
  924.     { \
  925.       PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
  926.     } \
  927.     else \
  928.     { \
  929.       if ((bDir) == 1U) \
  930.       { \
  931.         /* IN endpoint */ \
  932.         PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
  933.       } \
  934.     } \
  935.   } while(0) /* SetEPDblBuf0Count*/
  936.  
  937. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \
  938.   do { \
  939.     uint32_t _wBase = (uint32_t)(USBx); \
  940.     __IO uint16_t *_wEPRegVal; \
  941.     \
  942.     if ((bDir) == 0U) \
  943.     { \
  944.       /* OUT endpoint */ \
  945.       PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
  946.     } \
  947.     else \
  948.     { \
  949.       if ((bDir) == 1U) \
  950.       { \
  951.         /* IN endpoint */ \
  952.         _wBase += (uint32_t)(USBx)->BTABLE; \
  953.         _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  954.         *_wEPRegVal = (uint16_t)(wCount); \
  955.       } \
  956.     } \
  957.   } while(0) /* SetEPDblBuf1Count */
  958.  
  959. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \
  960.   do { \
  961.     PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  962.     PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  963.   } while(0) /* PCD_SET_EP_DBUF_CNT */
  964.  
  965. /**
  966.   * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
  967.   * @param  USBx USB peripheral instance register address.
  968.   * @param  bEpNum Endpoint Number.
  969.   * @retval None
  970.   */
  971. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum)     (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  972. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum)     (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  973.  
  974.  
  975.  
  976. /**
  977.   * @}
  978.   */
  979.  
  980. /**
  981.   * @}
  982.   */
  983.  
  984. /**
  985.   * @}
  986.   */
  987. #endif /* defined (USB) */
  988.  
  989. #ifdef __cplusplus
  990. }
  991. #endif
  992.  
  993. #endif /* STM32L1xx_HAL_PCD_H */
  994.  
  995. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  996.