Subversion Repositories DashDisplay

Rev

Rev 28 | Go to most recent revision | Blame | Compare with Previous | Last modification | View Log | Download | RSS feed

  1. /* ----------------------------------------------------------------------    
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
  3. *    
  4. * $Date:        19. March 2015
  5. * $Revision:    V.1.4.5
  6. *    
  7. * Project:          CMSIS DSP Library    
  8. * Title:                arm_offset_q15.c    
  9. *    
  10. * Description:  Q15 vector offset.    
  11. *    
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *  
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. *   - Redistributions of source code must retain the above copyright
  18. *     notice, this list of conditions and the following disclaimer.
  19. *   - Redistributions in binary form must reproduce the above copyright
  20. *     notice, this list of conditions and the following disclaimer in
  21. *     the documentation and/or other materials provided with the
  22. *     distribution.
  23. *   - Neither the name of ARM LIMITED nor the names of its contributors
  24. *     may be used to endorse or promote products derived from this
  25. *     software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.  
  39. * -------------------------------------------------------------------- */
  40.  
  41. #include "arm_math.h"
  42.  
  43. /**    
  44.  * @ingroup groupMath    
  45.  */
  46.  
  47. /**    
  48.  * @addtogroup offset    
  49.  * @{    
  50.  */
  51.  
  52. /**    
  53.  * @brief  Adds a constant offset to a Q15 vector.    
  54.  * @param[in]  *pSrc points to the input vector    
  55.  * @param[in]  offset is the offset to be added    
  56.  * @param[out]  *pDst points to the output vector    
  57.  * @param[in]  blockSize number of samples in the vector    
  58.  * @return none.    
  59.  *    
  60.  * <b>Scaling and Overflow Behavior:</b>    
  61.  * \par    
  62.  * The function uses saturating arithmetic.    
  63.  * Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.    
  64.  */
  65.  
  66. void arm_offset_q15(
  67.   q15_t * pSrc,
  68.   q15_t offset,
  69.   q15_t * pDst,
  70.   uint32_t blockSize)
  71. {
  72.   uint32_t blkCnt;                               /* loop counter */
  73.  
  74. #ifndef ARM_MATH_CM0_FAMILY
  75.  
  76. /* Run the below code for Cortex-M4 and Cortex-M3 */
  77.   q31_t offset_packed;                           /* Offset packed to 32 bit */
  78.  
  79.  
  80.   /*loop Unrolling */
  81.   blkCnt = blockSize >> 2u;
  82.  
  83.   /* Offset is packed to 32 bit in order to use SIMD32 for addition */
  84.   offset_packed = __PKHBT(offset, offset, 16);
  85.  
  86.   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
  87.    ** a second loop below computes the remaining 1 to 3 samples. */
  88.   while(blkCnt > 0u)
  89.   {
  90.     /* C = A + offset */
  91.     /* Add offset and then store the results in the destination buffer, 2 samples at a time. */
  92.     *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
  93.     *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
  94.  
  95.     /* Decrement the loop counter */
  96.     blkCnt--;
  97.   }
  98.  
  99.   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
  100.    ** No loop unrolling is used. */
  101.   blkCnt = blockSize % 0x4u;
  102.  
  103.   while(blkCnt > 0u)
  104.   {
  105.     /* C = A + offset */
  106.     /* Add offset and then store the results in the destination buffer. */
  107.     *pDst++ = (q15_t) __QADD16(*pSrc++, offset);
  108.  
  109.     /* Decrement the loop counter */
  110.     blkCnt--;
  111.   }
  112.  
  113. #else
  114.  
  115.   /* Run the below code for Cortex-M0 */
  116.  
  117.   /* Initialize blkCnt with number of samples */
  118.   blkCnt = blockSize;
  119.  
  120.   while(blkCnt > 0u)
  121.   {
  122.     /* C = A + offset */
  123.     /* Add offset and then store the results in the destination buffer. */
  124.     *pDst++ = (q15_t) __SSAT(((q31_t) * pSrc++ + offset), 16);
  125.  
  126.     /* Decrement the loop counter */
  127.     blkCnt--;
  128.   }
  129.  
  130. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  131.  
  132. }
  133.  
  134. /**    
  135.  * @} end of offset group    
  136.  */
  137.