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  1. /* ----------------------------------------------------------------------    
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
  3. *    
  4. * $Date:        19. March 2015
  5. * $Revision:    V.1.4.5
  6. *    
  7. * Project:          CMSIS DSP Library    
  8. * Title:                arm_negate_q15.c    
  9. *    
  10. * Description:  Negates Q15 vectors.    
  11. *    
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *  
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. *   - Redistributions of source code must retain the above copyright
  18. *     notice, this list of conditions and the following disclaimer.
  19. *   - Redistributions in binary form must reproduce the above copyright
  20. *     notice, this list of conditions and the following disclaimer in
  21. *     the documentation and/or other materials provided with the
  22. *     distribution.
  23. *   - Neither the name of ARM LIMITED nor the names of its contributors
  24. *     may be used to endorse or promote products derived from this
  25. *     software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.  
  39. * -------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41.  
  42. /**        
  43.  * @ingroup groupMath        
  44.  */
  45.  
  46. /**        
  47.  * @addtogroup negate        
  48.  * @{        
  49.  */
  50.  
  51. /**        
  52.  * @brief  Negates the elements of a Q15 vector.        
  53.  * @param[in]  *pSrc points to the input vector        
  54.  * @param[out]  *pDst points to the output vector        
  55.  * @param[in]  blockSize number of samples in the vector        
  56.  * @return none.        
  57.  *    
  58.  * \par Conditions for optimum performance    
  59.  *  Input and output buffers should be aligned by 32-bit    
  60.  *    
  61.  *        
  62.  * <b>Scaling and Overflow Behavior:</b>        
  63.  * \par        
  64.  * The function uses saturating arithmetic.        
  65.  * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.        
  66.  */
  67.  
  68. void arm_negate_q15(
  69.   q15_t * pSrc,
  70.   q15_t * pDst,
  71.   uint32_t blockSize)
  72. {
  73.   uint32_t blkCnt;                               /* loop counter */
  74.   q15_t in;
  75.  
  76. #ifndef ARM_MATH_CM0_FAMILY
  77.  
  78. /* Run the below code for Cortex-M4 and Cortex-M3 */
  79.  
  80.   q31_t in1, in2;                                /* Temporary variables */
  81.  
  82.  
  83.   /*loop Unrolling */
  84.   blkCnt = blockSize >> 2u;
  85.  
  86.   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
  87.    ** a second loop below computes the remaining 1 to 3 samples. */
  88.   while(blkCnt > 0u)
  89.   {
  90.     /* C = -A */
  91.     /* Read two inputs at a time */
  92.     in1 = _SIMD32_OFFSET(pSrc);
  93.     in2 = _SIMD32_OFFSET(pSrc + 2);
  94.  
  95.     /* negate two samples at a time */
  96.     in1 = __QSUB16(0, in1);
  97.  
  98.     /* negate two samples at a time */
  99.     in2 = __QSUB16(0, in2);
  100.  
  101.     /* store the result to destination 2 samples at a time */
  102.     _SIMD32_OFFSET(pDst) = in1;
  103.     /* store the result to destination 2 samples at a time */
  104.     _SIMD32_OFFSET(pDst + 2) = in2;
  105.  
  106.  
  107.     /* update pointers to process next samples */
  108.     pSrc += 4u;
  109.     pDst += 4u;
  110.  
  111.     /* Decrement the loop counter */
  112.     blkCnt--;
  113.   }
  114.  
  115.   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
  116.    ** No loop unrolling is used. */
  117.   blkCnt = blockSize % 0x4u;
  118.  
  119. #else
  120.  
  121.   /* Run the below code for Cortex-M0 */
  122.  
  123.   /* Initialize blkCnt with number of samples */
  124.   blkCnt = blockSize;
  125.  
  126. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  127.  
  128.   while(blkCnt > 0u)
  129.   {
  130.     /* C = -A */
  131.     /* Negate and then store the result in the destination buffer. */
  132.     in = *pSrc++;
  133.     *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in;
  134.  
  135.     /* Decrement the loop counter */
  136.     blkCnt--;
  137.   }
  138. }
  139.  
  140. /**        
  141.  * @} end of negate group        
  142.  */
  143.