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  1. /* ----------------------------------------------------------------------    
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
  3. *    
  4. * $Date:        19. March 2015
  5. * $Revision:    V.1.4.5
  6. *    
  7. * Project:          CMSIS DSP Library    
  8. * Title:            arm_mult_q31.c    
  9. *    
  10. * Description:  Q31 vector multiplication.    
  11. *    
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *  
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. *   - Redistributions of source code must retain the above copyright
  18. *     notice, this list of conditions and the following disclaimer.
  19. *   - Redistributions in binary form must reproduce the above copyright
  20. *     notice, this list of conditions and the following disclaimer in
  21. *     the documentation and/or other materials provided with the
  22. *     distribution.
  23. *   - Neither the name of ARM LIMITED nor the names of its contributors
  24. *     may be used to endorse or promote products derived from this
  25. *     software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * -------------------------------------------------------------------- */
  40.  
  41. #include "arm_math.h"
  42.  
  43. /**    
  44.  * @ingroup groupMath    
  45.  */
  46.  
  47. /**    
  48.  * @addtogroup BasicMult    
  49.  * @{    
  50.  */
  51.  
  52. /**    
  53.  * @brief Q31 vector multiplication.    
  54.  * @param[in]       *pSrcA points to the first input vector    
  55.  * @param[in]       *pSrcB points to the second input vector    
  56.  * @param[out]      *pDst points to the output vector    
  57.  * @param[in]       blockSize number of samples in each vector    
  58.  * @return none.    
  59.  *    
  60.  * <b>Scaling and Overflow Behavior:</b>    
  61.  * \par    
  62.  * The function uses saturating arithmetic.    
  63.  * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.    
  64.  */
  65.  
  66. void arm_mult_q31(
  67.   q31_t * pSrcA,
  68.   q31_t * pSrcB,
  69.   q31_t * pDst,
  70.   uint32_t blockSize)
  71. {
  72.   uint32_t blkCnt;                               /* loop counters */
  73.  
  74. #ifndef ARM_MATH_CM0_FAMILY
  75.  
  76. /* Run the below code for Cortex-M4 and Cortex-M3 */
  77.   q31_t inA1, inA2, inA3, inA4;                  /* temporary input variables */
  78.   q31_t inB1, inB2, inB3, inB4;                  /* temporary input variables */
  79.   q31_t out1, out2, out3, out4;                  /* temporary output variables */
  80.  
  81.   /* loop Unrolling */
  82.   blkCnt = blockSize >> 2u;
  83.  
  84.   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
  85.    ** a second loop below computes the remaining 1 to 3 samples. */
  86.   while(blkCnt > 0u)
  87.   {
  88.     /* C = A * B */
  89.     /* Multiply the inputs and then store the results in the destination buffer. */
  90.     inA1 = *pSrcA++;
  91.     inA2 = *pSrcA++;
  92.     inA3 = *pSrcA++;
  93.     inA4 = *pSrcA++;
  94.     inB1 = *pSrcB++;
  95.     inB2 = *pSrcB++;
  96.     inB3 = *pSrcB++;
  97.     inB4 = *pSrcB++;
  98.  
  99.     out1 = ((q63_t) inA1 * inB1) >> 32;
  100.     out2 = ((q63_t) inA2 * inB2) >> 32;
  101.     out3 = ((q63_t) inA3 * inB3) >> 32;
  102.     out4 = ((q63_t) inA4 * inB4) >> 32;
  103.  
  104.     out1 = __SSAT(out1, 31);
  105.     out2 = __SSAT(out2, 31);
  106.     out3 = __SSAT(out3, 31);
  107.     out4 = __SSAT(out4, 31);
  108.  
  109.     *pDst++ = out1 << 1u;
  110.     *pDst++ = out2 << 1u;
  111.     *pDst++ = out3 << 1u;
  112.     *pDst++ = out4 << 1u;
  113.  
  114.     /* Decrement the blockSize loop counter */
  115.     blkCnt--;
  116.   }
  117.  
  118.   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
  119.    ** No loop unrolling is used. */
  120.   blkCnt = blockSize % 0x4u;
  121.  
  122.   while(blkCnt > 0u)
  123.   {
  124.     /* C = A * B */
  125.     /* Multiply the inputs and then store the results in the destination buffer. */
  126.     inA1 = *pSrcA++;
  127.     inB1 = *pSrcB++;
  128.     out1 = ((q63_t) inA1 * inB1) >> 32;
  129.     out1 = __SSAT(out1, 31);
  130.     *pDst++ = out1 << 1u;
  131.  
  132.     /* Decrement the blockSize loop counter */
  133.     blkCnt--;
  134.   }
  135.  
  136. #else
  137.  
  138.   /* Run the below code for Cortex-M0 */
  139.  
  140.   /* Initialize blkCnt with number of samples */
  141.   blkCnt = blockSize;
  142.  
  143.  
  144.   while(blkCnt > 0u)
  145.   {
  146.     /* C = A * B */
  147.     /* Multiply the inputs and then store the results in the destination buffer. */
  148.     *pDst++ =
  149.       (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
  150.  
  151.     /* Decrement the blockSize loop counter */
  152.     blkCnt--;
  153.   }
  154.  
  155. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  156. }
  157.  
  158. /**    
  159.  * @} end of BasicMult group    
  160.  */
  161.