Subversion Repositories DashDisplay

Rev

Rev 2 | Blame | Compare with Previous | Last modification | View Log | Download | RSS feed

  1. /* ----------------------------------------------------------------------    
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
  3. *    
  4. * $Date:        19. March 2015
  5. * $Revision:    V.1.4.5
  6. *    
  7. * Project:          CMSIS DSP Library    
  8. * Title:                arm_shift_q31.c    
  9. *    
  10. * Description:  Shifts the elements of a Q31 vector by a specified number of bits.    
  11. *    
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *  
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. *   - Redistributions of source code must retain the above copyright
  18. *     notice, this list of conditions and the following disclaimer.
  19. *   - Redistributions in binary form must reproduce the above copyright
  20. *     notice, this list of conditions and the following disclaimer in
  21. *     the documentation and/or other materials provided with the
  22. *     distribution.
  23. *   - Neither the name of ARM LIMITED nor the names of its contributors
  24. *     may be used to endorse or promote products derived from this
  25. *     software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * -------------------------------------------------------------------- */
  40.  
  41. #include "arm_math.h"
  42.  
  43. /**        
  44.  * @ingroup groupMath        
  45.  */
  46. /**        
  47.  * @defgroup shift Vector Shift        
  48.  *        
  49.  * Shifts the elements of a fixed-point vector by a specified number of bits.        
  50.  * There are separate functions for Q7, Q15, and Q31 data types.        
  51.  * The underlying algorithm used is:        
  52.  *        
  53.  * <pre>        
  54.  *     pDst[n] = pSrc[n] << shift,   0 <= n < blockSize.        
  55.  * </pre>        
  56.  *        
  57.  * If <code>shift</code> is positive then the elements of the vector are shifted to the left.        
  58.  * If <code>shift</code> is negative then the elements of the vector are shifted to the right.        
  59.  *
  60.  * The functions support in-place computation allowing the source and destination
  61.  * pointers to reference the same memory buffer.
  62.  */
  63.  
  64. /**        
  65.  * @addtogroup shift        
  66.  * @{        
  67.  */
  68.  
  69. /**        
  70.  * @brief  Shifts the elements of a Q31 vector a specified number of bits.        
  71.  * @param[in]  *pSrc points to the input vector        
  72.  * @param[in]  shiftBits number of bits to shift.  A positive value shifts left; a negative value shifts right.        
  73.  * @param[out]  *pDst points to the output vector        
  74.  * @param[in]  blockSize number of samples in the vector        
  75.  * @return none.        
  76.  *        
  77.  *        
  78.  * <b>Scaling and Overflow Behavior:</b>        
  79.  * \par        
  80.  * The function uses saturating arithmetic.        
  81.  * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.        
  82.  */
  83.  
  84. void arm_shift_q31(
  85.   q31_t * pSrc,
  86.   int8_t shiftBits,
  87.   q31_t * pDst,
  88.   uint32_t blockSize)
  89. {
  90.   uint32_t blkCnt;                               /* loop counter */
  91.   uint8_t sign = (shiftBits & 0x80);             /* Sign of shiftBits */
  92.  
  93. #ifndef ARM_MATH_CM0_FAMILY
  94.  
  95.   q31_t in1, in2, in3, in4;                      /* Temporary input variables */
  96.   q31_t out1, out2, out3, out4;                  /* Temporary output variables */
  97.  
  98.   /*loop Unrolling */
  99.   blkCnt = blockSize >> 2u;
  100.  
  101.  
  102.   if(sign == 0u)
  103.   {
  104.     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
  105.      ** a second loop below computes the remaining 1 to 3 samples. */
  106.     while(blkCnt > 0u)
  107.     {
  108.       /* C = A  << shiftBits */
  109.       /* Shift the input and then store the results in the destination buffer. */
  110.       in1 = *pSrc;
  111.       in2 = *(pSrc + 1);
  112.       out1 = in1 << shiftBits;
  113.       in3 = *(pSrc + 2);
  114.       out2 = in2 << shiftBits;
  115.       in4 = *(pSrc + 3);
  116.       if(in1 != (out1 >> shiftBits))
  117.         out1 = 0x7FFFFFFF ^ (in1 >> 31);
  118.  
  119.       if(in2 != (out2 >> shiftBits))
  120.         out2 = 0x7FFFFFFF ^ (in2 >> 31);
  121.  
  122.       *pDst = out1;
  123.       out3 = in3 << shiftBits;
  124.       *(pDst + 1) = out2;
  125.       out4 = in4 << shiftBits;
  126.  
  127.       if(in3 != (out3 >> shiftBits))
  128.         out3 = 0x7FFFFFFF ^ (in3 >> 31);
  129.  
  130.       if(in4 != (out4 >> shiftBits))
  131.         out4 = 0x7FFFFFFF ^ (in4 >> 31);
  132.  
  133.       *(pDst + 2) = out3;
  134.       *(pDst + 3) = out4;
  135.  
  136.       /* Update destination pointer to process next sampels */
  137.       pSrc += 4u;
  138.       pDst += 4u;
  139.  
  140.       /* Decrement the loop counter */
  141.       blkCnt--;
  142.     }
  143.   }
  144.   else
  145.   {
  146.  
  147.     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
  148.      ** a second loop below computes the remaining 1 to 3 samples. */
  149.     while(blkCnt > 0u)
  150.     {
  151.       /* C = A >>  shiftBits */
  152.       /* Shift the input and then store the results in the destination buffer. */
  153.       in1 = *pSrc;
  154.       in2 = *(pSrc + 1);
  155.       in3 = *(pSrc + 2);
  156.       in4 = *(pSrc + 3);
  157.  
  158.       *pDst = (in1 >> -shiftBits);
  159.       *(pDst + 1) = (in2 >> -shiftBits);
  160.       *(pDst + 2) = (in3 >> -shiftBits);
  161.       *(pDst + 3) = (in4 >> -shiftBits);
  162.  
  163.  
  164.       pSrc += 4u;
  165.       pDst += 4u;
  166.  
  167.       blkCnt--;
  168.     }
  169.  
  170.   }
  171.  
  172.   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
  173.    ** No loop unrolling is used. */
  174.   blkCnt = blockSize % 0x4u;
  175.  
  176. #else
  177.  
  178.   /* Run the below code for Cortex-M0 */
  179.  
  180.  
  181.   /* Initialize blkCnt with number of samples */
  182.   blkCnt = blockSize;
  183.  
  184. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  185.  
  186.  
  187.   while(blkCnt > 0u)
  188.   {
  189.     /* C = A (>> or <<) shiftBits */
  190.     /* Shift the input and then store the result in the destination buffer. */
  191.     *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
  192.       (*pSrc++ >> -shiftBits);
  193.  
  194.     /* Decrement the loop counter */
  195.     blkCnt--;
  196.   }
  197.  
  198.  
  199. }
  200.  
  201. /**        
  202.  * @} end of shift group        
  203.  */
  204.