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  1. /* ----------------------------------------------------------------------    
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
  3. *    
  4. * $Date:        19. March 2015
  5. * $Revision:    V.1.4.5
  6. *    
  7. * Project:          CMSIS DSP Library    
  8. * Title:                arm_negate_f32.c    
  9. *    
  10. * Description:  Negates floating-point vectors.    
  11. *    
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *  
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. *   - Redistributions of source code must retain the above copyright
  18. *     notice, this list of conditions and the following disclaimer.
  19. *   - Redistributions in binary form must reproduce the above copyright
  20. *     notice, this list of conditions and the following disclaimer in
  21. *     the documentation and/or other materials provided with the
  22. *     distribution.
  23. *   - Neither the name of ARM LIMITED nor the names of its contributors
  24. *     may be used to endorse or promote products derived from this
  25. *     software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.  
  39. * ---------------------------------------------------------------------------- */
  40.  
  41. #include "arm_math.h"
  42.  
  43. /**        
  44.  * @ingroup groupMath        
  45.  */
  46.  
  47. /**        
  48.  * @defgroup negate Vector Negate        
  49.  *        
  50.  * Negates the elements of a vector.        
  51.  *        
  52.  * <pre>        
  53.  *     pDst[n] = -pSrc[n],   0 <= n < blockSize.        
  54.  * </pre>        
  55.  *
  56.  * The functions support in-place computation allowing the source and
  57.  * destination pointers to reference the same memory buffer.
  58.  * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
  59.  */
  60.  
  61. /**        
  62.  * @addtogroup negate        
  63.  * @{        
  64.  */
  65.  
  66. /**        
  67.  * @brief  Negates the elements of a floating-point vector.        
  68.  * @param[in]  *pSrc points to the input vector        
  69.  * @param[out]  *pDst points to the output vector        
  70.  * @param[in]  blockSize number of samples in the vector        
  71.  * @return none.        
  72.  */
  73.  
  74. void arm_negate_f32(
  75.   float32_t * pSrc,
  76.   float32_t * pDst,
  77.   uint32_t blockSize)
  78. {
  79.   uint32_t blkCnt;                               /* loop counter */
  80.  
  81.  
  82. #ifndef ARM_MATH_CM0_FAMILY
  83.  
  84. /* Run the below code for Cortex-M4 and Cortex-M3 */
  85.   float32_t in1, in2, in3, in4;                  /* temporary variables */
  86.  
  87.   /*loop Unrolling */
  88.   blkCnt = blockSize >> 2u;
  89.  
  90.   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
  91.    ** a second loop below computes the remaining 1 to 3 samples. */
  92.   while(blkCnt > 0u)
  93.   {
  94.     /* read inputs from source */
  95.     in1 = *pSrc;
  96.     in2 = *(pSrc + 1);
  97.     in3 = *(pSrc + 2);
  98.     in4 = *(pSrc + 3);
  99.  
  100.     /* negate the input */
  101.     in1 = -in1;
  102.     in2 = -in2;
  103.     in3 = -in3;
  104.     in4 = -in4;
  105.  
  106.     /* store the result to destination */
  107.     *pDst = in1;
  108.     *(pDst + 1) = in2;
  109.     *(pDst + 2) = in3;
  110.     *(pDst + 3) = in4;
  111.  
  112.     /* update pointers to process next samples */
  113.     pSrc += 4u;
  114.     pDst += 4u;
  115.  
  116.     /* Decrement the loop counter */
  117.     blkCnt--;
  118.   }
  119.  
  120.   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
  121.    ** No loop unrolling is used. */
  122.   blkCnt = blockSize % 0x4u;
  123.  
  124. #else
  125.  
  126.   /* Run the below code for Cortex-M0 */
  127.  
  128.   /* Initialize blkCnt with number of samples */
  129.   blkCnt = blockSize;
  130.  
  131. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  132.  
  133.   while(blkCnt > 0u)
  134.   {
  135.     /* C = -A */
  136.     /* Negate and then store the results in the destination buffer. */
  137.     *pDst++ = -*pSrc++;
  138.  
  139.     /* Decrement the loop counter */
  140.     blkCnt--;
  141.   }
  142. }
  143.  
  144. /**        
  145.  * @} end of negate group        
  146.  */
  147.