ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 1 1 .cpu cortex-m3 2 .eabi_attribute 20, 1 3 .eabi_attribute 21, 1 4 .eabi_attribute 23, 3 5 .eabi_attribute 24, 1 6 .eabi_attribute 25, 1 7 .eabi_attribute 26, 1 8 .eabi_attribute 30, 1 9 .eabi_attribute 34, 1 10 .eabi_attribute 18, 4 11 .file "main.c" 12 .text 13 .Ltext0: 14 .cfi_sections .debug_frame 15 .section .text.user_delay_us,"ax",%progbits 16 .align 1 17 .arch armv7-m 18 .syntax unified 19 .thumb 20 .thumb_func 21 .fpu softvfp 23 user_delay_us: 24 .LVL0: 25 .LFB70: 26 .file 1 "Core/Src/main.c" 1:Core/Src/main.c **** /* USER CODE BEGIN Header */ 2:Core/Src/main.c **** /** 3:Core/Src/main.c **** ****************************************************************************** 4:Core/Src/main.c **** * @file : main.c 5:Core/Src/main.c **** * @brief : Main program body 6:Core/Src/main.c **** ****************************************************************************** 7:Core/Src/main.c **** * @attention 8:Core/Src/main.c **** * 9:Core/Src/main.c **** *

© Copyright (c) 2020 STMicroelectronics. 10:Core/Src/main.c **** * All rights reserved.

11:Core/Src/main.c **** * 12:Core/Src/main.c **** * This software component is licensed by ST under BSD 3-Clause license, 13:Core/Src/main.c **** * the "License"; You may not use this file except in compliance with the 14:Core/Src/main.c **** * License. You may obtain a copy of the License at: 15:Core/Src/main.c **** * opensource.org/licenses/BSD-3-Clause 16:Core/Src/main.c **** * 17:Core/Src/main.c **** ****************************************************************************** 18:Core/Src/main.c **** */ 19:Core/Src/main.c **** /* USER CODE END Header */ 20:Core/Src/main.c **** /* Includes ------------------------------------------------------------------*/ 21:Core/Src/main.c **** #include "main.h" 22:Core/Src/main.c **** #include "usb_device.h" 23:Core/Src/main.c **** 24:Core/Src/main.c **** /* Private includes ----------------------------------------------------------*/ 25:Core/Src/main.c **** /* USER CODE BEGIN Includes */ 26:Core/Src/main.c **** #include "libSerial/serial.h" 27:Core/Src/main.c **** #include "libBME280/bme280.h" 28:Core/Src/main.c **** #include "display.h" 29:Core/Src/main.c **** /* USER CODE END Includes */ 30:Core/Src/main.c **** 31:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/ 32:Core/Src/main.c **** /* USER CODE BEGIN PTD */ ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 2 33:Core/Src/main.c **** 34:Core/Src/main.c **** /* USER CODE END PTD */ 35:Core/Src/main.c **** 36:Core/Src/main.c **** /* Private define ------------------------------------------------------------*/ 37:Core/Src/main.c **** /* USER CODE BEGIN PD */ 38:Core/Src/main.c **** /* USER CODE END PD */ 39:Core/Src/main.c **** 40:Core/Src/main.c **** /* Private macro -------------------------------------------------------------*/ 41:Core/Src/main.c **** /* USER CODE BEGIN PM */ 42:Core/Src/main.c **** 43:Core/Src/main.c **** /* USER CODE END PM */ 44:Core/Src/main.c **** 45:Core/Src/main.c **** /* Private variables ---------------------------------------------------------*/ 46:Core/Src/main.c **** I2C_HandleTypeDef hi2c2; 47:Core/Src/main.c **** 48:Core/Src/main.c **** RTC_HandleTypeDef hrtc; 49:Core/Src/main.c **** 50:Core/Src/main.c **** SPI_HandleTypeDef hspi1; 51:Core/Src/main.c **** 52:Core/Src/main.c **** TIM_HandleTypeDef htim3; 53:Core/Src/main.c **** TIM_HandleTypeDef htim4; 54:Core/Src/main.c **** 55:Core/Src/main.c **** UART_HandleTypeDef huart1; 56:Core/Src/main.c **** 57:Core/Src/main.c **** /* USER CODE BEGIN PV */ 58:Core/Src/main.c **** /* Structure that contains identifier details used in example */ 59:Core/Src/main.c **** struct identifier 60:Core/Src/main.c **** { 61:Core/Src/main.c **** /* Variable to hold device address */ 62:Core/Src/main.c **** uint8_t dev_addr; 63:Core/Src/main.c **** 64:Core/Src/main.c **** /* Variable that contains file descriptor */ 65:Core/Src/main.c **** int8_t fd; 66:Core/Src/main.c **** }; 67:Core/Src/main.c **** 68:Core/Src/main.c **** 69:Core/Src/main.c **** static int8_t 70:Core/Src/main.c **** user_i2c_write ( uint8_t reg_addr, uint8_t *reg_data, uint32_t len, struct identifier * intf) 71:Core/Src/main.c **** { 72:Core/Src/main.c **** 73:Core/Src/main.c **** uint8_t i2c_addr = intf->dev_addr; 74:Core/Src/main.c **** HAL_StatusTypeDef st = HAL_I2C_Mem_Write(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000 75:Core/Src/main.c **** 76:Core/Src/main.c **** return st != HAL_OK ? BME280_E_COMM_FAIL: BME280_OK; 77:Core/Src/main.c **** 78:Core/Src/main.c **** } 79:Core/Src/main.c **** static int8_t 80:Core/Src/main.c **** user_i2c_read ( uint8_t reg_addr, uint8_t *reg_data, uint32_t len, struct identifier * intf) 81:Core/Src/main.c **** { 82:Core/Src/main.c **** uint8_t i2c_addr = intf->dev_addr; 83:Core/Src/main.c **** 84:Core/Src/main.c **** HAL_StatusTypeDef st = HAL_I2C_Mem_Read(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000); 85:Core/Src/main.c **** 86:Core/Src/main.c **** return st != HAL_OK ? BME280_E_COMM_FAIL: BME280_OK; 87:Core/Src/main.c **** 88:Core/Src/main.c **** } 89:Core/Src/main.c **** ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 3 90:Core/Src/main.c **** static void 91:Core/Src/main.c **** user_delay_us(uint32_t us, void *handle) 92:Core/Src/main.c **** { 27 .loc 1 92 1 view -0 28 .cfi_startproc 29 @ args = 0, pretend = 0, frame = 0 30 @ frame_needed = 0, uses_anonymous_args = 0 31 .loc 1 92 1 is_stmt 0 view .LVU1 32 0000 08B5 push {r3, lr} 33 .LCFI0: 34 .cfi_def_cfa_offset 8 35 .cfi_offset 3, -8 36 .cfi_offset 14, -4 93:Core/Src/main.c **** HAL_Delay ((us+999)/1000); 37 .loc 1 93 3 is_stmt 1 view .LVU2 38 .loc 1 93 17 is_stmt 0 view .LVU3 39 0002 00F2E730 addw r0, r0, #999 40 .LVL1: 41 .loc 1 93 3 view .LVU4 42 0006 034B ldr r3, .L3 43 0008 A3FB0030 umull r3, r0, r3, r0 44 .LVL2: 45 .loc 1 93 3 view .LVU5 46 000c 8009 lsrs r0, r0, #6 47 000e FFF7FEFF bl HAL_Delay 48 .LVL3: 94:Core/Src/main.c **** } 49 .loc 1 94 1 view .LVU6 50 0012 08BD pop {r3, pc} 51 .L4: 52 .align 2 53 .L3: 54 0014 D34D6210 .word 274877907 55 .cfi_endproc 56 .LFE70: 58 .section .text.user_i2c_write,"ax",%progbits 59 .align 1 60 .syntax unified 61 .thumb 62 .thumb_func 63 .fpu softvfp 65 user_i2c_write: 66 .LVL4: 67 .LFB68: 71:Core/Src/main.c **** 68 .loc 1 71 1 is_stmt 1 view -0 69 .cfi_startproc 70 @ args = 0, pretend = 0, frame = 0 71 @ frame_needed = 0, uses_anonymous_args = 0 71:Core/Src/main.c **** 72 .loc 1 71 1 is_stmt 0 view .LVU8 73 0000 10B5 push {r4, lr} 74 .LCFI1: 75 .cfi_def_cfa_offset 8 76 .cfi_offset 4, -8 77 .cfi_offset 14, -4 78 0002 84B0 sub sp, sp, #16 ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 4 79 .LCFI2: 80 .cfi_def_cfa_offset 24 73:Core/Src/main.c **** HAL_StatusTypeDef st = HAL_I2C_Mem_Write(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000 81 .loc 1 73 3 is_stmt 1 view .LVU9 73:Core/Src/main.c **** HAL_StatusTypeDef st = HAL_I2C_Mem_Write(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000 82 .loc 1 73 11 is_stmt 0 view .LVU10 83 0004 1C78 ldrb r4, [r3] @ zero_extendqisi2 84 .LVL5: 74:Core/Src/main.c **** 85 .loc 1 74 5 is_stmt 1 view .LVU11 74:Core/Src/main.c **** 86 .loc 1 74 28 is_stmt 0 view .LVU12 87 0006 42F21073 movw r3, #10000 88 .LVL6: 74:Core/Src/main.c **** 89 .loc 1 74 28 view .LVU13 90 000a 0293 str r3, [sp, #8] 91 000c 92B2 uxth r2, r2 92 .LVL7: 74:Core/Src/main.c **** 93 .loc 1 74 28 view .LVU14 94 000e 0192 str r2, [sp, #4] 95 0010 0091 str r1, [sp] 96 0012 0123 movs r3, #1 97 0014 0246 mov r2, r0 98 0016 04FA03F1 lsl r1, r4, r3 99 .LVL8: 74:Core/Src/main.c **** 100 .loc 1 74 28 view .LVU15 101 001a 0548 ldr r0, .L10 102 .LVL9: 74:Core/Src/main.c **** 103 .loc 1 74 28 view .LVU16 104 001c FFF7FEFF bl HAL_I2C_Mem_Write 105 .LVL10: 76:Core/Src/main.c **** 106 .loc 1 76 3 is_stmt 1 view .LVU17 76:Core/Src/main.c **** 107 .loc 1 76 44 is_stmt 0 view .LVU18 108 0020 10B9 cbnz r0, .L9 109 0022 0020 movs r0, #0 110 .LVL11: 111 .L6: 78:Core/Src/main.c **** static int8_t 112 .loc 1 78 1 discriminator 4 view .LVU19 113 0024 04B0 add sp, sp, #16 114 .LCFI3: 115 .cfi_remember_state 116 .cfi_def_cfa_offset 8 117 @ sp needed 118 0026 10BD pop {r4, pc} 119 .LVL12: 120 .L9: 121 .LCFI4: 122 .cfi_restore_state 76:Core/Src/main.c **** 123 .loc 1 76 44 view .LVU20 ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 5 124 0028 6FF00300 mvn r0, #3 125 .LVL13: 76:Core/Src/main.c **** 126 .loc 1 76 44 view .LVU21 127 002c FAE7 b .L6 128 .L11: 129 002e 00BF .align 2 130 .L10: 131 0030 00000000 .word hi2c2 132 .cfi_endproc 133 .LFE68: 135 .section .text.user_i2c_read,"ax",%progbits 136 .align 1 137 .syntax unified 138 .thumb 139 .thumb_func 140 .fpu softvfp 142 user_i2c_read: 143 .LVL14: 144 .LFB69: 81:Core/Src/main.c **** uint8_t i2c_addr = intf->dev_addr; 145 .loc 1 81 1 is_stmt 1 view -0 146 .cfi_startproc 147 @ args = 0, pretend = 0, frame = 0 148 @ frame_needed = 0, uses_anonymous_args = 0 81:Core/Src/main.c **** uint8_t i2c_addr = intf->dev_addr; 149 .loc 1 81 1 is_stmt 0 view .LVU23 150 0000 10B5 push {r4, lr} 151 .LCFI5: 152 .cfi_def_cfa_offset 8 153 .cfi_offset 4, -8 154 .cfi_offset 14, -4 155 0002 84B0 sub sp, sp, #16 156 .LCFI6: 157 .cfi_def_cfa_offset 24 82:Core/Src/main.c **** 158 .loc 1 82 3 is_stmt 1 view .LVU24 82:Core/Src/main.c **** 159 .loc 1 82 11 is_stmt 0 view .LVU25 160 0004 1C78 ldrb r4, [r3] @ zero_extendqisi2 161 .LVL15: 84:Core/Src/main.c **** 162 .loc 1 84 3 is_stmt 1 view .LVU26 84:Core/Src/main.c **** 163 .loc 1 84 26 is_stmt 0 view .LVU27 164 0006 42F21073 movw r3, #10000 165 .LVL16: 84:Core/Src/main.c **** 166 .loc 1 84 26 view .LVU28 167 000a 0293 str r3, [sp, #8] 168 000c 92B2 uxth r2, r2 169 .LVL17: 84:Core/Src/main.c **** 170 .loc 1 84 26 view .LVU29 171 000e 0192 str r2, [sp, #4] 172 0010 0091 str r1, [sp] 173 0012 0123 movs r3, #1 ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 6 174 0014 0246 mov r2, r0 175 0016 04FA03F1 lsl r1, r4, r3 176 .LVL18: 84:Core/Src/main.c **** 177 .loc 1 84 26 view .LVU30 178 001a 0548 ldr r0, .L17 179 .LVL19: 84:Core/Src/main.c **** 180 .loc 1 84 26 view .LVU31 181 001c FFF7FEFF bl HAL_I2C_Mem_Read 182 .LVL20: 86:Core/Src/main.c **** 183 .loc 1 86 3 is_stmt 1 view .LVU32 86:Core/Src/main.c **** 184 .loc 1 86 44 is_stmt 0 view .LVU33 185 0020 10B9 cbnz r0, .L16 186 0022 0020 movs r0, #0 187 .LVL21: 188 .L13: 88:Core/Src/main.c **** 189 .loc 1 88 1 discriminator 4 view .LVU34 190 0024 04B0 add sp, sp, #16 191 .LCFI7: 192 .cfi_remember_state 193 .cfi_def_cfa_offset 8 194 @ sp needed 195 0026 10BD pop {r4, pc} 196 .LVL22: 197 .L16: 198 .LCFI8: 199 .cfi_restore_state 86:Core/Src/main.c **** 200 .loc 1 86 44 view .LVU35 201 0028 6FF00300 mvn r0, #3 202 .LVL23: 86:Core/Src/main.c **** 203 .loc 1 86 44 view .LVU36 204 002c FAE7 b .L13 205 .L18: 206 002e 00BF .align 2 207 .L17: 208 0030 00000000 .word hi2c2 209 .cfi_endproc 210 .LFE69: 212 .section .text.MX_GPIO_Init,"ax",%progbits 213 .align 1 214 .syntax unified 215 .thumb 216 .thumb_func 217 .fpu softvfp 219 MX_GPIO_Init: 220 .LFB80: 95:Core/Src/main.c **** 96:Core/Src/main.c **** 97:Core/Src/main.c **** 98:Core/Src/main.c **** struct bme280_dev dev; 99:Core/Src/main.c **** ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 7 100:Core/Src/main.c **** struct identifier id; 101:Core/Src/main.c **** 102:Core/Src/main.c **** /* Variable to store minimum wait time between consecutive measurement in force mode */ 103:Core/Src/main.c **** uint32_t req_delay; 104:Core/Src/main.c **** 105:Core/Src/main.c **** int8_t rslt; 106:Core/Src/main.c **** 107:Core/Src/main.c **** 108:Core/Src/main.c **** /* USER CODE END PV */ 109:Core/Src/main.c **** 110:Core/Src/main.c **** /* Private function prototypes -----------------------------------------------*/ 111:Core/Src/main.c **** void SystemClock_Config(void); 112:Core/Src/main.c **** static void MX_GPIO_Init(void); 113:Core/Src/main.c **** static void MX_SPI1_Init(void); 114:Core/Src/main.c **** static void MX_TIM4_Init(void); 115:Core/Src/main.c **** static void MX_USART1_UART_Init(void); 116:Core/Src/main.c **** static void MX_TIM3_Init(void); 117:Core/Src/main.c **** static void MX_I2C2_Init(void); 118:Core/Src/main.c **** static void MX_RTC_Init(void); 119:Core/Src/main.c **** /* USER CODE BEGIN PFP */ 120:Core/Src/main.c **** 121:Core/Src/main.c **** /*! 122:Core/Src/main.c **** * @brief This API reads the sensor temperature, pressure and humidity data in forced mode. 123:Core/Src/main.c **** */ 124:Core/Src/main.c **** int8_t 125:Core/Src/main.c **** stream_sensor_data_forced_mode (struct bme280_dev *dev) 126:Core/Src/main.c **** { 127:Core/Src/main.c **** /* Variable to define the result */ 128:Core/Src/main.c **** int8_t rslt = BME280_OK; 129:Core/Src/main.c **** 130:Core/Src/main.c **** /* Variable to define the selecting sensors */ 131:Core/Src/main.c **** uint8_t settings_sel = 0; 132:Core/Src/main.c **** 133:Core/Src/main.c **** /* Structure to get the pressure, temperature and humidity values */ 134:Core/Src/main.c **** struct bme280_data comp_data; 135:Core/Src/main.c **** 136:Core/Src/main.c **** /* Recommended mode of operation: Indoor navigation */ 137:Core/Src/main.c **** dev->settings.osr_h = BME280_OVERSAMPLING_1X; 138:Core/Src/main.c **** dev->settings.osr_p = BME280_OVERSAMPLING_16X; 139:Core/Src/main.c **** dev->settings.osr_t = BME280_OVERSAMPLING_2X; 140:Core/Src/main.c **** dev->settings.filter = BME280_FILTER_COEFF_16; 141:Core/Src/main.c **** 142:Core/Src/main.c **** settings_sel = BME280_OSR_PRESS_SEL | BME280_OSR_TEMP_SEL | BME280_OSR_HUM_SEL 143:Core/Src/main.c **** | BME280_FILTER_SEL; 144:Core/Src/main.c **** 145:Core/Src/main.c **** /* Set the sensor settings */ 146:Core/Src/main.c **** rslt = bme280_set_sensor_settings (settings_sel, dev); 147:Core/Src/main.c **** if (rslt != BME280_OK) 148:Core/Src/main.c **** { 149:Core/Src/main.c **** // fprintf(stderr, "Failed to set sensor settings (code %+d).", rslt); 150:Core/Src/main.c **** 151:Core/Src/main.c **** return rslt; 152:Core/Src/main.c **** } 153:Core/Src/main.c **** 154:Core/Src/main.c **** /*Calculate the minimum delay required between consecutive measurement based upon the sensor enab 155:Core/Src/main.c **** * and the oversampling configuration. */ 156:Core/Src/main.c **** req_delay = bme280_cal_meas_delay (&dev->settings); ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 8 157:Core/Src/main.c **** 158:Core/Src/main.c **** /* Set the sensor to forced mode */ 159:Core/Src/main.c **** rslt = bme280_set_sensor_mode (BME280_FORCED_MODE, dev); 160:Core/Src/main.c **** if (rslt != BME280_OK) 161:Core/Src/main.c **** { 162:Core/Src/main.c **** return rslt; 163:Core/Src/main.c **** } 164:Core/Src/main.c **** 165:Core/Src/main.c **** return rslt; 166:Core/Src/main.c **** } 167:Core/Src/main.c **** /* USER CODE END PFP */ 168:Core/Src/main.c **** 169:Core/Src/main.c **** /* Private user code ---------------------------------------------------------*/ 170:Core/Src/main.c **** /* USER CODE BEGIN 0 */ 171:Core/Src/main.c **** 172:Core/Src/main.c **** /* USER CODE END 0 */ 173:Core/Src/main.c **** 174:Core/Src/main.c **** /** 175:Core/Src/main.c **** * @brief The application entry point. 176:Core/Src/main.c **** * @retval int 177:Core/Src/main.c **** */ 178:Core/Src/main.c **** int main(void) 179:Core/Src/main.c **** { 180:Core/Src/main.c **** /* USER CODE BEGIN 1 */ 181:Core/Src/main.c **** 182:Core/Src/main.c **** 183:Core/Src/main.c **** /* USER CODE END 1 */ 184:Core/Src/main.c **** 185:Core/Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ 186:Core/Src/main.c **** 187:Core/Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ 188:Core/Src/main.c **** HAL_Init(); 189:Core/Src/main.c **** 190:Core/Src/main.c **** /* USER CODE BEGIN Init */ 191:Core/Src/main.c **** 192:Core/Src/main.c **** /* USER CODE END Init */ 193:Core/Src/main.c **** 194:Core/Src/main.c **** /* Configure the system clock */ 195:Core/Src/main.c **** SystemClock_Config(); 196:Core/Src/main.c **** 197:Core/Src/main.c **** /* USER CODE BEGIN SysInit */ 198:Core/Src/main.c **** 199:Core/Src/main.c **** /* USER CODE END SysInit */ 200:Core/Src/main.c **** 201:Core/Src/main.c **** /* Initialize all configured peripherals */ 202:Core/Src/main.c **** MX_GPIO_Init(); 203:Core/Src/main.c **** MX_SPI1_Init(); 204:Core/Src/main.c **** MX_TIM4_Init(); 205:Core/Src/main.c **** MX_USART1_UART_Init(); 206:Core/Src/main.c **** MX_TIM3_Init(); 207:Core/Src/main.c **** MX_I2C2_Init(); 208:Core/Src/main.c **** MX_RTC_Init(); 209:Core/Src/main.c **** MX_USB_DEVICE_Init(); 210:Core/Src/main.c **** /* USER CODE BEGIN 2 */ 211:Core/Src/main.c **** 212:Core/Src/main.c **** HAL_GPIO_WritePin ( USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_RESET); 213:Core/Src/main.c **** HAL_Delay (1000); ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 9 214:Core/Src/main.c **** HAL_GPIO_WritePin ( USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_SET); 215:Core/Src/main.c **** 216:Core/Src/main.c **** /* setup the USART control blocks */ 217:Core/Src/main.c **** init_usart_ctl (&uc1, &huart1); 218:Core/Src/main.c **** 219:Core/Src/main.c **** EnableSerialRxInterrupt (&uc1); 220:Core/Src/main.c **** 221:Core/Src/main.c **** /* BME 280 */ 222:Core/Src/main.c **** struct bme280_dev dev; 223:Core/Src/main.c **** 224:Core/Src/main.c **** struct identifier id; 225:Core/Src/main.c **** 226:Core/Src/main.c **** /* Variable to define the result */ 227:Core/Src/main.c **** int8_t rslt = BME280_OK; 228:Core/Src/main.c **** 229:Core/Src/main.c **** /* Make sure to select BME280_I2C_ADDR_PRIM or BME280_I2C_ADDR_SEC as needed */ 230:Core/Src/main.c **** id.dev_addr = BME280_I2C_ADDR_PRIM >> 1; 231:Core/Src/main.c **** 232:Core/Src/main.c **** dev.intf = BME280_I2C_INTF; 233:Core/Src/main.c **** dev.read = user_i2c_read; 234:Core/Src/main.c **** dev.write = user_i2c_write; 235:Core/Src/main.c **** dev.delay_us = user_delay_us; 236:Core/Src/main.c **** 237:Core/Src/main.c **** /* Update interface pointer with the structure that contains both device address and file descrip 238:Core/Src/main.c **** dev.intf_ptr = &id; 239:Core/Src/main.c **** 240:Core/Src/main.c **** /* Initialize the bme280 */ 241:Core/Src/main.c **** rslt = bme280_init(&dev); 242:Core/Src/main.c **** if (rslt != BME280_OK) 243:Core/Src/main.c **** { 244:Core/Src/main.c **** // fprintf(stderr, "Failed to initialize the device (code %+d).\n", rslt); 245:Core/Src/main.c **** exit(1); 246:Core/Src/main.c **** } 247:Core/Src/main.c **** 248:Core/Src/main.c **** 249:Core/Src/main.c **** rslt = stream_sensor_data_forced_mode(&dev); 250:Core/Src/main.c **** if (rslt != BME280_OK) 251:Core/Src/main.c **** { 252:Core/Src/main.c **** // fprintf(stderr, "Failed to stream sensor data (code %+d).\n", rslt); 253:Core/Src/main.c **** exit(1); 254:Core/Src/main.c **** } 255:Core/Src/main.c **** 256:Core/Src/main.c **** 257:Core/Src/main.c **** 258:Core/Src/main.c **** 259:Core/Src/main.c **** 260:Core/Src/main.c **** cc_init (); 261:Core/Src/main.c **** /* USER CODE END 2 */ 262:Core/Src/main.c **** 263:Core/Src/main.c **** /* Infinite loop */ 264:Core/Src/main.c **** /* USER CODE BEGIN WHILE */ 265:Core/Src/main.c **** while (1) 266:Core/Src/main.c **** { 267:Core/Src/main.c **** cc_run (&dev); 268:Core/Src/main.c **** 269:Core/Src/main.c **** 270:Core/Src/main.c **** ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 10 271:Core/Src/main.c **** HAL_Delay (50); 272:Core/Src/main.c **** 273:Core/Src/main.c **** /* USER CODE END WHILE */ 274:Core/Src/main.c **** 275:Core/Src/main.c **** /* USER CODE BEGIN 3 */ 276:Core/Src/main.c **** } 277:Core/Src/main.c **** /* USER CODE END 3 */ 278:Core/Src/main.c **** } 279:Core/Src/main.c **** 280:Core/Src/main.c **** /** 281:Core/Src/main.c **** * @brief System Clock Configuration 282:Core/Src/main.c **** * @retval None 283:Core/Src/main.c **** */ 284:Core/Src/main.c **** void SystemClock_Config(void) 285:Core/Src/main.c **** { 286:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 287:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 288:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 289:Core/Src/main.c **** 290:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters 291:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure. 292:Core/Src/main.c **** */ 293:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE; 294:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; 295:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 296:Core/Src/main.c **** RCC_OscInitStruct.LSEState = RCC_LSE_ON; 297:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; 298:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 299:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 300:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; 301:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 302:Core/Src/main.c **** { 303:Core/Src/main.c **** Error_Handler(); 304:Core/Src/main.c **** } 305:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks 306:Core/Src/main.c **** */ 307:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 308:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 309:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 310:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 311:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 312:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 313:Core/Src/main.c **** 314:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 315:Core/Src/main.c **** { 316:Core/Src/main.c **** Error_Handler(); 317:Core/Src/main.c **** } 318:Core/Src/main.c **** PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USB; 319:Core/Src/main.c **** PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; 320:Core/Src/main.c **** PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; 321:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 322:Core/Src/main.c **** { 323:Core/Src/main.c **** Error_Handler(); 324:Core/Src/main.c **** } 325:Core/Src/main.c **** } 326:Core/Src/main.c **** 327:Core/Src/main.c **** /** ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 11 328:Core/Src/main.c **** * @brief I2C2 Initialization Function 329:Core/Src/main.c **** * @param None 330:Core/Src/main.c **** * @retval None 331:Core/Src/main.c **** */ 332:Core/Src/main.c **** static void MX_I2C2_Init(void) 333:Core/Src/main.c **** { 334:Core/Src/main.c **** 335:Core/Src/main.c **** /* USER CODE BEGIN I2C2_Init 0 */ 336:Core/Src/main.c **** 337:Core/Src/main.c **** /* USER CODE END I2C2_Init 0 */ 338:Core/Src/main.c **** 339:Core/Src/main.c **** /* USER CODE BEGIN I2C2_Init 1 */ 340:Core/Src/main.c **** 341:Core/Src/main.c **** /* USER CODE END I2C2_Init 1 */ 342:Core/Src/main.c **** hi2c2.Instance = I2C2; 343:Core/Src/main.c **** hi2c2.Init.ClockSpeed = 100000; 344:Core/Src/main.c **** hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; 345:Core/Src/main.c **** hi2c2.Init.OwnAddress1 = 0; 346:Core/Src/main.c **** hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 347:Core/Src/main.c **** hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 348:Core/Src/main.c **** hi2c2.Init.OwnAddress2 = 0; 349:Core/Src/main.c **** hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 350:Core/Src/main.c **** hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 351:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c2) != HAL_OK) 352:Core/Src/main.c **** { 353:Core/Src/main.c **** Error_Handler(); 354:Core/Src/main.c **** } 355:Core/Src/main.c **** /* USER CODE BEGIN I2C2_Init 2 */ 356:Core/Src/main.c **** 357:Core/Src/main.c **** /* USER CODE END I2C2_Init 2 */ 358:Core/Src/main.c **** 359:Core/Src/main.c **** } 360:Core/Src/main.c **** 361:Core/Src/main.c **** /** 362:Core/Src/main.c **** * @brief RTC Initialization Function 363:Core/Src/main.c **** * @param None 364:Core/Src/main.c **** * @retval None 365:Core/Src/main.c **** */ 366:Core/Src/main.c **** static void MX_RTC_Init(void) 367:Core/Src/main.c **** { 368:Core/Src/main.c **** 369:Core/Src/main.c **** /* USER CODE BEGIN RTC_Init 0 */ 370:Core/Src/main.c **** 371:Core/Src/main.c **** /* USER CODE END RTC_Init 0 */ 372:Core/Src/main.c **** 373:Core/Src/main.c **** RTC_TimeTypeDef sTime = {0}; 374:Core/Src/main.c **** RTC_DateTypeDef DateToUpdate = {0}; 375:Core/Src/main.c **** 376:Core/Src/main.c **** /* USER CODE BEGIN RTC_Init 1 */ 377:Core/Src/main.c **** 378:Core/Src/main.c **** /* USER CODE END RTC_Init 1 */ 379:Core/Src/main.c **** /** Initialize RTC Only 380:Core/Src/main.c **** */ 381:Core/Src/main.c **** hrtc.Instance = RTC; 382:Core/Src/main.c **** hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND; 383:Core/Src/main.c **** hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM; 384:Core/Src/main.c **** if (HAL_RTC_Init(&hrtc) != HAL_OK) ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 12 385:Core/Src/main.c **** { 386:Core/Src/main.c **** Error_Handler(); 387:Core/Src/main.c **** } 388:Core/Src/main.c **** 389:Core/Src/main.c **** /* USER CODE BEGIN Check_RTC_BKUP */ 390:Core/Src/main.c **** 391:Core/Src/main.c **** /* USER CODE END Check_RTC_BKUP */ 392:Core/Src/main.c **** 393:Core/Src/main.c **** /** Initialize RTC and set the Time and Date 394:Core/Src/main.c **** */ 395:Core/Src/main.c **** sTime.Hours = 0x0; 396:Core/Src/main.c **** sTime.Minutes = 0x0; 397:Core/Src/main.c **** sTime.Seconds = 0x0; 398:Core/Src/main.c **** 399:Core/Src/main.c **** if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BCD) != HAL_OK) 400:Core/Src/main.c **** { 401:Core/Src/main.c **** Error_Handler(); 402:Core/Src/main.c **** } 403:Core/Src/main.c **** DateToUpdate.WeekDay = RTC_WEEKDAY_MONDAY; 404:Core/Src/main.c **** DateToUpdate.Month = RTC_MONTH_JANUARY; 405:Core/Src/main.c **** DateToUpdate.Date = 0x1; 406:Core/Src/main.c **** DateToUpdate.Year = 0x0; 407:Core/Src/main.c **** 408:Core/Src/main.c **** if (HAL_RTC_SetDate(&hrtc, &DateToUpdate, RTC_FORMAT_BCD) != HAL_OK) 409:Core/Src/main.c **** { 410:Core/Src/main.c **** Error_Handler(); 411:Core/Src/main.c **** } 412:Core/Src/main.c **** /* USER CODE BEGIN RTC_Init 2 */ 413:Core/Src/main.c **** 414:Core/Src/main.c **** /* USER CODE END RTC_Init 2 */ 415:Core/Src/main.c **** 416:Core/Src/main.c **** } 417:Core/Src/main.c **** 418:Core/Src/main.c **** /** 419:Core/Src/main.c **** * @brief SPI1 Initialization Function 420:Core/Src/main.c **** * @param None 421:Core/Src/main.c **** * @retval None 422:Core/Src/main.c **** */ 423:Core/Src/main.c **** static void MX_SPI1_Init(void) 424:Core/Src/main.c **** { 425:Core/Src/main.c **** 426:Core/Src/main.c **** /* USER CODE BEGIN SPI1_Init 0 */ 427:Core/Src/main.c **** 428:Core/Src/main.c **** /* USER CODE END SPI1_Init 0 */ 429:Core/Src/main.c **** 430:Core/Src/main.c **** /* USER CODE BEGIN SPI1_Init 1 */ 431:Core/Src/main.c **** 432:Core/Src/main.c **** /* USER CODE END SPI1_Init 1 */ 433:Core/Src/main.c **** /* SPI1 parameter configuration*/ 434:Core/Src/main.c **** hspi1.Instance = SPI1; 435:Core/Src/main.c **** hspi1.Init.Mode = SPI_MODE_MASTER; 436:Core/Src/main.c **** hspi1.Init.Direction = SPI_DIRECTION_1LINE; 437:Core/Src/main.c **** hspi1.Init.DataSize = SPI_DATASIZE_8BIT; 438:Core/Src/main.c **** hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH; 439:Core/Src/main.c **** hspi1.Init.CLKPhase = SPI_PHASE_2EDGE; 440:Core/Src/main.c **** hspi1.Init.NSS = SPI_NSS_SOFT; 441:Core/Src/main.c **** hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 13 442:Core/Src/main.c **** hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; 443:Core/Src/main.c **** hspi1.Init.TIMode = SPI_TIMODE_DISABLE; 444:Core/Src/main.c **** hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; 445:Core/Src/main.c **** hspi1.Init.CRCPolynomial = 10; 446:Core/Src/main.c **** if (HAL_SPI_Init(&hspi1) != HAL_OK) 447:Core/Src/main.c **** { 448:Core/Src/main.c **** Error_Handler(); 449:Core/Src/main.c **** } 450:Core/Src/main.c **** /* USER CODE BEGIN SPI1_Init 2 */ 451:Core/Src/main.c **** 452:Core/Src/main.c **** /* USER CODE END SPI1_Init 2 */ 453:Core/Src/main.c **** 454:Core/Src/main.c **** } 455:Core/Src/main.c **** 456:Core/Src/main.c **** /** 457:Core/Src/main.c **** * @brief TIM3 Initialization Function 458:Core/Src/main.c **** * @param None 459:Core/Src/main.c **** * @retval None 460:Core/Src/main.c **** */ 461:Core/Src/main.c **** static void MX_TIM3_Init(void) 462:Core/Src/main.c **** { 463:Core/Src/main.c **** 464:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 0 */ 465:Core/Src/main.c **** 466:Core/Src/main.c **** /* USER CODE END TIM3_Init 0 */ 467:Core/Src/main.c **** 468:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; 469:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 470:Core/Src/main.c **** 471:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 1 */ 472:Core/Src/main.c **** 473:Core/Src/main.c **** /* USER CODE END TIM3_Init 1 */ 474:Core/Src/main.c **** htim3.Instance = TIM3; 475:Core/Src/main.c **** htim3.Init.Prescaler = 719; 476:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP; 477:Core/Src/main.c **** htim3.Init.Period = 10000; 478:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 479:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 480:Core/Src/main.c **** if (HAL_TIM_OC_Init(&htim3) != HAL_OK) 481:Core/Src/main.c **** { 482:Core/Src/main.c **** Error_Handler(); 483:Core/Src/main.c **** } 484:Core/Src/main.c **** if (HAL_TIM_OnePulse_Init(&htim3, TIM_OPMODE_SINGLE) != HAL_OK) 485:Core/Src/main.c **** { 486:Core/Src/main.c **** Error_Handler(); 487:Core/Src/main.c **** } 488:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_ENABLE; 489:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 490:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) 491:Core/Src/main.c **** { 492:Core/Src/main.c **** Error_Handler(); 493:Core/Src/main.c **** } 494:Core/Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_TIMING; 495:Core/Src/main.c **** sConfigOC.Pulse = 9999; 496:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 497:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 498:Core/Src/main.c **** if (HAL_TIM_OC_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 14 499:Core/Src/main.c **** { 500:Core/Src/main.c **** Error_Handler(); 501:Core/Src/main.c **** } 502:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 2 */ 503:Core/Src/main.c **** 504:Core/Src/main.c **** /* USER CODE END TIM3_Init 2 */ 505:Core/Src/main.c **** 506:Core/Src/main.c **** } 507:Core/Src/main.c **** 508:Core/Src/main.c **** /** 509:Core/Src/main.c **** * @brief TIM4 Initialization Function 510:Core/Src/main.c **** * @param None 511:Core/Src/main.c **** * @retval None 512:Core/Src/main.c **** */ 513:Core/Src/main.c **** static void MX_TIM4_Init(void) 514:Core/Src/main.c **** { 515:Core/Src/main.c **** 516:Core/Src/main.c **** /* USER CODE BEGIN TIM4_Init 0 */ 517:Core/Src/main.c **** 518:Core/Src/main.c **** /* USER CODE END TIM4_Init 0 */ 519:Core/Src/main.c **** 520:Core/Src/main.c **** TIM_Encoder_InitTypeDef sConfig = {0}; 521:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; 522:Core/Src/main.c **** 523:Core/Src/main.c **** /* USER CODE BEGIN TIM4_Init 1 */ 524:Core/Src/main.c **** 525:Core/Src/main.c **** /* USER CODE END TIM4_Init 1 */ 526:Core/Src/main.c **** htim4.Instance = TIM4; 527:Core/Src/main.c **** htim4.Init.Prescaler = 0; 528:Core/Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; 529:Core/Src/main.c **** htim4.Init.Period = 65535; 530:Core/Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 531:Core/Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 532:Core/Src/main.c **** sConfig.EncoderMode = TIM_ENCODERMODE_TI12; 533:Core/Src/main.c **** sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; 534:Core/Src/main.c **** sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; 535:Core/Src/main.c **** sConfig.IC1Prescaler = TIM_ICPSC_DIV1; 536:Core/Src/main.c **** sConfig.IC1Filter = 8; 537:Core/Src/main.c **** sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; 538:Core/Src/main.c **** sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; 539:Core/Src/main.c **** sConfig.IC2Prescaler = TIM_ICPSC_DIV1; 540:Core/Src/main.c **** sConfig.IC2Filter = 8; 541:Core/Src/main.c **** if (HAL_TIM_Encoder_Init(&htim4, &sConfig) != HAL_OK) 542:Core/Src/main.c **** { 543:Core/Src/main.c **** Error_Handler(); 544:Core/Src/main.c **** } 545:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 546:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 547:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) 548:Core/Src/main.c **** { 549:Core/Src/main.c **** Error_Handler(); 550:Core/Src/main.c **** } 551:Core/Src/main.c **** /* USER CODE BEGIN TIM4_Init 2 */ 552:Core/Src/main.c **** 553:Core/Src/main.c **** /* USER CODE END TIM4_Init 2 */ 554:Core/Src/main.c **** 555:Core/Src/main.c **** } ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 15 556:Core/Src/main.c **** 557:Core/Src/main.c **** /** 558:Core/Src/main.c **** * @brief USART1 Initialization Function 559:Core/Src/main.c **** * @param None 560:Core/Src/main.c **** * @retval None 561:Core/Src/main.c **** */ 562:Core/Src/main.c **** static void MX_USART1_UART_Init(void) 563:Core/Src/main.c **** { 564:Core/Src/main.c **** 565:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */ 566:Core/Src/main.c **** 567:Core/Src/main.c **** /* USER CODE END USART1_Init 0 */ 568:Core/Src/main.c **** 569:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */ 570:Core/Src/main.c **** 571:Core/Src/main.c **** /* USER CODE END USART1_Init 1 */ 572:Core/Src/main.c **** huart1.Instance = USART1; 573:Core/Src/main.c **** huart1.Init.BaudRate = 115200; 574:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B; 575:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1; 576:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE; 577:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX; 578:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 579:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16; 580:Core/Src/main.c **** if (HAL_UART_Init(&huart1) != HAL_OK) 581:Core/Src/main.c **** { 582:Core/Src/main.c **** Error_Handler(); 583:Core/Src/main.c **** } 584:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ 585:Core/Src/main.c **** 586:Core/Src/main.c **** /* USER CODE END USART1_Init 2 */ 587:Core/Src/main.c **** 588:Core/Src/main.c **** } 589:Core/Src/main.c **** 590:Core/Src/main.c **** /** 591:Core/Src/main.c **** * @brief GPIO Initialization Function 592:Core/Src/main.c **** * @param None 593:Core/Src/main.c **** * @retval None 594:Core/Src/main.c **** */ 595:Core/Src/main.c **** static void MX_GPIO_Init(void) 596:Core/Src/main.c **** { 221 .loc 1 596 1 is_stmt 1 view -0 222 .cfi_startproc 223 @ args = 0, pretend = 0, frame = 32 224 @ frame_needed = 0, uses_anonymous_args = 0 225 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} 226 .LCFI9: 227 .cfi_def_cfa_offset 24 228 .cfi_offset 4, -24 229 .cfi_offset 5, -20 230 .cfi_offset 6, -16 231 .cfi_offset 7, -12 232 .cfi_offset 8, -8 233 .cfi_offset 14, -4 234 0004 88B0 sub sp, sp, #32 235 .LCFI10: 236 .cfi_def_cfa_offset 56 ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 16 597:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 237 .loc 1 597 3 view .LVU38 238 .loc 1 597 20 is_stmt 0 view .LVU39 239 0006 0024 movs r4, #0 240 0008 0494 str r4, [sp, #16] 241 000a 0594 str r4, [sp, #20] 242 000c 0694 str r4, [sp, #24] 243 000e 0794 str r4, [sp, #28] 598:Core/Src/main.c **** 599:Core/Src/main.c **** /* GPIO Ports Clock Enable */ 600:Core/Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 244 .loc 1 600 3 is_stmt 1 view .LVU40 245 .LBB2: 246 .loc 1 600 3 view .LVU41 247 .loc 1 600 3 view .LVU42 248 0010 244B ldr r3, .L21 249 0012 9A69 ldr r2, [r3, #24] 250 0014 42F01002 orr r2, r2, #16 251 0018 9A61 str r2, [r3, #24] 252 .loc 1 600 3 view .LVU43 253 001a 9A69 ldr r2, [r3, #24] 254 001c 02F01002 and r2, r2, #16 255 0020 0092 str r2, [sp] 256 .loc 1 600 3 view .LVU44 257 0022 009A ldr r2, [sp] 258 .LBE2: 601:Core/Src/main.c **** __HAL_RCC_GPIOD_CLK_ENABLE(); 259 .loc 1 601 3 view .LVU45 260 .LBB3: 261 .loc 1 601 3 view .LVU46 262 .loc 1 601 3 view .LVU47 263 0024 9A69 ldr r2, [r3, #24] 264 0026 42F02002 orr r2, r2, #32 265 002a 9A61 str r2, [r3, #24] 266 .loc 1 601 3 view .LVU48 267 002c 9A69 ldr r2, [r3, #24] 268 002e 02F02002 and r2, r2, #32 269 0032 0192 str r2, [sp, #4] 270 .loc 1 601 3 view .LVU49 271 0034 019A ldr r2, [sp, #4] 272 .LBE3: 602:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 273 .loc 1 602 3 view .LVU50 274 .LBB4: 275 .loc 1 602 3 view .LVU51 276 .loc 1 602 3 view .LVU52 277 0036 9A69 ldr r2, [r3, #24] 278 0038 42F00402 orr r2, r2, #4 279 003c 9A61 str r2, [r3, #24] 280 .loc 1 602 3 view .LVU53 281 003e 9A69 ldr r2, [r3, #24] 282 0040 02F00402 and r2, r2, #4 283 0044 0292 str r2, [sp, #8] 284 .loc 1 602 3 view .LVU54 285 0046 029A ldr r2, [sp, #8] 286 .LBE4: 603:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 17 287 .loc 1 603 3 view .LVU55 288 .LBB5: 289 .loc 1 603 3 view .LVU56 290 .loc 1 603 3 view .LVU57 291 0048 9A69 ldr r2, [r3, #24] 292 004a 42F00802 orr r2, r2, #8 293 004e 9A61 str r2, [r3, #24] 294 .loc 1 603 3 view .LVU58 295 0050 9B69 ldr r3, [r3, #24] 296 0052 03F00803 and r3, r3, #8 297 0056 0393 str r3, [sp, #12] 298 .loc 1 603 3 view .LVU59 299 0058 039B ldr r3, [sp, #12] 300 .LBE5: 604:Core/Src/main.c **** 605:Core/Src/main.c **** /*Configure GPIO pin Output Level */ 606:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, SPI_CD_Pin|SPI_RESET_Pin|SPI_NSS1_Pin, GPIO_PIN_RESET); 301 .loc 1 606 3 view .LVU60 302 005a DFF85080 ldr r8, .L21+8 303 005e 2246 mov r2, r4 304 0060 5821 movs r1, #88 305 0062 4046 mov r0, r8 306 0064 FFF7FEFF bl HAL_GPIO_WritePin 307 .LVL24: 607:Core/Src/main.c **** 608:Core/Src/main.c **** /*Configure GPIO pin Output Level */ 609:Core/Src/main.c **** HAL_GPIO_WritePin(USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_RESET); 308 .loc 1 609 3 view .LVU61 309 0068 0F4D ldr r5, .L21+4 310 006a 2246 mov r2, r4 311 006c 1021 movs r1, #16 312 006e 2846 mov r0, r5 313 0070 FFF7FEFF bl HAL_GPIO_WritePin 314 .LVL25: 610:Core/Src/main.c **** 611:Core/Src/main.c **** /*Configure GPIO pins : SPI_CD_Pin SPI_RESET_Pin SPI_NSS1_Pin */ 612:Core/Src/main.c **** GPIO_InitStruct.Pin = SPI_CD_Pin|SPI_RESET_Pin|SPI_NSS1_Pin; 315 .loc 1 612 3 view .LVU62 316 .loc 1 612 23 is_stmt 0 view .LVU63 317 0074 5823 movs r3, #88 318 0076 0493 str r3, [sp, #16] 613:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 319 .loc 1 613 3 is_stmt 1 view .LVU64 320 .loc 1 613 24 is_stmt 0 view .LVU65 321 0078 0127 movs r7, #1 322 007a 0597 str r7, [sp, #20] 614:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 323 .loc 1 614 3 is_stmt 1 view .LVU66 324 .loc 1 614 24 is_stmt 0 view .LVU67 325 007c 0694 str r4, [sp, #24] 615:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 326 .loc 1 615 3 is_stmt 1 view .LVU68 327 .loc 1 615 25 is_stmt 0 view .LVU69 328 007e 0226 movs r6, #2 329 0080 0796 str r6, [sp, #28] 616:Core/Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 330 .loc 1 616 3 is_stmt 1 view .LVU70 ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 18 331 0082 04A9 add r1, sp, #16 332 0084 4046 mov r0, r8 333 0086 FFF7FEFF bl HAL_GPIO_Init 334 .LVL26: 617:Core/Src/main.c **** 618:Core/Src/main.c **** /*Configure GPIO pin : USB_PULLUP_Pin */ 619:Core/Src/main.c **** GPIO_InitStruct.Pin = USB_PULLUP_Pin; 335 .loc 1 619 3 view .LVU71 336 .loc 1 619 23 is_stmt 0 view .LVU72 337 008a 1023 movs r3, #16 338 008c 0493 str r3, [sp, #16] 620:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 339 .loc 1 620 3 is_stmt 1 view .LVU73 340 .loc 1 620 24 is_stmt 0 view .LVU74 341 008e 0597 str r7, [sp, #20] 621:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 342 .loc 1 621 3 is_stmt 1 view .LVU75 343 .loc 1 621 24 is_stmt 0 view .LVU76 344 0090 0694 str r4, [sp, #24] 622:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 345 .loc 1 622 3 is_stmt 1 view .LVU77 346 .loc 1 622 25 is_stmt 0 view .LVU78 347 0092 0796 str r6, [sp, #28] 623:Core/Src/main.c **** HAL_GPIO_Init(USB_PULLUP_GPIO_Port, &GPIO_InitStruct); 348 .loc 1 623 3 is_stmt 1 view .LVU79 349 0094 0DEB0301 add r1, sp, r3 350 0098 2846 mov r0, r5 351 009a FFF7FEFF bl HAL_GPIO_Init 352 .LVL27: 624:Core/Src/main.c **** 625:Core/Src/main.c **** } 353 .loc 1 625 1 is_stmt 0 view .LVU80 354 009e 08B0 add sp, sp, #32 355 .LCFI11: 356 .cfi_def_cfa_offset 24 357 @ sp needed 358 00a0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} 359 .L22: 360 .align 2 361 .L21: 362 00a4 00100240 .word 1073876992 363 00a8 000C0140 .word 1073810432 364 00ac 00080140 .word 1073809408 365 .cfi_endproc 366 .LFE80: 368 .section .text.MX_SPI1_Init,"ax",%progbits 369 .align 1 370 .syntax unified 371 .thumb 372 .thumb_func 373 .fpu softvfp 375 MX_SPI1_Init: 376 .LFB76: 424:Core/Src/main.c **** 377 .loc 1 424 1 is_stmt 1 view -0 378 .cfi_startproc 379 @ args = 0, pretend = 0, frame = 0 ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 19 380 @ frame_needed = 0, uses_anonymous_args = 0 381 0000 08B5 push {r3, lr} 382 .LCFI12: 383 .cfi_def_cfa_offset 8 384 .cfi_offset 3, -8 385 .cfi_offset 14, -4 434:Core/Src/main.c **** hspi1.Init.Mode = SPI_MODE_MASTER; 386 .loc 1 434 3 view .LVU82 434:Core/Src/main.c **** hspi1.Init.Mode = SPI_MODE_MASTER; 387 .loc 1 434 18 is_stmt 0 view .LVU83 388 0002 0E48 ldr r0, .L25 389 0004 0E4B ldr r3, .L25+4 390 0006 0360 str r3, [r0] 435:Core/Src/main.c **** hspi1.Init.Direction = SPI_DIRECTION_1LINE; 391 .loc 1 435 3 is_stmt 1 view .LVU84 435:Core/Src/main.c **** hspi1.Init.Direction = SPI_DIRECTION_1LINE; 392 .loc 1 435 19 is_stmt 0 view .LVU85 393 0008 4FF48273 mov r3, #260 394 000c 4360 str r3, [r0, #4] 436:Core/Src/main.c **** hspi1.Init.DataSize = SPI_DATASIZE_8BIT; 395 .loc 1 436 3 is_stmt 1 view .LVU86 436:Core/Src/main.c **** hspi1.Init.DataSize = SPI_DATASIZE_8BIT; 396 .loc 1 436 24 is_stmt 0 view .LVU87 397 000e 4FF40043 mov r3, #32768 398 0012 8360 str r3, [r0, #8] 437:Core/Src/main.c **** hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH; 399 .loc 1 437 3 is_stmt 1 view .LVU88 437:Core/Src/main.c **** hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH; 400 .loc 1 437 23 is_stmt 0 view .LVU89 401 0014 0023 movs r3, #0 402 0016 C360 str r3, [r0, #12] 438:Core/Src/main.c **** hspi1.Init.CLKPhase = SPI_PHASE_2EDGE; 403 .loc 1 438 3 is_stmt 1 view .LVU90 438:Core/Src/main.c **** hspi1.Init.CLKPhase = SPI_PHASE_2EDGE; 404 .loc 1 438 26 is_stmt 0 view .LVU91 405 0018 0222 movs r2, #2 406 001a 0261 str r2, [r0, #16] 439:Core/Src/main.c **** hspi1.Init.NSS = SPI_NSS_SOFT; 407 .loc 1 439 3 is_stmt 1 view .LVU92 439:Core/Src/main.c **** hspi1.Init.NSS = SPI_NSS_SOFT; 408 .loc 1 439 23 is_stmt 0 view .LVU93 409 001c 0122 movs r2, #1 410 001e 4261 str r2, [r0, #20] 440:Core/Src/main.c **** hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; 411 .loc 1 440 3 is_stmt 1 view .LVU94 440:Core/Src/main.c **** hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; 412 .loc 1 440 18 is_stmt 0 view .LVU95 413 0020 4FF40072 mov r2, #512 414 0024 8261 str r2, [r0, #24] 441:Core/Src/main.c **** hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; 415 .loc 1 441 3 is_stmt 1 view .LVU96 441:Core/Src/main.c **** hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; 416 .loc 1 441 32 is_stmt 0 view .LVU97 417 0026 1022 movs r2, #16 418 0028 C261 str r2, [r0, #28] 442:Core/Src/main.c **** hspi1.Init.TIMode = SPI_TIMODE_DISABLE; 419 .loc 1 442 3 is_stmt 1 view .LVU98 ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 20 442:Core/Src/main.c **** hspi1.Init.TIMode = SPI_TIMODE_DISABLE; 420 .loc 1 442 23 is_stmt 0 view .LVU99 421 002a 0362 str r3, [r0, #32] 443:Core/Src/main.c **** hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; 422 .loc 1 443 3 is_stmt 1 view .LVU100 443:Core/Src/main.c **** hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; 423 .loc 1 443 21 is_stmt 0 view .LVU101 424 002c 4362 str r3, [r0, #36] 444:Core/Src/main.c **** hspi1.Init.CRCPolynomial = 10; 425 .loc 1 444 3 is_stmt 1 view .LVU102 444:Core/Src/main.c **** hspi1.Init.CRCPolynomial = 10; 426 .loc 1 444 29 is_stmt 0 view .LVU103 427 002e 8362 str r3, [r0, #40] 445:Core/Src/main.c **** if (HAL_SPI_Init(&hspi1) != HAL_OK) 428 .loc 1 445 3 is_stmt 1 view .LVU104 445:Core/Src/main.c **** if (HAL_SPI_Init(&hspi1) != HAL_OK) 429 .loc 1 445 28 is_stmt 0 view .LVU105 430 0030 0A23 movs r3, #10 431 0032 C362 str r3, [r0, #44] 446:Core/Src/main.c **** { 432 .loc 1 446 3 is_stmt 1 view .LVU106 446:Core/Src/main.c **** { 433 .loc 1 446 7 is_stmt 0 view .LVU107 434 0034 FFF7FEFF bl HAL_SPI_Init 435 .LVL28: 454:Core/Src/main.c **** 436 .loc 1 454 1 view .LVU108 437 0038 08BD pop {r3, pc} 438 .L26: 439 003a 00BF .align 2 440 .L25: 441 003c 00000000 .word hspi1 442 0040 00300140 .word 1073819648 443 .cfi_endproc 444 .LFE76: 446 .section .text.MX_TIM4_Init,"ax",%progbits 447 .align 1 448 .syntax unified 449 .thumb 450 .thumb_func 451 .fpu softvfp 453 MX_TIM4_Init: 454 .LFB78: 514:Core/Src/main.c **** 455 .loc 1 514 1 is_stmt 1 view -0 456 .cfi_startproc 457 @ args = 0, pretend = 0, frame = 48 458 @ frame_needed = 0, uses_anonymous_args = 0 459 0000 30B5 push {r4, r5, lr} 460 .LCFI13: 461 .cfi_def_cfa_offset 12 462 .cfi_offset 4, -12 463 .cfi_offset 5, -8 464 .cfi_offset 14, -4 465 0002 8DB0 sub sp, sp, #52 466 .LCFI14: 467 .cfi_def_cfa_offset 64 ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 21 520:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; 468 .loc 1 520 3 view .LVU110 520:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; 469 .loc 1 520 27 is_stmt 0 view .LVU111 470 0004 0024 movs r4, #0 471 0006 0494 str r4, [sp, #16] 472 0008 0694 str r4, [sp, #24] 473 000a 0894 str r4, [sp, #32] 474 000c 0A94 str r4, [sp, #40] 521:Core/Src/main.c **** 475 .loc 1 521 3 is_stmt 1 view .LVU112 521:Core/Src/main.c **** 476 .loc 1 521 27 is_stmt 0 view .LVU113 477 000e 0194 str r4, [sp, #4] 478 0010 0294 str r4, [sp, #8] 526:Core/Src/main.c **** htim4.Init.Prescaler = 0; 479 .loc 1 526 3 is_stmt 1 view .LVU114 526:Core/Src/main.c **** htim4.Init.Prescaler = 0; 480 .loc 1 526 18 is_stmt 0 view .LVU115 481 0012 0F4D ldr r5, .L29 482 0014 0F4B ldr r3, .L29+4 483 0016 2B60 str r3, [r5] 527:Core/Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; 484 .loc 1 527 3 is_stmt 1 view .LVU116 527:Core/Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; 485 .loc 1 527 24 is_stmt 0 view .LVU117 486 0018 6C60 str r4, [r5, #4] 528:Core/Src/main.c **** htim4.Init.Period = 65535; 487 .loc 1 528 3 is_stmt 1 view .LVU118 528:Core/Src/main.c **** htim4.Init.Period = 65535; 488 .loc 1 528 26 is_stmt 0 view .LVU119 489 001a AC60 str r4, [r5, #8] 529:Core/Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 490 .loc 1 529 3 is_stmt 1 view .LVU120 529:Core/Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 491 .loc 1 529 21 is_stmt 0 view .LVU121 492 001c 4FF6FF73 movw r3, #65535 493 0020 EB60 str r3, [r5, #12] 530:Core/Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 494 .loc 1 530 3 is_stmt 1 view .LVU122 530:Core/Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 495 .loc 1 530 28 is_stmt 0 view .LVU123 496 0022 2C61 str r4, [r5, #16] 531:Core/Src/main.c **** sConfig.EncoderMode = TIM_ENCODERMODE_TI12; 497 .loc 1 531 3 is_stmt 1 view .LVU124 531:Core/Src/main.c **** sConfig.EncoderMode = TIM_ENCODERMODE_TI12; 498 .loc 1 531 32 is_stmt 0 view .LVU125 499 0024 AC61 str r4, [r5, #24] 532:Core/Src/main.c **** sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; 500 .loc 1 532 3 is_stmt 1 view .LVU126 532:Core/Src/main.c **** sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; 501 .loc 1 532 23 is_stmt 0 view .LVU127 502 0026 0323 movs r3, #3 503 0028 0393 str r3, [sp, #12] 533:Core/Src/main.c **** sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; 504 .loc 1 533 3 is_stmt 1 view .LVU128 534:Core/Src/main.c **** sConfig.IC1Prescaler = TIM_ICPSC_DIV1; ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 22 505 .loc 1 534 3 view .LVU129 534:Core/Src/main.c **** sConfig.IC1Prescaler = TIM_ICPSC_DIV1; 506 .loc 1 534 24 is_stmt 0 view .LVU130 507 002a 0122 movs r2, #1 508 002c 0592 str r2, [sp, #20] 535:Core/Src/main.c **** sConfig.IC1Filter = 8; 509 .loc 1 535 3 is_stmt 1 view .LVU131 536:Core/Src/main.c **** sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; 510 .loc 1 536 3 view .LVU132 536:Core/Src/main.c **** sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; 511 .loc 1 536 21 is_stmt 0 view .LVU133 512 002e 0823 movs r3, #8 513 0030 0793 str r3, [sp, #28] 537:Core/Src/main.c **** sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; 514 .loc 1 537 3 is_stmt 1 view .LVU134 538:Core/Src/main.c **** sConfig.IC2Prescaler = TIM_ICPSC_DIV1; 515 .loc 1 538 3 view .LVU135 538:Core/Src/main.c **** sConfig.IC2Prescaler = TIM_ICPSC_DIV1; 516 .loc 1 538 24 is_stmt 0 view .LVU136 517 0032 0992 str r2, [sp, #36] 539:Core/Src/main.c **** sConfig.IC2Filter = 8; 518 .loc 1 539 3 is_stmt 1 view .LVU137 540:Core/Src/main.c **** if (HAL_TIM_Encoder_Init(&htim4, &sConfig) != HAL_OK) 519 .loc 1 540 3 view .LVU138 540:Core/Src/main.c **** if (HAL_TIM_Encoder_Init(&htim4, &sConfig) != HAL_OK) 520 .loc 1 540 21 is_stmt 0 view .LVU139 521 0034 0B93 str r3, [sp, #44] 541:Core/Src/main.c **** { 522 .loc 1 541 3 is_stmt 1 view .LVU140 541:Core/Src/main.c **** { 523 .loc 1 541 7 is_stmt 0 view .LVU141 524 0036 03A9 add r1, sp, #12 525 0038 2846 mov r0, r5 526 003a FFF7FEFF bl HAL_TIM_Encoder_Init 527 .LVL29: 545:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 528 .loc 1 545 3 is_stmt 1 view .LVU142 545:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 529 .loc 1 545 37 is_stmt 0 view .LVU143 530 003e 0194 str r4, [sp, #4] 546:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) 531 .loc 1 546 3 is_stmt 1 view .LVU144 546:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) 532 .loc 1 546 33 is_stmt 0 view .LVU145 533 0040 0294 str r4, [sp, #8] 547:Core/Src/main.c **** { 534 .loc 1 547 3 is_stmt 1 view .LVU146 547:Core/Src/main.c **** { 535 .loc 1 547 7 is_stmt 0 view .LVU147 536 0042 01A9 add r1, sp, #4 537 0044 2846 mov r0, r5 538 0046 FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization 539 .LVL30: 555:Core/Src/main.c **** 540 .loc 1 555 1 view .LVU148 541 004a 0DB0 add sp, sp, #52 542 .LCFI15: ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 23 543 .cfi_def_cfa_offset 12 544 @ sp needed 545 004c 30BD pop {r4, r5, pc} 546 .L30: 547 004e 00BF .align 2 548 .L29: 549 0050 00000000 .word htim4 550 0054 00080040 .word 1073743872 551 .cfi_endproc 552 .LFE78: 554 .section .text.MX_USART1_UART_Init,"ax",%progbits 555 .align 1 556 .syntax unified 557 .thumb 558 .thumb_func 559 .fpu softvfp 561 MX_USART1_UART_Init: 562 .LFB79: 563:Core/Src/main.c **** 563 .loc 1 563 1 is_stmt 1 view -0 564 .cfi_startproc 565 @ args = 0, pretend = 0, frame = 0 566 @ frame_needed = 0, uses_anonymous_args = 0 567 0000 08B5 push {r3, lr} 568 .LCFI16: 569 .cfi_def_cfa_offset 8 570 .cfi_offset 3, -8 571 .cfi_offset 14, -4 572:Core/Src/main.c **** huart1.Init.BaudRate = 115200; 572 .loc 1 572 3 view .LVU150 572:Core/Src/main.c **** huart1.Init.BaudRate = 115200; 573 .loc 1 572 19 is_stmt 0 view .LVU151 574 0002 0848 ldr r0, .L33 575 0004 084B ldr r3, .L33+4 576 0006 0360 str r3, [r0] 573:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B; 577 .loc 1 573 3 is_stmt 1 view .LVU152 573:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B; 578 .loc 1 573 24 is_stmt 0 view .LVU153 579 0008 4FF4E133 mov r3, #115200 580 000c 4360 str r3, [r0, #4] 574:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1; 581 .loc 1 574 3 is_stmt 1 view .LVU154 574:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1; 582 .loc 1 574 26 is_stmt 0 view .LVU155 583 000e 0023 movs r3, #0 584 0010 8360 str r3, [r0, #8] 575:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE; 585 .loc 1 575 3 is_stmt 1 view .LVU156 575:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE; 586 .loc 1 575 24 is_stmt 0 view .LVU157 587 0012 C360 str r3, [r0, #12] 576:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX; 588 .loc 1 576 3 is_stmt 1 view .LVU158 576:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX; 589 .loc 1 576 22 is_stmt 0 view .LVU159 590 0014 0361 str r3, [r0, #16] ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 24 577:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 591 .loc 1 577 3 is_stmt 1 view .LVU160 577:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 592 .loc 1 577 20 is_stmt 0 view .LVU161 593 0016 0C22 movs r2, #12 594 0018 4261 str r2, [r0, #20] 578:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16; 595 .loc 1 578 3 is_stmt 1 view .LVU162 578:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16; 596 .loc 1 578 25 is_stmt 0 view .LVU163 597 001a 8361 str r3, [r0, #24] 579:Core/Src/main.c **** if (HAL_UART_Init(&huart1) != HAL_OK) 598 .loc 1 579 3 is_stmt 1 view .LVU164 579:Core/Src/main.c **** if (HAL_UART_Init(&huart1) != HAL_OK) 599 .loc 1 579 28 is_stmt 0 view .LVU165 600 001c C361 str r3, [r0, #28] 580:Core/Src/main.c **** { 601 .loc 1 580 3 is_stmt 1 view .LVU166 580:Core/Src/main.c **** { 602 .loc 1 580 7 is_stmt 0 view .LVU167 603 001e FFF7FEFF bl HAL_UART_Init 604 .LVL31: 588:Core/Src/main.c **** 605 .loc 1 588 1 view .LVU168 606 0022 08BD pop {r3, pc} 607 .L34: 608 .align 2 609 .L33: 610 0024 00000000 .word huart1 611 0028 00380140 .word 1073821696 612 .cfi_endproc 613 .LFE79: 615 .section .text.MX_TIM3_Init,"ax",%progbits 616 .align 1 617 .syntax unified 618 .thumb 619 .thumb_func 620 .fpu softvfp 622 MX_TIM3_Init: 623 .LFB77: 462:Core/Src/main.c **** 624 .loc 1 462 1 is_stmt 1 view -0 625 .cfi_startproc 626 @ args = 0, pretend = 0, frame = 40 627 @ frame_needed = 0, uses_anonymous_args = 0 628 0000 30B5 push {r4, r5, lr} 629 .LCFI17: 630 .cfi_def_cfa_offset 12 631 .cfi_offset 4, -12 632 .cfi_offset 5, -8 633 .cfi_offset 14, -4 634 0002 8BB0 sub sp, sp, #44 635 .LCFI18: 636 .cfi_def_cfa_offset 56 468:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 637 .loc 1 468 3 view .LVU170 468:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 25 638 .loc 1 468 27 is_stmt 0 view .LVU171 639 0004 0024 movs r4, #0 640 0006 0894 str r4, [sp, #32] 641 0008 0994 str r4, [sp, #36] 469:Core/Src/main.c **** 642 .loc 1 469 3 is_stmt 1 view .LVU172 469:Core/Src/main.c **** 643 .loc 1 469 22 is_stmt 0 view .LVU173 644 000a 0194 str r4, [sp, #4] 645 000c 0294 str r4, [sp, #8] 646 000e 0394 str r4, [sp, #12] 647 0010 0494 str r4, [sp, #16] 648 0012 0594 str r4, [sp, #20] 649 0014 0694 str r4, [sp, #24] 650 0016 0794 str r4, [sp, #28] 474:Core/Src/main.c **** htim3.Init.Prescaler = 719; 651 .loc 1 474 3 is_stmt 1 view .LVU174 474:Core/Src/main.c **** htim3.Init.Prescaler = 719; 652 .loc 1 474 18 is_stmt 0 view .LVU175 653 0018 134D ldr r5, .L37 654 001a 144B ldr r3, .L37+4 655 001c 2B60 str r3, [r5] 475:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP; 656 .loc 1 475 3 is_stmt 1 view .LVU176 475:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP; 657 .loc 1 475 24 is_stmt 0 view .LVU177 658 001e 40F2CF23 movw r3, #719 659 0022 6B60 str r3, [r5, #4] 476:Core/Src/main.c **** htim3.Init.Period = 10000; 660 .loc 1 476 3 is_stmt 1 view .LVU178 476:Core/Src/main.c **** htim3.Init.Period = 10000; 661 .loc 1 476 26 is_stmt 0 view .LVU179 662 0024 AC60 str r4, [r5, #8] 477:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 663 .loc 1 477 3 is_stmt 1 view .LVU180 477:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 664 .loc 1 477 21 is_stmt 0 view .LVU181 665 0026 42F21073 movw r3, #10000 666 002a EB60 str r3, [r5, #12] 478:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 667 .loc 1 478 3 is_stmt 1 view .LVU182 478:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 668 .loc 1 478 28 is_stmt 0 view .LVU183 669 002c 2C61 str r4, [r5, #16] 479:Core/Src/main.c **** if (HAL_TIM_OC_Init(&htim3) != HAL_OK) 670 .loc 1 479 3 is_stmt 1 view .LVU184 479:Core/Src/main.c **** if (HAL_TIM_OC_Init(&htim3) != HAL_OK) 671 .loc 1 479 32 is_stmt 0 view .LVU185 672 002e AC61 str r4, [r5, #24] 480:Core/Src/main.c **** { 673 .loc 1 480 3 is_stmt 1 view .LVU186 480:Core/Src/main.c **** { 674 .loc 1 480 7 is_stmt 0 view .LVU187 675 0030 2846 mov r0, r5 676 0032 FFF7FEFF bl HAL_TIM_OC_Init 677 .LVL32: 484:Core/Src/main.c **** { ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 26 678 .loc 1 484 3 is_stmt 1 view .LVU188 484:Core/Src/main.c **** { 679 .loc 1 484 7 is_stmt 0 view .LVU189 680 0036 0821 movs r1, #8 681 0038 2846 mov r0, r5 682 003a FFF7FEFF bl HAL_TIM_OnePulse_Init 683 .LVL33: 488:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 684 .loc 1 488 3 is_stmt 1 view .LVU190 488:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 685 .loc 1 488 37 is_stmt 0 view .LVU191 686 003e 1023 movs r3, #16 687 0040 0893 str r3, [sp, #32] 489:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) 688 .loc 1 489 3 is_stmt 1 view .LVU192 489:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) 689 .loc 1 489 33 is_stmt 0 view .LVU193 690 0042 0994 str r4, [sp, #36] 490:Core/Src/main.c **** { 691 .loc 1 490 3 is_stmt 1 view .LVU194 490:Core/Src/main.c **** { 692 .loc 1 490 7 is_stmt 0 view .LVU195 693 0044 08A9 add r1, sp, #32 694 0046 2846 mov r0, r5 695 0048 FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization 696 .LVL34: 494:Core/Src/main.c **** sConfigOC.Pulse = 9999; 697 .loc 1 494 3 is_stmt 1 view .LVU196 494:Core/Src/main.c **** sConfigOC.Pulse = 9999; 698 .loc 1 494 20 is_stmt 0 view .LVU197 699 004c 0194 str r4, [sp, #4] 495:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 700 .loc 1 495 3 is_stmt 1 view .LVU198 495:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 701 .loc 1 495 19 is_stmt 0 view .LVU199 702 004e 42F20F73 movw r3, #9999 703 0052 0293 str r3, [sp, #8] 496:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 704 .loc 1 496 3 is_stmt 1 view .LVU200 496:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 705 .loc 1 496 24 is_stmt 0 view .LVU201 706 0054 0394 str r4, [sp, #12] 497:Core/Src/main.c **** if (HAL_TIM_OC_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 707 .loc 1 497 3 is_stmt 1 view .LVU202 497:Core/Src/main.c **** if (HAL_TIM_OC_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 708 .loc 1 497 24 is_stmt 0 view .LVU203 709 0056 0594 str r4, [sp, #20] 498:Core/Src/main.c **** { 710 .loc 1 498 3 is_stmt 1 view .LVU204 498:Core/Src/main.c **** { 711 .loc 1 498 7 is_stmt 0 view .LVU205 712 0058 2246 mov r2, r4 713 005a 01A9 add r1, sp, #4 714 005c 2846 mov r0, r5 715 005e FFF7FEFF bl HAL_TIM_OC_ConfigChannel 716 .LVL35: 506:Core/Src/main.c **** ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 27 717 .loc 1 506 1 view .LVU206 718 0062 0BB0 add sp, sp, #44 719 .LCFI19: 720 .cfi_def_cfa_offset 12 721 @ sp needed 722 0064 30BD pop {r4, r5, pc} 723 .L38: 724 0066 00BF .align 2 725 .L37: 726 0068 00000000 .word htim3 727 006c 00040040 .word 1073742848 728 .cfi_endproc 729 .LFE77: 731 .section .text.MX_I2C2_Init,"ax",%progbits 732 .align 1 733 .syntax unified 734 .thumb 735 .thumb_func 736 .fpu softvfp 738 MX_I2C2_Init: 739 .LFB74: 333:Core/Src/main.c **** 740 .loc 1 333 1 is_stmt 1 view -0 741 .cfi_startproc 742 @ args = 0, pretend = 0, frame = 0 743 @ frame_needed = 0, uses_anonymous_args = 0 744 0000 08B5 push {r3, lr} 745 .LCFI20: 746 .cfi_def_cfa_offset 8 747 .cfi_offset 3, -8 748 .cfi_offset 14, -4 342:Core/Src/main.c **** hi2c2.Init.ClockSpeed = 100000; 749 .loc 1 342 3 view .LVU208 342:Core/Src/main.c **** hi2c2.Init.ClockSpeed = 100000; 750 .loc 1 342 18 is_stmt 0 view .LVU209 751 0002 0948 ldr r0, .L41 752 0004 094B ldr r3, .L41+4 753 0006 0360 str r3, [r0] 343:Core/Src/main.c **** hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; 754 .loc 1 343 3 is_stmt 1 view .LVU210 343:Core/Src/main.c **** hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; 755 .loc 1 343 25 is_stmt 0 view .LVU211 756 0008 094B ldr r3, .L41+8 757 000a 4360 str r3, [r0, #4] 344:Core/Src/main.c **** hi2c2.Init.OwnAddress1 = 0; 758 .loc 1 344 3 is_stmt 1 view .LVU212 344:Core/Src/main.c **** hi2c2.Init.OwnAddress1 = 0; 759 .loc 1 344 24 is_stmt 0 view .LVU213 760 000c 0023 movs r3, #0 761 000e 8360 str r3, [r0, #8] 345:Core/Src/main.c **** hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 762 .loc 1 345 3 is_stmt 1 view .LVU214 345:Core/Src/main.c **** hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 763 .loc 1 345 26 is_stmt 0 view .LVU215 764 0010 C360 str r3, [r0, #12] 346:Core/Src/main.c **** hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 765 .loc 1 346 3 is_stmt 1 view .LVU216 ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 28 346:Core/Src/main.c **** hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 766 .loc 1 346 29 is_stmt 0 view .LVU217 767 0012 4FF48042 mov r2, #16384 768 0016 0261 str r2, [r0, #16] 347:Core/Src/main.c **** hi2c2.Init.OwnAddress2 = 0; 769 .loc 1 347 3 is_stmt 1 view .LVU218 347:Core/Src/main.c **** hi2c2.Init.OwnAddress2 = 0; 770 .loc 1 347 30 is_stmt 0 view .LVU219 771 0018 4361 str r3, [r0, #20] 348:Core/Src/main.c **** hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 772 .loc 1 348 3 is_stmt 1 view .LVU220 348:Core/Src/main.c **** hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 773 .loc 1 348 26 is_stmt 0 view .LVU221 774 001a 8361 str r3, [r0, #24] 349:Core/Src/main.c **** hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 775 .loc 1 349 3 is_stmt 1 view .LVU222 349:Core/Src/main.c **** hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 776 .loc 1 349 30 is_stmt 0 view .LVU223 777 001c C361 str r3, [r0, #28] 350:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c2) != HAL_OK) 778 .loc 1 350 3 is_stmt 1 view .LVU224 350:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c2) != HAL_OK) 779 .loc 1 350 28 is_stmt 0 view .LVU225 780 001e 0362 str r3, [r0, #32] 351:Core/Src/main.c **** { 781 .loc 1 351 3 is_stmt 1 view .LVU226 351:Core/Src/main.c **** { 782 .loc 1 351 7 is_stmt 0 view .LVU227 783 0020 FFF7FEFF bl HAL_I2C_Init 784 .LVL36: 359:Core/Src/main.c **** 785 .loc 1 359 1 view .LVU228 786 0024 08BD pop {r3, pc} 787 .L42: 788 0026 00BF .align 2 789 .L41: 790 0028 00000000 .word hi2c2 791 002c 00580040 .word 1073764352 792 0030 A0860100 .word 100000 793 .cfi_endproc 794 .LFE74: 796 .section .text.MX_RTC_Init,"ax",%progbits 797 .align 1 798 .syntax unified 799 .thumb 800 .thumb_func 801 .fpu softvfp 803 MX_RTC_Init: 804 .LFB75: 367:Core/Src/main.c **** 805 .loc 1 367 1 is_stmt 1 view -0 806 .cfi_startproc 807 @ args = 0, pretend = 0, frame = 8 808 @ frame_needed = 0, uses_anonymous_args = 0 809 0000 30B5 push {r4, r5, lr} 810 .LCFI21: 811 .cfi_def_cfa_offset 12 ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 29 812 .cfi_offset 4, -12 813 .cfi_offset 5, -8 814 .cfi_offset 14, -4 815 0002 83B0 sub sp, sp, #12 816 .LCFI22: 817 .cfi_def_cfa_offset 24 373:Core/Src/main.c **** RTC_DateTypeDef DateToUpdate = {0}; 818 .loc 1 373 3 view .LVU230 373:Core/Src/main.c **** RTC_DateTypeDef DateToUpdate = {0}; 819 .loc 1 373 19 is_stmt 0 view .LVU231 820 0004 0024 movs r4, #0 821 0006 ADF80440 strh r4, [sp, #4] @ movhi 822 000a 8DF80640 strb r4, [sp, #6] 374:Core/Src/main.c **** 823 .loc 1 374 3 is_stmt 1 view .LVU232 374:Core/Src/main.c **** 824 .loc 1 374 19 is_stmt 0 view .LVU233 825 000e 0094 str r4, [sp] 381:Core/Src/main.c **** hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND; 826 .loc 1 381 3 is_stmt 1 view .LVU234 381:Core/Src/main.c **** hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND; 827 .loc 1 381 17 is_stmt 0 view .LVU235 828 0010 124D ldr r5, .L45 829 0012 134B ldr r3, .L45+4 830 0014 2B60 str r3, [r5] 382:Core/Src/main.c **** hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM; 831 .loc 1 382 3 is_stmt 1 view .LVU236 382:Core/Src/main.c **** hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM; 832 .loc 1 382 26 is_stmt 0 view .LVU237 833 0016 4FF0FF33 mov r3, #-1 834 001a 6B60 str r3, [r5, #4] 383:Core/Src/main.c **** if (HAL_RTC_Init(&hrtc) != HAL_OK) 835 .loc 1 383 3 is_stmt 1 view .LVU238 383:Core/Src/main.c **** if (HAL_RTC_Init(&hrtc) != HAL_OK) 836 .loc 1 383 20 is_stmt 0 view .LVU239 837 001c 4FF48073 mov r3, #256 838 0020 AB60 str r3, [r5, #8] 384:Core/Src/main.c **** { 839 .loc 1 384 3 is_stmt 1 view .LVU240 384:Core/Src/main.c **** { 840 .loc 1 384 7 is_stmt 0 view .LVU241 841 0022 2846 mov r0, r5 842 0024 FFF7FEFF bl HAL_RTC_Init 843 .LVL37: 395:Core/Src/main.c **** sTime.Minutes = 0x0; 844 .loc 1 395 3 is_stmt 1 view .LVU242 395:Core/Src/main.c **** sTime.Minutes = 0x0; 845 .loc 1 395 15 is_stmt 0 view .LVU243 846 0028 8DF80440 strb r4, [sp, #4] 396:Core/Src/main.c **** sTime.Seconds = 0x0; 847 .loc 1 396 3 is_stmt 1 view .LVU244 396:Core/Src/main.c **** sTime.Seconds = 0x0; 848 .loc 1 396 17 is_stmt 0 view .LVU245 849 002c 8DF80540 strb r4, [sp, #5] 397:Core/Src/main.c **** 850 .loc 1 397 3 is_stmt 1 view .LVU246 397:Core/Src/main.c **** ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 30 851 .loc 1 397 17 is_stmt 0 view .LVU247 852 0030 8DF80640 strb r4, [sp, #6] 399:Core/Src/main.c **** { 853 .loc 1 399 3 is_stmt 1 view .LVU248 399:Core/Src/main.c **** { 854 .loc 1 399 7 is_stmt 0 view .LVU249 855 0034 0122 movs r2, #1 856 0036 01A9 add r1, sp, #4 857 0038 2846 mov r0, r5 858 003a FFF7FEFF bl HAL_RTC_SetTime 859 .LVL38: 403:Core/Src/main.c **** DateToUpdate.Month = RTC_MONTH_JANUARY; 860 .loc 1 403 3 is_stmt 1 view .LVU250 403:Core/Src/main.c **** DateToUpdate.Month = RTC_MONTH_JANUARY; 861 .loc 1 403 24 is_stmt 0 view .LVU251 862 003e 0122 movs r2, #1 863 0040 8DF80020 strb r2, [sp] 404:Core/Src/main.c **** DateToUpdate.Date = 0x1; 864 .loc 1 404 3 is_stmt 1 view .LVU252 404:Core/Src/main.c **** DateToUpdate.Date = 0x1; 865 .loc 1 404 22 is_stmt 0 view .LVU253 866 0044 8DF80120 strb r2, [sp, #1] 405:Core/Src/main.c **** DateToUpdate.Year = 0x0; 867 .loc 1 405 3 is_stmt 1 view .LVU254 405:Core/Src/main.c **** DateToUpdate.Year = 0x0; 868 .loc 1 405 21 is_stmt 0 view .LVU255 869 0048 8DF80220 strb r2, [sp, #2] 406:Core/Src/main.c **** 870 .loc 1 406 3 is_stmt 1 view .LVU256 406:Core/Src/main.c **** 871 .loc 1 406 21 is_stmt 0 view .LVU257 872 004c 8DF80340 strb r4, [sp, #3] 408:Core/Src/main.c **** { 873 .loc 1 408 3 is_stmt 1 view .LVU258 408:Core/Src/main.c **** { 874 .loc 1 408 7 is_stmt 0 view .LVU259 875 0050 6946 mov r1, sp 876 0052 2846 mov r0, r5 877 0054 FFF7FEFF bl HAL_RTC_SetDate 878 .LVL39: 416:Core/Src/main.c **** 879 .loc 1 416 1 view .LVU260 880 0058 03B0 add sp, sp, #12 881 .LCFI23: 882 .cfi_def_cfa_offset 12 883 @ sp needed 884 005a 30BD pop {r4, r5, pc} 885 .L46: 886 .align 2 887 .L45: 888 005c 00000000 .word hrtc 889 0060 00280040 .word 1073752064 890 .cfi_endproc 891 .LFE75: 893 .section .text.stream_sensor_data_forced_mode,"ax",%progbits 894 .align 1 895 .global stream_sensor_data_forced_mode ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 31 896 .syntax unified 897 .thumb 898 .thumb_func 899 .fpu softvfp 901 stream_sensor_data_forced_mode: 902 .LVL40: 903 .LFB71: 126:Core/Src/main.c **** /* Variable to define the result */ 904 .loc 1 126 1 is_stmt 1 view -0 905 .cfi_startproc 906 @ args = 0, pretend = 0, frame = 0 907 @ frame_needed = 0, uses_anonymous_args = 0 126:Core/Src/main.c **** /* Variable to define the result */ 908 .loc 1 126 1 is_stmt 0 view .LVU262 909 0000 10B5 push {r4, lr} 910 .LCFI24: 911 .cfi_def_cfa_offset 8 912 .cfi_offset 4, -8 913 .cfi_offset 14, -4 914 0002 0446 mov r4, r0 128:Core/Src/main.c **** 915 .loc 1 128 3 is_stmt 1 view .LVU263 916 .LVL41: 131:Core/Src/main.c **** 917 .loc 1 131 3 view .LVU264 134:Core/Src/main.c **** 918 .loc 1 134 3 view .LVU265 137:Core/Src/main.c **** dev->settings.osr_p = BME280_OVERSAMPLING_16X; 919 .loc 1 137 3 view .LVU266 137:Core/Src/main.c **** dev->settings.osr_p = BME280_OVERSAMPLING_16X; 920 .loc 1 137 23 is_stmt 0 view .LVU267 921 0004 0123 movs r3, #1 922 0006 80F84230 strb r3, [r0, #66] 138:Core/Src/main.c **** dev->settings.osr_t = BME280_OVERSAMPLING_2X; 923 .loc 1 138 3 is_stmt 1 view .LVU268 138:Core/Src/main.c **** dev->settings.osr_t = BME280_OVERSAMPLING_2X; 924 .loc 1 138 23 is_stmt 0 view .LVU269 925 000a 0523 movs r3, #5 926 000c 80F84030 strb r3, [r0, #64] 139:Core/Src/main.c **** dev->settings.filter = BME280_FILTER_COEFF_16; 927 .loc 1 139 3 is_stmt 1 view .LVU270 139:Core/Src/main.c **** dev->settings.filter = BME280_FILTER_COEFF_16; 928 .loc 1 139 23 is_stmt 0 view .LVU271 929 0010 0223 movs r3, #2 930 0012 80F84130 strb r3, [r0, #65] 140:Core/Src/main.c **** 931 .loc 1 140 3 is_stmt 1 view .LVU272 140:Core/Src/main.c **** 932 .loc 1 140 24 is_stmt 0 view .LVU273 933 0016 0423 movs r3, #4 934 0018 80F84330 strb r3, [r0, #67] 142:Core/Src/main.c **** | BME280_FILTER_SEL; 935 .loc 1 142 3 is_stmt 1 view .LVU274 936 .LVL42: 146:Core/Src/main.c **** if (rslt != BME280_OK) 937 .loc 1 146 3 view .LVU275 146:Core/Src/main.c **** if (rslt != BME280_OK) ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 32 938 .loc 1 146 10 is_stmt 0 view .LVU276 939 001c 0146 mov r1, r0 940 001e 0F20 movs r0, #15 941 .LVL43: 146:Core/Src/main.c **** if (rslt != BME280_OK) 942 .loc 1 146 10 view .LVU277 943 0020 FFF7FEFF bl bme280_set_sensor_settings 944 .LVL44: 147:Core/Src/main.c **** { 945 .loc 1 147 3 is_stmt 1 view .LVU278 147:Core/Src/main.c **** { 946 .loc 1 147 6 is_stmt 0 view .LVU279 947 0024 0346 mov r3, r0 948 0026 08B1 cbz r0, .L50 949 .LVL45: 950 .L48: 166:Core/Src/main.c **** /* USER CODE END PFP */ 951 .loc 1 166 1 view .LVU280 952 0028 1846 mov r0, r3 953 002a 10BD pop {r4, pc} 954 .LVL46: 955 .L50: 156:Core/Src/main.c **** 956 .loc 1 156 3 is_stmt 1 view .LVU281 156:Core/Src/main.c **** 957 .loc 1 156 15 is_stmt 0 view .LVU282 958 002c 04F14000 add r0, r4, #64 959 .LVL47: 156:Core/Src/main.c **** 960 .loc 1 156 15 view .LVU283 961 0030 FFF7FEFF bl bme280_cal_meas_delay 962 .LVL48: 156:Core/Src/main.c **** 963 .loc 1 156 13 view .LVU284 964 0034 034B ldr r3, .L51 965 0036 1860 str r0, [r3] 159:Core/Src/main.c **** if (rslt != BME280_OK) 966 .loc 1 159 3 is_stmt 1 view .LVU285 159:Core/Src/main.c **** if (rslt != BME280_OK) 967 .loc 1 159 10 is_stmt 0 view .LVU286 968 0038 2146 mov r1, r4 969 003a 0120 movs r0, #1 970 003c FFF7FEFF bl bme280_set_sensor_mode 971 .LVL49: 972 0040 0346 mov r3, r0 973 .LVL50: 160:Core/Src/main.c **** { 974 .loc 1 160 3 is_stmt 1 view .LVU287 975 0042 F1E7 b .L48 976 .L52: 977 .align 2 978 .L51: 979 0044 00000000 .word req_delay 980 .cfi_endproc 981 .LFE71: 983 .section .text.SystemClock_Config,"ax",%progbits 984 .align 1 ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 33 985 .global SystemClock_Config 986 .syntax unified 987 .thumb 988 .thumb_func 989 .fpu softvfp 991 SystemClock_Config: 992 .LFB73: 285:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 993 .loc 1 285 1 view -0 994 .cfi_startproc 995 @ args = 0, pretend = 0, frame = 80 996 @ frame_needed = 0, uses_anonymous_args = 0 997 0000 30B5 push {r4, r5, lr} 998 .LCFI25: 999 .cfi_def_cfa_offset 12 1000 .cfi_offset 4, -12 1001 .cfi_offset 5, -8 1002 .cfi_offset 14, -4 1003 0002 95B0 sub sp, sp, #84 1004 .LCFI26: 1005 .cfi_def_cfa_offset 96 286:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 1006 .loc 1 286 3 view .LVU289 286:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 1007 .loc 1 286 22 is_stmt 0 view .LVU290 1008 0004 0024 movs r4, #0 1009 0006 0C94 str r4, [sp, #48] 1010 0008 0F94 str r4, [sp, #60] 1011 000a 1094 str r4, [sp, #64] 287:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 1012 .loc 1 287 3 is_stmt 1 view .LVU291 287:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 1013 .loc 1 287 22 is_stmt 0 view .LVU292 1014 000c 0594 str r4, [sp, #20] 1015 000e 0694 str r4, [sp, #24] 1016 0010 0794 str r4, [sp, #28] 1017 0012 0894 str r4, [sp, #32] 1018 0014 0994 str r4, [sp, #36] 288:Core/Src/main.c **** 1019 .loc 1 288 3 is_stmt 1 view .LVU293 288:Core/Src/main.c **** 1020 .loc 1 288 28 is_stmt 0 view .LVU294 1021 0016 0194 str r4, [sp, #4] 1022 0018 0294 str r4, [sp, #8] 1023 001a 0394 str r4, [sp, #12] 1024 001c 0494 str r4, [sp, #16] 293:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; 1025 .loc 1 293 3 is_stmt 1 view .LVU295 293:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; 1026 .loc 1 293 36 is_stmt 0 view .LVU296 1027 001e 0523 movs r3, #5 1028 0020 0A93 str r3, [sp, #40] 294:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 1029 .loc 1 294 3 is_stmt 1 view .LVU297 294:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 1030 .loc 1 294 30 is_stmt 0 view .LVU298 1031 0022 4FF48033 mov r3, #65536 ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 34 1032 0026 0B93 str r3, [sp, #44] 295:Core/Src/main.c **** RCC_OscInitStruct.LSEState = RCC_LSE_ON; 1033 .loc 1 295 3 is_stmt 1 view .LVU299 296:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; 1034 .loc 1 296 3 view .LVU300 296:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; 1035 .loc 1 296 30 is_stmt 0 view .LVU301 1036 0028 0122 movs r2, #1 1037 002a 0D92 str r2, [sp, #52] 297:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 1038 .loc 1 297 3 is_stmt 1 view .LVU302 297:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 1039 .loc 1 297 30 is_stmt 0 view .LVU303 1040 002c 0E92 str r2, [sp, #56] 298:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 1041 .loc 1 298 3 is_stmt 1 view .LVU304 298:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 1042 .loc 1 298 34 is_stmt 0 view .LVU305 1043 002e 0225 movs r5, #2 1044 0030 1195 str r5, [sp, #68] 299:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; 1045 .loc 1 299 3 is_stmt 1 view .LVU306 299:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; 1046 .loc 1 299 35 is_stmt 0 view .LVU307 1047 0032 1293 str r3, [sp, #72] 300:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 1048 .loc 1 300 3 is_stmt 1 view .LVU308 300:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 1049 .loc 1 300 32 is_stmt 0 view .LVU309 1050 0034 4FF4E013 mov r3, #1835008 1051 0038 1393 str r3, [sp, #76] 301:Core/Src/main.c **** { 1052 .loc 1 301 3 is_stmt 1 view .LVU310 301:Core/Src/main.c **** { 1053 .loc 1 301 7 is_stmt 0 view .LVU311 1054 003a 0AA8 add r0, sp, #40 1055 003c FFF7FEFF bl HAL_RCC_OscConfig 1056 .LVL51: 307:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 1057 .loc 1 307 3 is_stmt 1 view .LVU312 307:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 1058 .loc 1 307 31 is_stmt 0 view .LVU313 1059 0040 0F23 movs r3, #15 1060 0042 0593 str r3, [sp, #20] 309:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 1061 .loc 1 309 3 is_stmt 1 view .LVU314 309:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 1062 .loc 1 309 34 is_stmt 0 view .LVU315 1063 0044 0695 str r5, [sp, #24] 310:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 1064 .loc 1 310 3 is_stmt 1 view .LVU316 310:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 1065 .loc 1 310 35 is_stmt 0 view .LVU317 1066 0046 0794 str r4, [sp, #28] 311:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 1067 .loc 1 311 3 is_stmt 1 view .LVU318 311:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 35 1068 .loc 1 311 36 is_stmt 0 view .LVU319 1069 0048 4FF48063 mov r3, #1024 1070 004c 0893 str r3, [sp, #32] 312:Core/Src/main.c **** 1071 .loc 1 312 3 is_stmt 1 view .LVU320 312:Core/Src/main.c **** 1072 .loc 1 312 36 is_stmt 0 view .LVU321 1073 004e 0994 str r4, [sp, #36] 314:Core/Src/main.c **** { 1074 .loc 1 314 3 is_stmt 1 view .LVU322 314:Core/Src/main.c **** { 1075 .loc 1 314 7 is_stmt 0 view .LVU323 1076 0050 2946 mov r1, r5 1077 0052 05A8 add r0, sp, #20 1078 0054 FFF7FEFF bl HAL_RCC_ClockConfig 1079 .LVL52: 318:Core/Src/main.c **** PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; 1080 .loc 1 318 3 is_stmt 1 view .LVU324 318:Core/Src/main.c **** PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; 1081 .loc 1 318 38 is_stmt 0 view .LVU325 1082 0058 1123 movs r3, #17 1083 005a 0193 str r3, [sp, #4] 319:Core/Src/main.c **** PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; 1084 .loc 1 319 3 is_stmt 1 view .LVU326 319:Core/Src/main.c **** PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; 1085 .loc 1 319 35 is_stmt 0 view .LVU327 1086 005c 4FF48073 mov r3, #256 1087 0060 0293 str r3, [sp, #8] 320:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 1088 .loc 1 320 3 is_stmt 1 view .LVU328 320:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 1089 .loc 1 320 35 is_stmt 0 view .LVU329 1090 0062 0494 str r4, [sp, #16] 321:Core/Src/main.c **** { 1091 .loc 1 321 3 is_stmt 1 view .LVU330 321:Core/Src/main.c **** { 1092 .loc 1 321 7 is_stmt 0 view .LVU331 1093 0064 01A8 add r0, sp, #4 1094 0066 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig 1095 .LVL53: 325:Core/Src/main.c **** 1096 .loc 1 325 1 view .LVU332 1097 006a 15B0 add sp, sp, #84 1098 .LCFI27: 1099 .cfi_def_cfa_offset 12 1100 @ sp needed 1101 006c 30BD pop {r4, r5, pc} 1102 .cfi_endproc 1103 .LFE73: 1105 .section .text.main,"ax",%progbits 1106 .align 1 1107 .global main 1108 .syntax unified 1109 .thumb 1110 .thumb_func 1111 .fpu softvfp 1113 main: ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 36 1114 .LFB72: 179:Core/Src/main.c **** /* USER CODE BEGIN 1 */ 1115 .loc 1 179 1 is_stmt 1 view -0 1116 .cfi_startproc 1117 @ args = 0, pretend = 0, frame = 80 1118 @ frame_needed = 0, uses_anonymous_args = 0 1119 0000 10B5 push {r4, lr} 1120 .LCFI28: 1121 .cfi_def_cfa_offset 8 1122 .cfi_offset 4, -8 1123 .cfi_offset 14, -4 1124 0002 94B0 sub sp, sp, #80 1125 .LCFI29: 1126 .cfi_def_cfa_offset 88 188:Core/Src/main.c **** 1127 .loc 1 188 3 view .LVU334 1128 0004 FFF7FEFF bl HAL_Init 1129 .LVL54: 195:Core/Src/main.c **** 1130 .loc 1 195 3 view .LVU335 1131 0008 FFF7FEFF bl SystemClock_Config 1132 .LVL55: 202:Core/Src/main.c **** MX_SPI1_Init(); 1133 .loc 1 202 3 view .LVU336 1134 000c FFF7FEFF bl MX_GPIO_Init 1135 .LVL56: 203:Core/Src/main.c **** MX_TIM4_Init(); 1136 .loc 1 203 3 view .LVU337 1137 0010 FFF7FEFF bl MX_SPI1_Init 1138 .LVL57: 204:Core/Src/main.c **** MX_USART1_UART_Init(); 1139 .loc 1 204 3 view .LVU338 1140 0014 FFF7FEFF bl MX_TIM4_Init 1141 .LVL58: 205:Core/Src/main.c **** MX_TIM3_Init(); 1142 .loc 1 205 3 view .LVU339 1143 0018 FFF7FEFF bl MX_USART1_UART_Init 1144 .LVL59: 206:Core/Src/main.c **** MX_I2C2_Init(); 1145 .loc 1 206 3 view .LVU340 1146 001c FFF7FEFF bl MX_TIM3_Init 1147 .LVL60: 207:Core/Src/main.c **** MX_RTC_Init(); 1148 .loc 1 207 3 view .LVU341 1149 0020 FFF7FEFF bl MX_I2C2_Init 1150 .LVL61: 208:Core/Src/main.c **** MX_USB_DEVICE_Init(); 1151 .loc 1 208 3 view .LVU342 1152 0024 FFF7FEFF bl MX_RTC_Init 1153 .LVL62: 209:Core/Src/main.c **** /* USER CODE BEGIN 2 */ 1154 .loc 1 209 3 view .LVU343 1155 0028 FFF7FEFF bl MX_USB_DEVICE_Init 1156 .LVL63: 212:Core/Src/main.c **** HAL_Delay (1000); 1157 .loc 1 212 3 view .LVU344 1158 002c 1D4C ldr r4, .L60 ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 37 1159 002e 0022 movs r2, #0 1160 0030 1021 movs r1, #16 1161 0032 2046 mov r0, r4 1162 0034 FFF7FEFF bl HAL_GPIO_WritePin 1163 .LVL64: 213:Core/Src/main.c **** HAL_GPIO_WritePin ( USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_SET); 1164 .loc 1 213 3 view .LVU345 1165 0038 4FF47A70 mov r0, #1000 1166 003c FFF7FEFF bl HAL_Delay 1167 .LVL65: 214:Core/Src/main.c **** 1168 .loc 1 214 3 view .LVU346 1169 0040 0122 movs r2, #1 1170 0042 1021 movs r1, #16 1171 0044 2046 mov r0, r4 1172 0046 FFF7FEFF bl HAL_GPIO_WritePin 1173 .LVL66: 217:Core/Src/main.c **** 1174 .loc 1 217 3 view .LVU347 1175 004a 174C ldr r4, .L60+4 1176 004c 1749 ldr r1, .L60+8 1177 004e 2046 mov r0, r4 1178 0050 FFF7FEFF bl init_usart_ctl 1179 .LVL67: 219:Core/Src/main.c **** 1180 .loc 1 219 3 view .LVU348 1181 0054 2046 mov r0, r4 1182 0056 FFF7FEFF bl EnableSerialRxInterrupt 1183 .LVL68: 222:Core/Src/main.c **** 1184 .loc 1 222 3 view .LVU349 224:Core/Src/main.c **** 1185 .loc 1 224 3 view .LVU350 227:Core/Src/main.c **** 1186 .loc 1 227 3 view .LVU351 230:Core/Src/main.c **** 1187 .loc 1 230 3 view .LVU352 230:Core/Src/main.c **** 1188 .loc 1 230 15 is_stmt 0 view .LVU353 1189 005a 3B23 movs r3, #59 1190 005c 8DF80430 strb r3, [sp, #4] 232:Core/Src/main.c **** dev.read = user_i2c_read; 1191 .loc 1 232 3 is_stmt 1 view .LVU354 232:Core/Src/main.c **** dev.read = user_i2c_read; 1192 .loc 1 232 12 is_stmt 0 view .LVU355 1193 0060 0123 movs r3, #1 1194 0062 8DF81030 strb r3, [sp, #16] 233:Core/Src/main.c **** dev.write = user_i2c_write; 1195 .loc 1 233 3 is_stmt 1 view .LVU356 233:Core/Src/main.c **** dev.write = user_i2c_write; 1196 .loc 1 233 12 is_stmt 0 view .LVU357 1197 0066 124B ldr r3, .L60+12 1198 0068 0593 str r3, [sp, #20] 234:Core/Src/main.c **** dev.delay_us = user_delay_us; 1199 .loc 1 234 3 is_stmt 1 view .LVU358 234:Core/Src/main.c **** dev.delay_us = user_delay_us; 1200 .loc 1 234 13 is_stmt 0 view .LVU359 ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 38 1201 006a 124B ldr r3, .L60+16 1202 006c 0693 str r3, [sp, #24] 235:Core/Src/main.c **** 1203 .loc 1 235 3 is_stmt 1 view .LVU360 235:Core/Src/main.c **** 1204 .loc 1 235 16 is_stmt 0 view .LVU361 1205 006e 124B ldr r3, .L60+20 1206 0070 0793 str r3, [sp, #28] 238:Core/Src/main.c **** 1207 .loc 1 238 3 is_stmt 1 view .LVU362 238:Core/Src/main.c **** 1208 .loc 1 238 16 is_stmt 0 view .LVU363 1209 0072 01AB add r3, sp, #4 1210 0074 0393 str r3, [sp, #12] 241:Core/Src/main.c **** if (rslt != BME280_OK) 1211 .loc 1 241 5 is_stmt 1 view .LVU364 241:Core/Src/main.c **** if (rslt != BME280_OK) 1212 .loc 1 241 12 is_stmt 0 view .LVU365 1213 0076 02A8 add r0, sp, #8 1214 0078 FFF7FEFF bl bme280_init 1215 .LVL69: 242:Core/Src/main.c **** { 1216 .loc 1 242 5 is_stmt 1 view .LVU366 242:Core/Src/main.c **** { 1217 .loc 1 242 8 is_stmt 0 view .LVU367 1218 007c 10B1 cbz r0, .L56 245:Core/Src/main.c **** } 1219 .loc 1 245 9 is_stmt 1 view .LVU368 1220 007e 0120 movs r0, #1 1221 .LVL70: 245:Core/Src/main.c **** } 1222 .loc 1 245 9 is_stmt 0 view .LVU369 1223 0080 FFF7FEFF bl exit 1224 .LVL71: 1225 .L56: 249:Core/Src/main.c **** if (rslt != BME280_OK) 1226 .loc 1 249 5 is_stmt 1 view .LVU370 249:Core/Src/main.c **** if (rslt != BME280_OK) 1227 .loc 1 249 12 is_stmt 0 view .LVU371 1228 0084 02A8 add r0, sp, #8 1229 .LVL72: 249:Core/Src/main.c **** if (rslt != BME280_OK) 1230 .loc 1 249 12 view .LVU372 1231 0086 FFF7FEFF bl stream_sensor_data_forced_mode 1232 .LVL73: 250:Core/Src/main.c **** { 1233 .loc 1 250 5 is_stmt 1 view .LVU373 250:Core/Src/main.c **** { 1234 .loc 1 250 8 is_stmt 0 view .LVU374 1235 008a 10B1 cbz r0, .L57 253:Core/Src/main.c **** } 1236 .loc 1 253 9 is_stmt 1 view .LVU375 1237 008c 0120 movs r0, #1 1238 .LVL74: 253:Core/Src/main.c **** } 1239 .loc 1 253 9 is_stmt 0 view .LVU376 1240 008e FFF7FEFF bl exit ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 39 1241 .LVL75: 1242 .L57: 260:Core/Src/main.c **** /* USER CODE END 2 */ 1243 .loc 1 260 3 is_stmt 1 view .LVU377 1244 0092 FFF7FEFF bl cc_init 1245 .LVL76: 1246 .L58: 265:Core/Src/main.c **** { 1247 .loc 1 265 3 discriminator 1 view .LVU378 267:Core/Src/main.c **** 1248 .loc 1 267 7 discriminator 1 view .LVU379 1249 0096 02A8 add r0, sp, #8 1250 0098 FFF7FEFF bl cc_run 1251 .LVL77: 271:Core/Src/main.c **** 1252 .loc 1 271 7 discriminator 1 view .LVU380 1253 009c 3220 movs r0, #50 1254 009e FFF7FEFF bl HAL_Delay 1255 .LVL78: 1256 00a2 F8E7 b .L58 1257 .L61: 1258 .align 2 1259 .L60: 1260 00a4 000C0140 .word 1073810432 1261 00a8 00000000 .word uc1 1262 00ac 00000000 .word huart1 1263 00b0 00000000 .word user_i2c_read 1264 00b4 00000000 .word user_i2c_write 1265 00b8 00000000 .word user_delay_us 1266 .cfi_endproc 1267 .LFE72: 1269 .section .text.Error_Handler,"ax",%progbits 1270 .align 1 1271 .global Error_Handler 1272 .syntax unified 1273 .thumb 1274 .thumb_func 1275 .fpu softvfp 1277 Error_Handler: 1278 .LFB81: 626:Core/Src/main.c **** 627:Core/Src/main.c **** /* USER CODE BEGIN 4 */ 628:Core/Src/main.c **** 629:Core/Src/main.c **** /* USER CODE END 4 */ 630:Core/Src/main.c **** 631:Core/Src/main.c **** /** 632:Core/Src/main.c **** * @brief This function is executed in case of error occurrence. 633:Core/Src/main.c **** * @retval None 634:Core/Src/main.c **** */ 635:Core/Src/main.c **** void Error_Handler(void) 636:Core/Src/main.c **** { 1279 .loc 1 636 1 view -0 1280 .cfi_startproc 1281 @ args = 0, pretend = 0, frame = 0 1282 @ frame_needed = 0, uses_anonymous_args = 0 1283 @ link register save eliminated. 637:Core/Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 40 638:Core/Src/main.c **** /* User can add his own implementation to report the HAL error return state */ 639:Core/Src/main.c **** 640:Core/Src/main.c **** /* USER CODE END Error_Handler_Debug */ 641:Core/Src/main.c **** } 1284 .loc 1 641 1 view .LVU382 1285 0000 7047 bx lr 1286 .cfi_endproc 1287 .LFE81: 1289 .comm rslt,1,1 1290 .comm req_delay,4,4 1291 .comm id,2,4 1292 .comm dev,72,4 1293 .comm huart1,64,4 1294 .comm htim4,64,4 1295 .comm htim3,64,4 1296 .comm hspi1,88,4 1297 .comm hrtc,20,4 1298 .comm hi2c2,84,4 1299 .text 1300 .Letext0: 1301 .file 2 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.7 1302 .file 3 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.7 1303 .file 4 "Drivers/CMSIS/Include/core_cm3.h" 1304 .file 5 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h" 1305 .file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h" 1306 .file 7 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h" 1307 .file 8 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h" 1308 .file 9 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h" 1309 .file 10 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h" 1310 .file 11 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h" 1311 .file 12 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h" 1312 .file 13 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rtc.h" 1313 .file 14 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h" 1314 .file 15 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h" 1315 .file 16 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h" 1316 .file 17 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h" 1317 .file 18 "Core/Inc/main.h" 1318 .file 19 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1. 1319 .file 20 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1. 1320 .file 21 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1. 1321 .file 22 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1. 1322 .file 23 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1. 1323 .file 24 "../libSerial/inc/libSerial/serial.h" 1324 .file 25 "../libBME280/inc/libBME280/bme280_defs.h" 1325 .file 26 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h" 1326 .file 27 "USB_DEVICE/App/usb_device.h" 1327 .file 28 "../libBME280/inc/libBME280/bme280.h" 1328 .file 29 "inc/display.h" ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 41 DEFINED SYMBOLS *ABS*:0000000000000000 main.c C:\Users\mike\AppData\Local\Temp\cchHSijx.s:16 .text.user_delay_us:0000000000000000 $t C:\Users\mike\AppData\Local\Temp\cchHSijx.s:23 .text.user_delay_us:0000000000000000 user_delay_us C:\Users\mike\AppData\Local\Temp\cchHSijx.s:54 .text.user_delay_us:0000000000000014 $d C:\Users\mike\AppData\Local\Temp\cchHSijx.s:59 .text.user_i2c_write:0000000000000000 $t C:\Users\mike\AppData\Local\Temp\cchHSijx.s:65 .text.user_i2c_write:0000000000000000 user_i2c_write C:\Users\mike\AppData\Local\Temp\cchHSijx.s:131 .text.user_i2c_write:0000000000000030 $d *COM*:0000000000000054 hi2c2 C:\Users\mike\AppData\Local\Temp\cchHSijx.s:136 .text.user_i2c_read:0000000000000000 $t C:\Users\mike\AppData\Local\Temp\cchHSijx.s:142 .text.user_i2c_read:0000000000000000 user_i2c_read C:\Users\mike\AppData\Local\Temp\cchHSijx.s:208 .text.user_i2c_read:0000000000000030 $d C:\Users\mike\AppData\Local\Temp\cchHSijx.s:213 .text.MX_GPIO_Init:0000000000000000 $t C:\Users\mike\AppData\Local\Temp\cchHSijx.s:219 .text.MX_GPIO_Init:0000000000000000 MX_GPIO_Init C:\Users\mike\AppData\Local\Temp\cchHSijx.s:362 .text.MX_GPIO_Init:00000000000000a4 $d C:\Users\mike\AppData\Local\Temp\cchHSijx.s:369 .text.MX_SPI1_Init:0000000000000000 $t C:\Users\mike\AppData\Local\Temp\cchHSijx.s:375 .text.MX_SPI1_Init:0000000000000000 MX_SPI1_Init C:\Users\mike\AppData\Local\Temp\cchHSijx.s:441 .text.MX_SPI1_Init:000000000000003c $d *COM*:0000000000000058 hspi1 C:\Users\mike\AppData\Local\Temp\cchHSijx.s:447 .text.MX_TIM4_Init:0000000000000000 $t C:\Users\mike\AppData\Local\Temp\cchHSijx.s:453 .text.MX_TIM4_Init:0000000000000000 MX_TIM4_Init C:\Users\mike\AppData\Local\Temp\cchHSijx.s:549 .text.MX_TIM4_Init:0000000000000050 $d *COM*:0000000000000040 htim4 C:\Users\mike\AppData\Local\Temp\cchHSijx.s:555 .text.MX_USART1_UART_Init:0000000000000000 $t C:\Users\mike\AppData\Local\Temp\cchHSijx.s:561 .text.MX_USART1_UART_Init:0000000000000000 MX_USART1_UART_Init C:\Users\mike\AppData\Local\Temp\cchHSijx.s:610 .text.MX_USART1_UART_Init:0000000000000024 $d *COM*:0000000000000040 huart1 C:\Users\mike\AppData\Local\Temp\cchHSijx.s:616 .text.MX_TIM3_Init:0000000000000000 $t C:\Users\mike\AppData\Local\Temp\cchHSijx.s:622 .text.MX_TIM3_Init:0000000000000000 MX_TIM3_Init C:\Users\mike\AppData\Local\Temp\cchHSijx.s:726 .text.MX_TIM3_Init:0000000000000068 $d *COM*:0000000000000040 htim3 C:\Users\mike\AppData\Local\Temp\cchHSijx.s:732 .text.MX_I2C2_Init:0000000000000000 $t C:\Users\mike\AppData\Local\Temp\cchHSijx.s:738 .text.MX_I2C2_Init:0000000000000000 MX_I2C2_Init C:\Users\mike\AppData\Local\Temp\cchHSijx.s:790 .text.MX_I2C2_Init:0000000000000028 $d C:\Users\mike\AppData\Local\Temp\cchHSijx.s:797 .text.MX_RTC_Init:0000000000000000 $t C:\Users\mike\AppData\Local\Temp\cchHSijx.s:803 .text.MX_RTC_Init:0000000000000000 MX_RTC_Init C:\Users\mike\AppData\Local\Temp\cchHSijx.s:888 .text.MX_RTC_Init:000000000000005c $d *COM*:0000000000000014 hrtc C:\Users\mike\AppData\Local\Temp\cchHSijx.s:894 .text.stream_sensor_data_forced_mode:0000000000000000 $t C:\Users\mike\AppData\Local\Temp\cchHSijx.s:901 .text.stream_sensor_data_forced_mode:0000000000000000 stream_sensor_data_forced_mode C:\Users\mike\AppData\Local\Temp\cchHSijx.s:979 .text.stream_sensor_data_forced_mode:0000000000000044 $d *COM*:0000000000000004 req_delay C:\Users\mike\AppData\Local\Temp\cchHSijx.s:984 .text.SystemClock_Config:0000000000000000 $t C:\Users\mike\AppData\Local\Temp\cchHSijx.s:991 .text.SystemClock_Config:0000000000000000 SystemClock_Config C:\Users\mike\AppData\Local\Temp\cchHSijx.s:1106 .text.main:0000000000000000 $t C:\Users\mike\AppData\Local\Temp\cchHSijx.s:1113 .text.main:0000000000000000 main C:\Users\mike\AppData\Local\Temp\cchHSijx.s:1260 .text.main:00000000000000a4 $d C:\Users\mike\AppData\Local\Temp\cchHSijx.s:1270 .text.Error_Handler:0000000000000000 $t C:\Users\mike\AppData\Local\Temp\cchHSijx.s:1277 .text.Error_Handler:0000000000000000 Error_Handler *COM*:0000000000000001 rslt *COM*:0000000000000002 id *COM*:0000000000000048 dev UNDEFINED SYMBOLS HAL_Delay HAL_I2C_Mem_Write HAL_I2C_Mem_Read ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 42 HAL_GPIO_WritePin HAL_GPIO_Init HAL_SPI_Init HAL_TIM_Encoder_Init HAL_TIMEx_MasterConfigSynchronization HAL_UART_Init HAL_TIM_OC_Init HAL_TIM_OnePulse_Init HAL_TIM_OC_ConfigChannel HAL_I2C_Init HAL_RTC_Init HAL_RTC_SetTime HAL_RTC_SetDate bme280_set_sensor_settings bme280_cal_meas_delay bme280_set_sensor_mode HAL_RCC_OscConfig HAL_RCC_ClockConfig HAL_RCCEx_PeriphCLKConfig HAL_Init MX_USB_DEVICE_Init init_usart_ctl EnableSerialRxInterrupt bme280_init exit cc_init cc_run uc1