Rev 6 | Rev 8 | Go to most recent revision | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 6 | Rev 7 | ||
---|---|---|---|
Line 43... | Line 43... | ||
43 | TIM2->PSC = 72*MICROSECS_PULSE; |
43 | TIM2->PSC = 72*MICROSECS_PULSE; |
44 | TIM2->ARR = 60000; |
44 | TIM2->ARR = 60000; |
45 | TIM2->CR1 = ~TIM_CR1_CKD & (TIM_CR1_CEN | |
45 | TIM2->CR1 = ~TIM_CR1_CKD & (TIM_CR1_CEN | |
46 | TIM_CR1_ARPE ); |
46 | TIM_CR1_ARPE ); |
47 | 47 | ||
- | 48 | /// pulse width 200 uS |
|
48 | TIM2->CCR1 = 100/MICROSECS_PULSE; |
49 | TIM2->CCR1 = 200/MICROSECS_PULSE; |
49 | 50 | ||
50 | TIM2->CCER = TIM_CCER_CC1E | TIM_CCER_CC1P ; //enabled and low |
51 | TIM2->CCER = TIM_CCER_CC1E | TIM_CCER_CC1P ; //enabled and low |
51 | 52 | ||
52 | TIM2->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | |
53 | TIM2->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | |
53 | TIM_CCMR1_OC1PE ; |
54 | TIM_CCMR1_OC1PE ; |
Line 77... | Line 78... | ||
77 | 78 | ||
78 | TIM3->CR1 = ~TIM_CR1_CKD & (TIM_CR1_CEN | TIM_CR1_ARPE ); |
79 | TIM3->CR1 = ~TIM_CR1_CKD & (TIM_CR1_CEN | TIM_CR1_ARPE ); |
79 | 80 | ||
80 | 81 | ||
81 | nvicEnableVector(TIM3_IRQn, |
82 | nvicEnableVector(TIM3_IRQn, |
82 | CORTEX_PRIORITY_MASK(4)); |
83 | 4); |
83 | 84 | ||
84 | 85 | ||
85 | 86 | ||
86 | TIM3->DIER |= TIM_DIER_CC1IE ; |
87 | TIM3->DIER |= TIM_DIER_CC1IE ; |
87 | } |
88 | } |