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/* USER CODE BEGIN Header */
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/**
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/**
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  ******************************************************************************
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  ******************************************************************************
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  * @file    stm32l1xx_it.c
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  * @file    stm32l1xx_it.c
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  * @brief   Interrupt Service Routines.
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  * @brief   Interrupt Service Routines.
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  ******************************************************************************
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  ******************************************************************************
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  * @attention
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  *
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  *
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  * COPYRIGHT(c) 2017 STMicroelectronics
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  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
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  * All rights reserved.</center></h2>
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  *
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  *
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  * Redistribution and use in source and binary forms, with or without modification,
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  * This software component is licensed by ST under BSD 3-Clause license,
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  * are permitted provided that the following conditions are met:
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  * the "License"; You may not use this file except in compliance with the
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  *   1. Redistributions of source code must retain the above copyright notice,
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  *      this list of conditions and the following disclaimer.
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  *   2. Redistributions in binary form must reproduce the above copyright notice,
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  *      this list of conditions and the following disclaimer in the documentation
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  *      and/or other materials provided with the distribution.
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  * License. You may obtain a copy of the License at:
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  *   3. Neither the name of STMicroelectronics nor the names of its contributors
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  *      may be used to endorse or promote products derived from this software
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  *                        opensource.org/licenses/BSD-3-Clause
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  *      without specific prior written permission.
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  *
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  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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  *
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  *
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  ******************************************************************************
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  ******************************************************************************
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  */
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  */
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32l1xx_hal.h"
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#include "stm32l1xx.h"
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#include "main.h"
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#include "stm32l1xx_it.h"
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#include "stm32l1xx_it.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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/* External variables --------------------------------------------------------*/
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extern DMA_HandleTypeDef hdma_adc;
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extern DMA_HandleTypeDef hdma_adc;
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/* USER CODE BEGIN EV */
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/* USER CODE END EV */
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/******************************************************************************/
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/******************************************************************************/
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/*            Cortex-M3 Processor Interruption and Exception Handlers         */
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/*           Cortex-M3 Processor Interruption and Exception Handlers          */
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/******************************************************************************/
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/******************************************************************************/
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/**
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/**
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* @brief This function handles Non maskable interrupt.
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  * @brief This function handles Non maskable interrupt.
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*/
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  */
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void NMI_Handler(void)
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void NMI_Handler(void)
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{
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{
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  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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  /* USER CODE END NonMaskableInt_IRQn 0 */
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  /* USER CODE END NonMaskableInt_IRQn 0 */
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  /* USER CODE END NonMaskableInt_IRQn 1 */
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  /* USER CODE END NonMaskableInt_IRQn 1 */
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}
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}
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/**
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/**
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* @brief This function handles Hard fault interrupt.
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  * @brief This function handles Hard fault interrupt.
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*/
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  */
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void HardFault_Handler(void)
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void HardFault_Handler(void)
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{
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{
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  /* USER CODE BEGIN HardFault_IRQn 0 */
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  /* USER CODE BEGIN HardFault_IRQn 0 */
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  /* USER CODE END HardFault_IRQn 0 */
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  /* USER CODE END HardFault_IRQn 0 */
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  while (1)
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  while (1)
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  {
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  {
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    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
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    /* USER CODE END W1_HardFault_IRQn 0 */
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  }
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  }
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  /* USER CODE BEGIN HardFault_IRQn 1 */
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  /* USER CODE END HardFault_IRQn 1 */
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}
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}
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/**
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/**
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* @brief This function handles Memory management fault.
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  * @brief This function handles Memory management fault.
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*/
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  */
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void MemManage_Handler(void)
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void MemManage_Handler(void)
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{
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{
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  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
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  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
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  /* USER CODE END MemoryManagement_IRQn 0 */
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  /* USER CODE END MemoryManagement_IRQn 0 */
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  while (1)
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  while (1)
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  {
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  {
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    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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    /* USER CODE END W1_MemoryManagement_IRQn 0 */
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  }
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  }
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  /* USER CODE BEGIN MemoryManagement_IRQn 1 */
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  /* USER CODE END MemoryManagement_IRQn 1 */
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}
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}
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/**
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/**
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* @brief This function handles Pre-fetch fault, memory access fault.
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  * @brief This function handles Pre-fetch fault, memory access fault.
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*/
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  */
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void BusFault_Handler(void)
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void BusFault_Handler(void)
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{
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{
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  /* USER CODE BEGIN BusFault_IRQn 0 */
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  /* USER CODE BEGIN BusFault_IRQn 0 */
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  /* USER CODE END BusFault_IRQn 0 */
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  /* USER CODE END BusFault_IRQn 0 */
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  while (1)
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  while (1)
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  {
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  {
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    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
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    /* USER CODE END W1_BusFault_IRQn 0 */
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  }
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  }
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  /* USER CODE BEGIN BusFault_IRQn 1 */
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  /* USER CODE END BusFault_IRQn 1 */
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}
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}
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/**
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/**
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* @brief This function handles Undefined instruction or illegal state.
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  * @brief This function handles Undefined instruction or illegal state.
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*/
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  */
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void UsageFault_Handler(void)
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void UsageFault_Handler(void)
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{
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{
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  /* USER CODE BEGIN UsageFault_IRQn 0 */
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  /* USER CODE BEGIN UsageFault_IRQn 0 */
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  /* USER CODE END UsageFault_IRQn 0 */
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  /* USER CODE END UsageFault_IRQn 0 */
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  while (1)
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  while (1)
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  {
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  {
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    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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    /* USER CODE END W1_UsageFault_IRQn 0 */
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  }
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  }
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  /* USER CODE BEGIN UsageFault_IRQn 1 */
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  /* USER CODE END UsageFault_IRQn 1 */
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}
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}
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/**
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/**
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* @brief This function handles System service call via SWI instruction.
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  * @brief This function handles System service call via SWI instruction.
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*/
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  */
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void SVC_Handler(void)
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void SVC_Handler(void)
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{
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{
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  /* USER CODE BEGIN SVC_IRQn 0 */
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  /* USER CODE BEGIN SVC_IRQn 0 */
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  /* USER CODE END SVC_IRQn 0 */
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  /* USER CODE END SVC_IRQn 0 */
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  /* USER CODE END SVC_IRQn 1 */
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  /* USER CODE END SVC_IRQn 1 */
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}
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}
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/**
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/**
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* @brief This function handles Debug monitor.
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  * @brief This function handles Debug monitor.
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*/
 155 
  */
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void DebugMon_Handler(void)
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void DebugMon_Handler(void)
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{
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{
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  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
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  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
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  /* USER CODE END DebugMonitor_IRQn 0 */
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  /* USER CODE END DebugMonitor_IRQn 0 */
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  /* USER CODE END DebugMonitor_IRQn 1 */
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  /* USER CODE END DebugMonitor_IRQn 1 */
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}
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}
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/**
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/**
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* @brief This function handles Pendable request for system service.
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  * @brief This function handles Pendable request for system service.
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*/
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  */
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void PendSV_Handler(void)
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void PendSV_Handler(void)
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{
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{
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  /* USER CODE BEGIN PendSV_IRQn 0 */
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  /* USER CODE BEGIN PendSV_IRQn 0 */
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  /* USER CODE END PendSV_IRQn 0 */
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  /* USER CODE END PendSV_IRQn 0 */
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  /* USER CODE END PendSV_IRQn 1 */
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  /* USER CODE END PendSV_IRQn 1 */
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}
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}
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/**
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/**
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* @brief This function handles System tick timer.
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  * @brief This function handles System tick timer.
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*/
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  */
168 
void SysTick_Handler(void)
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void SysTick_Handler(void)
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{
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{
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  /* USER CODE BEGIN SysTick_IRQn 0 */
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  /* USER CODE BEGIN SysTick_IRQn 0 */
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  /* USER CODE END SysTick_IRQn 0 */
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  /* USER CODE END SysTick_IRQn 0 */
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  HAL_IncTick();
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  HAL_IncTick();
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  HAL_SYSTICK_IRQHandler();
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  /* USER CODE BEGIN SysTick_IRQn 1 */
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  /* USER CODE BEGIN SysTick_IRQn 1 */
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  /* USER CODE END SysTick_IRQn 1 */
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  /* USER CODE END SysTick_IRQn 1 */
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}
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}
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/* For the available peripheral interrupt handler names,                      */
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/* For the available peripheral interrupt handler names,                      */
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/* please refer to the startup file (startup_stm32l1xx.s).                    */
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/* please refer to the startup file (startup_stm32l1xx.s).                    */
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/******************************************************************************/
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/******************************************************************************/
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/**
 200 
/**
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* @brief This function handles DMA1 channel1 global interrupt.
 201 
  * @brief This function handles DMA1 channel1 global interrupt.
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*/
 202 
  */
190 
void DMA1_Channel1_IRQHandler(void)
 203 
void DMA1_Channel1_IRQHandler(void)
191 
{
 204 
{
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  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
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  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
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  /* USER CODE END DMA1_Channel1_IRQn 0 */
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  /* USER CODE END DMA1_Channel1_IRQn 0 */