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| 6 | */ |
6 | */ |
| 7 | #include "stm32l1xx_hal.h" |
7 | #include "stm32l1xx_hal.h" |
| 8 | #include "misc.h" |
8 | #include "misc.h" |
| 9 | #include "main.h" |
9 | #include "main.h" |
| 10 | 10 | ||
| 11 | - | ||
| 12 | extern TIM_HandleTypeDef htim2; |
11 | extern TIM_HandleTypeDef htim2; |
| 13 | extern TIM_HandleTypeDef htim3; |
12 | extern TIM_HandleTypeDef htim3; |
| 14 | extern TIM_HandleTypeDef htim6; |
13 | extern TIM_HandleTypeDef htim6; |
| 15 | 14 | ||
| 16 | - | ||
| 17 | unsigned volatile long RPM_Time[RPM_SAMPLES]; // sampled on both edges |
15 | unsigned volatile long RPM_Time[RPM_SAMPLES]; // sampled on both edges |
| 18 | unsigned volatile char RPM_Level[RPM_SAMPLES]; // active level when sampled |
16 | unsigned volatile char RPM_Level[RPM_SAMPLES]; // active level when sampled |
| 19 | unsigned volatile long RPM_Count; // incremented every reading |
17 | unsigned volatile long RPM_Count; // incremented every reading |
| 20 | 18 | ||
| 21 | - | ||
| 22 | // this is set if there is an ignition pulse interrupt |
- | |
| 23 | unsigned char volatile ignitionPulse = 0; |
- | |
| 24 | // this is set if there is a timer timeout interrupt |
19 | // this is set if there is a timer timeout interrupt |
| 25 | unsigned char volatile periodPulse = 0; |
20 | unsigned char volatile periodPulse = 0; |
| 26 | 21 | ||
| - | 22 | static void |
|
| 27 | static void triggerTim3(void) |
23 | triggerTim3 (void) |
| 28 | { |
24 | { |
| 29 | htim3.Instance->CNT = 0; |
25 | htim3.Instance->CNT = 0; |
| 30 | htim3.Instance->CR1|= TIM_CR1_CEN; |
26 | htim3.Instance->CR1 |= TIM_CR1_CEN; |
| 31 | 27 | ||
| 32 | } |
28 | } |
| 33 | 29 | ||
| - | 30 | void |
|
| 34 | void TIM2_IRQHandler(void) |
31 | TIM2_IRQHandler (void) |
| 35 | { |
32 | { |
| 36 | if(__HAL_TIM_GET_FLAG(&htim2, TIM_FLAG_CC1)) |
33 | if (__HAL_TIM_GET_FLAG(&htim2, TIM_FLAG_CC1)) |
| - | 34 | { |
|
| - | 35 | __HAL_TIM_CLEAR_FLAG(&htim2, TIM_FLAG_CC1); |
|
| - | 36 | RPM_Time[RPM_Count] = __HAL_TIM_GET_COMPARE(&htim2, TIM_CHANNEL_1); |
|
| - | 37 | int CB_level = HAL_GPIO_ReadPin (CB_Pulse_GPIO_Port, |
|
| - | 38 | CB_Pulse_Pin); |
|
| - | 39 | RPM_Level[RPM_Count] = CB_level; |
|
| - | 40 | RPM_Count = (RPM_Count + 1) % RPM_SAMPLES; |
|
| - | 41 | ||
| - | 42 | if ( CB_level == 0) |
|
| 37 | { |
43 | { |
| 38 | __HAL_TIM_CLEAR_FLAG(&htim2, TIM_FLAG_CC1) ; |
- | |
| 39 | RPM_Time[RPM_Count] = __HAL_TIM_GET_COMPARE(&htim2,TIM_CHANNEL_1); |
- | |
| 40 | RPM_Level[RPM_Count] = |
- | |
| 41 | HAL_GPIO_ReadPin(CB_Pulse_GPIO_Port, CB_Pulse_Pin); |
- | |
| 42 | RPM_Count = (RPM_Count+1) % RPM_SAMPLES ; |
- | |
| 43 | - | ||
| 44 | if(periodPulse == 1) |
- | |
| 45 | { |
- | |
| 46 | periodPulse = 0; |
44 | periodPulse = 0; |
| 47 | triggerTim3(); |
45 | triggerTim3 (); |
| 48 | } |
- | |
| 49 | ignitionPulse = 1; |
- | |
| 50 | } |
46 | } |
| - | 47 | } |
|
| 51 | } |
48 | } |
| 52 | 49 | ||
| 53 | - | ||
| - | 50 | char chtTimer = 0; |
|
| 54 | char blink = 0; |
51 | char blink = 0; |
| 55 | // 100mS periodic sampler handler |
52 | // 100mS periodic sampler handler |
| - | 53 | void |
|
| 56 | void TIM6_IRQHandler(void) |
54 | TIM6_IRQHandler (void) |
| 57 | { |
55 | { |
| 58 | if(__HAL_TIM_GET_FLAG(&htim6, TIM_FLAG_UPDATE)) |
56 | if (__HAL_TIM_GET_FLAG(&htim6, TIM_FLAG_UPDATE)) |
| - | 57 | { |
|
| - | 58 | __HAL_TIM_CLEAR_FLAG(&htim6, TIM_FLAG_UPDATE); |
|
| - | 59 | ||
| - | 60 | blink = !blink; |
|
| - | 61 | HAL_GPIO_WritePin (LED_Blink_GPIO_Port, LED_Blink_Pin, |
|
| - | 62 | blink ? GPIO_PIN_SET : GPIO_PIN_RESET); |
|
| - | 63 | ||
| - | 64 | TimerFlag = 1; |
|
| - | 65 | if (NoSerialInCTR < 5) |
|
| 59 | { |
66 | { |
| - | 67 | NoSerialInCTR++; |
|
| 60 | __HAL_TIM_CLEAR_FLAG(&htim6, TIM_FLAG_UPDATE) ; |
68 | if (NoSerialInCTR == 5) |
| - | 69 | { |
|
| - | 70 | NoSerialIn = 1; |
|
| - | 71 | } |
|
| - | 72 | } |
|
| 61 | 73 | ||
| - | 74 | if (periodPulse == 1) |
|
| - | 75 | { |
|
| 62 | blink = !blink; |
76 | triggerTim3 (); |
| 63 | HAL_GPIO_WritePin(LED_Blink_GPIO_Port, LED_Blink_Pin, blink ? GPIO_PIN_SET : GPIO_PIN_RESET); |
- | |
| 64 | 77 | ||
| 65 | TimerFlag = 1; |
- | |
| 66 | if (NoSerialInCTR < 5) { |
- | |
| 67 | NoSerialInCTR++; |
- | |
| 68 | if (NoSerialInCTR == 5) { |
- | |
| 69 | NoSerialIn = 1; |
- | |
| 70 | } |
78 | } |
| 71 | } |
79 | periodPulse = 1; |
| 72 | 80 | ||
| 73 | if(ignitionPulse == 0) |
- | |
| 74 | triggerTim3(); |
- | |
| 75 | 81 | ||
| 76 | periodPulse = 1; |
82 | chtTimer++; |
| 77 | } |
83 | } |
| 78 | 84 | ||
| 79 | } |
85 | } |
| 80 | 86 | ||
| - | 87 | void |
|
| 81 | void resetSerialTimeout(void) |
88 | TIM3_IRQHandler (void) |
| 82 | { |
89 | { |
| 83 | __disable_irq(); |
90 | if (__HAL_TIM_GET_FLAG(&htim3, TIM_FLAG_UPDATE)) |
| 84 | NoSerialInCTR= 0 ; |
- | |
| 85 | NoSerialIn = 0; |
91 | { |
| 86 | __enable_irq(); |
92 | __HAL_TIM_CLEAR_FLAG(&htim3, TIM_FLAG_UPDATE); |
| 87 | } |
- | |
| 88 | 93 | ||
| 89 | #if OLD_ENGINEBAY |
- | |
| 90 | //----------------------------------------------------------- |
- | |
| 91 | // This is the 10Hz timer |
94 | if (chtTimer >= 3) // every 300mS |
| 92 | 95 | { |
|
| 93 | void interrupt TimerISR1(void) { |
- | |
| 94 | TimerFlag = 1; |
96 | chtTimer = 0; |
| 95 | if (NoSerialInCTR < 5) { |
- | |
| 96 | NoSerialInCTR++; |
- | |
| 97 | if (NoSerialInCTR == 5) { |
- | |
| 98 | NoSerialIn = 1; |
- | |
| 99 | } |
- | |
| 100 | } |
- | |
| 101 | } |
- | |
| 102 | //----------------------------------------------------------- |
- | |
| 103 | 97 | ||
| - | 98 | for (int instance = 0; instance < 2; instance++) |
|
| - | 99 | { |
|
| - | 100 | uint8_t buffer[2]; |
|
| - | 101 | uint16_t Pin = |
|
| - | 102 | (instance == 0) ? SPI_NS_Temp_Pin : SPI_NS_Temp2_Pin; |
|
| 104 | 103 | ||
| 105 | volatile unsigned long RPM_Time[RPM_LIMIT]; |
- | |
| 106 | volatile unsigned long RPM_Count; // incremented every reading |
104 | HAL_GPIO_WritePin (SPI_NS_Temp_GPIO_Port, Pin, GPIO_PIN_RESET); |
| 107 | 105 | ||
| 108 | void TimerISR0(void) { |
- | |
| 109 | // check the listing |
- | |
| 110 | asm volatile ("STMDB SP!, {r0-r4} "); |
106 | HAL_SPI_Receive (&hspi1, buffer, 2, 2); |
| 111 | // sort out the captures |
- | |
| 112 | int stat = REG(TIMER0_IR); |
- | |
| 113 | if (stat & (1 << 4)) //CR0 |
- | |
| 114 | { |
- | |
| 115 | RPM_Time[RPM_Count++] = REG(TIMER0_CR0); |
- | |
| 116 | if (RPM_Count == RPM_LIMIT) { |
- | |
| 117 | RPM_Count = 0; |
- | |
| 118 | } |
- | |
| 119 | } |
- | |
| 120 | if (stat & (1 << 5)) //CR1 |
- | |
| 121 | { |
- | |
| 122 | // TDC_Time = REG(TIMER0_CR1); |
- | |
| 123 | // TDC_Count++; |
- | |
| 124 | } |
- | |
| 125 | 107 | ||
| 126 | REG(TIMER0_IR) = stat; // clear the interrupts just handled. |
108 | HAL_GPIO_WritePin (SPI_NS_Temp_GPIO_Port, Pin, GPIO_PIN_SET); |
| 127 | REG(VICVectAddr) = 0; // reset the VIC |
- | |
| 128 | asm volatile ("LDMIA SP!, {r0-r4} "); |
- | |
| 129 | asm volatile ("SUBS PC,lr,#4"); |
- | |
| 130 | } |
- | |
| 131 | 109 | ||
| 132 | //----------------------------------------------------------- |
- | |
| 133 | // UART management |
- | |
| 134 | // serial counter |
- | |
| 135 | #define THRE (1<<6) |
- | |
| 136 | #define RDR (1<<0) |
- | |
| 137 | #define BUFFSIZ 256 |
- | |
| 138 | - | ||
| 139 | volatile char txbuff[BUFFSIZ]; |
- | |
| 140 | volatile int txptr = 0; |
- | |
| 141 | volatile int txcnt = 0; |
- | |
| 142 | - | ||
| 143 | volatile char rxbuff[BUFFSIZ]; |
- | |
| 144 | volatile int rxptr = 0; |
- | |
| 145 | volatile int rxcnt = 0; |
- | |
| 146 | - | ||
| 147 | void Uart0ISR(void) __attribute__((naked)); |
- | |
| 148 | void Uart0ISR(void) __attribute__((noinline)); |
- | |
| 149 | void Uart0ISR(void) { |
- | |
| 150 | asm volatile ("STMDB SP!, {r0-r3} "); |
- | |
| 151 | int stat; |
- | |
| 152 | while (!((stat = REG(UART0_IIR)) & 1)) { // LSbit is inactive |
- | |
| 153 | switch (stat & 0x0E) { |
- | |
| 154 | case 4: |
- | |
| 155 | case 12: { |
- | |
| 156 | char c = REG(UART0_RBR); |
- | |
| 157 | - | ||
| 158 | NoSerialIn = NoSerialInCTR = 0; |
- | |
| 159 | - | ||
| 160 | if (rxcnt < (BUFFSIZ - 1)) { |
- | |
| 161 | rxbuff[(rxptr + rxcnt) % BUFFSIZ] = c; |
- | |
| 162 | rxcnt++; |
- | |
| 163 | } |
- | |
| 164 | } |
- | |
| 165 | break; |
- | |
| 166 | case 2: { |
- | |
| 167 | if (txcnt > 0) { |
- | |
| 168 | REG(UART0_THR) = txbuff[txptr]; |
- | |
| 169 | txcnt--; |
- | |
| 170 | txptr++; |
- | |
| 171 | txptr %= BUFFSIZ; |
- | |
| 172 | } else { |
- | |
| 173 | REG(UART0_IER) &= ~(1 << 1); // disable TX |
110 | uint16_t obs = (buffer[0] << 8) | buffer[1]; |
| 174 | } |
- | |
| 175 | } |
- | |
| 176 | break; |
- | |
| 177 | } |
- | |
| 178 | } |
- | |
| 179 | REG(VICVectAddr) = 0; // reset the VIC |
- | |
| 180 | asm volatile ("LDMIA SP!, {r0-r3} "); |
- | |
| 181 | asm volatile ("SUBS PC,lr,#4"); |
- | |
| 182 | } |
- | |
| 183 | 111 | ||
| 184 | int my_putchar(int c) { |
- | |
| 185 | int rc = 0; |
- | |
| 186 | { |
- | |
| 187 | STI; |
- | |
| 188 | if (!(REG(UART0_IER) & (1 << 1))) { |
- | |
| 189 | REG(UART0_IER) |= (1 << 1); |
- | |
| 190 | REG(UART0_THR) = c; |
- | |
| 191 | rc=1; |
- | |
| 192 | } else { |
- | |
| 193 | - | ||
| 194 | if (txcnt < (BUFFSIZ - 1)) { |
- | |
| 195 | txbuff[(txptr + txcnt) % BUFFSIZ] = c; |
112 | // good observation if the status bit is clear, and the reading is less than 1023 |
| 196 | txcnt++; |
- | |
| 197 | rc = 1; |
- | |
| 198 | } |
- | |
| 199 | } |
- | |
| 200 | CLI; |
- | |
| 201 | } |
- | |
| 202 | return rc; |
- | |
| 203 | } |
- | |
| 204 | 113 | ||
| 205 | int my_getchar(void) { |
114 | uint16_t temp_c = obs >> 5; |
| 206 | 115 | ||
| - | 116 | uint8_t good = ((obs & 7) == 0) && (temp_c > 0) && (temp_c < 250); |
|
| - | 117 | ||
| 207 | int c = -1; |
118 | if (good) |
| 208 | STI; |
119 | { |
| 209 | if (rxcnt) { |
- | |
| 210 | c = rxbuff[rxptr]; |
120 | CHT_Observations[instance] = temp_c; |
| 211 | rxcnt--; |
121 | } |
| 212 | rxptr++; |
122 | } |
| 213 | rxptr %= BUFFSIZ; |
- | |
| 214 | } |
123 | } |
| 215 | CLI; |
124 | } |
| 216 | return c; |
- | |
| 217 | } |
125 | } |
| 218 | 126 | ||
| - | 127 | void |
|
| - | 128 | resetSerialTimeout (void) |
|
| - | 129 | { |
|
| - | 130 | __disable_irq (); |
|
| - | 131 | NoSerialInCTR = 0; |
|
| - | 132 | NoSerialIn = 0; |
|
| - | 133 | __enable_irq (); |
|
| - | 134 | } |
|
| 219 | 135 | ||
| 220 | - | ||
| 221 | #endif |
- | |