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1 | /** |
1 | /** |
2 | ****************************************************************************** |
2 | ****************************************************************************** |
3 | * @file stm32l1xx_hal_cortex.c |
3 | * @file stm32l1xx_hal_cortex.c |
4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
5 | * @version V1.2.0 |
- | |
6 | * @date 01-July-2016 |
- | |
7 | * @brief CORTEX HAL module driver. |
5 | * @brief CORTEX HAL module driver. |
8 | * |
6 | * |
9 | * This file provides firmware functions to manage the following |
7 | * This file provides firmware functions to manage the following |
10 | * functionalities of the CORTEX: |
8 | * functionalities of the CORTEX: |
11 | * + Initialization and de-initialization functions |
9 | * + Initialization and de-initialization functions |
Line 21... | Line 19... | ||
21 | =========================================================== |
19 | =========================================================== |
22 | [..] |
20 | [..] |
23 | This section provide functions allowing to configure the NVIC interrupts (IRQ). |
21 | This section provide functions allowing to configure the NVIC interrupts (IRQ). |
24 | The Cortex-M3 exceptions are managed by CMSIS functions. |
22 | The Cortex-M3 exceptions are managed by CMSIS functions. |
25 | |
23 | |
26 | (#) Configure the NVIC Priority Grouping using HAL_NVIC_SetPriorityGrouping() |
24 | (#) Configure the NVIC Priority Grouping using HAL_NVIC_SetPriorityGrouping() function |
27 | function according to the following table. |
- | |
28 | 25 | ||
29 | The table below gives the allowed values of the pre-emption priority and subpriority according |
- | |
30 | to the Priority Grouping configuration performed by HAL_NVIC_SetPriorityGrouping() function. |
- | |
31 | ========================================================================================================================== |
- | |
32 | NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description |
- | |
33 | ========================================================================================================================== |
- | |
34 | NVIC_PRIORITYGROUP_0 | 0 | 0-15 | 0 bits for pre-emption priority |
- | |
35 | | | | 4 bits for subpriority |
- | |
36 | -------------------------------------------------------------------------------------------------------------------------- |
- | |
37 | NVIC_PRIORITYGROUP_1 | 0-1 | 0-7 | 1 bits for pre-emption priority |
- | |
38 | | | | 3 bits for subpriority |
- | |
39 | -------------------------------------------------------------------------------------------------------------------------- |
- | |
40 | NVIC_PRIORITYGROUP_2 | 0-3 | 0-3 | 2 bits for pre-emption priority |
- | |
41 | | | | 2 bits for subpriority |
- | |
42 | -------------------------------------------------------------------------------------------------------------------------- |
- | |
43 | NVIC_PRIORITYGROUP_3 | 0-7 | 0-1 | 3 bits for pre-emption priority |
- | |
44 | | | | 1 bits for subpriority |
- | |
45 | -------------------------------------------------------------------------------------------------------------------------- |
- | |
46 | NVIC_PRIORITYGROUP_4 | 0-15 | 0 | 4 bits for pre-emption priority |
- | |
47 | | | | 0 bits for subpriority |
- | |
48 | ========================================================================================================================== |
- | |
49 | (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority() |
26 | (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority() |
50 | 27 | ||
51 | (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ() |
28 | (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ() |
52 | |
29 | |
53 | 30 | ||
Line 91... | Line 68... | ||
91 | |
68 | |
92 | @endverbatim |
69 | @endverbatim |
93 | ****************************************************************************** |
70 | ****************************************************************************** |
94 | * @attention |
71 | * @attention |
95 | * |
72 | * |
96 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
73 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
97 | * |
- | |
98 | * Redistribution and use in source and binary forms, with or without modification, |
- | |
99 | * are permitted provided that the following conditions are met: |
- | |
100 | * 1. Redistributions of source code must retain the above copyright notice, |
- | |
101 | * this list of conditions and the following disclaimer. |
- | |
102 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
- | |
103 | * this list of conditions and the following disclaimer in the documentation |
- | |
104 | * and/or other materials provided with the distribution. |
- | |
105 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
- | |
106 | * may be used to endorse or promote products derived from this software |
- | |
107 | * without specific prior written permission. |
74 | * All rights reserved.</center></h2> |
108 | * |
75 | * |
109 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
76 | * This software component is licensed by ST under BSD 3-Clause license, |
110 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
- | |
111 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
- | |
112 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
- | |
113 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
- | |
114 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
77 | * the "License"; You may not use this file except in compliance with the |
115 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
78 | * License. You may obtain a copy of the License at: |
116 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
- | |
117 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
- | |
118 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
79 | * opensource.org/licenses/BSD-3-Clause |
119 | * |
80 | * |
120 | ****************************************************************************** |
81 | ****************************************************************************** |
121 | */ |
82 | */ |
122 | 83 | ||
- | 84 | /* |
|
- | 85 | Additional Tables: CORTEX_NVIC_Priority_Table |
|
- | 86 | The table below gives the allowed values of the pre-emption priority and subpriority according |
|
- | 87 | to the Priority Grouping configuration performed by HAL_NVIC_SetPriorityGrouping() function. |
|
- | 88 | ========================================================================================================================== |
|
- | 89 | NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description |
|
- | 90 | ========================================================================================================================== |
|
- | 91 | NVIC_PRIORITYGROUP_0 | 0 | 0-15 | 0 bits for pre-emption priority |
|
- | 92 | | | | 4 bits for subpriority |
|
- | 93 | -------------------------------------------------------------------------------------------------------------------------- |
|
- | 94 | NVIC_PRIORITYGROUP_1 | 0-1 | 0-7 | 1 bits for pre-emption priority |
|
- | 95 | | | | 3 bits for subpriority |
|
- | 96 | -------------------------------------------------------------------------------------------------------------------------- |
|
- | 97 | NVIC_PRIORITYGROUP_2 | 0-3 | 0-3 | 2 bits for pre-emption priority |
|
- | 98 | | | | 2 bits for subpriority |
|
- | 99 | -------------------------------------------------------------------------------------------------------------------------- |
|
- | 100 | NVIC_PRIORITYGROUP_3 | 0-7 | 0-1 | 3 bits for pre-emption priority |
|
- | 101 | | | | 1 bits for subpriority |
|
- | 102 | -------------------------------------------------------------------------------------------------------------------------- |
|
- | 103 | NVIC_PRIORITYGROUP_4 | 0-15 | 0 | 4 bits for pre-emption priority |
|
- | 104 | | | | 0 bits for subpriority |
|
- | 105 | ========================================================================================================================== |
|
- | 106 | */ |
|
- | 107 | ||
123 | /* Includes ------------------------------------------------------------------*/ |
108 | /* Includes ------------------------------------------------------------------*/ |
124 | #include "stm32l1xx_hal.h" |
109 | #include "stm32l1xx_hal.h" |
125 | 110 | ||
126 | /** @addtogroup STM32L1xx_HAL_Driver |
111 | /** @addtogroup STM32L1xx_HAL_Driver |
127 | * @{ |
112 | * @{ |
Line 163... | Line 148... | ||
163 | 148 | ||
164 | 149 | ||
165 | /** |
150 | /** |
166 | * @brief Sets the priority grouping field (pre-emption priority and subpriority) |
151 | * @brief Sets the priority grouping field (pre-emption priority and subpriority) |
167 | * using the required unlock sequence. |
152 | * using the required unlock sequence. |
168 | * @param PriorityGroup: The priority grouping bits length. |
153 | * @param PriorityGroup The priority grouping bits length. |
169 | * This parameter can be one of the following values: |
154 | * This parameter can be one of the following values: |
170 | * @arg NVIC_PRIORITYGROUP_0: 0 bits for pre-emption priority |
155 | * @arg NVIC_PRIORITYGROUP_0: 0 bits for pre-emption priority |
171 | * 4 bits for subpriority |
156 | * 4 bits for subpriority |
172 | * @arg NVIC_PRIORITYGROUP_1: 1 bits for pre-emption priority |
157 | * @arg NVIC_PRIORITYGROUP_1: 1 bits for pre-emption priority |
173 | * 3 bits for subpriority |
158 | * 3 bits for subpriority |
Line 190... | Line 175... | ||
190 | NVIC_SetPriorityGrouping(PriorityGroup); |
175 | NVIC_SetPriorityGrouping(PriorityGroup); |
191 | } |
176 | } |
192 | 177 | ||
193 | /** |
178 | /** |
194 | * @brief Sets the priority of an interrupt. |
179 | * @brief Sets the priority of an interrupt. |
195 | * @param IRQn: External interrupt number |
180 | * @param IRQn External interrupt number |
196 | * This parameter can be an enumerator of IRQn_Type enumeration |
181 | * This parameter can be an enumerator of IRQn_Type enumeration |
197 | * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l1xx.h)) |
182 | * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l1xx.h)) |
198 | * @param PreemptPriority: The pre-emption priority for the IRQn channel. |
183 | * @param PreemptPriority The pre-emption priority for the IRQn channel. |
199 | * This parameter can be a value between 0 and 15 |
184 | * This parameter can be a value between 0 and 15 |
200 | * A lower priority value indicates a higher priority |
185 | * A lower priority value indicates a higher priority |
201 | * @param SubPriority: the subpriority level for the IRQ channel. |
186 | * @param SubPriority the subpriority level for the IRQ channel. |
202 | * This parameter can be a value between 0 and 15 |
187 | * This parameter can be a value between 0 and 15 |
203 | * A lower priority value indicates a higher priority. |
188 | * A lower priority value indicates a higher priority. |
204 | * @retval None |
189 | * @retval None |
205 | */ |
190 | */ |
206 | void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) |
191 | void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) |
Line 261... | Line 246... | ||
261 | } |
246 | } |
262 | 247 | ||
263 | /** |
248 | /** |
264 | * @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer. |
249 | * @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer. |
265 | * Counter is in free running mode to generate periodic interrupts. |
250 | * Counter is in free running mode to generate periodic interrupts. |
266 | * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. |
251 | * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. |
267 | * @retval status: - 0 Function succeeded. |
252 | * @retval status: - 0 Function succeeded. |
268 | * - 1 Function failed. |
253 | * - 1 Function failed. |
269 | */ |
254 | */ |
270 | uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) |
255 | uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) |
271 | { |
256 | { |
Line 291... | Line 276... | ||
291 | * @{ |
276 | * @{ |
292 | */ |
277 | */ |
293 | 278 | ||
294 | #if (__MPU_PRESENT == 1) |
279 | #if (__MPU_PRESENT == 1) |
295 | /** |
280 | /** |
- | 281 | * @brief Enable the MPU. |
|
- | 282 | * @param MPU_Control Specifies the control mode of the MPU during hard fault, |
|
- | 283 | * NMI, FAULTMASK and privileged accessto the default memory |
|
- | 284 | * This parameter can be one of the following values: |
|
- | 285 | * @arg MPU_HFNMI_PRIVDEF_NONE |
|
- | 286 | * @arg MPU_HARDFAULT_NMI |
|
- | 287 | * @arg MPU_PRIVILEGED_DEFAULT |
|
- | 288 | * @arg MPU_HFNMI_PRIVDEF |
|
- | 289 | * @retval None |
|
- | 290 | */ |
|
- | 291 | void HAL_MPU_Enable(uint32_t MPU_Control) |
|
- | 292 | { |
|
- | 293 | /* Enable the MPU */ |
|
- | 294 | MPU->CTRL = (MPU_Control | MPU_CTRL_ENABLE_Msk); |
|
- | 295 | ||
- | 296 | /* Ensure MPU setting take effects */ |
|
- | 297 | __DSB(); |
|
- | 298 | __ISB(); |
|
- | 299 | } |
|
- | 300 | ||
- | 301 | /** |
|
- | 302 | * @brief Disable the MPU. |
|
- | 303 | * @retval None |
|
- | 304 | */ |
|
- | 305 | void HAL_MPU_Disable(void) |
|
- | 306 | { |
|
- | 307 | /* Make sure outstanding transfers are done */ |
|
- | 308 | __DMB(); |
|
- | 309 | ||
- | 310 | /* Disable the MPU and clear the control register*/ |
|
- | 311 | MPU->CTRL = 0; |
|
- | 312 | } |
|
- | 313 | ||
- | 314 | /** |
|
296 | * @brief Initializes and configures the Region and the memory to be protected. |
315 | * @brief Initializes and configures the Region and the memory to be protected. |
297 | * @param MPU_Init: Pointer to a MPU_Region_InitTypeDef structure that contains |
316 | * @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains |
298 | * the initialization and configuration information. |
317 | * the initialization and configuration information. |
299 | * @retval None |
318 | * @retval None |
300 | */ |
319 | */ |
301 | void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init) |
320 | void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init) |
302 | { |
321 | { |
Line 348... | Line 367... | ||
348 | return NVIC_GetPriorityGrouping(); |
367 | return NVIC_GetPriorityGrouping(); |
349 | } |
368 | } |
350 | 369 | ||
351 | /** |
370 | /** |
352 | * @brief Gets the priority of an interrupt. |
371 | * @brief Gets the priority of an interrupt. |
353 | * @param IRQn: External interrupt number |
372 | * @param IRQn External interrupt number |
354 | * This parameter can be an enumerator of IRQn_Type enumeration |
373 | * This parameter can be an enumerator of IRQn_Type enumeration |
355 | * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l1xxxx.h)) |
374 | * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l1xxxx.h)) |
356 | * @param PriorityGroup: the priority grouping bits length. |
375 | * @param PriorityGroup the priority grouping bits length. |
357 | * This parameter can be one of the following values: |
376 | * This parameter can be one of the following values: |
358 | * @arg NVIC_PRIORITYGROUP_0: 0 bits for pre-emption priority |
377 | * @arg NVIC_PRIORITYGROUP_0: 0 bits for pre-emption priority |
359 | * 4 bits for subpriority |
378 | * 4 bits for subpriority |
360 | * @arg NVIC_PRIORITYGROUP_1: 1 bits for pre-emption priority |
379 | * @arg NVIC_PRIORITYGROUP_1: 1 bits for pre-emption priority |
361 | * 3 bits for subpriority |
380 | * 3 bits for subpriority |
Line 363... | Line 382... | ||
363 | * 2 bits for subpriority |
382 | * 2 bits for subpriority |
364 | * @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority |
383 | * @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority |
365 | * 1 bits for subpriority |
384 | * 1 bits for subpriority |
366 | * @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority |
385 | * @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority |
367 | * 0 bits for subpriority |
386 | * 0 bits for subpriority |
368 | * @param pPreemptPriority: Pointer on the Preemptive priority value (starting from 0). |
387 | * @param pPreemptPriority Pointer on the Preemptive priority value (starting from 0). |
369 | * @param pSubPriority: Pointer on the Subpriority value (starting from 0). |
388 | * @param pSubPriority Pointer on the Subpriority value (starting from 0). |
370 | * @retval None |
389 | * @retval None |
371 | */ |
390 | */ |
372 | void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority) |
391 | void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority) |
373 | { |
392 | { |
374 | /* Check the parameters */ |
393 | /* Check the parameters */ |
Line 432... | Line 451... | ||
432 | return NVIC_GetActive(IRQn); |
451 | return NVIC_GetActive(IRQn); |
433 | } |
452 | } |
434 | 453 | ||
435 | /** |
454 | /** |
436 | * @brief Configures the SysTick clock source. |
455 | * @brief Configures the SysTick clock source. |
437 | * @param CLKSource: specifies the SysTick clock source. |
456 | * @param CLKSource specifies the SysTick clock source. |
438 | * This parameter can be one of the following values: |
457 | * This parameter can be one of the following values: |
439 | * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source. |
458 | * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source. |
440 | * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source. |
459 | * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source. |
441 | * @retval None |
460 | * @retval None |
442 | */ |
461 | */ |