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| 1 | /** |
1 | /** |
| 2 | ****************************************************************************** |
2 | ****************************************************************************** |
| 3 | * @file stm32l1xx_hal_pwr.h |
3 | * @file stm32l1xx_hal_pwr.h |
| 4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
| 5 | * @version V1.2.0 |
- | |
| 6 | * @date 01-July-2016 |
- | |
| 7 | * @brief Header file of PWR HAL module. |
5 | * @brief Header file of PWR HAL module. |
| 8 | ****************************************************************************** |
6 | ****************************************************************************** |
| 9 | * @attention |
7 | * @attention |
| 10 | * |
8 | * |
| 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
9 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
| - | 10 | * All rights reserved.</center></h2> |
|
| 12 | * |
11 | * |
| 13 | * Redistribution and use in source and binary forms, with or without modification, |
12 | * This software component is licensed by ST under BSD 3-Clause license, |
| 14 | * are permitted provided that the following conditions are met: |
13 | * the "License"; You may not use this file except in compliance with the |
| 15 | * 1. Redistributions of source code must retain the above copyright notice, |
- | |
| 16 | * this list of conditions and the following disclaimer. |
- | |
| 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
- | |
| 18 | * this list of conditions and the following disclaimer in the documentation |
- | |
| 19 | * and/or other materials provided with the distribution. |
14 | * License. You may obtain a copy of the License at: |
| 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
- | |
| 21 | * may be used to endorse or promote products derived from this software |
15 | * opensource.org/licenses/BSD-3-Clause |
| 22 | * without specific prior written permission. |
- | |
| 23 | * |
- | |
| 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
- | |
| 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
- | |
| 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
- | |
| 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
- | |
| 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
- | |
| 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
- | |
| 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
- | |
| 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
- | |
| 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
- | |
| 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
- | |
| 34 | * |
16 | * |
| 35 | ****************************************************************************** |
17 | ****************************************************************************** |
| 36 | */ |
18 | */ |
| 37 | 19 | ||
| 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| Line 56... | Line 38... | ||
| 56 | 38 | ||
| 57 | /* Exported types ------------------------------------------------------------*/ |
39 | /* Exported types ------------------------------------------------------------*/ |
| 58 | 40 | ||
| 59 | /** @defgroup PWR_Exported_Types PWR Exported Types |
41 | /** @defgroup PWR_Exported_Types PWR Exported Types |
| 60 | * @{ |
42 | * @{ |
| 61 | */ |
43 | */ |
| 62 | 44 | ||
| 63 | /** |
45 | /** |
| 64 | * @brief PWR PVD configuration structure definition |
46 | * @brief PWR PVD configuration structure definition |
| 65 | */ |
47 | */ |
| 66 | typedef struct |
48 | typedef struct |
| Line 78... | Line 60... | ||
| 78 | 60 | ||
| 79 | /* Internal constants --------------------------------------------------------*/ |
61 | /* Internal constants --------------------------------------------------------*/ |
| 80 | 62 | ||
| 81 | /** @addtogroup PWR_Private_Constants |
63 | /** @addtogroup PWR_Private_Constants |
| 82 | * @{ |
64 | * @{ |
| 83 | */ |
65 | */ |
| 84 | #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ |
66 | #define PWR_EXTI_LINE_PVD (0x00010000U) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ |
| 85 | 67 | ||
| 86 | /** |
68 | /** |
| 87 | * @} |
69 | * @} |
| 88 | */ |
70 | */ |
| 89 | 71 | ||
| 90 | 72 | ||
| 91 | 73 | ||
| 92 | /* Exported constants --------------------------------------------------------*/ |
74 | /* Exported constants --------------------------------------------------------*/ |
| 93 | 75 | ||
| 94 | /** @defgroup PWR_Exported_Constants PWR Exported Constants |
76 | /** @defgroup PWR_Exported_Constants PWR Exported Constants |
| 95 | * @{ |
77 | * @{ |
| 96 | */ |
78 | */ |
| 97 | 79 | ||
| 98 | /** @defgroup PWR_register_alias_address PWR Register alias address |
80 | /** @defgroup PWR_register_alias_address PWR Register alias address |
| 99 | * @{ |
81 | * @{ |
| 100 | */ |
82 | */ |
| 101 | /* ------------- PWR registers bit address in the alias region ---------------*/ |
83 | /* ------------- PWR registers bit address in the alias region ---------------*/ |
| Line 105... | Line 87... | ||
| 105 | #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET) |
87 | #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET) |
| 106 | #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET) |
88 | #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET) |
| 107 | /** |
89 | /** |
| 108 | * @} |
90 | * @} |
| 109 | */ |
91 | */ |
| 110 | 92 | ||
| 111 | /** @defgroup PWR_CR_register_alias PWR CR Register alias address |
93 | /** @defgroup PWR_CR_register_alias PWR CR Register alias address |
| 112 | * @{ |
94 | * @{ |
| 113 | */ |
95 | */ |
| 114 | /* --- CR Register ---*/ |
96 | /* --- CR Register ---*/ |
| 115 | /* Alias word address of LPSDSR bit */ |
97 | /* Alias word address of LPSDSR bit */ |
| 116 | #define LPSDSR_BIT_NUMBER POSITION_VAL(PWR_CR_LPSDSR) |
98 | #define LPSDSR_BIT_NUMBER POSITION_VAL(PWR_CR_LPSDSR) |
| 117 | #define CR_LPSDSR_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPSDSR_BIT_NUMBER * 4))) |
99 | #define CR_LPSDSR_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPSDSR_BIT_NUMBER * 4))) |
| 118 | 100 | ||
| Line 147... | Line 129... | ||
| 147 | /* Alias word address of EWUP1, EWUP2 and EWUP3 bits */ |
129 | /* Alias word address of EWUP1, EWUP2 and EWUP3 bits */ |
| 148 | #define CSR_EWUP_BB(VAL) ((uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (POSITION_VAL(VAL) * 4))) |
130 | #define CSR_EWUP_BB(VAL) ((uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (POSITION_VAL(VAL) * 4))) |
| 149 | /** |
131 | /** |
| 150 | * @} |
132 | * @} |
| 151 | */ |
133 | */ |
| 152 | 134 | ||
| 153 | /** @defgroup PWR_PVD_detection_level PWR PVD detection level |
135 | /** @defgroup PWR_PVD_detection_level PWR PVD detection level |
| 154 | * @{ |
136 | * @{ |
| 155 | */ |
137 | */ |
| 156 | #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0 |
138 | #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0 |
| 157 | #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1 |
139 | #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1 |
| 158 | #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2 |
140 | #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2 |
| 159 | #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3 |
141 | #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3 |
| 160 | #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4 |
142 | #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4 |
| 161 | #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5 |
143 | #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5 |
| 162 | #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6 |
144 | #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6 |
| 163 | #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7 /* External input analog voltage |
145 | #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7 /* External input analog voltage |
| 164 | (Compare internally to VREFINT) */ |
146 | (Compare internally to VREFINT) */ |
| 165 | 147 | ||
| 166 | /** |
148 | /** |
| 167 | * @} |
149 | * @} |
| 168 | */ |
150 | */ |
| 169 | 151 | ||
| 170 | /** @defgroup PWR_PVD_Mode PWR PVD Mode |
152 | /** @defgroup PWR_PVD_Mode PWR PVD Mode |
| 171 | * @{ |
153 | * @{ |
| 172 | */ |
154 | */ |
| 173 | #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */ |
155 | #define PWR_PVD_MODE_NORMAL (0x00000000U) /*!< basic mode is used */ |
| 174 | #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */ |
156 | #define PWR_PVD_MODE_IT_RISING (0x00010001U) /*!< External Interrupt Mode with Rising edge trigger detection */ |
| 175 | #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */ |
157 | #define PWR_PVD_MODE_IT_FALLING (0x00010002U) /*!< External Interrupt Mode with Falling edge trigger detection */ |
| 176 | #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ |
158 | #define PWR_PVD_MODE_IT_RISING_FALLING (0x00010003U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ |
| 177 | #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */ |
159 | #define PWR_PVD_MODE_EVENT_RISING (0x00020001U) /*!< Event Mode with Rising edge trigger detection */ |
| 178 | #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */ |
160 | #define PWR_PVD_MODE_EVENT_FALLING (0x00020002U) /*!< Event Mode with Falling edge trigger detection */ |
| 179 | #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */ |
161 | #define PWR_PVD_MODE_EVENT_RISING_FALLING (0x00020003U) /*!< Event Mode with Rising/Falling edge trigger detection */ |
| 180 | 162 | ||
| 181 | /** |
163 | /** |
| 182 | * @} |
164 | * @} |
| 183 | */ |
165 | */ |
| 184 | 166 | ||
| 185 | /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode |
167 | /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode |
| 186 | * @{ |
168 | * @{ |
| 187 | */ |
169 | */ |
| 188 | #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000) |
170 | #define PWR_MAINREGULATOR_ON (0x00000000U) |
| 189 | #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPSDSR |
171 | #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPSDSR |
| 190 | 172 | ||
| 191 | /** |
173 | /** |
| 192 | * @} |
174 | * @} |
| 193 | */ |
175 | */ |
| Line 247... | Line 229... | ||
| 247 | /** @defgroup PWR_Exported_Macros PWR Exported Macros |
229 | /** @defgroup PWR_Exported_Macros PWR Exported Macros |
| 248 | * @{ |
230 | * @{ |
| 249 | */ |
231 | */ |
| 250 | 232 | ||
| 251 | /** @brief macros configure the main internal regulator output voltage. |
233 | /** @brief macros configure the main internal regulator output voltage. |
| 252 | * @param __REGULATOR__: specifies the regulator output voltage to achieve |
234 | * @param __REGULATOR__ specifies the regulator output voltage to achieve |
| 253 | * a tradeoff between performance and power consumption when the device does |
235 | * a tradeoff between performance and power consumption when the device does |
| 254 | * not operate at the maximum frequency (refer to the datasheets for more details). |
236 | * not operate at the maximum frequency (refer to the datasheets for more details). |
| 255 | * This parameter can be one of the following values: |
237 | * This parameter can be one of the following values: |
| 256 | * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode, |
238 | * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode, |
| 257 | * System frequency up to 32 MHz. |
239 | * System frequency up to 32 MHz. |
| Line 262... | Line 244... | ||
| 262 | * @retval None |
244 | * @retval None |
| 263 | */ |
245 | */ |
| 264 | #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__))) |
246 | #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__))) |
| 265 | 247 | ||
| 266 | /** @brief Check PWR flag is set or not. |
248 | /** @brief Check PWR flag is set or not. |
| 267 | * @param __FLAG__: specifies the flag to check. |
249 | * @param __FLAG__ specifies the flag to check. |
| 268 | * This parameter can be one of the following values: |
250 | * This parameter can be one of the following values: |
| 269 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event |
251 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event |
| 270 | * was received from the WKUP pin or from the RTC alarm (Alarm B), |
252 | * was received from the WKUP pin or from the RTC alarm (Alarm B), |
| 271 | * RTC Tamper event, RTC TimeStamp event or RTC Wakeup. |
253 | * RTC Tamper event, RTC TimeStamp event or RTC Wakeup. |
| 272 | * An additional wakeup event is detected if the WKUP pin is enabled |
254 | * An additional wakeup event is detected if the WKUP pin is enabled |
| 273 | * (by setting the EWUP bit) when the WKUP pin level is already high. |
255 | * (by setting the EWUP bit) when the WKUP pin level is already high. |
| 274 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was |
256 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was |
| 275 | * resumed from StandBy mode. |
257 | * resumed from StandBy mode. |
| 276 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled |
258 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled |
| 277 | * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode |
259 | * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode |
| 278 | * For this reason, this bit is equal to 0 after Standby or reset |
260 | * For this reason, this bit is equal to 0 after Standby or reset |
| 279 | * until the PVDE bit is set. |
261 | * until the PVDE bit is set. |
| 280 | * @arg PWR_FLAG_VREFINTRDY: Internal voltage reference (VREFINT) ready flag. |
262 | * @arg PWR_FLAG_VREFINTRDY: Internal voltage reference (VREFINT) ready flag. |
| 281 | * This bit indicates the state of the internal voltage reference, VREFINT. |
263 | * This bit indicates the state of the internal voltage reference, VREFINT. |
| Line 290... | Line 272... | ||
| 290 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
272 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| 291 | */ |
273 | */ |
| 292 | #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) |
274 | #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) |
| 293 | 275 | ||
| 294 | /** @brief Clear the PWR's pending flags. |
276 | /** @brief Clear the PWR's pending flags. |
| 295 | * @param __FLAG__: specifies the flag to clear. |
277 | * @param __FLAG__ specifies the flag to clear. |
| 296 | * This parameter can be one of the following values: |
278 | * This parameter can be one of the following values: |
| 297 | * @arg PWR_FLAG_WU: Wake Up flag |
279 | * @arg PWR_FLAG_WU: Wake Up flag |
| 298 | * @arg PWR_FLAG_SB: StandBy flag |
280 | * @arg PWR_FLAG_SB: StandBy flag |
| 299 | */ |
281 | */ |
| 300 | #define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR->CR, ((__FLAG__) << 2)) |
282 | #define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR->CR, ((__FLAG__) << 2)) |
| Line 356... | Line 338... | ||
| 356 | */ |
338 | */ |
| 357 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ |
339 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ |
| 358 | do { \ |
340 | do { \ |
| 359 | __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \ |
341 | __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \ |
| 360 | __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \ |
342 | __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \ |
| 361 | } while(0) |
343 | } while(0) |
| 362 | 344 | ||
| 363 | /** |
345 | /** |
| 364 | * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. |
346 | * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. |
| 365 | * @retval None. |
347 | * @retval None. |
| 366 | */ |
348 | */ |
| 367 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ |
349 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ |
| 368 | do { \ |
350 | do { \ |
| 369 | __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \ |
351 | __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \ |
| 370 | __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \ |
352 | __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \ |
| 371 | } while(0) |
353 | } while(0) |
| 372 | 354 | ||
| 373 | 355 | ||
| 374 | 356 | ||
| 375 | /** |
357 | /** |
| 376 | * @brief Check whether the specified PVD EXTI interrupt flag is set or not. |
358 | * @brief Check whether the specified PVD EXTI interrupt flag is set or not. |
| Line 435... | Line 417... | ||
| 435 | /* Exported functions --------------------------------------------------------*/ |
417 | /* Exported functions --------------------------------------------------------*/ |
| 436 | 418 | ||
| 437 | /** @addtogroup PWR_Exported_Functions PWR Exported Functions |
419 | /** @addtogroup PWR_Exported_Functions PWR Exported Functions |
| 438 | * @{ |
420 | * @{ |
| 439 | */ |
421 | */ |
| 440 | 422 | ||
| 441 | /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions |
423 | /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions |
| 442 | * @{ |
424 | * @{ |
| 443 | */ |
425 | */ |
| 444 | 426 | ||
| 445 | /* Initialization and de-initialization functions *******************************/ |
427 | /* Initialization and de-initialization functions *******************************/ |
| 446 | void HAL_PWR_DeInit(void); |
428 | void HAL_PWR_DeInit(void); |
| Line 449... | Line 431... | ||
| 449 | 431 | ||
| 450 | /** |
432 | /** |
| 451 | * @} |
433 | * @} |
| 452 | */ |
434 | */ |
| 453 | 435 | ||
| 454 | /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions |
436 | /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions |
| 455 | * @{ |
437 | * @{ |
| 456 | */ |
438 | */ |
| 457 | 439 | ||
| 458 | /* Peripheral Control functions ************************************************/ |
440 | /* Peripheral Control functions ************************************************/ |
| 459 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); |
441 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); |
| Line 487... | Line 469... | ||
| 487 | */ |
469 | */ |
| 488 | 470 | ||
| 489 | /** |
471 | /** |
| 490 | * @} |
472 | * @} |
| 491 | */ |
473 | */ |
| 492 | 474 | ||
| 493 | /** |
475 | /** |
| 494 | * @} |
476 | * @} |
| 495 | */ |
477 | */ |
| 496 | 478 | ||
| 497 | #ifdef __cplusplus |
479 | #ifdef __cplusplus |